1*a9fa9459Szrj /* Select disassembly routine for specified architecture.
2*a9fa9459Szrj Copyright (C) 1994-2016 Free Software Foundation, Inc.
3*a9fa9459Szrj
4*a9fa9459Szrj This file is part of the GNU opcodes library.
5*a9fa9459Szrj
6*a9fa9459Szrj This library is free software; you can redistribute it and/or modify
7*a9fa9459Szrj it under the terms of the GNU General Public License as published by
8*a9fa9459Szrj the Free Software Foundation; either version 3 of the License, or
9*a9fa9459Szrj (at your option) any later version.
10*a9fa9459Szrj
11*a9fa9459Szrj This program is distributed in the hope that it will be useful,
12*a9fa9459Szrj but WITHOUT ANY WARRANTY; without even the implied warranty of
13*a9fa9459Szrj MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14*a9fa9459Szrj GNU General Public License for more details.
15*a9fa9459Szrj
16*a9fa9459Szrj You should have received a copy of the GNU General Public License
17*a9fa9459Szrj along with this program; if not, write to the Free Software
18*a9fa9459Szrj Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19*a9fa9459Szrj MA 02110-1301, USA. */
20*a9fa9459Szrj
21*a9fa9459Szrj #include "sysdep.h"
22*a9fa9459Szrj #include "dis-asm.h"
23*a9fa9459Szrj
24*a9fa9459Szrj #ifdef ARCH_all
25*a9fa9459Szrj #define ARCH_aarch64
26*a9fa9459Szrj #define ARCH_alpha
27*a9fa9459Szrj #define ARCH_arc
28*a9fa9459Szrj #define ARCH_arm
29*a9fa9459Szrj #define ARCH_avr
30*a9fa9459Szrj #define ARCH_bfin
31*a9fa9459Szrj #define ARCH_cr16
32*a9fa9459Szrj #define ARCH_cris
33*a9fa9459Szrj #define ARCH_crx
34*a9fa9459Szrj #define ARCH_d10v
35*a9fa9459Szrj #define ARCH_d30v
36*a9fa9459Szrj #define ARCH_dlx
37*a9fa9459Szrj #define ARCH_epiphany
38*a9fa9459Szrj #define ARCH_fr30
39*a9fa9459Szrj #define ARCH_frv
40*a9fa9459Szrj #define ARCH_ft32
41*a9fa9459Szrj #define ARCH_h8300
42*a9fa9459Szrj #define ARCH_h8500
43*a9fa9459Szrj #define ARCH_hppa
44*a9fa9459Szrj #define ARCH_i370
45*a9fa9459Szrj #define ARCH_i386
46*a9fa9459Szrj #define ARCH_i860
47*a9fa9459Szrj #define ARCH_i960
48*a9fa9459Szrj #define ARCH_ia64
49*a9fa9459Szrj #define ARCH_ip2k
50*a9fa9459Szrj #define ARCH_iq2000
51*a9fa9459Szrj #define ARCH_lm32
52*a9fa9459Szrj #define ARCH_m32c
53*a9fa9459Szrj #define ARCH_m32r
54*a9fa9459Szrj #define ARCH_m68hc11
55*a9fa9459Szrj #define ARCH_m68hc12
56*a9fa9459Szrj #define ARCH_m68k
57*a9fa9459Szrj #define ARCH_m88k
58*a9fa9459Szrj #define ARCH_mcore
59*a9fa9459Szrj #define ARCH_mep
60*a9fa9459Szrj #define ARCH_metag
61*a9fa9459Szrj #define ARCH_microblaze
62*a9fa9459Szrj #define ARCH_mips
63*a9fa9459Szrj #define ARCH_mmix
64*a9fa9459Szrj #define ARCH_mn10200
65*a9fa9459Szrj #define ARCH_mn10300
66*a9fa9459Szrj #define ARCH_moxie
67*a9fa9459Szrj #define ARCH_mt
68*a9fa9459Szrj #define ARCH_msp430
69*a9fa9459Szrj #define ARCH_nds32
70*a9fa9459Szrj #define ARCH_nios2
71*a9fa9459Szrj #define ARCH_ns32k
72*a9fa9459Szrj #define ARCH_or1k
73*a9fa9459Szrj #define ARCH_pdp11
74*a9fa9459Szrj #define ARCH_pj
75*a9fa9459Szrj #define ARCH_powerpc
76*a9fa9459Szrj #define ARCH_rs6000
77*a9fa9459Szrj #define ARCH_rl78
78*a9fa9459Szrj #define ARCH_rx
79*a9fa9459Szrj #define ARCH_s390
80*a9fa9459Szrj #define ARCH_score
81*a9fa9459Szrj #define ARCH_sh
82*a9fa9459Szrj #define ARCH_sparc
83*a9fa9459Szrj #define ARCH_spu
84*a9fa9459Szrj #define ARCH_tic30
85*a9fa9459Szrj #define ARCH_tic4x
86*a9fa9459Szrj #define ARCH_tic54x
87*a9fa9459Szrj #define ARCH_tic6x
88*a9fa9459Szrj #define ARCH_tic80
89*a9fa9459Szrj #define ARCH_tilegx
90*a9fa9459Szrj #define ARCH_tilepro
91*a9fa9459Szrj #define ARCH_v850
92*a9fa9459Szrj #define ARCH_vax
93*a9fa9459Szrj #define ARCH_visium
94*a9fa9459Szrj #define ARCH_w65
95*a9fa9459Szrj #define ARCH_xstormy16
96*a9fa9459Szrj #define ARCH_xc16x
97*a9fa9459Szrj #define ARCH_xgate
98*a9fa9459Szrj #define ARCH_xtensa
99*a9fa9459Szrj #define ARCH_z80
100*a9fa9459Szrj #define ARCH_z8k
101*a9fa9459Szrj #define INCLUDE_SHMEDIA
102*a9fa9459Szrj #endif
103*a9fa9459Szrj
104*a9fa9459Szrj #ifdef ARCH_m32c
105*a9fa9459Szrj #include "m32c-desc.h"
106*a9fa9459Szrj #endif
107*a9fa9459Szrj
108*a9fa9459Szrj disassembler_ftype
disassembler(bfd * abfd)109*a9fa9459Szrj disassembler (bfd *abfd)
110*a9fa9459Szrj {
111*a9fa9459Szrj enum bfd_architecture a = bfd_get_arch (abfd);
112*a9fa9459Szrj disassembler_ftype disassemble;
113*a9fa9459Szrj
114*a9fa9459Szrj switch (a)
115*a9fa9459Szrj {
116*a9fa9459Szrj /* If you add a case to this table, also add it to the
117*a9fa9459Szrj ARCH_all definition right above this function. */
118*a9fa9459Szrj #ifdef ARCH_aarch64
119*a9fa9459Szrj case bfd_arch_aarch64:
120*a9fa9459Szrj disassemble = print_insn_aarch64;
121*a9fa9459Szrj break;
122*a9fa9459Szrj #endif
123*a9fa9459Szrj #ifdef ARCH_alpha
124*a9fa9459Szrj case bfd_arch_alpha:
125*a9fa9459Szrj disassemble = print_insn_alpha;
126*a9fa9459Szrj break;
127*a9fa9459Szrj #endif
128*a9fa9459Szrj #ifdef ARCH_arc
129*a9fa9459Szrj case bfd_arch_arc:
130*a9fa9459Szrj disassemble = arc_get_disassembler (abfd);
131*a9fa9459Szrj break;
132*a9fa9459Szrj #endif
133*a9fa9459Szrj #ifdef ARCH_arm
134*a9fa9459Szrj case bfd_arch_arm:
135*a9fa9459Szrj if (bfd_big_endian (abfd))
136*a9fa9459Szrj disassemble = print_insn_big_arm;
137*a9fa9459Szrj else
138*a9fa9459Szrj disassemble = print_insn_little_arm;
139*a9fa9459Szrj break;
140*a9fa9459Szrj #endif
141*a9fa9459Szrj #ifdef ARCH_avr
142*a9fa9459Szrj case bfd_arch_avr:
143*a9fa9459Szrj disassemble = print_insn_avr;
144*a9fa9459Szrj break;
145*a9fa9459Szrj #endif
146*a9fa9459Szrj #ifdef ARCH_bfin
147*a9fa9459Szrj case bfd_arch_bfin:
148*a9fa9459Szrj disassemble = print_insn_bfin;
149*a9fa9459Szrj break;
150*a9fa9459Szrj #endif
151*a9fa9459Szrj #ifdef ARCH_cr16
152*a9fa9459Szrj case bfd_arch_cr16:
153*a9fa9459Szrj disassemble = print_insn_cr16;
154*a9fa9459Szrj break;
155*a9fa9459Szrj #endif
156*a9fa9459Szrj #ifdef ARCH_cris
157*a9fa9459Szrj case bfd_arch_cris:
158*a9fa9459Szrj disassemble = cris_get_disassembler (abfd);
159*a9fa9459Szrj break;
160*a9fa9459Szrj #endif
161*a9fa9459Szrj #ifdef ARCH_crx
162*a9fa9459Szrj case bfd_arch_crx:
163*a9fa9459Szrj disassemble = print_insn_crx;
164*a9fa9459Szrj break;
165*a9fa9459Szrj #endif
166*a9fa9459Szrj #ifdef ARCH_d10v
167*a9fa9459Szrj case bfd_arch_d10v:
168*a9fa9459Szrj disassemble = print_insn_d10v;
169*a9fa9459Szrj break;
170*a9fa9459Szrj #endif
171*a9fa9459Szrj #ifdef ARCH_d30v
172*a9fa9459Szrj case bfd_arch_d30v:
173*a9fa9459Szrj disassemble = print_insn_d30v;
174*a9fa9459Szrj break;
175*a9fa9459Szrj #endif
176*a9fa9459Szrj #ifdef ARCH_dlx
177*a9fa9459Szrj case bfd_arch_dlx:
178*a9fa9459Szrj /* As far as I know we only handle big-endian DLX objects. */
179*a9fa9459Szrj disassemble = print_insn_dlx;
180*a9fa9459Szrj break;
181*a9fa9459Szrj #endif
182*a9fa9459Szrj #ifdef ARCH_h8300
183*a9fa9459Szrj case bfd_arch_h8300:
184*a9fa9459Szrj if (bfd_get_mach (abfd) == bfd_mach_h8300h
185*a9fa9459Szrj || bfd_get_mach (abfd) == bfd_mach_h8300hn)
186*a9fa9459Szrj disassemble = print_insn_h8300h;
187*a9fa9459Szrj else if (bfd_get_mach (abfd) == bfd_mach_h8300s
188*a9fa9459Szrj || bfd_get_mach (abfd) == bfd_mach_h8300sn
189*a9fa9459Szrj || bfd_get_mach (abfd) == bfd_mach_h8300sx
190*a9fa9459Szrj || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
191*a9fa9459Szrj disassemble = print_insn_h8300s;
192*a9fa9459Szrj else
193*a9fa9459Szrj disassemble = print_insn_h8300;
194*a9fa9459Szrj break;
195*a9fa9459Szrj #endif
196*a9fa9459Szrj #ifdef ARCH_h8500
197*a9fa9459Szrj case bfd_arch_h8500:
198*a9fa9459Szrj disassemble = print_insn_h8500;
199*a9fa9459Szrj break;
200*a9fa9459Szrj #endif
201*a9fa9459Szrj #ifdef ARCH_hppa
202*a9fa9459Szrj case bfd_arch_hppa:
203*a9fa9459Szrj disassemble = print_insn_hppa;
204*a9fa9459Szrj break;
205*a9fa9459Szrj #endif
206*a9fa9459Szrj #ifdef ARCH_i370
207*a9fa9459Szrj case bfd_arch_i370:
208*a9fa9459Szrj disassemble = print_insn_i370;
209*a9fa9459Szrj break;
210*a9fa9459Szrj #endif
211*a9fa9459Szrj #ifdef ARCH_i386
212*a9fa9459Szrj case bfd_arch_i386:
213*a9fa9459Szrj case bfd_arch_iamcu:
214*a9fa9459Szrj case bfd_arch_l1om:
215*a9fa9459Szrj case bfd_arch_k1om:
216*a9fa9459Szrj disassemble = print_insn_i386;
217*a9fa9459Szrj break;
218*a9fa9459Szrj #endif
219*a9fa9459Szrj #ifdef ARCH_i860
220*a9fa9459Szrj case bfd_arch_i860:
221*a9fa9459Szrj disassemble = print_insn_i860;
222*a9fa9459Szrj break;
223*a9fa9459Szrj #endif
224*a9fa9459Szrj #ifdef ARCH_i960
225*a9fa9459Szrj case bfd_arch_i960:
226*a9fa9459Szrj disassemble = print_insn_i960;
227*a9fa9459Szrj break;
228*a9fa9459Szrj #endif
229*a9fa9459Szrj #ifdef ARCH_ia64
230*a9fa9459Szrj case bfd_arch_ia64:
231*a9fa9459Szrj disassemble = print_insn_ia64;
232*a9fa9459Szrj break;
233*a9fa9459Szrj #endif
234*a9fa9459Szrj #ifdef ARCH_ip2k
235*a9fa9459Szrj case bfd_arch_ip2k:
236*a9fa9459Szrj disassemble = print_insn_ip2k;
237*a9fa9459Szrj break;
238*a9fa9459Szrj #endif
239*a9fa9459Szrj #ifdef ARCH_epiphany
240*a9fa9459Szrj case bfd_arch_epiphany:
241*a9fa9459Szrj disassemble = print_insn_epiphany;
242*a9fa9459Szrj break;
243*a9fa9459Szrj #endif
244*a9fa9459Szrj #ifdef ARCH_fr30
245*a9fa9459Szrj case bfd_arch_fr30:
246*a9fa9459Szrj disassemble = print_insn_fr30;
247*a9fa9459Szrj break;
248*a9fa9459Szrj #endif
249*a9fa9459Szrj #ifdef ARCH_lm32
250*a9fa9459Szrj case bfd_arch_lm32:
251*a9fa9459Szrj disassemble = print_insn_lm32;
252*a9fa9459Szrj break;
253*a9fa9459Szrj #endif
254*a9fa9459Szrj #ifdef ARCH_m32r
255*a9fa9459Szrj case bfd_arch_m32r:
256*a9fa9459Szrj disassemble = print_insn_m32r;
257*a9fa9459Szrj break;
258*a9fa9459Szrj #endif
259*a9fa9459Szrj #if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \
260*a9fa9459Szrj || defined(ARCH_9s12x) || defined(ARCH_m9s12xg)
261*a9fa9459Szrj case bfd_arch_m68hc11:
262*a9fa9459Szrj disassemble = print_insn_m68hc11;
263*a9fa9459Szrj break;
264*a9fa9459Szrj case bfd_arch_m68hc12:
265*a9fa9459Szrj disassemble = print_insn_m68hc12;
266*a9fa9459Szrj break;
267*a9fa9459Szrj case bfd_arch_m9s12x:
268*a9fa9459Szrj disassemble = print_insn_m9s12x;
269*a9fa9459Szrj break;
270*a9fa9459Szrj case bfd_arch_m9s12xg:
271*a9fa9459Szrj disassemble = print_insn_m9s12xg;
272*a9fa9459Szrj break;
273*a9fa9459Szrj #endif
274*a9fa9459Szrj #ifdef ARCH_m68k
275*a9fa9459Szrj case bfd_arch_m68k:
276*a9fa9459Szrj disassemble = print_insn_m68k;
277*a9fa9459Szrj break;
278*a9fa9459Szrj #endif
279*a9fa9459Szrj #ifdef ARCH_m88k
280*a9fa9459Szrj case bfd_arch_m88k:
281*a9fa9459Szrj disassemble = print_insn_m88k;
282*a9fa9459Szrj break;
283*a9fa9459Szrj #endif
284*a9fa9459Szrj #ifdef ARCH_mt
285*a9fa9459Szrj case bfd_arch_mt:
286*a9fa9459Szrj disassemble = print_insn_mt;
287*a9fa9459Szrj break;
288*a9fa9459Szrj #endif
289*a9fa9459Szrj #ifdef ARCH_microblaze
290*a9fa9459Szrj case bfd_arch_microblaze:
291*a9fa9459Szrj disassemble = print_insn_microblaze;
292*a9fa9459Szrj break;
293*a9fa9459Szrj #endif
294*a9fa9459Szrj #ifdef ARCH_msp430
295*a9fa9459Szrj case bfd_arch_msp430:
296*a9fa9459Szrj disassemble = print_insn_msp430;
297*a9fa9459Szrj break;
298*a9fa9459Szrj #endif
299*a9fa9459Szrj #ifdef ARCH_nds32
300*a9fa9459Szrj case bfd_arch_nds32:
301*a9fa9459Szrj disassemble = print_insn_nds32;
302*a9fa9459Szrj break;
303*a9fa9459Szrj #endif
304*a9fa9459Szrj #ifdef ARCH_ns32k
305*a9fa9459Szrj case bfd_arch_ns32k:
306*a9fa9459Szrj disassemble = print_insn_ns32k;
307*a9fa9459Szrj break;
308*a9fa9459Szrj #endif
309*a9fa9459Szrj #ifdef ARCH_mcore
310*a9fa9459Szrj case bfd_arch_mcore:
311*a9fa9459Szrj disassemble = print_insn_mcore;
312*a9fa9459Szrj break;
313*a9fa9459Szrj #endif
314*a9fa9459Szrj #ifdef ARCH_mep
315*a9fa9459Szrj case bfd_arch_mep:
316*a9fa9459Szrj disassemble = print_insn_mep;
317*a9fa9459Szrj break;
318*a9fa9459Szrj #endif
319*a9fa9459Szrj #ifdef ARCH_metag
320*a9fa9459Szrj case bfd_arch_metag:
321*a9fa9459Szrj disassemble = print_insn_metag;
322*a9fa9459Szrj break;
323*a9fa9459Szrj #endif
324*a9fa9459Szrj #ifdef ARCH_mips
325*a9fa9459Szrj case bfd_arch_mips:
326*a9fa9459Szrj if (bfd_big_endian (abfd))
327*a9fa9459Szrj disassemble = print_insn_big_mips;
328*a9fa9459Szrj else
329*a9fa9459Szrj disassemble = print_insn_little_mips;
330*a9fa9459Szrj break;
331*a9fa9459Szrj #endif
332*a9fa9459Szrj #ifdef ARCH_mmix
333*a9fa9459Szrj case bfd_arch_mmix:
334*a9fa9459Szrj disassemble = print_insn_mmix;
335*a9fa9459Szrj break;
336*a9fa9459Szrj #endif
337*a9fa9459Szrj #ifdef ARCH_mn10200
338*a9fa9459Szrj case bfd_arch_mn10200:
339*a9fa9459Szrj disassemble = print_insn_mn10200;
340*a9fa9459Szrj break;
341*a9fa9459Szrj #endif
342*a9fa9459Szrj #ifdef ARCH_mn10300
343*a9fa9459Szrj case bfd_arch_mn10300:
344*a9fa9459Szrj disassemble = print_insn_mn10300;
345*a9fa9459Szrj break;
346*a9fa9459Szrj #endif
347*a9fa9459Szrj #ifdef ARCH_nios2
348*a9fa9459Szrj case bfd_arch_nios2:
349*a9fa9459Szrj if (bfd_big_endian (abfd))
350*a9fa9459Szrj disassemble = print_insn_big_nios2;
351*a9fa9459Szrj else
352*a9fa9459Szrj disassemble = print_insn_little_nios2;
353*a9fa9459Szrj break;
354*a9fa9459Szrj #endif
355*a9fa9459Szrj #ifdef ARCH_or1k
356*a9fa9459Szrj case bfd_arch_or1k:
357*a9fa9459Szrj disassemble = print_insn_or1k;
358*a9fa9459Szrj break;
359*a9fa9459Szrj #endif
360*a9fa9459Szrj #ifdef ARCH_pdp11
361*a9fa9459Szrj case bfd_arch_pdp11:
362*a9fa9459Szrj disassemble = print_insn_pdp11;
363*a9fa9459Szrj break;
364*a9fa9459Szrj #endif
365*a9fa9459Szrj #ifdef ARCH_pj
366*a9fa9459Szrj case bfd_arch_pj:
367*a9fa9459Szrj disassemble = print_insn_pj;
368*a9fa9459Szrj break;
369*a9fa9459Szrj #endif
370*a9fa9459Szrj #ifdef ARCH_powerpc
371*a9fa9459Szrj case bfd_arch_powerpc:
372*a9fa9459Szrj if (bfd_big_endian (abfd))
373*a9fa9459Szrj disassemble = print_insn_big_powerpc;
374*a9fa9459Szrj else
375*a9fa9459Szrj disassemble = print_insn_little_powerpc;
376*a9fa9459Szrj break;
377*a9fa9459Szrj #endif
378*a9fa9459Szrj #ifdef ARCH_rs6000
379*a9fa9459Szrj case bfd_arch_rs6000:
380*a9fa9459Szrj if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
381*a9fa9459Szrj disassemble = print_insn_big_powerpc;
382*a9fa9459Szrj else
383*a9fa9459Szrj disassemble = print_insn_rs6000;
384*a9fa9459Szrj break;
385*a9fa9459Szrj #endif
386*a9fa9459Szrj #ifdef ARCH_rl78
387*a9fa9459Szrj case bfd_arch_rl78:
388*a9fa9459Szrj disassemble = rl78_get_disassembler (abfd);
389*a9fa9459Szrj break;
390*a9fa9459Szrj #endif
391*a9fa9459Szrj #ifdef ARCH_rx
392*a9fa9459Szrj case bfd_arch_rx:
393*a9fa9459Szrj disassemble = print_insn_rx;
394*a9fa9459Szrj break;
395*a9fa9459Szrj #endif
396*a9fa9459Szrj #ifdef ARCH_s390
397*a9fa9459Szrj case bfd_arch_s390:
398*a9fa9459Szrj disassemble = print_insn_s390;
399*a9fa9459Szrj break;
400*a9fa9459Szrj #endif
401*a9fa9459Szrj #ifdef ARCH_score
402*a9fa9459Szrj case bfd_arch_score:
403*a9fa9459Szrj if (bfd_big_endian (abfd))
404*a9fa9459Szrj disassemble = print_insn_big_score;
405*a9fa9459Szrj else
406*a9fa9459Szrj disassemble = print_insn_little_score;
407*a9fa9459Szrj break;
408*a9fa9459Szrj #endif
409*a9fa9459Szrj #ifdef ARCH_sh
410*a9fa9459Szrj case bfd_arch_sh:
411*a9fa9459Szrj disassemble = print_insn_sh;
412*a9fa9459Szrj break;
413*a9fa9459Szrj #endif
414*a9fa9459Szrj #ifdef ARCH_sparc
415*a9fa9459Szrj case bfd_arch_sparc:
416*a9fa9459Szrj disassemble = print_insn_sparc;
417*a9fa9459Szrj break;
418*a9fa9459Szrj #endif
419*a9fa9459Szrj #ifdef ARCH_spu
420*a9fa9459Szrj case bfd_arch_spu:
421*a9fa9459Szrj disassemble = print_insn_spu;
422*a9fa9459Szrj break;
423*a9fa9459Szrj #endif
424*a9fa9459Szrj #ifdef ARCH_tic30
425*a9fa9459Szrj case bfd_arch_tic30:
426*a9fa9459Szrj disassemble = print_insn_tic30;
427*a9fa9459Szrj break;
428*a9fa9459Szrj #endif
429*a9fa9459Szrj #ifdef ARCH_tic4x
430*a9fa9459Szrj case bfd_arch_tic4x:
431*a9fa9459Szrj disassemble = print_insn_tic4x;
432*a9fa9459Szrj break;
433*a9fa9459Szrj #endif
434*a9fa9459Szrj #ifdef ARCH_tic54x
435*a9fa9459Szrj case bfd_arch_tic54x:
436*a9fa9459Szrj disassemble = print_insn_tic54x;
437*a9fa9459Szrj break;
438*a9fa9459Szrj #endif
439*a9fa9459Szrj #ifdef ARCH_tic6x
440*a9fa9459Szrj case bfd_arch_tic6x:
441*a9fa9459Szrj disassemble = print_insn_tic6x;
442*a9fa9459Szrj break;
443*a9fa9459Szrj #endif
444*a9fa9459Szrj #ifdef ARCH_tic80
445*a9fa9459Szrj case bfd_arch_tic80:
446*a9fa9459Szrj disassemble = print_insn_tic80;
447*a9fa9459Szrj break;
448*a9fa9459Szrj #endif
449*a9fa9459Szrj #ifdef ARCH_ft32
450*a9fa9459Szrj case bfd_arch_ft32:
451*a9fa9459Szrj disassemble = print_insn_ft32;
452*a9fa9459Szrj break;
453*a9fa9459Szrj #endif
454*a9fa9459Szrj #ifdef ARCH_v850
455*a9fa9459Szrj case bfd_arch_v850:
456*a9fa9459Szrj case bfd_arch_v850_rh850:
457*a9fa9459Szrj disassemble = print_insn_v850;
458*a9fa9459Szrj break;
459*a9fa9459Szrj #endif
460*a9fa9459Szrj #ifdef ARCH_w65
461*a9fa9459Szrj case bfd_arch_w65:
462*a9fa9459Szrj disassemble = print_insn_w65;
463*a9fa9459Szrj break;
464*a9fa9459Szrj #endif
465*a9fa9459Szrj #ifdef ARCH_xgate
466*a9fa9459Szrj case bfd_arch_xgate:
467*a9fa9459Szrj disassemble = print_insn_xgate;
468*a9fa9459Szrj break;
469*a9fa9459Szrj #endif
470*a9fa9459Szrj #ifdef ARCH_xstormy16
471*a9fa9459Szrj case bfd_arch_xstormy16:
472*a9fa9459Szrj disassemble = print_insn_xstormy16;
473*a9fa9459Szrj break;
474*a9fa9459Szrj #endif
475*a9fa9459Szrj #ifdef ARCH_xc16x
476*a9fa9459Szrj case bfd_arch_xc16x:
477*a9fa9459Szrj disassemble = print_insn_xc16x;
478*a9fa9459Szrj break;
479*a9fa9459Szrj #endif
480*a9fa9459Szrj #ifdef ARCH_xtensa
481*a9fa9459Szrj case bfd_arch_xtensa:
482*a9fa9459Szrj disassemble = print_insn_xtensa;
483*a9fa9459Szrj break;
484*a9fa9459Szrj #endif
485*a9fa9459Szrj #ifdef ARCH_z80
486*a9fa9459Szrj case bfd_arch_z80:
487*a9fa9459Szrj disassemble = print_insn_z80;
488*a9fa9459Szrj break;
489*a9fa9459Szrj #endif
490*a9fa9459Szrj #ifdef ARCH_z8k
491*a9fa9459Szrj case bfd_arch_z8k:
492*a9fa9459Szrj if (bfd_get_mach(abfd) == bfd_mach_z8001)
493*a9fa9459Szrj disassemble = print_insn_z8001;
494*a9fa9459Szrj else
495*a9fa9459Szrj disassemble = print_insn_z8002;
496*a9fa9459Szrj break;
497*a9fa9459Szrj #endif
498*a9fa9459Szrj #ifdef ARCH_vax
499*a9fa9459Szrj case bfd_arch_vax:
500*a9fa9459Szrj disassemble = print_insn_vax;
501*a9fa9459Szrj break;
502*a9fa9459Szrj #endif
503*a9fa9459Szrj #ifdef ARCH_visium
504*a9fa9459Szrj case bfd_arch_visium:
505*a9fa9459Szrj disassemble = print_insn_visium;
506*a9fa9459Szrj break;
507*a9fa9459Szrj #endif
508*a9fa9459Szrj #ifdef ARCH_frv
509*a9fa9459Szrj case bfd_arch_frv:
510*a9fa9459Szrj disassemble = print_insn_frv;
511*a9fa9459Szrj break;
512*a9fa9459Szrj #endif
513*a9fa9459Szrj #ifdef ARCH_moxie
514*a9fa9459Szrj case bfd_arch_moxie:
515*a9fa9459Szrj disassemble = print_insn_moxie;
516*a9fa9459Szrj break;
517*a9fa9459Szrj #endif
518*a9fa9459Szrj #ifdef ARCH_iq2000
519*a9fa9459Szrj case bfd_arch_iq2000:
520*a9fa9459Szrj disassemble = print_insn_iq2000;
521*a9fa9459Szrj break;
522*a9fa9459Szrj #endif
523*a9fa9459Szrj #ifdef ARCH_m32c
524*a9fa9459Szrj case bfd_arch_m32c:
525*a9fa9459Szrj disassemble = print_insn_m32c;
526*a9fa9459Szrj break;
527*a9fa9459Szrj #endif
528*a9fa9459Szrj #ifdef ARCH_tilegx
529*a9fa9459Szrj case bfd_arch_tilegx:
530*a9fa9459Szrj disassemble = print_insn_tilegx;
531*a9fa9459Szrj break;
532*a9fa9459Szrj #endif
533*a9fa9459Szrj #ifdef ARCH_tilepro
534*a9fa9459Szrj case bfd_arch_tilepro:
535*a9fa9459Szrj disassemble = print_insn_tilepro;
536*a9fa9459Szrj break;
537*a9fa9459Szrj #endif
538*a9fa9459Szrj default:
539*a9fa9459Szrj return 0;
540*a9fa9459Szrj }
541*a9fa9459Szrj return disassemble;
542*a9fa9459Szrj }
543*a9fa9459Szrj
544*a9fa9459Szrj void
disassembler_usage(FILE * stream ATTRIBUTE_UNUSED)545*a9fa9459Szrj disassembler_usage (FILE *stream ATTRIBUTE_UNUSED)
546*a9fa9459Szrj {
547*a9fa9459Szrj #ifdef ARCH_aarch64
548*a9fa9459Szrj print_aarch64_disassembler_options (stream);
549*a9fa9459Szrj #endif
550*a9fa9459Szrj #ifdef ARCH_arm
551*a9fa9459Szrj print_arm_disassembler_options (stream);
552*a9fa9459Szrj #endif
553*a9fa9459Szrj #ifdef ARCH_mips
554*a9fa9459Szrj print_mips_disassembler_options (stream);
555*a9fa9459Szrj #endif
556*a9fa9459Szrj #ifdef ARCH_powerpc
557*a9fa9459Szrj print_ppc_disassembler_options (stream);
558*a9fa9459Szrj #endif
559*a9fa9459Szrj #ifdef ARCH_i386
560*a9fa9459Szrj print_i386_disassembler_options (stream);
561*a9fa9459Szrj #endif
562*a9fa9459Szrj #ifdef ARCH_s390
563*a9fa9459Szrj print_s390_disassembler_options (stream);
564*a9fa9459Szrj #endif
565*a9fa9459Szrj
566*a9fa9459Szrj return;
567*a9fa9459Szrj }
568*a9fa9459Szrj
569*a9fa9459Szrj void
disassemble_init_for_target(struct disassemble_info * info)570*a9fa9459Szrj disassemble_init_for_target (struct disassemble_info * info)
571*a9fa9459Szrj {
572*a9fa9459Szrj if (info == NULL)
573*a9fa9459Szrj return;
574*a9fa9459Szrj
575*a9fa9459Szrj switch (info->arch)
576*a9fa9459Szrj {
577*a9fa9459Szrj #ifdef ARCH_aarch64
578*a9fa9459Szrj case bfd_arch_aarch64:
579*a9fa9459Szrj info->symbol_is_valid = aarch64_symbol_is_valid;
580*a9fa9459Szrj info->disassembler_needs_relocs = TRUE;
581*a9fa9459Szrj break;
582*a9fa9459Szrj #endif
583*a9fa9459Szrj #ifdef ARCH_arm
584*a9fa9459Szrj case bfd_arch_arm:
585*a9fa9459Szrj info->symbol_is_valid = arm_symbol_is_valid;
586*a9fa9459Szrj info->disassembler_needs_relocs = TRUE;
587*a9fa9459Szrj break;
588*a9fa9459Szrj #endif
589*a9fa9459Szrj #ifdef ARCH_ia64
590*a9fa9459Szrj case bfd_arch_ia64:
591*a9fa9459Szrj info->skip_zeroes = 16;
592*a9fa9459Szrj break;
593*a9fa9459Szrj #endif
594*a9fa9459Szrj #ifdef ARCH_tic4x
595*a9fa9459Szrj case bfd_arch_tic4x:
596*a9fa9459Szrj info->skip_zeroes = 32;
597*a9fa9459Szrj break;
598*a9fa9459Szrj #endif
599*a9fa9459Szrj #ifdef ARCH_mep
600*a9fa9459Szrj case bfd_arch_mep:
601*a9fa9459Szrj info->skip_zeroes = 256;
602*a9fa9459Szrj info->skip_zeroes_at_end = 0;
603*a9fa9459Szrj break;
604*a9fa9459Szrj #endif
605*a9fa9459Szrj #ifdef ARCH_metag
606*a9fa9459Szrj case bfd_arch_metag:
607*a9fa9459Szrj info->disassembler_needs_relocs = TRUE;
608*a9fa9459Szrj break;
609*a9fa9459Szrj #endif
610*a9fa9459Szrj #ifdef ARCH_m32c
611*a9fa9459Szrj case bfd_arch_m32c:
612*a9fa9459Szrj /* This processor in fact is little endian. The value set here
613*a9fa9459Szrj reflects the way opcodes are written in the cgen description. */
614*a9fa9459Szrj info->endian = BFD_ENDIAN_BIG;
615*a9fa9459Szrj if (! info->insn_sets)
616*a9fa9459Szrj {
617*a9fa9459Szrj info->insn_sets = cgen_bitset_create (ISA_MAX);
618*a9fa9459Szrj if (info->mach == bfd_mach_m16c)
619*a9fa9459Szrj cgen_bitset_set (info->insn_sets, ISA_M16C);
620*a9fa9459Szrj else
621*a9fa9459Szrj cgen_bitset_set (info->insn_sets, ISA_M32C);
622*a9fa9459Szrj }
623*a9fa9459Szrj break;
624*a9fa9459Szrj #endif
625*a9fa9459Szrj #ifdef ARCH_powerpc
626*a9fa9459Szrj case bfd_arch_powerpc:
627*a9fa9459Szrj #endif
628*a9fa9459Szrj #ifdef ARCH_rs6000
629*a9fa9459Szrj case bfd_arch_rs6000:
630*a9fa9459Szrj #endif
631*a9fa9459Szrj #if defined (ARCH_powerpc) || defined (ARCH_rs6000)
632*a9fa9459Szrj disassemble_init_powerpc (info);
633*a9fa9459Szrj break;
634*a9fa9459Szrj #endif
635*a9fa9459Szrj default:
636*a9fa9459Szrj break;
637*a9fa9459Szrj }
638*a9fa9459Szrj }
639