xref: /dflybsd-src/contrib/binutils-2.27/include/elf/mips.h (revision e656dc90e3d65d744d534af2f5ea88cf8101ebcf)
1*a9fa9459Szrj /* MIPS ELF support for BFD.
2*a9fa9459Szrj    Copyright (C) 1993-2016 Free Software Foundation, Inc.
3*a9fa9459Szrj 
4*a9fa9459Szrj    By Ian Lance Taylor, Cygnus Support, <ian@cygnus.com>, from
5*a9fa9459Szrj    information in the System V Application Binary Interface, MIPS
6*a9fa9459Szrj    Processor Supplement.
7*a9fa9459Szrj 
8*a9fa9459Szrj    This file is part of BFD, the Binary File Descriptor library.
9*a9fa9459Szrj 
10*a9fa9459Szrj    This program is free software; you can redistribute it and/or modify
11*a9fa9459Szrj    it under the terms of the GNU General Public License as published by
12*a9fa9459Szrj    the Free Software Foundation; either version 3 of the License, or
13*a9fa9459Szrj    (at your option) any later version.
14*a9fa9459Szrj 
15*a9fa9459Szrj    This program is distributed in the hope that it will be useful,
16*a9fa9459Szrj    but WITHOUT ANY WARRANTY; without even the implied warranty of
17*a9fa9459Szrj    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18*a9fa9459Szrj    GNU General Public License for more details.
19*a9fa9459Szrj 
20*a9fa9459Szrj    You should have received a copy of the GNU General Public License
21*a9fa9459Szrj    along with this program; if not, write to the Free Software
22*a9fa9459Szrj    Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
23*a9fa9459Szrj    MA 02110-1301, USA.  */
24*a9fa9459Szrj 
25*a9fa9459Szrj /* This file holds definitions specific to the MIPS ELF ABI.  Note
26*a9fa9459Szrj    that most of this is not actually implemented by BFD.  */
27*a9fa9459Szrj 
28*a9fa9459Szrj #ifndef _ELF_MIPS_H
29*a9fa9459Szrj #define _ELF_MIPS_H
30*a9fa9459Szrj 
31*a9fa9459Szrj #include "elf/reloc-macros.h"
32*a9fa9459Szrj 
33*a9fa9459Szrj #ifdef __cplusplus
34*a9fa9459Szrj extern "C" {
35*a9fa9459Szrj #endif
36*a9fa9459Szrj 
37*a9fa9459Szrj /* Relocation types.  */
38*a9fa9459Szrj START_RELOC_NUMBERS (elf_mips_reloc_type)
39*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_NONE, 0)
40*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_16, 1)
41*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_32, 2)		/* In Elf 64: alias R_MIPS_ADD */
42*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_REL32, 3)	/* In Elf 64: alias R_MIPS_REL */
43*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_26, 4)
44*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_HI16, 5)
45*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_LO16, 6)
46*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_GPREL16, 7)	/* In Elf 64: alias R_MIPS_GPREL */
47*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_LITERAL, 8)
48*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_GOT16, 9)	/* In Elf 64: alias R_MIPS_GOT */
49*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_PC16, 10)
50*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_CALL16, 11)	/* In Elf 64: alias R_MIPS_CALL */
51*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_GPREL32, 12)
52*a9fa9459Szrj   /* The remaining relocs are defined on Irix, although they are not
53*a9fa9459Szrj      in the MIPS ELF ABI.  */
54*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_UNUSED1, 13)
55*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_UNUSED2, 14)
56*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_UNUSED3, 15)
57*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_SHIFT5, 16)
58*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_SHIFT6, 17)
59*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_64, 18)
60*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_GOT_DISP, 19)
61*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_GOT_PAGE, 20)
62*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_GOT_OFST, 21)
63*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_GOT_HI16, 22)
64*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_GOT_LO16, 23)
65*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_SUB, 24)
66*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_INSERT_A, 25)
67*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_INSERT_B, 26)
68*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_DELETE, 27)
69*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_HIGHER, 28)
70*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_HIGHEST, 29)
71*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_CALL_HI16, 30)
72*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_CALL_LO16, 31)
73*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_SCN_DISP, 32)
74*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_REL16, 33)
75*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_ADD_IMMEDIATE, 34)
76*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_PJUMP, 35)
77*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_RELGOT, 36)
78*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_JALR, 37)
79*a9fa9459Szrj   /* TLS relocations.  */
80*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_TLS_DTPMOD32, 38)
81*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_TLS_DTPREL32, 39)
82*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_TLS_DTPMOD64, 40)
83*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_TLS_DTPREL64, 41)
84*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_TLS_GD, 42)
85*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_TLS_LDM, 43)
86*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_TLS_DTPREL_HI16, 44)
87*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_TLS_DTPREL_LO16, 45)
88*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_TLS_GOTTPREL, 46)
89*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_TLS_TPREL32, 47)
90*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_TLS_TPREL64, 48)
91*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_TLS_TPREL_HI16, 49)
92*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_TLS_TPREL_LO16, 50)
93*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_GLOB_DAT, 51)
94*a9fa9459Szrj   /* Space to grow */
95*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_PC21_S2, 60)
96*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_PC26_S2, 61)
97*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_PC18_S3, 62)
98*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_PC19_S2, 63)
99*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_PCHI16, 64)
100*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_PCLO16, 65)
101*a9fa9459Szrj   FAKE_RELOC (R_MIPS_max, 66)
102*a9fa9459Szrj   /* These relocs are used for the mips16.  */
103*a9fa9459Szrj   FAKE_RELOC (R_MIPS16_min, 100)
104*a9fa9459Szrj   RELOC_NUMBER (R_MIPS16_26, 100)
105*a9fa9459Szrj   RELOC_NUMBER (R_MIPS16_GPREL, 101)
106*a9fa9459Szrj   RELOC_NUMBER (R_MIPS16_GOT16, 102)
107*a9fa9459Szrj   RELOC_NUMBER (R_MIPS16_CALL16, 103)
108*a9fa9459Szrj   RELOC_NUMBER (R_MIPS16_HI16, 104)
109*a9fa9459Szrj   RELOC_NUMBER (R_MIPS16_LO16, 105)
110*a9fa9459Szrj   RELOC_NUMBER (R_MIPS16_TLS_GD, 106)
111*a9fa9459Szrj   RELOC_NUMBER (R_MIPS16_TLS_LDM, 107)
112*a9fa9459Szrj   RELOC_NUMBER (R_MIPS16_TLS_DTPREL_HI16, 108)
113*a9fa9459Szrj   RELOC_NUMBER (R_MIPS16_TLS_DTPREL_LO16, 109)
114*a9fa9459Szrj   RELOC_NUMBER (R_MIPS16_TLS_GOTTPREL, 110)
115*a9fa9459Szrj   RELOC_NUMBER (R_MIPS16_TLS_TPREL_HI16, 111)
116*a9fa9459Szrj   RELOC_NUMBER (R_MIPS16_TLS_TPREL_LO16, 112)
117*a9fa9459Szrj   RELOC_NUMBER (R_MIPS16_PC16_S1, 113)
118*a9fa9459Szrj   FAKE_RELOC (R_MIPS16_max, 114)
119*a9fa9459Szrj   /* These relocations are specific to VxWorks.  */
120*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_COPY, 126)
121*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_JUMP_SLOT, 127)
122*a9fa9459Szrj 
123*a9fa9459Szrj   /* These relocations are specific to microMIPS.  */
124*a9fa9459Szrj   FAKE_RELOC (R_MICROMIPS_min, 130)
125*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_26_S1, 133)
126*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_HI16, 134)
127*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_LO16, 135)
128*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_GPREL16, 136)	/* In Elf 64:
129*a9fa9459Szrj 						   alias R_MICROMIPS_GPREL */
130*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_LITERAL, 137)
131*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_GOT16, 138)		/* In Elf 64:
132*a9fa9459Szrj 						   alias R_MICROMIPS_GOT */
133*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_PC7_S1, 139)
134*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_PC10_S1, 140)
135*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_PC16_S1, 141)
136*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_CALL16, 142)	/* In Elf 64:
137*a9fa9459Szrj 						   alias R_MICROMIPS_CALL */
138*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_GOT_DISP, 145)
139*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_GOT_PAGE, 146)
140*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_GOT_OFST, 147)
141*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_GOT_HI16, 148)
142*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_GOT_LO16, 149)
143*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_SUB, 150)
144*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_HIGHER, 151)
145*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_HIGHEST, 152)
146*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_CALL_HI16, 153)
147*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_CALL_LO16, 154)
148*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_SCN_DISP, 155)
149*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_JALR, 156)
150*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_HI0_LO16, 157)
151*a9fa9459Szrj   /* TLS relocations.  */
152*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_TLS_GD, 162)
153*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_TLS_LDM, 163)
154*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_TLS_DTPREL_HI16, 164)
155*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_TLS_DTPREL_LO16, 165)
156*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_TLS_GOTTPREL, 166)
157*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_TLS_TPREL_HI16, 169)
158*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_TLS_TPREL_LO16, 170)
159*a9fa9459Szrj   /* microMIPS GP- and PC-relative relocations. */
160*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_GPREL7_S2, 172)
161*a9fa9459Szrj   RELOC_NUMBER (R_MICROMIPS_PC23_S2, 173)
162*a9fa9459Szrj   FAKE_RELOC (R_MICROMIPS_max, 174)
163*a9fa9459Szrj 
164*a9fa9459Szrj   /* This was a GNU extension used by embedded-PIC.  It was co-opted by
165*a9fa9459Szrj      mips-linux for exception-handling data.  GCC stopped using it in
166*a9fa9459Szrj      May, 2004, then started using it again for compact unwind tables.  */
167*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_PC32, 248)
168*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_EH, 249)
169*a9fa9459Szrj   /* FIXME: this relocation is used internally by gas.  */
170*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_GNU_REL16_S2, 250)
171*a9fa9459Szrj   /* These are GNU extensions to enable C++ vtable garbage collection.  */
172*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_GNU_VTINHERIT, 253)
173*a9fa9459Szrj   RELOC_NUMBER (R_MIPS_GNU_VTENTRY, 254)
174*a9fa9459Szrj END_RELOC_NUMBERS (R_MIPS_maxext)
175*a9fa9459Szrj 
176*a9fa9459Szrj /* Processor specific flags for the ELF header e_flags field.  */
177*a9fa9459Szrj 
178*a9fa9459Szrj /* At least one .noreorder directive appears in the source.  */
179*a9fa9459Szrj #define EF_MIPS_NOREORDER	0x00000001
180*a9fa9459Szrj 
181*a9fa9459Szrj /* File contains position independent code.  */
182*a9fa9459Szrj #define EF_MIPS_PIC		0x00000002
183*a9fa9459Szrj 
184*a9fa9459Szrj /* Code in file uses the standard calling sequence for calling
185*a9fa9459Szrj    position independent code.  */
186*a9fa9459Szrj #define EF_MIPS_CPIC		0x00000004
187*a9fa9459Szrj 
188*a9fa9459Szrj /* ???  Unknown flag, set in IRIX 6's BSDdup2.o in libbsd.a.  */
189*a9fa9459Szrj #define EF_MIPS_XGOT		0x00000008
190*a9fa9459Szrj 
191*a9fa9459Szrj /* Code in file uses UCODE (obsolete) */
192*a9fa9459Szrj #define EF_MIPS_UCODE		0x00000010
193*a9fa9459Szrj 
194*a9fa9459Szrj /* Code in file uses new ABI (-n32 on Irix 6).  */
195*a9fa9459Szrj #define EF_MIPS_ABI2		0x00000020
196*a9fa9459Szrj 
197*a9fa9459Szrj /* Process the .MIPS.options section first by ld */
198*a9fa9459Szrj #define EF_MIPS_OPTIONS_FIRST	0x00000080
199*a9fa9459Szrj 
200*a9fa9459Szrj /* Indicates code compiled for a 64-bit machine in 32-bit mode
201*a9fa9459Szrj    (regs are 32-bits wide).  */
202*a9fa9459Szrj #define EF_MIPS_32BITMODE	0x00000100
203*a9fa9459Szrj 
204*a9fa9459Szrj /* 32-bit machine but FP registers are 64 bit (-mfp64).  */
205*a9fa9459Szrj #define EF_MIPS_FP64		0x00000200
206*a9fa9459Szrj 
207*a9fa9459Szrj /* Code in file uses the IEEE 754-2008 NaN encoding convention.  */
208*a9fa9459Szrj #define EF_MIPS_NAN2008		0x00000400
209*a9fa9459Szrj 
210*a9fa9459Szrj /* Architectural Extensions used by this file */
211*a9fa9459Szrj #define EF_MIPS_ARCH_ASE	0x0f000000
212*a9fa9459Szrj 
213*a9fa9459Szrj /* Use MDMX multimedia extensions */
214*a9fa9459Szrj #define EF_MIPS_ARCH_ASE_MDMX	0x08000000
215*a9fa9459Szrj 
216*a9fa9459Szrj /* Use MIPS-16 ISA extensions */
217*a9fa9459Szrj #define EF_MIPS_ARCH_ASE_M16	0x04000000
218*a9fa9459Szrj 
219*a9fa9459Szrj /* Use MICROMIPS ISA extensions.  */
220*a9fa9459Szrj #define EF_MIPS_ARCH_ASE_MICROMIPS	0x02000000
221*a9fa9459Szrj 
222*a9fa9459Szrj /* Four bit MIPS architecture field.  */
223*a9fa9459Szrj #define EF_MIPS_ARCH		0xf0000000
224*a9fa9459Szrj 
225*a9fa9459Szrj /* -mips1 code.  */
226*a9fa9459Szrj #define E_MIPS_ARCH_1		0x00000000
227*a9fa9459Szrj 
228*a9fa9459Szrj /* -mips2 code.  */
229*a9fa9459Szrj #define E_MIPS_ARCH_2		0x10000000
230*a9fa9459Szrj 
231*a9fa9459Szrj /* -mips3 code.  */
232*a9fa9459Szrj #define E_MIPS_ARCH_3		0x20000000
233*a9fa9459Szrj 
234*a9fa9459Szrj /* -mips4 code.  */
235*a9fa9459Szrj #define E_MIPS_ARCH_4		0x30000000
236*a9fa9459Szrj 
237*a9fa9459Szrj /* -mips5 code.  */
238*a9fa9459Szrj #define E_MIPS_ARCH_5           0x40000000
239*a9fa9459Szrj 
240*a9fa9459Szrj /* -mips32 code.  */
241*a9fa9459Szrj #define E_MIPS_ARCH_32          0x50000000
242*a9fa9459Szrj 
243*a9fa9459Szrj /* -mips64 code.  */
244*a9fa9459Szrj #define E_MIPS_ARCH_64          0x60000000
245*a9fa9459Szrj 
246*a9fa9459Szrj /* -mips32r2 code.  */
247*a9fa9459Szrj #define E_MIPS_ARCH_32R2        0x70000000
248*a9fa9459Szrj 
249*a9fa9459Szrj /* -mips64r2 code.  */
250*a9fa9459Szrj #define E_MIPS_ARCH_64R2        0x80000000
251*a9fa9459Szrj 
252*a9fa9459Szrj /* -mips32r6 code.  */
253*a9fa9459Szrj #define E_MIPS_ARCH_32R6        0x90000000
254*a9fa9459Szrj 
255*a9fa9459Szrj /* -mips64r6 code.  */
256*a9fa9459Szrj #define E_MIPS_ARCH_64R6        0xa0000000
257*a9fa9459Szrj 
258*a9fa9459Szrj /* The ABI of the file.  Also see EF_MIPS_ABI2 above. */
259*a9fa9459Szrj #define EF_MIPS_ABI		0x0000F000
260*a9fa9459Szrj 
261*a9fa9459Szrj /* The original o32 abi. */
262*a9fa9459Szrj #define E_MIPS_ABI_O32          0x00001000
263*a9fa9459Szrj 
264*a9fa9459Szrj /* O32 extended to work on 64 bit architectures */
265*a9fa9459Szrj #define E_MIPS_ABI_O64          0x00002000
266*a9fa9459Szrj 
267*a9fa9459Szrj /* EABI in 32 bit mode */
268*a9fa9459Szrj #define E_MIPS_ABI_EABI32       0x00003000
269*a9fa9459Szrj 
270*a9fa9459Szrj /* EABI in 64 bit mode */
271*a9fa9459Szrj #define E_MIPS_ABI_EABI64       0x00004000
272*a9fa9459Szrj 
273*a9fa9459Szrj 
274*a9fa9459Szrj /* Machine variant if we know it.  This field was invented at Cygnus,
275*a9fa9459Szrj    but it is hoped that other vendors will adopt it.  If some standard
276*a9fa9459Szrj    is developed, this code should be changed to follow it. */
277*a9fa9459Szrj 
278*a9fa9459Szrj #define EF_MIPS_MACH		0x00FF0000
279*a9fa9459Szrj 
280*a9fa9459Szrj /* Cygnus is choosing values between 80 and 9F;
281*a9fa9459Szrj    00 - 7F should be left for a future standard;
282*a9fa9459Szrj    the rest are open. */
283*a9fa9459Szrj 
284*a9fa9459Szrj #define E_MIPS_MACH_3900	0x00810000
285*a9fa9459Szrj #define E_MIPS_MACH_4010	0x00820000
286*a9fa9459Szrj #define E_MIPS_MACH_4100	0x00830000
287*a9fa9459Szrj #define E_MIPS_MACH_4650	0x00850000
288*a9fa9459Szrj #define E_MIPS_MACH_4120	0x00870000
289*a9fa9459Szrj #define E_MIPS_MACH_4111	0x00880000
290*a9fa9459Szrj #define E_MIPS_MACH_SB1         0x008a0000
291*a9fa9459Szrj #define E_MIPS_MACH_OCTEON	0x008b0000
292*a9fa9459Szrj #define E_MIPS_MACH_XLR     	0x008c0000
293*a9fa9459Szrj #define E_MIPS_MACH_OCTEON2	0x008d0000
294*a9fa9459Szrj #define E_MIPS_MACH_OCTEON3	0x008e0000
295*a9fa9459Szrj #define E_MIPS_MACH_5400	0x00910000
296*a9fa9459Szrj #define E_MIPS_MACH_5900	0x00920000
297*a9fa9459Szrj #define E_MIPS_MACH_5500	0x00980000
298*a9fa9459Szrj #define E_MIPS_MACH_9000	0x00990000
299*a9fa9459Szrj #define E_MIPS_MACH_LS2E        0x00A00000
300*a9fa9459Szrj #define E_MIPS_MACH_LS2F        0x00A10000
301*a9fa9459Szrj #define E_MIPS_MACH_LS3A        0x00A20000
302*a9fa9459Szrj 
303*a9fa9459Szrj /* Processor specific section indices.  These sections do not actually
304*a9fa9459Szrj    exist.  Symbols with a st_shndx field corresponding to one of these
305*a9fa9459Szrj    values have a special meaning.  */
306*a9fa9459Szrj 
307*a9fa9459Szrj /* Defined and allocated common symbol.  Value is virtual address.  If
308*a9fa9459Szrj    relocated, alignment must be preserved.  */
309*a9fa9459Szrj #define SHN_MIPS_ACOMMON	SHN_LORESERVE
310*a9fa9459Szrj 
311*a9fa9459Szrj /* Defined and allocated text symbol.  Value is virtual address.
312*a9fa9459Szrj    Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables.  */
313*a9fa9459Szrj #define SHN_MIPS_TEXT		(SHN_LORESERVE + 1)
314*a9fa9459Szrj 
315*a9fa9459Szrj /* Defined and allocated data symbol.  Value is virtual address.
316*a9fa9459Szrj    Occur in the dynamic symbol table of Alpha OSF/1 and Irix 5 executables.  */
317*a9fa9459Szrj #define SHN_MIPS_DATA		(SHN_LORESERVE + 2)
318*a9fa9459Szrj 
319*a9fa9459Szrj /* Small common symbol.  */
320*a9fa9459Szrj #define SHN_MIPS_SCOMMON	(SHN_LORESERVE + 3)
321*a9fa9459Szrj 
322*a9fa9459Szrj /* Small undefined symbol.  */
323*a9fa9459Szrj #define SHN_MIPS_SUNDEFINED	(SHN_LORESERVE + 4)
324*a9fa9459Szrj 
325*a9fa9459Szrj /* Processor specific section types.  */
326*a9fa9459Szrj 
327*a9fa9459Szrj /* Section contains the set of dynamic shared objects used when
328*a9fa9459Szrj    statically linking.  */
329*a9fa9459Szrj #define SHT_MIPS_LIBLIST	0x70000000
330*a9fa9459Szrj 
331*a9fa9459Szrj /* I'm not sure what this is, but it's used on Irix 5.  */
332*a9fa9459Szrj #define SHT_MIPS_MSYM		0x70000001
333*a9fa9459Szrj 
334*a9fa9459Szrj /* Section contains list of symbols whose definitions conflict with
335*a9fa9459Szrj    symbols defined in shared objects.  */
336*a9fa9459Szrj #define SHT_MIPS_CONFLICT	0x70000002
337*a9fa9459Szrj 
338*a9fa9459Szrj /* Section contains the global pointer table.  */
339*a9fa9459Szrj #define SHT_MIPS_GPTAB		0x70000003
340*a9fa9459Szrj 
341*a9fa9459Szrj /* Section contains microcode information.  The exact format is
342*a9fa9459Szrj    unspecified.  */
343*a9fa9459Szrj #define SHT_MIPS_UCODE		0x70000004
344*a9fa9459Szrj 
345*a9fa9459Szrj /* Section contains some sort of debugging information.  The exact
346*a9fa9459Szrj    format is unspecified.  It's probably ECOFF symbols.  */
347*a9fa9459Szrj #define SHT_MIPS_DEBUG		0x70000005
348*a9fa9459Szrj 
349*a9fa9459Szrj /* Section contains register usage information.  */
350*a9fa9459Szrj #define SHT_MIPS_REGINFO	0x70000006
351*a9fa9459Szrj 
352*a9fa9459Szrj /* ??? */
353*a9fa9459Szrj #define SHT_MIPS_PACKAGE	0x70000007
354*a9fa9459Szrj 
355*a9fa9459Szrj /* ??? */
356*a9fa9459Szrj #define SHT_MIPS_PACKSYM	0x70000008
357*a9fa9459Szrj 
358*a9fa9459Szrj /* ??? */
359*a9fa9459Szrj #define SHT_MIPS_RELD		0x70000009
360*a9fa9459Szrj 
361*a9fa9459Szrj /* Section contains interface information.  */
362*a9fa9459Szrj #define SHT_MIPS_IFACE		0x7000000b
363*a9fa9459Szrj 
364*a9fa9459Szrj /* Section contains description of contents of another section.  */
365*a9fa9459Szrj #define SHT_MIPS_CONTENT	0x7000000c
366*a9fa9459Szrj 
367*a9fa9459Szrj /* Section contains miscellaneous options.  */
368*a9fa9459Szrj #define SHT_MIPS_OPTIONS	0x7000000d
369*a9fa9459Szrj 
370*a9fa9459Szrj /* ??? */
371*a9fa9459Szrj #define SHT_MIPS_SHDR		0x70000010
372*a9fa9459Szrj 
373*a9fa9459Szrj /* ??? */
374*a9fa9459Szrj #define SHT_MIPS_FDESC		0x70000011
375*a9fa9459Szrj 
376*a9fa9459Szrj /* ??? */
377*a9fa9459Szrj #define SHT_MIPS_EXTSYM		0x70000012
378*a9fa9459Szrj 
379*a9fa9459Szrj /* ??? */
380*a9fa9459Szrj #define SHT_MIPS_DENSE		0x70000013
381*a9fa9459Szrj 
382*a9fa9459Szrj /* ??? */
383*a9fa9459Szrj #define SHT_MIPS_PDESC		0x70000014
384*a9fa9459Szrj 
385*a9fa9459Szrj /* ??? */
386*a9fa9459Szrj #define SHT_MIPS_LOCSYM		0x70000015
387*a9fa9459Szrj 
388*a9fa9459Szrj /* ??? */
389*a9fa9459Szrj #define SHT_MIPS_AUXSYM		0x70000016
390*a9fa9459Szrj 
391*a9fa9459Szrj /* ??? */
392*a9fa9459Szrj #define SHT_MIPS_OPTSYM		0x70000017
393*a9fa9459Szrj 
394*a9fa9459Szrj /* ??? */
395*a9fa9459Szrj #define SHT_MIPS_LOCSTR		0x70000018
396*a9fa9459Szrj 
397*a9fa9459Szrj /* ??? */
398*a9fa9459Szrj #define SHT_MIPS_LINE		0x70000019
399*a9fa9459Szrj 
400*a9fa9459Szrj /* ??? */
401*a9fa9459Szrj #define SHT_MIPS_RFDESC		0x7000001a
402*a9fa9459Szrj 
403*a9fa9459Szrj /* Delta C++: symbol table */
404*a9fa9459Szrj #define SHT_MIPS_DELTASYM	0x7000001b
405*a9fa9459Szrj 
406*a9fa9459Szrj /* Delta C++: instance table */
407*a9fa9459Szrj #define SHT_MIPS_DELTAINST	0x7000001c
408*a9fa9459Szrj 
409*a9fa9459Szrj /* Delta C++: class table */
410*a9fa9459Szrj #define SHT_MIPS_DELTACLASS	0x7000001d
411*a9fa9459Szrj 
412*a9fa9459Szrj /* DWARF debugging section.  */
413*a9fa9459Szrj #define SHT_MIPS_DWARF		0x7000001e
414*a9fa9459Szrj 
415*a9fa9459Szrj /* Delta C++: declarations */
416*a9fa9459Szrj #define SHT_MIPS_DELTADECL	0x7000001f
417*a9fa9459Szrj 
418*a9fa9459Szrj /* List of libraries the binary depends on.  Includes a time stamp, version
419*a9fa9459Szrj    number.  */
420*a9fa9459Szrj #define SHT_MIPS_SYMBOL_LIB	0x70000020
421*a9fa9459Szrj 
422*a9fa9459Szrj /* Events section.  */
423*a9fa9459Szrj #define SHT_MIPS_EVENTS		0x70000021
424*a9fa9459Szrj 
425*a9fa9459Szrj /* ??? */
426*a9fa9459Szrj #define SHT_MIPS_TRANSLATE	0x70000022
427*a9fa9459Szrj 
428*a9fa9459Szrj /* Special pixie sections */
429*a9fa9459Szrj #define SHT_MIPS_PIXIE		0x70000023
430*a9fa9459Szrj 
431*a9fa9459Szrj /* Address translation table (for debug info) */
432*a9fa9459Szrj #define SHT_MIPS_XLATE		0x70000024
433*a9fa9459Szrj 
434*a9fa9459Szrj /* SGI internal address translation table (for debug info) */
435*a9fa9459Szrj #define SHT_MIPS_XLATE_DEBUG	0x70000025
436*a9fa9459Szrj 
437*a9fa9459Szrj /* Intermediate code */
438*a9fa9459Szrj #define SHT_MIPS_WHIRL		0x70000026
439*a9fa9459Szrj 
440*a9fa9459Szrj /* C++ exception handling region info */
441*a9fa9459Szrj #define SHT_MIPS_EH_REGION	0x70000027
442*a9fa9459Szrj 
443*a9fa9459Szrj /* Obsolete address translation table (for debug info) */
444*a9fa9459Szrj #define SHT_MIPS_XLATE_OLD	0x70000028
445*a9fa9459Szrj 
446*a9fa9459Szrj /* Runtime procedure descriptor table exception information (ucode) ??? */
447*a9fa9459Szrj #define SHT_MIPS_PDR_EXCEPTION	0x70000029
448*a9fa9459Szrj 
449*a9fa9459Szrj /* ABI related flags section.  */
450*a9fa9459Szrj #define SHT_MIPS_ABIFLAGS	0x7000002a
451*a9fa9459Szrj 
452*a9fa9459Szrj /* A section of type SHT_MIPS_LIBLIST contains an array of the
453*a9fa9459Szrj    following structure.  The sh_link field is the section index of the
454*a9fa9459Szrj    string table.  The sh_info field is the number of entries in the
455*a9fa9459Szrj    section.  */
456*a9fa9459Szrj typedef struct
457*a9fa9459Szrj {
458*a9fa9459Szrj   /* String table index for name of shared object.  */
459*a9fa9459Szrj   unsigned long l_name;
460*a9fa9459Szrj   /* Time stamp.  */
461*a9fa9459Szrj   unsigned long l_time_stamp;
462*a9fa9459Szrj   /* Checksum of symbol names and common sizes.  */
463*a9fa9459Szrj   unsigned long l_checksum;
464*a9fa9459Szrj   /* String table index for version.  */
465*a9fa9459Szrj   unsigned long l_version;
466*a9fa9459Szrj   /* Flags.  */
467*a9fa9459Szrj   unsigned long l_flags;
468*a9fa9459Szrj } Elf32_Lib;
469*a9fa9459Szrj 
470*a9fa9459Szrj /* The external version of Elf32_Lib.  */
471*a9fa9459Szrj typedef struct
472*a9fa9459Szrj {
473*a9fa9459Szrj   unsigned char l_name[4];
474*a9fa9459Szrj   unsigned char l_time_stamp[4];
475*a9fa9459Szrj   unsigned char l_checksum[4];
476*a9fa9459Szrj   unsigned char l_version[4];
477*a9fa9459Szrj   unsigned char l_flags[4];
478*a9fa9459Szrj } Elf32_External_Lib;
479*a9fa9459Szrj 
480*a9fa9459Szrj /* The l_flags field of an Elf32_Lib structure may contain the
481*a9fa9459Szrj    following flags.  */
482*a9fa9459Szrj 
483*a9fa9459Szrj /* Require an exact match at runtime.  */
484*a9fa9459Szrj #define LL_EXACT_MATCH		0x00000001
485*a9fa9459Szrj 
486*a9fa9459Szrj /* Ignore version incompatibilities at runtime.  */
487*a9fa9459Szrj #define LL_IGNORE_INT_VER	0x00000002
488*a9fa9459Szrj 
489*a9fa9459Szrj /* Require matching minor version number.  */
490*a9fa9459Szrj #define LL_REQUIRE_MINOR	0x00000004
491*a9fa9459Szrj 
492*a9fa9459Szrj /* ??? */
493*a9fa9459Szrj #define LL_EXPORTS		0x00000008
494*a9fa9459Szrj 
495*a9fa9459Szrj /* Delay loading of this library until really needed.  */
496*a9fa9459Szrj #define LL_DELAY_LOAD		0x00000010
497*a9fa9459Szrj 
498*a9fa9459Szrj /* ??? Delta C++ stuff ??? */
499*a9fa9459Szrj #define LL_DELTA		0x00000020
500*a9fa9459Szrj 
501*a9fa9459Szrj 
502*a9fa9459Szrj /* A section of type SHT_MIPS_CONFLICT is an array of indices into the
503*a9fa9459Szrj    .dynsym section.  Each element has the following type.  */
504*a9fa9459Szrj typedef unsigned long Elf32_Conflict;
505*a9fa9459Szrj typedef unsigned char Elf32_External_Conflict[4];
506*a9fa9459Szrj 
507*a9fa9459Szrj typedef unsigned long Elf64_Conflict;
508*a9fa9459Szrj typedef unsigned char Elf64_External_Conflict[8];
509*a9fa9459Szrj 
510*a9fa9459Szrj /* A section of type SHT_MIPS_GPTAB contains information about how
511*a9fa9459Szrj    much GP space would be required for different -G arguments.  This
512*a9fa9459Szrj    information is only used so that the linker can provide informative
513*a9fa9459Szrj    suggestions as to the best -G value to use.  The sh_info field is
514*a9fa9459Szrj    the index of the section for which this information applies.  The
515*a9fa9459Szrj    contents of the section are an array of the following union.  The
516*a9fa9459Szrj    first element uses the gt_header field.  The remaining elements use
517*a9fa9459Szrj    the gt_entry field.  */
518*a9fa9459Szrj typedef union
519*a9fa9459Szrj {
520*a9fa9459Szrj   struct
521*a9fa9459Szrj     {
522*a9fa9459Szrj       /* -G value actually used for this object file.  */
523*a9fa9459Szrj       unsigned long gt_current_g_value;
524*a9fa9459Szrj       /* Unused.  */
525*a9fa9459Szrj       unsigned long gt_unused;
526*a9fa9459Szrj     } gt_header;
527*a9fa9459Szrj   struct
528*a9fa9459Szrj     {
529*a9fa9459Szrj       /* If this -G argument has been used...  */
530*a9fa9459Szrj       unsigned long gt_g_value;
531*a9fa9459Szrj       /* ...this many GP section bytes would be required.  */
532*a9fa9459Szrj       unsigned long gt_bytes;
533*a9fa9459Szrj     } gt_entry;
534*a9fa9459Szrj } Elf32_gptab;
535*a9fa9459Szrj 
536*a9fa9459Szrj /* The external version of Elf32_gptab.  */
537*a9fa9459Szrj 
538*a9fa9459Szrj typedef union
539*a9fa9459Szrj {
540*a9fa9459Szrj   struct
541*a9fa9459Szrj     {
542*a9fa9459Szrj       unsigned char gt_current_g_value[4];
543*a9fa9459Szrj       unsigned char gt_unused[4];
544*a9fa9459Szrj     } gt_header;
545*a9fa9459Szrj   struct
546*a9fa9459Szrj     {
547*a9fa9459Szrj       unsigned char gt_g_value[4];
548*a9fa9459Szrj       unsigned char gt_bytes[4];
549*a9fa9459Szrj     } gt_entry;
550*a9fa9459Szrj } Elf32_External_gptab;
551*a9fa9459Szrj 
552*a9fa9459Szrj /* A section of type SHT_MIPS_REGINFO contains the following
553*a9fa9459Szrj    structure.  */
554*a9fa9459Szrj typedef struct
555*a9fa9459Szrj {
556*a9fa9459Szrj   /* Mask of general purpose registers used.  */
557*a9fa9459Szrj   unsigned long ri_gprmask;
558*a9fa9459Szrj   /* Mask of co-processor registers used.  */
559*a9fa9459Szrj   unsigned long ri_cprmask[4];
560*a9fa9459Szrj   /* GP register value for this object file.  */
561*a9fa9459Szrj   long ri_gp_value;
562*a9fa9459Szrj } Elf32_RegInfo;
563*a9fa9459Szrj 
564*a9fa9459Szrj /* The external version of the Elf_RegInfo structure.  */
565*a9fa9459Szrj typedef struct
566*a9fa9459Szrj {
567*a9fa9459Szrj   unsigned char ri_gprmask[4];
568*a9fa9459Szrj   unsigned char ri_cprmask[4][4];
569*a9fa9459Szrj   unsigned char ri_gp_value[4];
570*a9fa9459Szrj } Elf32_External_RegInfo;
571*a9fa9459Szrj 
572*a9fa9459Szrj /* MIPS ELF .reginfo swapping routines.  */
573*a9fa9459Szrj extern void bfd_mips_elf32_swap_reginfo_in
574*a9fa9459Szrj   (bfd *, const Elf32_External_RegInfo *, Elf32_RegInfo *);
575*a9fa9459Szrj extern void bfd_mips_elf32_swap_reginfo_out
576*a9fa9459Szrj   (bfd *, const Elf32_RegInfo *, Elf32_External_RegInfo *);
577*a9fa9459Szrj 
578*a9fa9459Szrj /* Processor specific section flags.  */
579*a9fa9459Szrj 
580*a9fa9459Szrj /* This section must be in the global data area.  */
581*a9fa9459Szrj #define SHF_MIPS_GPREL		0x10000000
582*a9fa9459Szrj 
583*a9fa9459Szrj /* This section should be merged.  */
584*a9fa9459Szrj #define SHF_MIPS_MERGE		0x20000000
585*a9fa9459Szrj 
586*a9fa9459Szrj /* This section contains address data of size implied by section
587*a9fa9459Szrj    element size.  */
588*a9fa9459Szrj #define SHF_MIPS_ADDR		0x40000000
589*a9fa9459Szrj 
590*a9fa9459Szrj /* This section contains string data.  */
591*a9fa9459Szrj #define SHF_MIPS_STRING		0x80000000
592*a9fa9459Szrj 
593*a9fa9459Szrj /* This section may not be stripped.  */
594*a9fa9459Szrj #define SHF_MIPS_NOSTRIP	0x08000000
595*a9fa9459Szrj 
596*a9fa9459Szrj /* This section is local to threads.  */
597*a9fa9459Szrj #define SHF_MIPS_LOCAL		0x04000000
598*a9fa9459Szrj 
599*a9fa9459Szrj /* Linker should generate implicit weak names for this section.  */
600*a9fa9459Szrj #define SHF_MIPS_NAMES		0x02000000
601*a9fa9459Szrj 
602*a9fa9459Szrj /* Section contais text/data which may be replicated in other sections.
603*a9fa9459Szrj    Linker should retain only one copy.  */
604*a9fa9459Szrj #define SHF_MIPS_NODUPES	0x01000000
605*a9fa9459Szrj 
606*a9fa9459Szrj /* Processor specific program header types.  */
607*a9fa9459Szrj 
608*a9fa9459Szrj /* Register usage information.  Identifies one .reginfo section.  */
609*a9fa9459Szrj #define PT_MIPS_REGINFO		0x70000000
610*a9fa9459Szrj 
611*a9fa9459Szrj /* Runtime procedure table.  */
612*a9fa9459Szrj #define PT_MIPS_RTPROC		0x70000001
613*a9fa9459Szrj 
614*a9fa9459Szrj /* .MIPS.options section.  */
615*a9fa9459Szrj #define PT_MIPS_OPTIONS		0x70000002
616*a9fa9459Szrj 
617*a9fa9459Szrj /* Records ABI related flags.  */
618*a9fa9459Szrj #define PT_MIPS_ABIFLAGS	0x70000003
619*a9fa9459Szrj 
620*a9fa9459Szrj /* Processor specific dynamic array tags.  */
621*a9fa9459Szrj 
622*a9fa9459Szrj /* 32 bit version number for runtime linker interface.  */
623*a9fa9459Szrj #define DT_MIPS_RLD_VERSION	0x70000001
624*a9fa9459Szrj 
625*a9fa9459Szrj /* Time stamp.  */
626*a9fa9459Szrj #define DT_MIPS_TIME_STAMP	0x70000002
627*a9fa9459Szrj 
628*a9fa9459Szrj /* Checksum of external strings and common sizes.  */
629*a9fa9459Szrj #define DT_MIPS_ICHECKSUM	0x70000003
630*a9fa9459Szrj 
631*a9fa9459Szrj /* Index of version string in string table.  */
632*a9fa9459Szrj #define DT_MIPS_IVERSION	0x70000004
633*a9fa9459Szrj 
634*a9fa9459Szrj /* 32 bits of flags.  */
635*a9fa9459Szrj #define DT_MIPS_FLAGS		0x70000005
636*a9fa9459Szrj 
637*a9fa9459Szrj /* Base address of the segment.  */
638*a9fa9459Szrj #define DT_MIPS_BASE_ADDRESS	0x70000006
639*a9fa9459Szrj 
640*a9fa9459Szrj /* ??? */
641*a9fa9459Szrj #define DT_MIPS_MSYM		0x70000007
642*a9fa9459Szrj 
643*a9fa9459Szrj /* Address of .conflict section.  */
644*a9fa9459Szrj #define DT_MIPS_CONFLICT	0x70000008
645*a9fa9459Szrj 
646*a9fa9459Szrj /* Address of .liblist section.  */
647*a9fa9459Szrj #define DT_MIPS_LIBLIST		0x70000009
648*a9fa9459Szrj 
649*a9fa9459Szrj /* Number of local global offset table entries.  */
650*a9fa9459Szrj #define DT_MIPS_LOCAL_GOTNO	0x7000000a
651*a9fa9459Szrj 
652*a9fa9459Szrj /* Number of entries in the .conflict section.  */
653*a9fa9459Szrj #define DT_MIPS_CONFLICTNO	0x7000000b
654*a9fa9459Szrj 
655*a9fa9459Szrj /* Number of entries in the .liblist section.  */
656*a9fa9459Szrj #define DT_MIPS_LIBLISTNO	0x70000010
657*a9fa9459Szrj 
658*a9fa9459Szrj /* Number of entries in the .dynsym section.  */
659*a9fa9459Szrj #define DT_MIPS_SYMTABNO	0x70000011
660*a9fa9459Szrj 
661*a9fa9459Szrj /* Index of first external dynamic symbol not referenced locally.  */
662*a9fa9459Szrj #define DT_MIPS_UNREFEXTNO	0x70000012
663*a9fa9459Szrj 
664*a9fa9459Szrj /* Index of first dynamic symbol in global offset table.  */
665*a9fa9459Szrj #define DT_MIPS_GOTSYM		0x70000013
666*a9fa9459Szrj 
667*a9fa9459Szrj /* Number of page table entries in global offset table.  */
668*a9fa9459Szrj #define DT_MIPS_HIPAGENO	0x70000014
669*a9fa9459Szrj 
670*a9fa9459Szrj /* Address of run time loader map, used for debugging.  */
671*a9fa9459Szrj #define DT_MIPS_RLD_MAP		0x70000016
672*a9fa9459Szrj 
673*a9fa9459Szrj /* Delta C++ class definition.  */
674*a9fa9459Szrj #define DT_MIPS_DELTA_CLASS	0x70000017
675*a9fa9459Szrj 
676*a9fa9459Szrj /* Number of entries in DT_MIPS_DELTA_CLASS.  */
677*a9fa9459Szrj #define DT_MIPS_DELTA_CLASS_NO	0x70000018
678*a9fa9459Szrj 
679*a9fa9459Szrj /* Delta C++ class instances.  */
680*a9fa9459Szrj #define DT_MIPS_DELTA_INSTANCE	0x70000019
681*a9fa9459Szrj 
682*a9fa9459Szrj /* Number of entries in DT_MIPS_DELTA_INSTANCE.  */
683*a9fa9459Szrj #define DT_MIPS_DELTA_INSTANCE_NO	0x7000001a
684*a9fa9459Szrj 
685*a9fa9459Szrj /* Delta relocations.  */
686*a9fa9459Szrj #define DT_MIPS_DELTA_RELOC	0x7000001b
687*a9fa9459Szrj 
688*a9fa9459Szrj /* Number of entries in DT_MIPS_DELTA_RELOC.  */
689*a9fa9459Szrj #define DT_MIPS_DELTA_RELOC_NO	0x7000001c
690*a9fa9459Szrj 
691*a9fa9459Szrj /* Delta symbols that Delta relocations refer to.  */
692*a9fa9459Szrj #define DT_MIPS_DELTA_SYM	0x7000001d
693*a9fa9459Szrj 
694*a9fa9459Szrj /* Number of entries in DT_MIPS_DELTA_SYM.  */
695*a9fa9459Szrj #define DT_MIPS_DELTA_SYM_NO	0x7000001e
696*a9fa9459Szrj 
697*a9fa9459Szrj /* Delta symbols that hold class declarations.  */
698*a9fa9459Szrj #define DT_MIPS_DELTA_CLASSSYM	0x70000020
699*a9fa9459Szrj 
700*a9fa9459Szrj /* Number of entries in DT_MIPS_DELTA_CLASSSYM.  */
701*a9fa9459Szrj #define DT_MIPS_DELTA_CLASSSYM_NO	0x70000021
702*a9fa9459Szrj 
703*a9fa9459Szrj /* Flags indicating information about C++ flavor.  */
704*a9fa9459Szrj #define DT_MIPS_CXX_FLAGS	0x70000022
705*a9fa9459Szrj 
706*a9fa9459Szrj /* Pixie information (???).  */
707*a9fa9459Szrj #define DT_MIPS_PIXIE_INIT	0x70000023
708*a9fa9459Szrj 
709*a9fa9459Szrj /* Address of .MIPS.symlib */
710*a9fa9459Szrj #define DT_MIPS_SYMBOL_LIB	0x70000024
711*a9fa9459Szrj 
712*a9fa9459Szrj /* The GOT index of the first PTE for a segment */
713*a9fa9459Szrj #define DT_MIPS_LOCALPAGE_GOTIDX	0x70000025
714*a9fa9459Szrj 
715*a9fa9459Szrj /* The GOT index of the first PTE for a local symbol */
716*a9fa9459Szrj #define DT_MIPS_LOCAL_GOTIDX	0x70000026
717*a9fa9459Szrj 
718*a9fa9459Szrj /* The GOT index of the first PTE for a hidden symbol */
719*a9fa9459Szrj #define DT_MIPS_HIDDEN_GOTIDX	0x70000027
720*a9fa9459Szrj 
721*a9fa9459Szrj /* The GOT index of the first PTE for a protected symbol */
722*a9fa9459Szrj #define DT_MIPS_PROTECTED_GOTIDX	0x70000028
723*a9fa9459Szrj 
724*a9fa9459Szrj /* Address of `.MIPS.options'.  */
725*a9fa9459Szrj #define DT_MIPS_OPTIONS		0x70000029
726*a9fa9459Szrj 
727*a9fa9459Szrj /* Address of `.interface'.  */
728*a9fa9459Szrj #define DT_MIPS_INTERFACE	0x7000002a
729*a9fa9459Szrj 
730*a9fa9459Szrj /* ??? */
731*a9fa9459Szrj #define DT_MIPS_DYNSTR_ALIGN	0x7000002b
732*a9fa9459Szrj 
733*a9fa9459Szrj /* Size of the .interface section.  */
734*a9fa9459Szrj #define DT_MIPS_INTERFACE_SIZE	0x7000002c
735*a9fa9459Szrj 
736*a9fa9459Szrj /* Size of rld_text_resolve function stored in the GOT.  */
737*a9fa9459Szrj #define DT_MIPS_RLD_TEXT_RESOLVE_ADDR	0x7000002d
738*a9fa9459Szrj 
739*a9fa9459Szrj /* Default suffix of DSO to be added by rld on dlopen() calls.  */
740*a9fa9459Szrj #define DT_MIPS_PERF_SUFFIX	0x7000002e
741*a9fa9459Szrj 
742*a9fa9459Szrj /* Size of compact relocation section (O32).  */
743*a9fa9459Szrj #define DT_MIPS_COMPACT_SIZE	0x7000002f
744*a9fa9459Szrj 
745*a9fa9459Szrj /* GP value for auxiliary GOTs.  */
746*a9fa9459Szrj #define DT_MIPS_GP_VALUE	0x70000030
747*a9fa9459Szrj 
748*a9fa9459Szrj /* Address of auxiliary .dynamic.  */
749*a9fa9459Szrj #define DT_MIPS_AUX_DYNAMIC	0x70000031
750*a9fa9459Szrj 
751*a9fa9459Szrj /* Address of the base of the PLTGOT.  */
752*a9fa9459Szrj #define DT_MIPS_PLTGOT         0x70000032
753*a9fa9459Szrj 
754*a9fa9459Szrj /* Points to the base of a writable PLT.  */
755*a9fa9459Szrj #define DT_MIPS_RWPLT          0x70000034
756*a9fa9459Szrj 
757*a9fa9459Szrj /* Relative offset of run time loader map, used for debugging.  */
758*a9fa9459Szrj #define DT_MIPS_RLD_MAP_REL    0x70000035
759*a9fa9459Szrj 
760*a9fa9459Szrj /* Flags which may appear in a DT_MIPS_FLAGS entry.  */
761*a9fa9459Szrj 
762*a9fa9459Szrj /* No flags.  */
763*a9fa9459Szrj #define RHF_NONE		0x00000000
764*a9fa9459Szrj 
765*a9fa9459Szrj /* Uses shortcut pointers.  */
766*a9fa9459Szrj #define RHF_QUICKSTART		0x00000001
767*a9fa9459Szrj 
768*a9fa9459Szrj /* Hash size is not a power of two.  */
769*a9fa9459Szrj #define RHF_NOTPOT		0x00000002
770*a9fa9459Szrj 
771*a9fa9459Szrj /* Ignore LD_LIBRARY_PATH.  */
772*a9fa9459Szrj #define RHS_NO_LIBRARY_REPLACEMENT 0x00000004
773*a9fa9459Szrj 
774*a9fa9459Szrj /* DSO address may not be relocated. */
775*a9fa9459Szrj #define RHF_NO_MOVE		0x00000008
776*a9fa9459Szrj 
777*a9fa9459Szrj /* SGI specific features. */
778*a9fa9459Szrj #define RHF_SGI_ONLY		0x00000010
779*a9fa9459Szrj 
780*a9fa9459Szrj /* Guarantee that .init will finish executing before any non-init
781*a9fa9459Szrj    code in DSO is called. */
782*a9fa9459Szrj #define RHF_GUARANTEE_INIT	   0x00000020
783*a9fa9459Szrj 
784*a9fa9459Szrj /* Contains Delta C++ code. */
785*a9fa9459Szrj #define RHF_DELTA_C_PLUS_PLUS	   0x00000040
786*a9fa9459Szrj 
787*a9fa9459Szrj /* Guarantee that .init will start executing before any non-init
788*a9fa9459Szrj    code in DSO is called. */
789*a9fa9459Szrj #define RHF_GUARANTEE_START_INIT   0x00000080
790*a9fa9459Szrj 
791*a9fa9459Szrj /* Generated by pixie. */
792*a9fa9459Szrj #define RHF_PIXIE		   0x00000100
793*a9fa9459Szrj 
794*a9fa9459Szrj /* Delay-load DSO by default. */
795*a9fa9459Szrj #define RHF_DEFAULT_DELAY_LOAD	   0x00000200
796*a9fa9459Szrj 
797*a9fa9459Szrj /* Object may be requickstarted */
798*a9fa9459Szrj #define RHF_REQUICKSTART	   0x00000400
799*a9fa9459Szrj 
800*a9fa9459Szrj /* Object has been requickstarted */
801*a9fa9459Szrj #define RHF_REQUICKSTARTED	   0x00000800
802*a9fa9459Szrj 
803*a9fa9459Szrj /* Generated by cord. */
804*a9fa9459Szrj #define RHF_CORD		   0x00001000
805*a9fa9459Szrj 
806*a9fa9459Szrj /* Object contains no unresolved undef symbols. */
807*a9fa9459Szrj #define RHF_NO_UNRES_UNDEF	   0x00002000
808*a9fa9459Szrj 
809*a9fa9459Szrj /* Symbol table is in a safe order. */
810*a9fa9459Szrj #define RHF_RLD_ORDER_SAFE	   0x00004000
811*a9fa9459Szrj 
812*a9fa9459Szrj /* Special values for the st_other field in the symbol table.  These
813*a9fa9459Szrj    are used in an Irix 5 dynamic symbol table.  */
814*a9fa9459Szrj 
815*a9fa9459Szrj #define STO_DEFAULT		STV_DEFAULT
816*a9fa9459Szrj #define STO_INTERNAL		STV_INTERNAL
817*a9fa9459Szrj #define STO_HIDDEN		STV_HIDDEN
818*a9fa9459Szrj #define STO_PROTECTED		STV_PROTECTED
819*a9fa9459Szrj 
820*a9fa9459Szrj /* Two topmost bits denote the MIPS ISA for .text symbols:
821*a9fa9459Szrj    + 00 -- standard MIPS code,
822*a9fa9459Szrj    + 10 -- microMIPS code,
823*a9fa9459Szrj    + 11 -- MIPS16 code; requires the following two bits to be set too.
824*a9fa9459Szrj    Note that one of the MIPS16 bits overlaps with STO_MIPS_PIC.  See below
825*a9fa9459Szrj    for details.  */
826*a9fa9459Szrj #define STO_MIPS_ISA		(3 << 6)
827*a9fa9459Szrj 
828*a9fa9459Szrj /* The mask spanning the rest of MIPS psABI flags.  At most one is expected
829*a9fa9459Szrj    to be set except for STO_MIPS16.  */
830*a9fa9459Szrj #define STO_MIPS_FLAGS		(~(STO_MIPS_ISA | ELF_ST_VISIBILITY (-1)))
831*a9fa9459Szrj 
832*a9fa9459Szrj /* The MIPS psABI was updated in 2008 with support for PLTs and copy
833*a9fa9459Szrj    relocs.  There are therefore two types of nonzero SHN_UNDEF functions:
834*a9fa9459Szrj    PLT entries and traditional MIPS lazy binding stubs.  We mark the former
835*a9fa9459Szrj    with STO_MIPS_PLT to distinguish them from the latter.  */
836*a9fa9459Szrj #define STO_MIPS_PLT		0x8
837*a9fa9459Szrj #define ELF_ST_IS_MIPS_PLT(other)					\
838*a9fa9459Szrj   ((ELF_ST_IS_MIPS16 (other)						\
839*a9fa9459Szrj     ? ((other) & (~STO_MIPS16 & STO_MIPS_FLAGS))			\
840*a9fa9459Szrj     : ((other) & STO_MIPS_FLAGS)) == STO_MIPS_PLT)
841*a9fa9459Szrj #define ELF_ST_SET_MIPS_PLT(other)					\
842*a9fa9459Szrj   ((ELF_ST_IS_MIPS16 (other)						\
843*a9fa9459Szrj     ? ((other) & (STO_MIPS16 | ~STO_MIPS_FLAGS))			\
844*a9fa9459Szrj     : ((other) & ~STO_MIPS_FLAGS)) | STO_MIPS_PLT)
845*a9fa9459Szrj 
846*a9fa9459Szrj /* This value is used to mark PIC functions in an object that mixes
847*a9fa9459Szrj    PIC and non-PIC.  Note that this bit overlaps with STO_MIPS16,
848*a9fa9459Szrj    although MIPS16 symbols are never considered to be MIPS_PIC.  */
849*a9fa9459Szrj #define STO_MIPS_PIC		0x20
850*a9fa9459Szrj #define ELF_ST_IS_MIPS_PIC(other) (((other) & STO_MIPS_FLAGS) == STO_MIPS_PIC)
851*a9fa9459Szrj #define ELF_ST_SET_MIPS_PIC(other)					\
852*a9fa9459Szrj   ((ELF_ST_IS_MIPS16 (other)						\
853*a9fa9459Szrj     ? ((other) & ~(STO_MIPS16 | STO_MIPS_FLAGS))			\
854*a9fa9459Szrj     : ((other) & ~STO_MIPS_FLAGS)) | STO_MIPS_PIC)
855*a9fa9459Szrj 
856*a9fa9459Szrj /* This value is used for a mips16 .text symbol.  */
857*a9fa9459Szrj #define STO_MIPS16		0xf0
858*a9fa9459Szrj #define ELF_ST_IS_MIPS16(other) (((other) & STO_MIPS16) == STO_MIPS16)
859*a9fa9459Szrj #define ELF_ST_SET_MIPS16(other) ((other) | STO_MIPS16)
860*a9fa9459Szrj 
861*a9fa9459Szrj /* This value is used for a microMIPS .text symbol.  To distinguish from
862*a9fa9459Szrj    STO_MIPS16, we set top two bits to be 10 to denote STO_MICROMIPS.  The
863*a9fa9459Szrj    mask is STO_MIPS_ISA.  */
864*a9fa9459Szrj #define STO_MICROMIPS		(2 << 6)
865*a9fa9459Szrj #define ELF_ST_IS_MICROMIPS(other) (((other) & STO_MIPS_ISA) == STO_MICROMIPS)
866*a9fa9459Szrj #define ELF_ST_SET_MICROMIPS(other) (((other) & ~STO_MIPS_ISA) | STO_MICROMIPS)
867*a9fa9459Szrj 
868*a9fa9459Szrj /* Whether code compression (either of the MIPS16 or the microMIPS ASEs)
869*a9fa9459Szrj    has been indicated for a .text symbol.  */
870*a9fa9459Szrj #define ELF_ST_IS_COMPRESSED(other) \
871*a9fa9459Szrj   (ELF_ST_IS_MIPS16 (other) || ELF_ST_IS_MICROMIPS (other))
872*a9fa9459Szrj 
873*a9fa9459Szrj /* This bit is used on Irix to indicate a symbol whose definition
874*a9fa9459Szrj    is optional - if, at final link time, it cannot be found, no
875*a9fa9459Szrj    error message should be produced.  */
876*a9fa9459Szrj #define STO_OPTIONAL		(1 << 2)
877*a9fa9459Szrj /* A macro to examine the STO_OPTIONAL bit.  */
878*a9fa9459Szrj #define ELF_MIPS_IS_OPTIONAL(other)	((other) & STO_OPTIONAL)
879*a9fa9459Szrj 
880*a9fa9459Szrj /* The 64-bit MIPS ELF ABI uses an unusual reloc format.  Each
881*a9fa9459Szrj    relocation entry specifies up to three actual relocations, all at
882*a9fa9459Szrj    the same address.  The first relocation which required a symbol
883*a9fa9459Szrj    uses the symbol in the r_sym field.  The second relocation which
884*a9fa9459Szrj    requires a symbol uses the symbol in the r_ssym field.  If all
885*a9fa9459Szrj    three relocations require a symbol, the third one uses a zero
886*a9fa9459Szrj    value.  */
887*a9fa9459Szrj 
888*a9fa9459Szrj /* An entry in a 64 bit SHT_REL section.  */
889*a9fa9459Szrj 
890*a9fa9459Szrj typedef struct
891*a9fa9459Szrj {
892*a9fa9459Szrj   /* Address of relocation.  */
893*a9fa9459Szrj   unsigned char r_offset[8];
894*a9fa9459Szrj   /* Symbol index.  */
895*a9fa9459Szrj   unsigned char r_sym[4];
896*a9fa9459Szrj   /* Special symbol.  */
897*a9fa9459Szrj   unsigned char r_ssym[1];
898*a9fa9459Szrj   /* Third relocation.  */
899*a9fa9459Szrj   unsigned char r_type3[1];
900*a9fa9459Szrj   /* Second relocation.  */
901*a9fa9459Szrj   unsigned char r_type2[1];
902*a9fa9459Szrj   /* First relocation.  */
903*a9fa9459Szrj   unsigned char r_type[1];
904*a9fa9459Szrj } Elf64_Mips_External_Rel;
905*a9fa9459Szrj 
906*a9fa9459Szrj typedef struct
907*a9fa9459Szrj {
908*a9fa9459Szrj   /* Address of relocation.  */
909*a9fa9459Szrj   bfd_vma r_offset;
910*a9fa9459Szrj   /* Symbol index.  */
911*a9fa9459Szrj   unsigned long r_sym;
912*a9fa9459Szrj   /* Special symbol.  */
913*a9fa9459Szrj   unsigned char r_ssym;
914*a9fa9459Szrj   /* Third relocation.  */
915*a9fa9459Szrj   unsigned char r_type3;
916*a9fa9459Szrj   /* Second relocation.  */
917*a9fa9459Szrj   unsigned char r_type2;
918*a9fa9459Szrj   /* First relocation.  */
919*a9fa9459Szrj   unsigned char r_type;
920*a9fa9459Szrj } Elf64_Mips_Internal_Rel;
921*a9fa9459Szrj 
922*a9fa9459Szrj /* An entry in a 64 bit SHT_RELA section.  */
923*a9fa9459Szrj 
924*a9fa9459Szrj typedef struct
925*a9fa9459Szrj {
926*a9fa9459Szrj   /* Address of relocation.  */
927*a9fa9459Szrj   unsigned char r_offset[8];
928*a9fa9459Szrj   /* Symbol index.  */
929*a9fa9459Szrj   unsigned char r_sym[4];
930*a9fa9459Szrj   /* Special symbol.  */
931*a9fa9459Szrj   unsigned char r_ssym[1];
932*a9fa9459Szrj   /* Third relocation.  */
933*a9fa9459Szrj   unsigned char r_type3[1];
934*a9fa9459Szrj   /* Second relocation.  */
935*a9fa9459Szrj   unsigned char r_type2[1];
936*a9fa9459Szrj   /* First relocation.  */
937*a9fa9459Szrj   unsigned char r_type[1];
938*a9fa9459Szrj   /* Addend.  */
939*a9fa9459Szrj   unsigned char r_addend[8];
940*a9fa9459Szrj } Elf64_Mips_External_Rela;
941*a9fa9459Szrj 
942*a9fa9459Szrj typedef struct
943*a9fa9459Szrj {
944*a9fa9459Szrj   /* Address of relocation.  */
945*a9fa9459Szrj   bfd_vma r_offset;
946*a9fa9459Szrj   /* Symbol index.  */
947*a9fa9459Szrj   unsigned long r_sym;
948*a9fa9459Szrj   /* Special symbol.  */
949*a9fa9459Szrj   unsigned char r_ssym;
950*a9fa9459Szrj   /* Third relocation.  */
951*a9fa9459Szrj   unsigned char r_type3;
952*a9fa9459Szrj   /* Second relocation.  */
953*a9fa9459Szrj   unsigned char r_type2;
954*a9fa9459Szrj   /* First relocation.  */
955*a9fa9459Szrj   unsigned char r_type;
956*a9fa9459Szrj   /* Addend.  */
957*a9fa9459Szrj   bfd_signed_vma r_addend;
958*a9fa9459Szrj } Elf64_Mips_Internal_Rela;
959*a9fa9459Szrj 
960*a9fa9459Szrj /* MIPS ELF 64 relocation info access macros.  */
961*a9fa9459Szrj #define ELF64_MIPS_R_SSYM(i) (((i) >> 24) & 0xff)
962*a9fa9459Szrj #define ELF64_MIPS_R_TYPE3(i) (((i) >> 16) & 0xff)
963*a9fa9459Szrj #define ELF64_MIPS_R_TYPE2(i) (((i) >> 8) & 0xff)
964*a9fa9459Szrj #define ELF64_MIPS_R_TYPE(i) ((i) & 0xff)
965*a9fa9459Szrj 
966*a9fa9459Szrj /* Values found in the r_ssym field of a relocation entry.  */
967*a9fa9459Szrj 
968*a9fa9459Szrj /* No relocation.  */
969*a9fa9459Szrj #define RSS_UNDEF	0
970*a9fa9459Szrj 
971*a9fa9459Szrj /* Value of GP.  */
972*a9fa9459Szrj #define RSS_GP		1
973*a9fa9459Szrj 
974*a9fa9459Szrj /* Value of GP in object being relocated.  */
975*a9fa9459Szrj #define RSS_GP0		2
976*a9fa9459Szrj 
977*a9fa9459Szrj /* Address of location being relocated.  */
978*a9fa9459Szrj #define RSS_LOC		3
979*a9fa9459Szrj 
980*a9fa9459Szrj /* A SHT_MIPS_OPTIONS section contains a series of options, each of
981*a9fa9459Szrj    which starts with this header.  */
982*a9fa9459Szrj 
983*a9fa9459Szrj typedef struct
984*a9fa9459Szrj {
985*a9fa9459Szrj   /* Type of option.  */
986*a9fa9459Szrj   unsigned char kind[1];
987*a9fa9459Szrj   /* Size of option descriptor, including header.  */
988*a9fa9459Szrj   unsigned char size[1];
989*a9fa9459Szrj   /* Section index of affected section, or 0 for global option.  */
990*a9fa9459Szrj   unsigned char section[2];
991*a9fa9459Szrj   /* Information specific to this kind of option.  */
992*a9fa9459Szrj   unsigned char info[4];
993*a9fa9459Szrj } Elf_External_Options;
994*a9fa9459Szrj 
995*a9fa9459Szrj typedef struct
996*a9fa9459Szrj {
997*a9fa9459Szrj   /* Type of option.  */
998*a9fa9459Szrj   unsigned char kind;
999*a9fa9459Szrj   /* Size of option descriptor, including header.  */
1000*a9fa9459Szrj   unsigned char size;
1001*a9fa9459Szrj   /* Section index of affected section, or 0 for global option.  */
1002*a9fa9459Szrj   unsigned short section;
1003*a9fa9459Szrj   /* Information specific to this kind of option.  */
1004*a9fa9459Szrj   unsigned long info;
1005*a9fa9459Szrj } Elf_Internal_Options;
1006*a9fa9459Szrj 
1007*a9fa9459Szrj /* MIPS ELF option header swapping routines.  */
1008*a9fa9459Szrj extern void bfd_mips_elf_swap_options_in
1009*a9fa9459Szrj   (bfd *, const Elf_External_Options *, Elf_Internal_Options *);
1010*a9fa9459Szrj extern void bfd_mips_elf_swap_options_out
1011*a9fa9459Szrj   (bfd *, const Elf_Internal_Options *, Elf_External_Options *);
1012*a9fa9459Szrj 
1013*a9fa9459Szrj /* Values which may appear in the kind field of an Elf_Options
1014*a9fa9459Szrj    structure.  */
1015*a9fa9459Szrj 
1016*a9fa9459Szrj /* Undefined.  */
1017*a9fa9459Szrj #define ODK_NULL	0
1018*a9fa9459Szrj 
1019*a9fa9459Szrj /* Register usage and GP value.  */
1020*a9fa9459Szrj #define ODK_REGINFO	1
1021*a9fa9459Szrj 
1022*a9fa9459Szrj /* Exception processing information.  */
1023*a9fa9459Szrj #define ODK_EXCEPTIONS	2
1024*a9fa9459Szrj 
1025*a9fa9459Szrj /* Section padding information.  */
1026*a9fa9459Szrj #define ODK_PAD		3
1027*a9fa9459Szrj 
1028*a9fa9459Szrj /* Hardware workarounds performed.  */
1029*a9fa9459Szrj #define ODK_HWPATCH	4
1030*a9fa9459Szrj 
1031*a9fa9459Szrj /* Fill value used by the linker.  */
1032*a9fa9459Szrj #define ODK_FILL	5
1033*a9fa9459Szrj 
1034*a9fa9459Szrj /* Reserved space for desktop tools.  */
1035*a9fa9459Szrj #define ODK_TAGS	6
1036*a9fa9459Szrj 
1037*a9fa9459Szrj /* Hardware workarounds, AND bits when merging.  */
1038*a9fa9459Szrj #define ODK_HWAND	7
1039*a9fa9459Szrj 
1040*a9fa9459Szrj /* Hardware workarounds, OR bits when merging.  */
1041*a9fa9459Szrj #define ODK_HWOR	8
1042*a9fa9459Szrj 
1043*a9fa9459Szrj /* GP group to use for text/data sections.  */
1044*a9fa9459Szrj #define ODK_GP_GROUP	9
1045*a9fa9459Szrj 
1046*a9fa9459Szrj /* ID information.  */
1047*a9fa9459Szrj #define ODK_IDENT	10
1048*a9fa9459Szrj 
1049*a9fa9459Szrj /* In the 32 bit ABI, an ODK_REGINFO option is just a Elf32_RegInfo
1050*a9fa9459Szrj    structure.  In the 64 bit ABI, it is the following structure.  The
1051*a9fa9459Szrj    info field of the options header is not used.  */
1052*a9fa9459Szrj 
1053*a9fa9459Szrj typedef struct
1054*a9fa9459Szrj {
1055*a9fa9459Szrj   /* Mask of general purpose registers used.  */
1056*a9fa9459Szrj   unsigned char ri_gprmask[4];
1057*a9fa9459Szrj   /* Padding.  */
1058*a9fa9459Szrj   unsigned char ri_pad[4];
1059*a9fa9459Szrj   /* Mask of co-processor registers used.  */
1060*a9fa9459Szrj   unsigned char ri_cprmask[4][4];
1061*a9fa9459Szrj   /* GP register value for this object file.  */
1062*a9fa9459Szrj   unsigned char ri_gp_value[8];
1063*a9fa9459Szrj } Elf64_External_RegInfo;
1064*a9fa9459Szrj 
1065*a9fa9459Szrj typedef struct
1066*a9fa9459Szrj {
1067*a9fa9459Szrj   /* Mask of general purpose registers used.  */
1068*a9fa9459Szrj   unsigned long ri_gprmask;
1069*a9fa9459Szrj   /* Padding.  */
1070*a9fa9459Szrj   unsigned long ri_pad;
1071*a9fa9459Szrj   /* Mask of co-processor registers used.  */
1072*a9fa9459Szrj   unsigned long ri_cprmask[4];
1073*a9fa9459Szrj   /* GP register value for this object file.  */
1074*a9fa9459Szrj   bfd_vma ri_gp_value;
1075*a9fa9459Szrj } Elf64_Internal_RegInfo;
1076*a9fa9459Szrj 
1077*a9fa9459Szrj /* ABI Flags structure version 0.  */
1078*a9fa9459Szrj 
1079*a9fa9459Szrj typedef struct
1080*a9fa9459Szrj {
1081*a9fa9459Szrj   /* Version of flags structure.  */
1082*a9fa9459Szrj   unsigned char version[2];
1083*a9fa9459Szrj   /* The level of the ISA: 1-5, 32, 64.  */
1084*a9fa9459Szrj   unsigned char isa_level[1];
1085*a9fa9459Szrj   /* The revision of ISA: 0 for MIPS V and below, 1-n otherwise.  */
1086*a9fa9459Szrj   unsigned char isa_rev[1];
1087*a9fa9459Szrj   /* The size of general purpose registers.  */
1088*a9fa9459Szrj   unsigned char gpr_size[1];
1089*a9fa9459Szrj   /* The size of co-processor 1 registers.  */
1090*a9fa9459Szrj   unsigned char cpr1_size[1];
1091*a9fa9459Szrj   /* The size of co-processor 2 registers.  */
1092*a9fa9459Szrj   unsigned char cpr2_size[1];
1093*a9fa9459Szrj   /* The floating-point ABI.  */
1094*a9fa9459Szrj   unsigned char fp_abi[1];
1095*a9fa9459Szrj   /* Processor-specific extension.  */
1096*a9fa9459Szrj   unsigned char isa_ext[4];
1097*a9fa9459Szrj   /* Mask of ASEs used.  */
1098*a9fa9459Szrj   unsigned char ases[4];
1099*a9fa9459Szrj   /* Mask of general flags.  */
1100*a9fa9459Szrj   unsigned char flags1[4];
1101*a9fa9459Szrj   unsigned char flags2[4];
1102*a9fa9459Szrj } Elf_External_ABIFlags_v0;
1103*a9fa9459Szrj 
1104*a9fa9459Szrj typedef struct
1105*a9fa9459Szrj {
1106*a9fa9459Szrj   /* Version of flags structure.  */
1107*a9fa9459Szrj   unsigned short version;
1108*a9fa9459Szrj   /* The level of the ISA: 1-5, 32, 64.  */
1109*a9fa9459Szrj   unsigned char isa_level;
1110*a9fa9459Szrj   /* The revision of ISA: 0 for MIPS V and below, 1-n otherwise.  */
1111*a9fa9459Szrj   unsigned char isa_rev;
1112*a9fa9459Szrj   /* The size of general purpose registers.  */
1113*a9fa9459Szrj   unsigned char gpr_size;
1114*a9fa9459Szrj   /* The size of co-processor 1 registers.  */
1115*a9fa9459Szrj   unsigned char cpr1_size;
1116*a9fa9459Szrj   /* The size of co-processor 2 registers.  */
1117*a9fa9459Szrj   unsigned char cpr2_size;
1118*a9fa9459Szrj   /* The floating-point ABI.  */
1119*a9fa9459Szrj   unsigned char fp_abi;
1120*a9fa9459Szrj   /* Processor-specific extension.  */
1121*a9fa9459Szrj   unsigned long isa_ext;
1122*a9fa9459Szrj   /* Mask of ASEs used.  */
1123*a9fa9459Szrj   unsigned long ases;
1124*a9fa9459Szrj   /* Mask of general flags.  */
1125*a9fa9459Szrj   unsigned long flags1;
1126*a9fa9459Szrj   unsigned long flags2;
1127*a9fa9459Szrj } Elf_Internal_ABIFlags_v0;
1128*a9fa9459Szrj 
1129*a9fa9459Szrj typedef struct
1130*a9fa9459Szrj {
1131*a9fa9459Szrj   /* The hash value computed from the name of the corresponding
1132*a9fa9459Szrj      dynamic symbol.  */
1133*a9fa9459Szrj   unsigned char ms_hash_value[4];
1134*a9fa9459Szrj   /* Contains both the dynamic relocation index and the symbol flags
1135*a9fa9459Szrj      field.  The macros ELF32_MS_REL_INDEX and ELF32_MS_FLAGS are used
1136*a9fa9459Szrj      to access the individual values.  The dynamic relocation index
1137*a9fa9459Szrj      identifies the first entry in the .rel.dyn section that
1138*a9fa9459Szrj      references the dynamic symbol corresponding to this msym entry.
1139*a9fa9459Szrj      If the index is 0, no dynamic relocations are associated with the
1140*a9fa9459Szrj      symbol.  The symbol flags field is reserved for future use.  */
1141*a9fa9459Szrj   unsigned char ms_info[4];
1142*a9fa9459Szrj } Elf32_External_Msym;
1143*a9fa9459Szrj 
1144*a9fa9459Szrj typedef struct
1145*a9fa9459Szrj {
1146*a9fa9459Szrj   /* The hash value computed from the name of the corresponding
1147*a9fa9459Szrj      dynamic symbol.  */
1148*a9fa9459Szrj   unsigned long ms_hash_value;
1149*a9fa9459Szrj   /* Contains both the dynamic relocation index and the symbol flags
1150*a9fa9459Szrj      field.  The macros ELF32_MS_REL_INDEX and ELF32_MS_FLAGS are used
1151*a9fa9459Szrj      to access the individual values.  The dynamic relocation index
1152*a9fa9459Szrj      identifies the first entry in the .rel.dyn section that
1153*a9fa9459Szrj      references the dynamic symbol corresponding to this msym entry.
1154*a9fa9459Szrj      If the index is 0, no dynamic relocations are associated with the
1155*a9fa9459Szrj      symbol.  The symbol flags field is reserved for future use.  */
1156*a9fa9459Szrj   unsigned long ms_info;
1157*a9fa9459Szrj } Elf32_Internal_Msym;
1158*a9fa9459Szrj 
1159*a9fa9459Szrj #define ELF32_MS_REL_INDEX(i) ((i) >> 8)
1160*a9fa9459Szrj #define ELF32_MS_FLAGS(i)     (i) & 0xff)
1161*a9fa9459Szrj #define ELF32_MS_INFO(r, f)   (((r) << 8) + ((f) & 0xff))
1162*a9fa9459Szrj 
1163*a9fa9459Szrj /* MIPS ELF reginfo swapping routines.  */
1164*a9fa9459Szrj extern void bfd_mips_elf64_swap_reginfo_in
1165*a9fa9459Szrj   (bfd *, const Elf64_External_RegInfo *, Elf64_Internal_RegInfo *);
1166*a9fa9459Szrj extern void bfd_mips_elf64_swap_reginfo_out
1167*a9fa9459Szrj   (bfd *, const Elf64_Internal_RegInfo *, Elf64_External_RegInfo *);
1168*a9fa9459Szrj 
1169*a9fa9459Szrj /* MIPS ELF flags swapping routines.  */
1170*a9fa9459Szrj extern void bfd_mips_elf_swap_abiflags_v0_in
1171*a9fa9459Szrj   (bfd *, const Elf_External_ABIFlags_v0 *, Elf_Internal_ABIFlags_v0 *);
1172*a9fa9459Szrj extern void bfd_mips_elf_swap_abiflags_v0_out
1173*a9fa9459Szrj   (bfd *, const Elf_Internal_ABIFlags_v0 *, Elf_External_ABIFlags_v0 *);
1174*a9fa9459Szrj 
1175*a9fa9459Szrj /* Masks for the info work of an ODK_EXCEPTIONS descriptor.  */
1176*a9fa9459Szrj #define OEX_FPU_MIN	0x1f	/* FPEs which must be enabled.  */
1177*a9fa9459Szrj #define OEX_FPU_MAX	0x1f00	/* FPEs which may be enabled.  */
1178*a9fa9459Szrj #define OEX_PAGE0	0x10000	/* Page zero must be mapped.  */
1179*a9fa9459Szrj #define OEX_SMM		0x20000	/* Force sequential memory mode.  */
1180*a9fa9459Szrj #define OEX_FPDBUG	0x40000	/* Force precise floating-point
1181*a9fa9459Szrj 				   exceptions (debug mode).  */
1182*a9fa9459Szrj #define OEX_DISMISS	0x80000	/* Dismiss invalid address faults.  */
1183*a9fa9459Szrj 
1184*a9fa9459Szrj /* Masks of the FP exceptions for OEX_FPU_MIN and OEX_FPU_MAX.  */
1185*a9fa9459Szrj #define OEX_FPU_INVAL	0x10	/* Invalid operation exception.  */
1186*a9fa9459Szrj #define OEX_FPU_DIV0	0x08	/* Division by zero exception.  */
1187*a9fa9459Szrj #define OEX_FPU_OFLO	0x04	/* Overflow exception.  */
1188*a9fa9459Szrj #define OEX_FPU_UFLO	0x02	/* Underflow exception.  */
1189*a9fa9459Szrj #define OEX_FPU_INEX	0x01	/* Inexact exception.  */
1190*a9fa9459Szrj 
1191*a9fa9459Szrj /* Masks for the info word of an ODK_PAD descriptor.  */
1192*a9fa9459Szrj #define OPAD_PREFIX	0x01
1193*a9fa9459Szrj #define OPAD_POSTFIX	0x02
1194*a9fa9459Szrj #define OPAD_SYMBOL	0x04
1195*a9fa9459Szrj 
1196*a9fa9459Szrj /* Masks for the info word of an ODK_HWPATCH descriptor.  */
1197*a9fa9459Szrj #define OHW_R4KEOP	0x00000001	/* R4000 end-of-page patch.  */
1198*a9fa9459Szrj #define OHW_R8KPFETCH	0x00000002	/* May need R8000 prefetch patch.  */
1199*a9fa9459Szrj #define OHW_R5KEOP	0x00000004	/* R5000 end-of-page patch.  */
1200*a9fa9459Szrj #define OHW_R5KCVTL	0x00000008	/* R5000 cvt.[ds].l bug
1201*a9fa9459Szrj 					   (clean == 1).  */
1202*a9fa9459Szrj #define OHW_R10KLDL	0x00000010	/* Needs R10K misaligned
1203*a9fa9459Szrj 					   load patch. */
1204*a9fa9459Szrj 
1205*a9fa9459Szrj /* Masks for the info word of an ODK_IDENT/ODK_GP_GROUP descriptor.  */
1206*a9fa9459Szrj #define OGP_GROUP	0x0000ffff	/* GP group number.  */
1207*a9fa9459Szrj #define OGP_SELF	0xffff0000	/* Self-contained GP groups.  */
1208*a9fa9459Szrj 
1209*a9fa9459Szrj /* Masks for the info word of an ODK_HWAND/ODK_HWOR descriptor.  */
1210*a9fa9459Szrj #define OHWA0_R4KEOP_CHECKED	0x00000001
1211*a9fa9459Szrj #define OHWA0_R4KEOP_CLEAN	0x00000002
1212*a9fa9459Szrj 
1213*a9fa9459Szrj /* Values for the xxx_size bytes of an ABI flags structure.  */
1214*a9fa9459Szrj 
1215*a9fa9459Szrj #define AFL_REG_NONE	     0x00	/* No registers.  */
1216*a9fa9459Szrj #define AFL_REG_32	     0x01	/* 32-bit registers.  */
1217*a9fa9459Szrj #define AFL_REG_64	     0x02	/* 64-bit registers.  */
1218*a9fa9459Szrj #define AFL_REG_128	     0x03	/* 128-bit registers.  */
1219*a9fa9459Szrj 
1220*a9fa9459Szrj /* Masks for the ases word of an ABI flags structure.  */
1221*a9fa9459Szrj 
1222*a9fa9459Szrj #define AFL_ASE_DSP          0x00000001 /* DSP ASE.  */
1223*a9fa9459Szrj #define AFL_ASE_DSPR2        0x00000002 /* DSP R2 ASE.  */
1224*a9fa9459Szrj #define AFL_ASE_EVA          0x00000004 /* Enhanced VA Scheme.  */
1225*a9fa9459Szrj #define AFL_ASE_MCU          0x00000008 /* MCU (MicroController) ASE.  */
1226*a9fa9459Szrj #define AFL_ASE_MDMX         0x00000010 /* MDMX ASE.  */
1227*a9fa9459Szrj #define AFL_ASE_MIPS3D       0x00000020 /* MIPS-3D ASE.  */
1228*a9fa9459Szrj #define AFL_ASE_MT           0x00000040 /* MT ASE.  */
1229*a9fa9459Szrj #define AFL_ASE_SMARTMIPS    0x00000080 /* SmartMIPS ASE.  */
1230*a9fa9459Szrj #define AFL_ASE_VIRT         0x00000100 /* VZ ASE.  */
1231*a9fa9459Szrj #define AFL_ASE_MSA          0x00000200 /* MSA ASE.  */
1232*a9fa9459Szrj #define AFL_ASE_MIPS16       0x00000400 /* MIPS16 ASE.  */
1233*a9fa9459Szrj #define AFL_ASE_MICROMIPS    0x00000800 /* MICROMIPS ASE.  */
1234*a9fa9459Szrj #define AFL_ASE_XPA          0x00001000 /* XPA ASE.  */
1235*a9fa9459Szrj #define AFL_ASE_DSPR3        0x00002000 /* DSP R3 ASE.  */
1236*a9fa9459Szrj #define AFL_ASE_MASK         0x00003fff /* All ASEs.  */
1237*a9fa9459Szrj 
1238*a9fa9459Szrj /* Values for the isa_ext word of an ABI flags structure.  */
1239*a9fa9459Szrj 
1240*a9fa9459Szrj #define AFL_EXT_XLR           1  /* RMI Xlr instruction.  */
1241*a9fa9459Szrj #define AFL_EXT_OCTEON2       2  /* Cavium Networks Octeon2.  */
1242*a9fa9459Szrj #define AFL_EXT_OCTEONP       3  /* Cavium Networks OcteonP.  */
1243*a9fa9459Szrj #define AFL_EXT_LOONGSON_3A   4  /* Loongson 3A.  */
1244*a9fa9459Szrj #define AFL_EXT_OCTEON        5  /* Cavium Networks Octeon.  */
1245*a9fa9459Szrj #define AFL_EXT_5900          6  /* MIPS R5900 instruction.  */
1246*a9fa9459Szrj #define AFL_EXT_4650          7  /* MIPS R4650 instruction.  */
1247*a9fa9459Szrj #define AFL_EXT_4010          8  /* LSI R4010 instruction.  */
1248*a9fa9459Szrj #define AFL_EXT_4100          9  /* NEC VR4100 instruction.  */
1249*a9fa9459Szrj #define AFL_EXT_3900         10  /* Toshiba R3900 instruction.  */
1250*a9fa9459Szrj #define AFL_EXT_10000        11  /* MIPS R10000 instruction.  */
1251*a9fa9459Szrj #define AFL_EXT_SB1          12  /* Broadcom SB-1 instruction.  */
1252*a9fa9459Szrj #define AFL_EXT_4111         13  /* NEC VR4111/VR4181 instruction.  */
1253*a9fa9459Szrj #define AFL_EXT_4120         14  /* NEC VR4120 instruction.  */
1254*a9fa9459Szrj #define AFL_EXT_5400         15  /* NEC VR5400 instruction.  */
1255*a9fa9459Szrj #define AFL_EXT_5500         16  /* NEC VR5500 instruction.  */
1256*a9fa9459Szrj #define AFL_EXT_LOONGSON_2E  17  /* ST Microelectronics Loongson 2E.  */
1257*a9fa9459Szrj #define AFL_EXT_LOONGSON_2F  18  /* ST Microelectronics Loongson 2F.  */
1258*a9fa9459Szrj #define AFL_EXT_OCTEON3      19  /* Cavium Networks Octeon3.  */
1259*a9fa9459Szrj 
1260*a9fa9459Szrj /* Masks for the flags1 word of an ABI flags structure.  */
1261*a9fa9459Szrj #define AFL_FLAGS1_ODDSPREG   1	 /* Uses odd single-precision registers.  */
1262*a9fa9459Szrj 
1263*a9fa9459Szrj extern unsigned int bfd_mips_isa_ext (bfd *);
1264*a9fa9459Szrj 
1265*a9fa9459Szrj 
1266*a9fa9459Szrj /* Object attribute tags.  */
1267*a9fa9459Szrj enum
1268*a9fa9459Szrj {
1269*a9fa9459Szrj   /* 0-3 are generic.  */
1270*a9fa9459Szrj 
1271*a9fa9459Szrj   /* Floating-point ABI used by this object file.  */
1272*a9fa9459Szrj   Tag_GNU_MIPS_ABI_FP = 4,
1273*a9fa9459Szrj 
1274*a9fa9459Szrj   /* MSA ABI used by this object file.  */
1275*a9fa9459Szrj   Tag_GNU_MIPS_ABI_MSA = 8,
1276*a9fa9459Szrj };
1277*a9fa9459Szrj 
1278*a9fa9459Szrj /* Object attribute values.  */
1279*a9fa9459Szrj enum
1280*a9fa9459Szrj {
1281*a9fa9459Szrj   /* Values defined for Tag_GNU_MIPS_ABI_FP.  */
1282*a9fa9459Szrj 
1283*a9fa9459Szrj   /* Not tagged or not using any ABIs affected by the differences.  */
1284*a9fa9459Szrj   Val_GNU_MIPS_ABI_FP_ANY = 0,
1285*a9fa9459Szrj 
1286*a9fa9459Szrj   /* Using hard-float -mdouble-float.  */
1287*a9fa9459Szrj   Val_GNU_MIPS_ABI_FP_DOUBLE = 1,
1288*a9fa9459Szrj 
1289*a9fa9459Szrj   /* Using hard-float -msingle-float.  */
1290*a9fa9459Szrj   Val_GNU_MIPS_ABI_FP_SINGLE = 2,
1291*a9fa9459Szrj 
1292*a9fa9459Szrj   /* Using soft-float.  */
1293*a9fa9459Szrj   Val_GNU_MIPS_ABI_FP_SOFT = 3,
1294*a9fa9459Szrj 
1295*a9fa9459Szrj   /* Using -mips32r2 -mfp64.  */
1296*a9fa9459Szrj   Val_GNU_MIPS_ABI_FP_OLD_64 = 4,
1297*a9fa9459Szrj 
1298*a9fa9459Szrj   /* Using -mfpxx */
1299*a9fa9459Szrj   Val_GNU_MIPS_ABI_FP_XX = 5,
1300*a9fa9459Szrj 
1301*a9fa9459Szrj   /* Using -mips32r2 -mfp64.  */
1302*a9fa9459Szrj   Val_GNU_MIPS_ABI_FP_64 = 6,
1303*a9fa9459Szrj 
1304*a9fa9459Szrj   /* Using -mips32r2 -mfp64 -mno-odd-spreg.  */
1305*a9fa9459Szrj   Val_GNU_MIPS_ABI_FP_64A = 7,
1306*a9fa9459Szrj 
1307*a9fa9459Szrj   /* This is reserved for backward-compatibility with an earlier
1308*a9fa9459Szrj      implementation of the MIPS NaN2008 functionality.  */
1309*a9fa9459Szrj   Val_GNU_MIPS_ABI_FP_NAN2008 = 8,
1310*a9fa9459Szrj 
1311*a9fa9459Szrj   /* Values defined for Tag_GNU_MIPS_ABI_MSA.  */
1312*a9fa9459Szrj 
1313*a9fa9459Szrj   /* Not tagged or not using any ABIs affected by the differences.  */
1314*a9fa9459Szrj   Val_GNU_MIPS_ABI_MSA_ANY = 0,
1315*a9fa9459Szrj 
1316*a9fa9459Szrj   /* Using 128-bit MSA.  */
1317*a9fa9459Szrj   Val_GNU_MIPS_ABI_MSA_128 = 1,
1318*a9fa9459Szrj };
1319*a9fa9459Szrj 
1320*a9fa9459Szrj #ifdef __cplusplus
1321*a9fa9459Szrj }
1322*a9fa9459Szrj #endif
1323*a9fa9459Szrj 
1324*a9fa9459Szrj #endif /* _ELF_MIPS_H */
1325