xref: /dflybsd-src/contrib/binutils-2.27/include/elf/aarch64.h (revision e656dc90e3d65d744d534af2f5ea88cf8101ebcf)
1*a9fa9459Szrj /* AArch64 ELF support for BFD.
2*a9fa9459Szrj 
3*a9fa9459Szrj    Copyright (C) 2009-2016 Free Software Foundation, Inc.
4*a9fa9459Szrj    Contributed by ARM Ltd.
5*a9fa9459Szrj 
6*a9fa9459Szrj    This file is part of GNU Binutils.
7*a9fa9459Szrj 
8*a9fa9459Szrj    This program is free software; you can redistribute it and/or modify
9*a9fa9459Szrj    it under the terms of the GNU General Public License as published by
10*a9fa9459Szrj    the Free Software Foundation; either version 3 of the license, or
11*a9fa9459Szrj    (at your option) any later version.
12*a9fa9459Szrj 
13*a9fa9459Szrj    This program is distributed in the hope that it will be useful,
14*a9fa9459Szrj    but WITHOUT ANY WARRANTY; without even the implied warranty of
15*a9fa9459Szrj    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16*a9fa9459Szrj    GNU General Public License for more details.
17*a9fa9459Szrj 
18*a9fa9459Szrj    You should have received a copy of the GNU General Public License
19*a9fa9459Szrj    along with this program; see the file COPYING3. If not,
20*a9fa9459Szrj    see <http://www.gnu.org/licenses/>.  */
21*a9fa9459Szrj 
22*a9fa9459Szrj #ifndef _ELF_AARCH64_H
23*a9fa9459Szrj #define _ELF_AARCH64_H
24*a9fa9459Szrj 
25*a9fa9459Szrj #include "elf/reloc-macros.h"
26*a9fa9459Szrj 
27*a9fa9459Szrj /* Processor specific program header types.  */
28*a9fa9459Szrj #define PT_AARCH64_ARCHEXT	(PT_LOPROC + 0)
29*a9fa9459Szrj 
30*a9fa9459Szrj /* Additional section types.  */
31*a9fa9459Szrj #define SHT_AARCH64_ATTRIBUTES	0x70000003  /* Section holds attributes.  */
32*a9fa9459Szrj 
33*a9fa9459Szrj /* AArch64-specific values for sh_flags.  */
34*a9fa9459Szrj #define SHF_ENTRYSECT		0x10000000   /* Section contains an
35*a9fa9459Szrj 						entry point.  */
36*a9fa9459Szrj #define SHF_COMDEF		0x80000000   /* Section may be multiply defined
37*a9fa9459Szrj 						in the input to a link step.  */
38*a9fa9459Szrj 
39*a9fa9459Szrj /* Relocation types.  */
40*a9fa9459Szrj 
41*a9fa9459Szrj START_RELOC_NUMBERS (elf_aarch64_reloc_type)
42*a9fa9459Szrj 
43*a9fa9459Szrj /* Null relocations.  */
44*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_NONE, 0) /* No reloc */
45*a9fa9459Szrj 
46*a9fa9459Szrj /* Basic data relocations.  */
47*a9fa9459Szrj 
48*a9fa9459Szrj /* .word:  (S+A) */
49*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_ABS32, 1)
50*a9fa9459Szrj 
51*a9fa9459Szrj /* .half: (S+A) */
52*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_ABS16, 2)
53*a9fa9459Szrj 
54*a9fa9459Szrj /* .word: (S+A-P) */
55*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_PREL32, 3)
56*a9fa9459Szrj 
57*a9fa9459Szrj /* .half:  (S+A-P) */
58*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_PREL16, 4)
59*a9fa9459Szrj 
60*a9fa9459Szrj /* Group relocations to create a 16, 32, 48 or 64 bit
61*a9fa9459Szrj    unsigned data or abs address inline.  */
62*a9fa9459Szrj 
63*a9fa9459Szrj /* MOV[ZK]:   ((S+A) >>  0) & 0xffff */
64*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_MOVW_UABS_G0, 5)
65*a9fa9459Szrj 
66*a9fa9459Szrj /* MOV[ZK]:   ((S+A) >>  0) & 0xffff */
67*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_MOVW_UABS_G0_NC, 6)
68*a9fa9459Szrj 
69*a9fa9459Szrj /* MOV[ZK]:   ((S+A) >> 16) & 0xffff */
70*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_MOVW_UABS_G1, 7)
71*a9fa9459Szrj 
72*a9fa9459Szrj /* Group relocations to create high part of a 16, 32, 48 or 64 bit
73*a9fa9459Szrj    signed data or abs address inline. Will change instruction
74*a9fa9459Szrj    to MOVN or MOVZ depending on sign of calculated value.  */
75*a9fa9459Szrj 
76*a9fa9459Szrj /* MOV[ZN]:   ((S+A) >>  0) & 0xffff */
77*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_MOVW_SABS_G0, 8)
78*a9fa9459Szrj 
79*a9fa9459Szrj /* Relocations to generate 19, 21 and 33 bit PC-relative load/store
80*a9fa9459Szrj    addresses: PG(x) is (x & ~0xfff).  */
81*a9fa9459Szrj 
82*a9fa9459Szrj /* LD-lit: ((S+A-P) >> 2) & 0x7ffff */
83*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_LD_PREL_LO19, 9)
84*a9fa9459Szrj 
85*a9fa9459Szrj /* ADR:    (S+A-P) & 0x1fffff */
86*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_ADR_PREL_LO21, 10)
87*a9fa9459Szrj 
88*a9fa9459Szrj /* ADRH:   ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
89*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_ADR_PREL_PG_HI21, 11)
90*a9fa9459Szrj 
91*a9fa9459Szrj /* ADD:    (S+A) & 0xfff */
92*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_ADD_ABS_LO12_NC, 12)
93*a9fa9459Szrj 
94*a9fa9459Szrj /* LD/ST8: (S+A) & 0xfff */
95*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_LDST8_ABS_LO12_NC, 13)
96*a9fa9459Szrj 
97*a9fa9459Szrj /* LD/ST16: (S+A) & 0xffe */
98*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_LDST16_ABS_LO12_NC, 14)
99*a9fa9459Szrj 
100*a9fa9459Szrj /* LD/ST32: (S+A) & 0xffc */
101*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_LDST32_ABS_LO12_NC, 15)
102*a9fa9459Szrj 
103*a9fa9459Szrj /* LD/ST64: (S+A) & 0xff8 */
104*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_LDST64_ABS_LO12_NC, 16)
105*a9fa9459Szrj 
106*a9fa9459Szrj /* LD/ST128: (S+A) & 0xff0 */
107*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_LDST128_ABS_LO12_NC, 17)
108*a9fa9459Szrj 
109*a9fa9459Szrj /* Relocations for control-flow instructions.  */
110*a9fa9459Szrj 
111*a9fa9459Szrj /* TBZ/NZ: ((S+A-P) >> 2) & 0x3fff.  */
112*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TSTBR14, 18)
113*a9fa9459Szrj 
114*a9fa9459Szrj /* B.cond: ((S+A-P) >> 2) & 0x7ffff.  */
115*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_CONDBR19, 19)
116*a9fa9459Szrj 
117*a9fa9459Szrj /* B:      ((S+A-P) >> 2) & 0x3ffffff.  */
118*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_JUMP26, 20)
119*a9fa9459Szrj 
120*a9fa9459Szrj /* BL:     ((S+A-P) >> 2) & 0x3ffffff.  */
121*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_CALL26, 21)
122*a9fa9459Szrj 
123*a9fa9459Szrj 
124*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_GOT_LD_PREL19, 25)
125*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_ADR_GOT_PAGE, 26)
126*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_LD32_GOT_LO12_NC, 27)
127*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_LD32_GOTPAGE_LO14, 28)
128*a9fa9459Szrj 
129*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADR_PREL21, 80)
130*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADR_PAGE21, 81)
131*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADD_LO12_NC, 82)
132*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADR_PREL21, 83)
133*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADR_PAGE21, 84)
134*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_LO12_NC, 85)
135*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G1, 87)
136*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0, 88)
137*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0_NC, 89)
138*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_HI12, 90)
139*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12, 91)
140*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12_NC, 92)
141*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLSIE_ADR_GOTTPREL_PAGE21, 103)
142*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD32_GOTTPREL_LO12_NC, 104)
143*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLSIE_LD_GOTTPREL_PREL19, 105)
144*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G1, 106)
145*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G0, 107)
146*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLSLE_MOVW_TPREL_G0_NC, 108)
147*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_HI12, 109)
148*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_LO12, 110)
149*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLSLE_ADD_TPREL_LO12_NC, 111)
150*a9fa9459Szrj 
151*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLSDESC_LD_PREL19, 122)
152*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADR_PREL21, 123)
153*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADR_PAGE21, 124)
154*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLSDESC_LD32_LO12_NC, 125)
155*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLSDESC_ADD_LO12_NC, 126)
156*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLSDESC_CALL, 127)
157*a9fa9459Szrj 
158*a9fa9459Szrj /* Dynamic relocations */
159*a9fa9459Szrj 
160*a9fa9459Szrj /* Copy symbol at runtime.  */
161*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_COPY, 180)
162*a9fa9459Szrj 
163*a9fa9459Szrj /* Create GOT entry.  */
164*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_GLOB_DAT, 181)
165*a9fa9459Szrj 
166*a9fa9459Szrj  /* Create PLT entry.  */
167*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_JUMP_SLOT, 182)
168*a9fa9459Szrj 
169*a9fa9459Szrj /* Adjust by program base.  */
170*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_RELATIVE, 183)
171*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLS_DTPMOD, 184)
172*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLS_DTPREL, 185)
173*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLS_TPREL, 186)
174*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_TLSDESC, 187)
175*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_P32_IRELATIVE, 188)
176*a9fa9459Szrj 
177*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_NULL, 256) /* No reloc */
178*a9fa9459Szrj 
179*a9fa9459Szrj /* Basic data relocations.  */
180*a9fa9459Szrj 
181*a9fa9459Szrj /* .xword: (S+A) */
182*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_ABS64, 257)
183*a9fa9459Szrj 
184*a9fa9459Szrj /* .word:  (S+A) */
185*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_ABS32, 258)
186*a9fa9459Szrj 
187*a9fa9459Szrj /* .half: (S+A) */
188*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_ABS16, 259)
189*a9fa9459Szrj 
190*a9fa9459Szrj /* .xword: (S+A-P) */
191*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_PREL64, 260)
192*a9fa9459Szrj 
193*a9fa9459Szrj /* .word: (S+A-P) */
194*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_PREL32, 261)
195*a9fa9459Szrj 
196*a9fa9459Szrj /* .half:  (S+A-P) */
197*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_PREL16, 262)
198*a9fa9459Szrj 
199*a9fa9459Szrj /* Group relocations to create a 16, 32, 48 or 64 bit
200*a9fa9459Szrj    unsigned data or abs address inline.  */
201*a9fa9459Szrj 
202*a9fa9459Szrj /* MOV[ZK]:   ((S+A) >>  0) & 0xffff */
203*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_MOVW_UABS_G0,		263)
204*a9fa9459Szrj 
205*a9fa9459Szrj /* MOV[ZK]:   ((S+A) >>  0) & 0xffff */
206*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_MOVW_UABS_G0_NC, 264)
207*a9fa9459Szrj 
208*a9fa9459Szrj /* MOV[ZK]:   ((S+A) >> 16) & 0xffff */
209*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_MOVW_UABS_G1, 265)
210*a9fa9459Szrj 
211*a9fa9459Szrj /* MOV[ZK]:   ((S+A) >> 16) & 0xffff */
212*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_MOVW_UABS_G1_NC, 266)
213*a9fa9459Szrj 
214*a9fa9459Szrj /* MOV[ZK]:   ((S+A) >> 32) & 0xffff */
215*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_MOVW_UABS_G2, 267)
216*a9fa9459Szrj 
217*a9fa9459Szrj /* MOV[ZK]:   ((S+A) >> 32) & 0xffff */
218*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_MOVW_UABS_G2_NC, 268)
219*a9fa9459Szrj 
220*a9fa9459Szrj /* MOV[ZK]:   ((S+A) >> 48) & 0xffff */
221*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_MOVW_UABS_G3, 269)
222*a9fa9459Szrj 
223*a9fa9459Szrj /* Group relocations to create high part of a 16, 32, 48 or 64 bit
224*a9fa9459Szrj    signed data or abs address inline. Will change instruction
225*a9fa9459Szrj    to MOVN or MOVZ depending on sign of calculated value.  */
226*a9fa9459Szrj 
227*a9fa9459Szrj /* MOV[ZN]:   ((S+A) >>  0) & 0xffff */
228*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_MOVW_SABS_G0, 270)
229*a9fa9459Szrj 
230*a9fa9459Szrj /* MOV[ZN]:   ((S+A) >> 16) & 0xffff */
231*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_MOVW_SABS_G1, 271)
232*a9fa9459Szrj 
233*a9fa9459Szrj /* MOV[ZN]:   ((S+A) >> 32) & 0xffff */
234*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_MOVW_SABS_G2, 272)
235*a9fa9459Szrj 
236*a9fa9459Szrj /* Relocations to generate 19, 21 and 33 bit PC-relative load/store
237*a9fa9459Szrj    addresses: PG(x) is (x & ~0xfff).  */
238*a9fa9459Szrj 
239*a9fa9459Szrj /* LD-lit: ((S+A-P) >> 2) & 0x7ffff */
240*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_LD_PREL_LO19, 273)
241*a9fa9459Szrj 
242*a9fa9459Szrj /* ADR:    (S+A-P) & 0x1fffff */
243*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_ADR_PREL_LO21, 274)
244*a9fa9459Szrj 
245*a9fa9459Szrj /* ADRH:   ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
246*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_ADR_PREL_PG_HI21, 275)
247*a9fa9459Szrj 
248*a9fa9459Szrj /* ADRH:   ((PG(S+A)-PG(P)) >> 12) & 0x1fffff */
249*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_ADR_PREL_PG_HI21_NC, 276)
250*a9fa9459Szrj 
251*a9fa9459Szrj /* ADD:    (S+A) & 0xfff */
252*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_ADD_ABS_LO12_NC, 277)
253*a9fa9459Szrj 
254*a9fa9459Szrj /* LD/ST8: (S+A) & 0xfff */
255*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_LDST8_ABS_LO12_NC, 278)
256*a9fa9459Szrj 
257*a9fa9459Szrj /* Relocations for control-flow instructions.  */
258*a9fa9459Szrj 
259*a9fa9459Szrj /* TBZ/NZ: ((S+A-P) >> 2) & 0x3fff.  */
260*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TSTBR14, 279)
261*a9fa9459Szrj 
262*a9fa9459Szrj /* B.cond: ((S+A-P) >> 2) & 0x7ffff.  */
263*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_CONDBR19, 280)
264*a9fa9459Szrj 
265*a9fa9459Szrj /* 281 unused */
266*a9fa9459Szrj 
267*a9fa9459Szrj /* B:      ((S+A-P) >> 2) & 0x3ffffff.  */
268*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_JUMP26, 282)
269*a9fa9459Szrj 
270*a9fa9459Szrj /* BL:     ((S+A-P) >> 2) & 0x3ffffff.  */
271*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_CALL26, 283)
272*a9fa9459Szrj 
273*a9fa9459Szrj /* LD/ST16: (S+A) & 0xffe */
274*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_LDST16_ABS_LO12_NC, 284)
275*a9fa9459Szrj 
276*a9fa9459Szrj /* LD/ST32: (S+A) & 0xffc */
277*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_LDST32_ABS_LO12_NC, 285)
278*a9fa9459Szrj 
279*a9fa9459Szrj /* LD/ST64: (S+A) & 0xff8 */
280*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_LDST64_ABS_LO12_NC, 286)
281*a9fa9459Szrj 
282*a9fa9459Szrj /* Group relocations to create a 16, 32, 48, or 64 bit PC-relative
283*a9fa9459Szrj    offset inline.  */
284*a9fa9459Szrj 
285*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_MOVW_PREL_G0, 287)
286*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_MOVW_PREL_G0_NC, 288)
287*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_MOVW_PREL_G1, 289)
288*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_MOVW_PREL_G1_NC, 290)
289*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_MOVW_PREL_G2, 291)
290*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_MOVW_PREL_G2_NC, 292)
291*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_MOVW_PREL_G3, 293)
292*a9fa9459Szrj 
293*a9fa9459Szrj /* LD/ST128: (S+A) & 0xff0 */
294*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_LDST128_ABS_LO12_NC, 299)
295*a9fa9459Szrj 
296*a9fa9459Szrj /* Group relocations to create a 16, 32, 48, or 64 bit GOT-relative
297*a9fa9459Szrj    offset inline.  */
298*a9fa9459Szrj 
299*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G0, 300)
300*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G0_NC, 301)
301*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G1, 302)
302*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G1_NC, 303)
303*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G2, 304)
304*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G2_NC, 305)
305*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_MOVW_GOTOFF_G3, 306)
306*a9fa9459Szrj 
307*a9fa9459Szrj /* GOT-relative data relocations.  */
308*a9fa9459Szrj 
309*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_GOTREL64, 307)
310*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_GOTREL32, 308)
311*a9fa9459Szrj 
312*a9fa9459Szrj /* GOT-relative instruction relocations.  */
313*a9fa9459Szrj 
314*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_GOT_LD_PREL19, 309)
315*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_LD64_GOTOFF_LO15, 310)
316*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_ADR_GOT_PAGE, 311)
317*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_LD64_GOT_LO12_NC, 312)
318*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_LD64_GOTPAGE_LO15, 313)
319*a9fa9459Szrj 
320*a9fa9459Szrj /* General Dynamic TLS relocations.  */
321*a9fa9459Szrj 
322*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSGD_ADR_PREL21, 512)
323*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSGD_ADR_PAGE21, 513)
324*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSGD_ADD_LO12_NC, 514)
325*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSGD_MOVW_G1, 515)
326*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSGD_MOVW_G0_NC, 516)
327*a9fa9459Szrj 
328*a9fa9459Szrj /* Local Dynamic TLS relocations.  */
329*a9fa9459Szrj 
330*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLD_ADR_PREL21, 517)
331*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLD_ADR_PAGE21, 518)
332*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLD_ADD_LO12_NC, 519)
333*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_G1, 520)
334*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_G0_NC, 521)
335*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLD_LD_PREL19, 522)
336*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G2, 523)
337*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G1, 524)
338*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC, 525)
339*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G0, 526)
340*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC, 527)
341*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLD_ADD_DTPREL_HI12, 528)
342*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLD_ADD_DTPREL_LO12, 529)
343*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC, 530)
344*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLD_LDST8_DTPREL_LO12, 531)
345*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC, 532)
346*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLD_LDST16_DTPREL_LO12, 533)
347*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC, 534)
348*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLD_LDST32_DTPREL_LO12, 535)
349*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC, 536)
350*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLD_LDST64_DTPREL_LO12, 537)
351*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC, 538)
352*a9fa9459Szrj 
353*a9fa9459Szrj /* Initial Exec TLS relocations.  */
354*a9fa9459Szrj 
355*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSIE_MOVW_GOTTPREL_G1, 539)
356*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC, 540)
357*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21, 541)
358*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC, 542)
359*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSIE_LD_GOTTPREL_PREL19, 543)
360*a9fa9459Szrj 
361*a9fa9459Szrj /* Local Exec TLS relocations.  */
362*a9fa9459Szrj 
363*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G2, 544)
364*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G1, 545)
365*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G1_NC, 546)
366*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G0, 547)
367*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLE_MOVW_TPREL_G0_NC, 548)
368*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_HI12, 549)
369*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_LO12, 550)
370*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLE_ADD_TPREL_LO12_NC, 551)
371*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLE_LDST8_TPREL_LO12, 552)
372*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC, 553)
373*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLE_LDST16_TPREL_LO12, 554)
374*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC, 555)
375*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLE_LDST32_TPREL_LO12, 556)
376*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC, 557)
377*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLE_LDST64_TPREL_LO12, 558)
378*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC, 559)
379*a9fa9459Szrj 
380*a9fa9459Szrj /* TLS descriptor relocations.  */
381*a9fa9459Szrj 
382*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSDESC_LD_PREL19, 560)
383*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSDESC_ADR_PREL21, 561)
384*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSDESC_ADR_PAGE21, 562)
385*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSDESC_LD64_LO12_NC, 563)
386*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSDESC_ADD_LO12_NC, 564)
387*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSDESC_OFF_G1, 565)
388*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSDESC_OFF_G0_NC, 566)
389*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSDESC_LDR, 567)
390*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSDESC_ADD, 568)
391*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSDESC_CALL, 569)
392*a9fa9459Szrj 
393*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLE_LDST128_TPREL_LO12, 570)
394*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLE_LDST128_TPREL_LO12_NC, 571)
395*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLD_LDST128_DTPREL_LO12, 572)
396*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSLD_LDST128_DTPREL_LO12_NC, 573)
397*a9fa9459Szrj 
398*a9fa9459Szrj /* Dynamic relocations */
399*a9fa9459Szrj 
400*a9fa9459Szrj /* Copy symbol at runtime.  */
401*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_COPY, 1024)
402*a9fa9459Szrj 
403*a9fa9459Szrj /* Create GOT entry.  */
404*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_GLOB_DAT, 1025)
405*a9fa9459Szrj 
406*a9fa9459Szrj  /* Create PLT entry.  */
407*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_JUMP_SLOT, 1026)
408*a9fa9459Szrj 
409*a9fa9459Szrj /* Adjust by program base.  */
410*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_RELATIVE, 1027)
411*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLS_DTPMOD64, 1028)
412*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLS_DTPREL64, 1029)
413*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLS_TPREL64, 1030)
414*a9fa9459Szrj /* Aliasing relocs are guarded by RELOC_MACROS_GEN_FUNC
415*a9fa9459Szrj    so that readelf.c won't generate duplicated case
416*a9fa9459Szrj    statements.  */
417*a9fa9459Szrj #ifndef RELOC_MACROS_GEN_FUNC
418*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLS_DTPMOD, 1028)
419*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLS_DTPREL, 1029)
420*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLS_TPREL, 1030)
421*a9fa9459Szrj #endif
422*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_TLSDESC, 1031)
423*a9fa9459Szrj RELOC_NUMBER (R_AARCH64_IRELATIVE, 1032)
424*a9fa9459Szrj 
425*a9fa9459Szrj END_RELOC_NUMBERS (R_AARCH64_end)
426*a9fa9459Szrj 
427*a9fa9459Szrj #endif /* _ELF_AARCH64_H */
428