xref: /dflybsd-src/contrib/binutils-2.27/gas/doc/c-rx.texi (revision e656dc90e3d65d744d534af2f5ea88cf8101ebcf)
1*a9fa9459Szrj@c Copyright (C) 2008-2016 Free Software Foundation, Inc.
2*a9fa9459Szrj@c This is part of the GAS manual.
3*a9fa9459Szrj@c For copying conditions, see the file as.texinfo.
4*a9fa9459Szrj@ifset GENERIC
5*a9fa9459Szrj@page
6*a9fa9459Szrj@node RX-Dependent
7*a9fa9459Szrj@chapter RX Dependent Features
8*a9fa9459Szrj@end ifset
9*a9fa9459Szrj@ifclear GENERIC
10*a9fa9459Szrj@node Machine Dependencies
11*a9fa9459Szrj@chapter RX Dependent Features
12*a9fa9459Szrj@end ifclear
13*a9fa9459Szrj
14*a9fa9459Szrj@cindex RX support
15*a9fa9459Szrj@menu
16*a9fa9459Szrj* RX-Opts::                   RX Assembler Command Line Options
17*a9fa9459Szrj* RX-Modifiers::              Symbolic Operand Modifiers
18*a9fa9459Szrj* RX-Directives::             Assembler Directives
19*a9fa9459Szrj* RX-Float::                  Floating Point
20*a9fa9459Szrj* RX-Syntax::                 Syntax
21*a9fa9459Szrj@end menu
22*a9fa9459Szrj
23*a9fa9459Szrj@node RX-Opts
24*a9fa9459Szrj@section RX Options
25*a9fa9459Szrj@cindex options, RX
26*a9fa9459Szrj@cindex RX options
27*a9fa9459Szrj
28*a9fa9459SzrjThe Renesas RX port of @code{@value{AS}} has a few target specfic
29*a9fa9459Szrjcommand line options:
30*a9fa9459Szrj
31*a9fa9459Szrj@table @code
32*a9fa9459Szrj
33*a9fa9459Szrj@cindex @samp{-m32bit-doubles}
34*a9fa9459Szrj@item -m32bit-doubles
35*a9fa9459SzrjThis option controls the ABI and indicates to use a 32-bit float ABI.
36*a9fa9459SzrjIt has no effect on the assembled instructions, but it does influence
37*a9fa9459Szrjthe behaviour of the @samp{.double} pseudo-op.
38*a9fa9459SzrjThis is the default.
39*a9fa9459Szrj
40*a9fa9459Szrj@cindex @samp{-m64bit-doubles}
41*a9fa9459Szrj@item -m64bit-doubles
42*a9fa9459SzrjThis option controls the ABI and indicates to use a 64-bit float ABI.
43*a9fa9459SzrjIt has no effect on the assembled instructions, but it does influence
44*a9fa9459Szrjthe behaviour of the @samp{.double} pseudo-op.
45*a9fa9459Szrj
46*a9fa9459Szrj@cindex @samp{-mbig-endian}
47*a9fa9459Szrj@item -mbig-endian
48*a9fa9459SzrjThis option controls the ABI and indicates to use a big-endian data
49*a9fa9459SzrjABI.  It has no effect on the assembled instructions, but it does
50*a9fa9459Szrjinfluence the behaviour of the @samp{.short}, @samp{.hword}, @samp{.int},
51*a9fa9459Szrj@samp{.word}, @samp{.long}, @samp{.quad} and @samp{.octa} pseudo-ops.
52*a9fa9459Szrj
53*a9fa9459Szrj@cindex @samp{-mlittle-endian}
54*a9fa9459Szrj@item -mlittle-endian
55*a9fa9459SzrjThis option controls the ABI and indicates to use a little-endian data
56*a9fa9459SzrjABI.  It has no effect on the assembled instructions, but it does
57*a9fa9459Szrjinfluence the behaviour of the @samp{.short}, @samp{.hword}, @samp{.int},
58*a9fa9459Szrj@samp{.word}, @samp{.long}, @samp{.quad} and @samp{.octa} pseudo-ops.
59*a9fa9459SzrjThis is the default.
60*a9fa9459Szrj
61*a9fa9459Szrj@cindex @samp{-muse-conventional-section-names}
62*a9fa9459Szrj@item -muse-conventional-section-names
63*a9fa9459SzrjThis option controls the default names given to the code (.text),
64*a9fa9459Szrjinitialised data (.data) and uninitialised data sections (.bss).
65*a9fa9459Szrj
66*a9fa9459Szrj@cindex @samp{-muse-renesas-section-names}
67*a9fa9459Szrj@item -muse-renesas-section-names
68*a9fa9459SzrjThis option controls the default names given to the code (.P),
69*a9fa9459Szrjinitialised data (.D_1) and uninitialised data sections (.B_1).
70*a9fa9459SzrjThis is the default.
71*a9fa9459Szrj
72*a9fa9459Szrj@cindex @samp{-msmall-data-limit}
73*a9fa9459Szrj@item -msmall-data-limit
74*a9fa9459SzrjThis option tells the assembler that the small data limit feature of
75*a9fa9459Szrjthe RX port of GCC is being used.  This results in the assembler
76*a9fa9459Szrjgenerating an undefined reference to a symbol called @code{__gp} for
77*a9fa9459Szrjuse by the relocations that are needed to support the small data limit
78*a9fa9459Szrjfeature.   This option is not enabled by default as it would otherwise
79*a9fa9459Szrjpollute the symbol table.
80*a9fa9459Szrj
81*a9fa9459Szrj@cindex @samp{-mpid}
82*a9fa9459Szrj@item -mpid
83*a9fa9459SzrjThis option tells the assembler that the position independent data of the
84*a9fa9459SzrjRX port of GCC is being used.  This results in the assembler
85*a9fa9459Szrjgenerating an undefined reference to a symbol called @code{__pid_base},
86*a9fa9459Szrjand also setting the RX_PID flag bit in the e_flags field of the ELF
87*a9fa9459Szrjheader of the object file.
88*a9fa9459Szrj
89*a9fa9459Szrj@cindex @samp{-mint-register}
90*a9fa9459Szrj@item -mint-register=@var{num}
91*a9fa9459SzrjThis option tells the assembler how many registers have been reserved
92*a9fa9459Szrjfor use by interrupt handlers.  This is needed in order to compute the
93*a9fa9459Szrjcorrect values for the @code{%gpreg} and @code{%pidreg} meta registers.
94*a9fa9459Szrj
95*a9fa9459Szrj@cindex @samp{-mgcc-abi}
96*a9fa9459Szrj@item -mgcc-abi
97*a9fa9459SzrjThis option tells the assembler that the old GCC ABI is being used by
98*a9fa9459Szrjthe assembled code.  With this version of the ABI function arguments
99*a9fa9459Szrjthat are passed on the stack are aligned to a 32-bit boundary.
100*a9fa9459Szrj
101*a9fa9459Szrj@cindex @samp{-mrx-abi}
102*a9fa9459Szrj@item -mrx-abi
103*a9fa9459SzrjThis option tells the assembler that the official RX ABI is being used
104*a9fa9459Szrjby the assembled code.  With this version of the ABI function
105*a9fa9459Szrjarguments that are passed on the stack are aligned to their natural
106*a9fa9459Szrjalignments.  This option is the default.
107*a9fa9459Szrj
108*a9fa9459Szrj@cindex @samp{-mcpu=}
109*a9fa9459Szrj@item -mcpu=@var{name}
110*a9fa9459SzrjThis option tells the assembler the target CPU type.  Currently the
111*a9fa9459Szrj@code{rx100}, @code{rx200}, @code{rx600}, @code{rx610} and @code{rxv2}
112*a9fa9459Szrjare recognised as valid cpu names.  Attempting to assemble an instruction
113*a9fa9459Szrjnot supported by the indicated cpu type will result in an error message
114*a9fa9459Szrjbeing generated.
115*a9fa9459Szrj
116*a9fa9459Szrj@cindex @samp{-mno-allow-string-insns}
117*a9fa9459Szrj@item -mno-allow-string-insns
118*a9fa9459SzrjThis option tells the assembler to mark the object file that it is
119*a9fa9459Szrjbuilding as one that does not use the string instructions
120*a9fa9459Szrj@code{SMOVF}, @code{SCMPU}, @code{SMOVB}, @code{SMOVU}, @code{SUNTIL}
121*a9fa9459Szrj@code{SWHILE} or the @code{RMPA} instruction.  In addition the mark
122*a9fa9459Szrjtells the linker to complain if an attempt is made to link the binary
123*a9fa9459Szrjwith another one that does use any of these instructions.
124*a9fa9459Szrj
125*a9fa9459SzrjNote - the inverse of this option, @code{-mallow-string-insns}, is
126*a9fa9459Szrjnot needed.  The assembler automatically detects the use of the
127*a9fa9459Szrjthe instructions in the source code and labels the resulting
128*a9fa9459Szrjobject file appropriately.  If no string instructions are detected
129*a9fa9459Szrjthen the object file is labelled as being one that can be linked with
130*a9fa9459Szrjeither string-using or string-banned object files.
131*a9fa9459Szrj@end table
132*a9fa9459Szrj
133*a9fa9459Szrj@node RX-Modifiers
134*a9fa9459Szrj@section Symbolic Operand Modifiers
135*a9fa9459Szrj
136*a9fa9459Szrj@cindex RX modifiers
137*a9fa9459Szrj@cindex syntax, RX
138*a9fa9459Szrj@cindex %gp
139*a9fa9459Szrj
140*a9fa9459SzrjThe assembler supports one modifier when using symbol addresses
141*a9fa9459Szrjin RX instruction operands.  The general syntax is the following:
142*a9fa9459Szrj
143*a9fa9459Szrj@smallexample
144*a9fa9459Szrj%gp(symbol)
145*a9fa9459Szrj@end smallexample
146*a9fa9459Szrj
147*a9fa9459SzrjThe modifier returns the offset from the @var{__gp} symbol to the
148*a9fa9459Szrjspecified symbol as a 16-bit value.  The intent is that this offset
149*a9fa9459Szrjshould be used in a register+offset move instruction when generating
150*a9fa9459Szrjreferences to small data.  Ie, like this:
151*a9fa9459Szrj
152*a9fa9459Szrj@smallexample
153*a9fa9459Szrj  mov.W	 %gp(_foo)[%gpreg], r1
154*a9fa9459Szrj@end smallexample
155*a9fa9459Szrj
156*a9fa9459SzrjThe assembler also supports two meta register names which can be used
157*a9fa9459Szrjto refer to registers whose values may not be known to the
158*a9fa9459Szrjprogrammer.  These meta register names are:
159*a9fa9459Szrj
160*a9fa9459Szrj@table @code
161*a9fa9459Szrj
162*a9fa9459Szrj@cindex @samp{%gpreg}
163*a9fa9459Szrj@item %gpreg
164*a9fa9459SzrjThe small data address register.
165*a9fa9459Szrj
166*a9fa9459Szrj@cindex @samp{%pidreg}
167*a9fa9459Szrj@item %pidreg
168*a9fa9459SzrjThe PID base address register.
169*a9fa9459Szrj
170*a9fa9459Szrj@end table
171*a9fa9459Szrj
172*a9fa9459SzrjBoth registers normally have the value r13, but this can change if
173*a9fa9459Szrjsome registers have been reserved for use by interrupt handlers or if
174*a9fa9459Szrjboth the small data limit and position independent data features are
175*a9fa9459Szrjbeing used at the same time.
176*a9fa9459Szrj
177*a9fa9459Szrj@node RX-Directives
178*a9fa9459Szrj@section Assembler Directives
179*a9fa9459Szrj
180*a9fa9459Szrj@cindex assembler directives, RX
181*a9fa9459Szrj@cindex RX assembler directives
182*a9fa9459Szrj
183*a9fa9459SzrjThe RX version of @code{@value{AS}} has the following specific
184*a9fa9459Szrjassembler directives:
185*a9fa9459Szrj
186*a9fa9459Szrj@table @code
187*a9fa9459Szrj
188*a9fa9459Szrj@item .3byte
189*a9fa9459Szrj@cindex assembler directive .3byte, RX
190*a9fa9459Szrj@cindex RX assembler directive .3byte
191*a9fa9459SzrjInserts a 3-byte value into the output file at the current location.
192*a9fa9459Szrj
193*a9fa9459Szrj@item .fetchalign
194*a9fa9459Szrj@cindex assembler directive .fetchalign, RX
195*a9fa9459Szrj@cindex RX assembler directive .fetchalign
196*a9fa9459SzrjIf the next opcode following this directive spans a fetch line
197*a9fa9459Szrjboundary (8 byte boundary), the opcode is aligned to that boundary.
198*a9fa9459SzrjIf the next opcode does not span a fetch line, this directive has no
199*a9fa9459Szrjeffect.  Note that one or more labels may be between this directive
200*a9fa9459Szrjand the opcode; those labels are aligned as well.  Any inserted bytes
201*a9fa9459Szrjdue to alignment will form a NOP opcode.
202*a9fa9459Szrj
203*a9fa9459Szrj@end table
204*a9fa9459Szrj
205*a9fa9459Szrj@node RX-Float
206*a9fa9459Szrj@section Floating Point
207*a9fa9459Szrj
208*a9fa9459Szrj@cindex floating point, RX
209*a9fa9459Szrj@cindex RX floating point
210*a9fa9459Szrj
211*a9fa9459SzrjThe floating point formats generated by directives are these.
212*a9fa9459Szrj
213*a9fa9459Szrj@table @code
214*a9fa9459Szrj@cindex @code{float} directive, RX
215*a9fa9459Szrj
216*a9fa9459Szrj@item .float
217*a9fa9459Szrj@code{Single} precision (32-bit) floating point constants.
218*a9fa9459Szrj
219*a9fa9459Szrj@cindex @code{double} directive, RX
220*a9fa9459Szrj@item .double
221*a9fa9459SzrjIf the @option{-m64bit-doubles} command line option has been specified
222*a9fa9459Szrjthen then @code{double} directive generates @code{double} precision
223*a9fa9459Szrj(64-bit) floating point constants, otherwise it generates
224*a9fa9459Szrj@code{single} precision (32-bit) floating point constants.  To force
225*a9fa9459Szrjthe generation of 64-bit floating point constants used the @code{dc.d}
226*a9fa9459Szrjdirective instead.
227*a9fa9459Szrj
228*a9fa9459Szrj@end table
229*a9fa9459Szrj
230*a9fa9459Szrj@node RX-Syntax
231*a9fa9459Szrj@section Syntax for the RX
232*a9fa9459Szrj@menu
233*a9fa9459Szrj* RX-Chars::                Special Characters
234*a9fa9459Szrj@end menu
235*a9fa9459Szrj
236*a9fa9459Szrj@node RX-Chars
237*a9fa9459Szrj@subsection Special Characters
238*a9fa9459Szrj
239*a9fa9459Szrj@cindex line comment character, RX
240*a9fa9459Szrj@cindex RX line comment character
241*a9fa9459SzrjThe presence of a @samp{;} appearing anywhere on a line indicates the
242*a9fa9459Szrjstart of a comment that extends to the end of that line.
243*a9fa9459Szrj
244*a9fa9459SzrjIf a @samp{#} appears as the first character of a line then the whole
245*a9fa9459Szrjline is treated as a comment, but in this case the line can also be a
246*a9fa9459Szrjlogical line number directive (@pxref{Comments}) or a preprocessor
247*a9fa9459Szrjcontrol command (@pxref{Preprocessing}).
248*a9fa9459Szrj
249*a9fa9459Szrj@cindex line separator, RX
250*a9fa9459Szrj@cindex statement separator, RX
251*a9fa9459Szrj@cindex RX line separator
252*a9fa9459SzrjThe @samp{!} character can be used to separate statements on the same
253*a9fa9459Szrjline.
254