1*a9fa9459Szrj@c Copyright (C) 1991-2016 Free Software Foundation, Inc. 2*a9fa9459Szrj@c This is part of the GAS manual. 3*a9fa9459Szrj@c For copying conditions, see the file as.texinfo. 4*a9fa9459Szrj@ifset GENERIC 5*a9fa9459Szrj@page 6*a9fa9459Szrj@node i960-Dependent 7*a9fa9459Szrj@chapter Intel 80960 Dependent Features 8*a9fa9459Szrj@end ifset 9*a9fa9459Szrj@ifclear GENERIC 10*a9fa9459Szrj@node Machine Dependencies 11*a9fa9459Szrj@chapter Intel 80960 Dependent Features 12*a9fa9459Szrj@end ifclear 13*a9fa9459Szrj 14*a9fa9459Szrj@cindex i960 support 15*a9fa9459Szrj@menu 16*a9fa9459Szrj* Options-i960:: i960 Command-line Options 17*a9fa9459Szrj* Floating Point-i960:: Floating Point 18*a9fa9459Szrj* Directives-i960:: i960 Machine Directives 19*a9fa9459Szrj* Opcodes for i960:: i960 Opcodes 20*a9fa9459Szrj* Syntax of i960:: i960 Syntax 21*a9fa9459Szrj@end menu 22*a9fa9459Szrj 23*a9fa9459Szrj@c FIXME! Add Syntax sec with discussion of bitfields here, at least so 24*a9fa9459Szrj@c long as they're not turned on for other machines than 960. 25*a9fa9459Szrj 26*a9fa9459Szrj@node Options-i960 27*a9fa9459Szrj 28*a9fa9459Szrj@section i960 Command-line Options 29*a9fa9459Szrj 30*a9fa9459Szrj@cindex i960 options 31*a9fa9459Szrj@cindex options, i960 32*a9fa9459Szrj@table @code 33*a9fa9459Szrj 34*a9fa9459Szrj@cindex i960 architecture options 35*a9fa9459Szrj@cindex architecture options, i960 36*a9fa9459Szrj@cindex @code{-A} options, i960 37*a9fa9459Szrj@item -ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC 38*a9fa9459SzrjSelect the 80960 architecture. Instructions or features not supported 39*a9fa9459Szrjby the selected architecture cause fatal errors. 40*a9fa9459Szrj 41*a9fa9459Szrj@samp{-ACA} is equivalent to @samp{-ACA_A}; @samp{-AKC} is equivalent to 42*a9fa9459Szrj@samp{-AMC}. Synonyms are provided for compatibility with other tools. 43*a9fa9459Szrj 44*a9fa9459SzrjIf you do not specify any of these options, @code{@value{AS}} generates code 45*a9fa9459Szrjfor any instruction or feature that is supported by @emph{some} version of the 46*a9fa9459Szrj960 (even if this means mixing architectures!). In principle, 47*a9fa9459Szrj@code{@value{AS}} attempts to deduce the minimal sufficient processor type if 48*a9fa9459Szrjnone is specified; depending on the object code format, the processor type may 49*a9fa9459Szrjbe recorded in the object file. If it is critical that the @code{@value{AS}} 50*a9fa9459Szrjoutput match a specific architecture, specify that architecture explicitly. 51*a9fa9459Szrj 52*a9fa9459Szrj@cindex @code{-b} option, i960 53*a9fa9459Szrj@cindex branch recording, i960 54*a9fa9459Szrj@cindex i960 branch recording 55*a9fa9459Szrj@item -b 56*a9fa9459SzrjAdd code to collect information about conditional branches taken, for 57*a9fa9459Szrjlater optimization using branch prediction bits. (The conditional branch 58*a9fa9459Szrjinstructions have branch prediction bits in the CA, CB, and CC 59*a9fa9459Szrjarchitectures.) If @var{BR} represents a conditional branch instruction, 60*a9fa9459Szrjthe following represents the code generated by the assembler when 61*a9fa9459Szrj@samp{-b} is specified: 62*a9fa9459Szrj 63*a9fa9459Szrj@smallexample 64*a9fa9459Szrj call @var{increment routine} 65*a9fa9459Szrj .word 0 # pre-counter 66*a9fa9459SzrjLabel: @var{BR} 67*a9fa9459Szrj call @var{increment routine} 68*a9fa9459Szrj .word 0 # post-counter 69*a9fa9459Szrj@end smallexample 70*a9fa9459Szrj 71*a9fa9459SzrjThe counter following a branch records the number of times that branch 72*a9fa9459Szrjwas @emph{not} taken; the difference between the two counters is the 73*a9fa9459Szrjnumber of times the branch @emph{was} taken. 74*a9fa9459Szrj 75*a9fa9459Szrj@cindex @code{gbr960}, i960 postprocessor 76*a9fa9459Szrj@cindex branch statistics table, i960 77*a9fa9459SzrjA table of every such @code{Label} is also generated, so that the 78*a9fa9459Szrjexternal postprocessor @code{gbr960} (supplied by Intel) can locate all 79*a9fa9459Szrjthe counters. This table is always labeled @samp{__BRANCH_TABLE__}; 80*a9fa9459Szrjthis is a local symbol to permit collecting statistics for many separate 81*a9fa9459Szrjobject files. The table is word aligned, and begins with a two-word 82*a9fa9459Szrjheader. The first word, initialized to 0, is used in maintaining linked 83*a9fa9459Szrjlists of branch tables. The second word is a count of the number of 84*a9fa9459Szrjentries in the table, which follow immediately: each is a word, pointing 85*a9fa9459Szrjto one of the labels illustrated above. 86*a9fa9459Szrj 87*a9fa9459Szrj@c TEXI2ROFF-KILL 88*a9fa9459Szrj@ifinfo 89*a9fa9459Szrj@c END TEXI2ROFF-KILL 90*a9fa9459Szrj@example 91*a9fa9459Szrj +------------+------------+------------+ ... +------------+ 92*a9fa9459Szrj | | | | | | 93*a9fa9459Szrj | *NEXT | COUNT: N | *BRLAB 1 | | *BRLAB N | 94*a9fa9459Szrj | | | | | | 95*a9fa9459Szrj +------------+------------+------------+ ... +------------+ 96*a9fa9459Szrj 97*a9fa9459Szrj __BRANCH_TABLE__ layout 98*a9fa9459Szrj@end example 99*a9fa9459Szrj@c TEXI2ROFF-KILL 100*a9fa9459Szrj@end ifinfo 101*a9fa9459Szrj@need 2000 102*a9fa9459Szrj@tex 103*a9fa9459Szrj\vskip 1pc 104*a9fa9459Szrj\line{\leftskip=0pt\hskip\tableindent 105*a9fa9459Szrj\boxit{2cm}{\tt *NEXT}\boxit{2cm}{\tt COUNT: \it N}\boxit{2cm}{\tt 106*a9fa9459Szrj*BRLAB 1}\ibox{1cm}{\quad\dots}\boxit{2cm}{\tt *BRLAB \it N}\hfil} 107*a9fa9459Szrj\centerline{\it {\tt \_\_BRANCH\_TABLE\_\_} layout} 108*a9fa9459Szrj@end tex 109*a9fa9459Szrj@c END TEXI2ROFF-KILL 110*a9fa9459Szrj 111*a9fa9459SzrjThe first word of the header is used to locate multiple branch tables, 112*a9fa9459Szrjsince each object file may contain one. Normally the links are 113*a9fa9459Szrjmaintained with a call to an initialization routine, placed at the 114*a9fa9459Szrjbeginning of each function in the file. The @sc{gnu} C compiler 115*a9fa9459Szrjgenerates these calls automatically when you give it a @samp{-b} option. 116*a9fa9459SzrjFor further details, see the documentation of @samp{gbr960}. 117*a9fa9459Szrj 118*a9fa9459Szrj@cindex @code{-no-relax} option, i960 119*a9fa9459Szrj@item -no-relax 120*a9fa9459SzrjNormally, Compare-and-Branch instructions with targets that require 121*a9fa9459Szrjdisplacements greater than 13 bits (or that have external targets) are 122*a9fa9459Szrjreplaced with the corresponding compare (or @samp{chkbit}) and branch 123*a9fa9459Szrjinstructions. You can use the @samp{-no-relax} option to specify that 124*a9fa9459Szrj@code{@value{AS}} should generate errors instead, if the target displacement 125*a9fa9459Szrjis larger than 13 bits. 126*a9fa9459Szrj 127*a9fa9459SzrjThis option does not affect the Compare-and-Jump instructions; the code 128*a9fa9459Szrjemitted for them is @emph{always} adjusted when necessary (depending on 129*a9fa9459Szrjdisplacement size), regardless of whether you use @samp{-no-relax}. 130*a9fa9459Szrj@end table 131*a9fa9459Szrj 132*a9fa9459Szrj@node Floating Point-i960 133*a9fa9459Szrj@section Floating Point 134*a9fa9459Szrj 135*a9fa9459Szrj@cindex floating point, i960 (@sc{ieee}) 136*a9fa9459Szrj@cindex i960 floating point (@sc{ieee}) 137*a9fa9459Szrj@code{@value{AS}} generates @sc{ieee} floating-point numbers for the directives 138*a9fa9459Szrj@samp{.float}, @samp{.double}, @samp{.extended}, and @samp{.single}. 139*a9fa9459Szrj 140*a9fa9459Szrj@node Directives-i960 141*a9fa9459Szrj@section i960 Machine Directives 142*a9fa9459Szrj 143*a9fa9459Szrj@cindex machine directives, i960 144*a9fa9459Szrj@cindex i960 machine directives 145*a9fa9459Szrj 146*a9fa9459Szrj@table @code 147*a9fa9459Szrj@cindex @code{bss} directive, i960 148*a9fa9459Szrj@item .bss @var{symbol}, @var{length}, @var{align} 149*a9fa9459SzrjReserve @var{length} bytes in the bss section for a local @var{symbol}, 150*a9fa9459Szrjaligned to the power of two specified by @var{align}. @var{length} and 151*a9fa9459Szrj@var{align} must be positive absolute expressions. This directive 152*a9fa9459Szrjdiffers from @samp{.lcomm} only in that it permits you to specify 153*a9fa9459Szrjan alignment. @xref{Lcomm,,@code{.lcomm}}. 154*a9fa9459Szrj@end table 155*a9fa9459Szrj 156*a9fa9459Szrj@table @code 157*a9fa9459Szrj@cindex @code{extended} directive, i960 158*a9fa9459Szrj@item .extended @var{flonums} 159*a9fa9459Szrj@code{.extended} expects zero or more flonums, separated by commas; for 160*a9fa9459Szrjeach flonum, @samp{.extended} emits an @sc{ieee} extended-format (80-bit) 161*a9fa9459Szrjfloating-point number. 162*a9fa9459Szrj 163*a9fa9459Szrj@cindex @code{leafproc} directive, i960 164*a9fa9459Szrj@item .leafproc @var{call-lab}, @var{bal-lab} 165*a9fa9459SzrjYou can use the @samp{.leafproc} directive in conjunction with the 166*a9fa9459Szrjoptimized @code{callj} instruction to enable faster calls of leaf 167*a9fa9459Szrjprocedures. If a procedure is known to call no other procedures, you 168*a9fa9459Szrjmay define an entry point that skips procedure prolog code (and that does 169*a9fa9459Szrjnot depend on system-supplied saved context), and declare it as the 170*a9fa9459Szrj@var{bal-lab} using @samp{.leafproc}. If the procedure also has an 171*a9fa9459Szrjentry point that goes through the normal prolog, you can specify that 172*a9fa9459Szrjentry point as @var{call-lab}. 173*a9fa9459Szrj 174*a9fa9459SzrjA @samp{.leafproc} declaration is meant for use in conjunction with the 175*a9fa9459Szrjoptimized call instruction @samp{callj}; the directive records the data 176*a9fa9459Szrjneeded later to choose between converting the @samp{callj} into a 177*a9fa9459Szrj@code{bal} or a @code{call}. 178*a9fa9459Szrj 179*a9fa9459Szrj@var{call-lab} is optional; if only one argument is present, or if the 180*a9fa9459Szrjtwo arguments are identical, the single argument is assumed to be the 181*a9fa9459Szrj@code{bal} entry point. 182*a9fa9459Szrj 183*a9fa9459Szrj@cindex @code{sysproc} directive, i960 184*a9fa9459Szrj@item .sysproc @var{name}, @var{index} 185*a9fa9459SzrjThe @samp{.sysproc} directive defines a name for a system procedure. 186*a9fa9459SzrjAfter you define it using @samp{.sysproc}, you can use @var{name} to 187*a9fa9459Szrjrefer to the system procedure identified by @var{index} when calling 188*a9fa9459Szrjprocedures with the optimized call instruction @samp{callj}. 189*a9fa9459Szrj 190*a9fa9459SzrjBoth arguments are required; @var{index} must be between 0 and 31 191*a9fa9459Szrj(inclusive). 192*a9fa9459Szrj@end table 193*a9fa9459Szrj 194*a9fa9459Szrj@node Opcodes for i960 195*a9fa9459Szrj@section i960 Opcodes 196*a9fa9459Szrj 197*a9fa9459Szrj@cindex opcodes, i960 198*a9fa9459Szrj@cindex i960 opcodes 199*a9fa9459SzrjAll Intel 960 machine instructions are supported; 200*a9fa9459Szrj@pxref{Options-i960,,i960 Command-line Options} for a discussion of 201*a9fa9459Szrjselecting the instruction subset for a particular 960 202*a9fa9459Szrjarchitecture.@refill 203*a9fa9459Szrj 204*a9fa9459SzrjSome opcodes are processed beyond simply emitting a single corresponding 205*a9fa9459Szrjinstruction: @samp{callj}, and Compare-and-Branch or Compare-and-Jump 206*a9fa9459Szrjinstructions with target displacements larger than 13 bits. 207*a9fa9459Szrj 208*a9fa9459Szrj@menu 209*a9fa9459Szrj* callj-i960:: @code{callj} 210*a9fa9459Szrj* Compare-and-branch-i960:: Compare-and-Branch 211*a9fa9459Szrj@end menu 212*a9fa9459Szrj 213*a9fa9459Szrj@node callj-i960 214*a9fa9459Szrj@subsection @code{callj} 215*a9fa9459Szrj 216*a9fa9459Szrj@cindex @code{callj}, i960 pseudo-opcode 217*a9fa9459Szrj@cindex i960 @code{callj} pseudo-opcode 218*a9fa9459SzrjYou can write @code{callj} to have the assembler or the linker determine 219*a9fa9459Szrjthe most appropriate form of subroutine call: @samp{call}, 220*a9fa9459Szrj@samp{bal}, or @samp{calls}. If the assembly source contains 221*a9fa9459Szrjenough information---a @samp{.leafproc} or @samp{.sysproc} directive 222*a9fa9459Szrjdefining the operand---then @code{@value{AS}} translates the 223*a9fa9459Szrj@code{callj}; if not, it simply emits the @code{callj}, leaving it 224*a9fa9459Szrjfor the linker to resolve. 225*a9fa9459Szrj 226*a9fa9459Szrj@node Compare-and-branch-i960 227*a9fa9459Szrj@subsection Compare-and-Branch 228*a9fa9459Szrj 229*a9fa9459Szrj@cindex i960 compare/branch instructions 230*a9fa9459Szrj@cindex compare/branch instructions, i960 231*a9fa9459SzrjThe 960 architectures provide combined Compare-and-Branch instructions 232*a9fa9459Szrjthat permit you to store the branch target in the lower 13 bits of the 233*a9fa9459Szrjinstruction word itself. However, if you specify a branch target far 234*a9fa9459Szrjenough away that its address won't fit in 13 bits, the assembler can 235*a9fa9459Szrjeither issue an error, or convert your Compare-and-Branch instruction 236*a9fa9459Szrjinto separate instructions to do the compare and the branch. 237*a9fa9459Szrj 238*a9fa9459Szrj@cindex compare and jump expansions, i960 239*a9fa9459Szrj@cindex i960 compare and jump expansions 240*a9fa9459SzrjWhether @code{@value{AS}} gives an error or expands the instruction depends 241*a9fa9459Szrjon two choices you can make: whether you use the @samp{-no-relax} option, 242*a9fa9459Szrjand whether you use a ``Compare and Branch'' instruction or a ``Compare 243*a9fa9459Szrjand Jump'' instruction. The ``Jump'' instructions are @emph{always} 244*a9fa9459Szrjexpanded if necessary; the ``Branch'' instructions are expanded when 245*a9fa9459Szrjnecessary @emph{unless} you specify @code{-no-relax}---in which case 246*a9fa9459Szrj@code{@value{AS}} gives an error instead. 247*a9fa9459Szrj 248*a9fa9459SzrjThese are the Compare-and-Branch instructions, their ``Jump'' variants, 249*a9fa9459Szrjand the instruction pairs they may expand into: 250*a9fa9459Szrj 251*a9fa9459Szrj@c TEXI2ROFF-KILL 252*a9fa9459Szrj@ifinfo 253*a9fa9459Szrj@c END TEXI2ROFF-KILL 254*a9fa9459Szrj@example 255*a9fa9459Szrj Compare and 256*a9fa9459Szrj Branch Jump Expanded to 257*a9fa9459Szrj ------ ------ ------------ 258*a9fa9459Szrj bbc chkbit; bno 259*a9fa9459Szrj bbs chkbit; bo 260*a9fa9459Szrj cmpibe cmpije cmpi; be 261*a9fa9459Szrj cmpibg cmpijg cmpi; bg 262*a9fa9459Szrj cmpibge cmpijge cmpi; bge 263*a9fa9459Szrj cmpibl cmpijl cmpi; bl 264*a9fa9459Szrj cmpible cmpijle cmpi; ble 265*a9fa9459Szrj cmpibno cmpijno cmpi; bno 266*a9fa9459Szrj cmpibne cmpijne cmpi; bne 267*a9fa9459Szrj cmpibo cmpijo cmpi; bo 268*a9fa9459Szrj cmpobe cmpoje cmpo; be 269*a9fa9459Szrj cmpobg cmpojg cmpo; bg 270*a9fa9459Szrj cmpobge cmpojge cmpo; bge 271*a9fa9459Szrj cmpobl cmpojl cmpo; bl 272*a9fa9459Szrj cmpoble cmpojle cmpo; ble 273*a9fa9459Szrj cmpobne cmpojne cmpo; bne 274*a9fa9459Szrj@end example 275*a9fa9459Szrj@c TEXI2ROFF-KILL 276*a9fa9459Szrj@end ifinfo 277*a9fa9459Szrj@tex 278*a9fa9459Szrj\hskip\tableindent 279*a9fa9459Szrj\halign{\hfil {\tt #}\quad&\hfil {\tt #}\qquad&{\tt #}\hfil\cr 280*a9fa9459Szrj\omit{\hfil\it Compare and\hfil}\span\omit&\cr 281*a9fa9459Szrj{\it Branch}&{\it Jump}&{\it Expanded to}\cr 282*a9fa9459Szrj bbc& & chkbit; bno\cr 283*a9fa9459Szrj bbs& & chkbit; bo\cr 284*a9fa9459Szrj cmpibe& cmpije& cmpi; be\cr 285*a9fa9459Szrj cmpibg& cmpijg& cmpi; bg\cr 286*a9fa9459Szrj cmpibge& cmpijge& cmpi; bge\cr 287*a9fa9459Szrj cmpibl& cmpijl& cmpi; bl\cr 288*a9fa9459Szrj cmpible& cmpijle& cmpi; ble\cr 289*a9fa9459Szrj cmpibno& cmpijno& cmpi; bno\cr 290*a9fa9459Szrj cmpibne& cmpijne& cmpi; bne\cr 291*a9fa9459Szrj cmpibo& cmpijo& cmpi; bo\cr 292*a9fa9459Szrj cmpobe& cmpoje& cmpo; be\cr 293*a9fa9459Szrj cmpobg& cmpojg& cmpo; bg\cr 294*a9fa9459Szrj cmpobge& cmpojge& cmpo; bge\cr 295*a9fa9459Szrj cmpobl& cmpojl& cmpo; bl\cr 296*a9fa9459Szrj cmpoble& cmpojle& cmpo; ble\cr 297*a9fa9459Szrj cmpobne& cmpojne& cmpo; bne\cr} 298*a9fa9459Szrj@end tex 299*a9fa9459Szrj@c END TEXI2ROFF-KILL 300*a9fa9459Szrj 301*a9fa9459Szrj@node Syntax of i960 302*a9fa9459Szrj@section Syntax for the i960 303*a9fa9459Szrj@menu 304*a9fa9459Szrj* i960-Chars:: Special Characters 305*a9fa9459Szrj@end menu 306*a9fa9459Szrj 307*a9fa9459Szrj@node i960-Chars 308*a9fa9459Szrj@subsection Special Characters 309*a9fa9459Szrj 310*a9fa9459Szrj@cindex line comment character, i960 311*a9fa9459Szrj@cindex i960 line comment character 312*a9fa9459SzrjThe presence of a @samp{#} on a line indicates the start of a comment 313*a9fa9459Szrjthat extends to the end of the current line. 314*a9fa9459Szrj 315*a9fa9459SzrjIf a @samp{#} appears as the first character of a line, the whole line 316*a9fa9459Szrjis treated as a comment, but in this case the line can also be a 317*a9fa9459Szrjlogical line number directive (@pxref{Comments}) or a 318*a9fa9459Szrjpreprocessor control command (@pxref{Preprocessing}). 319*a9fa9459Szrj 320*a9fa9459Szrj@cindex line separator, i960 321*a9fa9459Szrj@cindex statement separator, i960 322*a9fa9459Szrj@cindex i960 line separator 323*a9fa9459SzrjThe @samp{;} character can be used to separate statements on the same 324*a9fa9459Szrjline. 325