xref: /dflybsd-src/contrib/binutils-2.27/gas/doc/c-h8300.texi (revision e656dc90e3d65d744d534af2f5ea88cf8101ebcf)
1*a9fa9459Szrj@c Copyright (C) 1991-2016 Free Software Foundation, Inc.
2*a9fa9459Szrj@c This is part of the GAS manual.
3*a9fa9459Szrj@c For copying conditions, see the file as.texinfo.
4*a9fa9459Szrj@ifset GENERIC
5*a9fa9459Szrj@page
6*a9fa9459Szrj@end ifset
7*a9fa9459Szrj@node H8/300-Dependent
8*a9fa9459Szrj@chapter H8/300 Dependent Features
9*a9fa9459Szrj
10*a9fa9459Szrj@cindex H8/300 support
11*a9fa9459Szrj@menu
12*a9fa9459Szrj* H8/300 Options::              Options
13*a9fa9459Szrj* H8/300 Syntax::               Syntax
14*a9fa9459Szrj* H8/300 Floating Point::       Floating Point
15*a9fa9459Szrj* H8/300 Directives::           H8/300 Machine Directives
16*a9fa9459Szrj* H8/300 Opcodes::              Opcodes
17*a9fa9459Szrj@end menu
18*a9fa9459Szrj
19*a9fa9459Szrj@node H8/300 Options
20*a9fa9459Szrj@section Options
21*a9fa9459Szrj
22*a9fa9459Szrj@cindex H8/300 options
23*a9fa9459Szrj@cindex options, H8/300
24*a9fa9459SzrjThe Renesas H8/300 version of @code{@value{AS}} has one
25*a9fa9459Szrjmachine-dependent option:
26*a9fa9459Szrj
27*a9fa9459Szrj@c man begin OPTIONS
28*a9fa9459Szrj@table @gcctabopt
29*a9fa9459Szrj@item -h-tick-hex
30*a9fa9459SzrjSupport H'00 style hex constants in addition to 0x00 style.
31*a9fa9459Szrj
32*a9fa9459Szrj@item -mach=@var{name}
33*a9fa9459SzrjSets the H8300 machine variant.  The following machine names
34*a9fa9459Szrjare recognised:
35*a9fa9459Szrj@code{h8300h},
36*a9fa9459Szrj@code{h8300hn},
37*a9fa9459Szrj@code{h8300s},
38*a9fa9459Szrj@code{h8300sn},
39*a9fa9459Szrj@code{h8300sx} and
40*a9fa9459Szrj@code{h8300sxn}.
41*a9fa9459Szrj
42*a9fa9459Szrj@end table
43*a9fa9459Szrj@c man end
44*a9fa9459Szrj
45*a9fa9459Szrj@node H8/300 Syntax
46*a9fa9459Szrj@section Syntax
47*a9fa9459Szrj@menu
48*a9fa9459Szrj* H8/300-Chars::                Special Characters
49*a9fa9459Szrj* H8/300-Regs::                 Register Names
50*a9fa9459Szrj* H8/300-Addressing::           Addressing Modes
51*a9fa9459Szrj@end menu
52*a9fa9459Szrj
53*a9fa9459Szrj@node H8/300-Chars
54*a9fa9459Szrj@subsection Special Characters
55*a9fa9459Szrj
56*a9fa9459Szrj@cindex line comment character, H8/300
57*a9fa9459Szrj@cindex H8/300 line comment character
58*a9fa9459Szrj@samp{;} is the line comment character.
59*a9fa9459Szrj
60*a9fa9459Szrj@cindex line separator, H8/300
61*a9fa9459Szrj@cindex statement separator, H8/300
62*a9fa9459Szrj@cindex H8/300 line separator
63*a9fa9459Szrj@samp{$} can be used instead of a newline to separate statements.
64*a9fa9459SzrjTherefore @emph{you may not use @samp{$} in symbol names} on the H8/300.
65*a9fa9459Szrj
66*a9fa9459Szrj@node H8/300-Regs
67*a9fa9459Szrj@subsection Register Names
68*a9fa9459Szrj
69*a9fa9459Szrj@cindex H8/300 registers
70*a9fa9459Szrj@cindex register names, H8/300
71*a9fa9459SzrjYou can use predefined symbols of the form @samp{r@var{n}h} and
72*a9fa9459Szrj@samp{r@var{n}l} to refer to the H8/300 registers as sixteen 8-bit
73*a9fa9459Szrjgeneral-purpose registers.  @var{n} is a digit from @samp{0} to
74*a9fa9459Szrj@samp{7}); for instance, both @samp{r0h} and @samp{r7l} are valid
75*a9fa9459Szrjregister names.
76*a9fa9459Szrj
77*a9fa9459SzrjYou can also use the eight predefined symbols @samp{r@var{n}} to refer
78*a9fa9459Szrjto the H8/300 registers as 16-bit registers (you must use this form for
79*a9fa9459Szrjaddressing).
80*a9fa9459Szrj
81*a9fa9459SzrjOn the H8/300H, you can also use the eight predefined symbols
82*a9fa9459Szrj@samp{er@var{n}} (@samp{er0} @dots{} @samp{er7}) to refer to the 32-bit
83*a9fa9459Szrjgeneral purpose registers.
84*a9fa9459Szrj
85*a9fa9459SzrjThe two control registers are called @code{pc} (program counter; a
86*a9fa9459Szrj16-bit register, except on the H8/300H where it is 24 bits) and
87*a9fa9459Szrj@code{ccr} (condition code register; an 8-bit register).  @code{r7} is
88*a9fa9459Szrjused as the stack pointer, and can also be called @code{sp}.
89*a9fa9459Szrj
90*a9fa9459Szrj@node H8/300-Addressing
91*a9fa9459Szrj@subsection Addressing Modes
92*a9fa9459Szrj
93*a9fa9459Szrj@cindex addressing modes, H8/300
94*a9fa9459Szrj@cindex H8/300 addressing modes
95*a9fa9459Szrj@value{AS} understands the following addressing modes for the H8/300:
96*a9fa9459Szrj@table @code
97*a9fa9459Szrj@item r@var{n}
98*a9fa9459SzrjRegister direct
99*a9fa9459Szrj
100*a9fa9459Szrj@item @@r@var{n}
101*a9fa9459SzrjRegister indirect
102*a9fa9459Szrj
103*a9fa9459Szrj@need 1200
104*a9fa9459Szrj@item @@(@var{d}, r@var{n})
105*a9fa9459Szrj@itemx @@(@var{d}:16, r@var{n})
106*a9fa9459Szrj@itemx @@(@var{d}:24, r@var{n})
107*a9fa9459SzrjRegister indirect: 16-bit or 24-bit displacement @var{d} from register
108*a9fa9459Szrj@var{n}.  (24-bit displacements are only meaningful on the H8/300H.)
109*a9fa9459Szrj
110*a9fa9459Szrj@item @@r@var{n}+
111*a9fa9459SzrjRegister indirect with post-increment
112*a9fa9459Szrj
113*a9fa9459Szrj@item @@-r@var{n}
114*a9fa9459SzrjRegister indirect with pre-decrement
115*a9fa9459Szrj
116*a9fa9459Szrj@item @code{@@}@var{aa}
117*a9fa9459Szrj@itemx @code{@@}@var{aa}:8
118*a9fa9459Szrj@itemx @code{@@}@var{aa}:16
119*a9fa9459Szrj@itemx @code{@@}@var{aa}:24
120*a9fa9459SzrjAbsolute address @code{aa}.  (The address size @samp{:24} only makes
121*a9fa9459Szrjsense on the H8/300H.)
122*a9fa9459Szrj
123*a9fa9459Szrj@item #@var{xx}
124*a9fa9459Szrj@itemx #@var{xx}:8
125*a9fa9459Szrj@itemx #@var{xx}:16
126*a9fa9459Szrj@itemx #@var{xx}:32
127*a9fa9459SzrjImmediate data @var{xx}.  You may specify the @samp{:8}, @samp{:16}, or
128*a9fa9459Szrj@samp{:32} for clarity, if you wish; but @code{@value{AS}} neither
129*a9fa9459Szrjrequires this nor uses it---the data size required is taken from
130*a9fa9459Szrjcontext.
131*a9fa9459Szrj
132*a9fa9459Szrj@item @code{@@}@code{@@}@var{aa}
133*a9fa9459Szrj@itemx @code{@@}@code{@@}@var{aa}:8
134*a9fa9459SzrjMemory indirect.  You may specify the @samp{:8} for clarity, if you
135*a9fa9459Szrjwish; but @code{@value{AS}} neither requires this nor uses it.
136*a9fa9459Szrj@end table
137*a9fa9459Szrj
138*a9fa9459Szrj@node H8/300 Floating Point
139*a9fa9459Szrj@section Floating Point
140*a9fa9459Szrj
141*a9fa9459Szrj@cindex floating point, H8/300 (@sc{ieee})
142*a9fa9459Szrj@cindex H8/300 floating point (@sc{ieee})
143*a9fa9459SzrjThe H8/300 family has no hardware floating point, but the @code{.float}
144*a9fa9459Szrjdirective generates @sc{ieee} floating-point numbers for compatibility
145*a9fa9459Szrjwith other development tools.
146*a9fa9459Szrj
147*a9fa9459Szrj@page
148*a9fa9459Szrj@node H8/300 Directives
149*a9fa9459Szrj@section H8/300 Machine Directives
150*a9fa9459Szrj
151*a9fa9459Szrj@cindex H8/300 machine directives (none)
152*a9fa9459Szrj@cindex machine directives, H8/300 (none)
153*a9fa9459Szrj@cindex @code{word} directive, H8/300
154*a9fa9459Szrj@cindex @code{int} directive, H8/300
155*a9fa9459Szrj@code{@value{AS}} has the following machine-dependent directives for
156*a9fa9459Szrjthe H8/300:
157*a9fa9459Szrj
158*a9fa9459Szrj@table @code
159*a9fa9459Szrj@cindex H8/300H, assembling for
160*a9fa9459Szrj@item .h8300h
161*a9fa9459SzrjRecognize and emit additional instructions for the H8/300H variant, and
162*a9fa9459Szrjalso make @code{.int} emit 32-bit numbers rather than the usual (16-bit)
163*a9fa9459Szrjfor the H8/300 family.
164*a9fa9459Szrj
165*a9fa9459Szrj@item .h8300s
166*a9fa9459SzrjRecognize and emit additional instructions for the H8S variant, and
167*a9fa9459Szrjalso make @code{.int} emit 32-bit numbers rather than the usual (16-bit)
168*a9fa9459Szrjfor the H8/300 family.
169*a9fa9459Szrj
170*a9fa9459Szrj@item .h8300hn
171*a9fa9459SzrjRecognize and emit additional instructions for the H8/300H variant in
172*a9fa9459Szrjnormal mode, and also make @code{.int} emit 32-bit numbers rather than
173*a9fa9459Szrjthe usual (16-bit) for the H8/300 family.
174*a9fa9459Szrj
175*a9fa9459Szrj@item .h8300sn
176*a9fa9459SzrjRecognize and emit additional instructions for the H8S variant in
177*a9fa9459Szrjnormal mode, and also make @code{.int} emit 32-bit numbers rather than
178*a9fa9459Szrjthe usual (16-bit) for the H8/300 family.
179*a9fa9459Szrj@end table
180*a9fa9459Szrj
181*a9fa9459SzrjOn the H8/300 family (including the H8/300H) @samp{.word} directives
182*a9fa9459Szrjgenerate 16-bit numbers.
183*a9fa9459Szrj
184*a9fa9459Szrj@node H8/300 Opcodes
185*a9fa9459Szrj@section Opcodes
186*a9fa9459Szrj
187*a9fa9459Szrj@cindex H8/300 opcode summary
188*a9fa9459Szrj@cindex opcode summary, H8/300
189*a9fa9459Szrj@cindex mnemonics, H8/300
190*a9fa9459Szrj@cindex instruction summary, H8/300
191*a9fa9459SzrjFor detailed information on the H8/300 machine instruction set, see
192*a9fa9459Szrj@cite{H8/300 Series Programming Manual}.  For information specific to
193*a9fa9459Szrjthe H8/300H, see @cite{H8/300H Series Programming Manual} (Renesas).
194*a9fa9459Szrj
195*a9fa9459Szrj@code{@value{AS}} implements all the standard H8/300 opcodes.  No additional
196*a9fa9459Szrjpseudo-instructions are needed on this family.
197*a9fa9459Szrj
198*a9fa9459Szrj@ifset SMALL
199*a9fa9459Szrj@c this table, due to the multi-col faking and hardcoded order, looks silly
200*a9fa9459Szrj@c except in smallbook.  See comments below "@set SMALL" near top of this file.
201*a9fa9459Szrj
202*a9fa9459SzrjThe following table summarizes the H8/300 opcodes, and their arguments.
203*a9fa9459SzrjEntries marked @samp{*} are opcodes used only on the H8/300H.
204*a9fa9459Szrj
205*a9fa9459Szrj@smallexample
206*a9fa9459Szrj@c Using @group seems to use the normal baselineskip, not the smallexample
207*a9fa9459Szrj@c baselineskip; looks approx doublespaced.
208*a9fa9459Szrj         @i{Legend:}
209*a9fa9459Szrj            Rs   @r{source register}
210*a9fa9459Szrj            Rd   @r{destination register}
211*a9fa9459Szrj            abs  @r{absolute address}
212*a9fa9459Szrj            imm  @r{immediate data}
213*a9fa9459Szrj         disp:N  @r{N-bit displacement from a register}
214*a9fa9459Szrj        pcrel:N  @r{N-bit displacement relative to program counter}
215*a9fa9459Szrj
216*a9fa9459Szrj   add.b #imm,rd              *  andc #imm,ccr
217*a9fa9459Szrj   add.b rs,rd                   band #imm,rd
218*a9fa9459Szrj   add.w rs,rd                   band #imm,@@rd
219*a9fa9459Szrj*  add.w #imm,rd                 band #imm,@@abs:8
220*a9fa9459Szrj*  add.l rs,rd                   bra  pcrel:8
221*a9fa9459Szrj*  add.l #imm,rd              *  bra  pcrel:16
222*a9fa9459Szrj   adds #imm,rd                  bt   pcrel:8
223*a9fa9459Szrj   addx #imm,rd               *  bt   pcrel:16
224*a9fa9459Szrj   addx rs,rd                    brn  pcrel:8
225*a9fa9459Szrj   and.b #imm,rd              *  brn  pcrel:16
226*a9fa9459Szrj   and.b rs,rd                   bf   pcrel:8
227*a9fa9459Szrj*  and.w rs,rd                *  bf   pcrel:16
228*a9fa9459Szrj*  and.w #imm,rd                 bhi  pcrel:8
229*a9fa9459Szrj*  and.l #imm,rd              *  bhi  pcrel:16
230*a9fa9459Szrj*  and.l rs,rd                   bls  pcrel:8
231*a9fa9459Szrj@page
232*a9fa9459Szrj*  bls  pcrel:16                 bld  #imm,rd
233*a9fa9459Szrj   bcc  pcrel:8                  bld  #imm,@@rd
234*a9fa9459Szrj*  bcc  pcrel:16                 bld  #imm,@@abs:8
235*a9fa9459Szrj   bhs  pcrel:8                  bnot #imm,rd
236*a9fa9459Szrj*  bhs  pcrel:16                 bnot #imm,@@rd
237*a9fa9459Szrj   bcs  pcrel:8                  bnot #imm,@@abs:8
238*a9fa9459Szrj*  bcs  pcrel:16                 bnot rs,rd
239*a9fa9459Szrj   blo  pcrel:8                  bnot rs,@@rd
240*a9fa9459Szrj*  blo  pcrel:16                 bnot rs,@@abs:8
241*a9fa9459Szrj   bne  pcrel:8                  bor  #imm,rd
242*a9fa9459Szrj*  bne  pcrel:16                 bor  #imm,@@rd
243*a9fa9459Szrj   beq  pcrel:8                  bor  #imm,@@abs:8
244*a9fa9459Szrj*  beq  pcrel:16                 bset #imm,rd
245*a9fa9459Szrj   bvc  pcrel:8                  bset #imm,@@rd
246*a9fa9459Szrj*  bvc  pcrel:16                 bset #imm,@@abs:8
247*a9fa9459Szrj   bvs  pcrel:8                  bset rs,rd
248*a9fa9459Szrj*  bvs  pcrel:16                 bset rs,@@rd
249*a9fa9459Szrj   bpl  pcrel:8                  bset rs,@@abs:8
250*a9fa9459Szrj*  bpl  pcrel:16                 bsr  pcrel:8
251*a9fa9459Szrj   bmi  pcrel:8                  bsr  pcrel:16
252*a9fa9459Szrj*  bmi  pcrel:16                 bst  #imm,rd
253*a9fa9459Szrj   bge  pcrel:8                  bst  #imm,@@rd
254*a9fa9459Szrj*  bge  pcrel:16                 bst  #imm,@@abs:8
255*a9fa9459Szrj   blt  pcrel:8                  btst #imm,rd
256*a9fa9459Szrj*  blt  pcrel:16                 btst #imm,@@rd
257*a9fa9459Szrj   bgt  pcrel:8                  btst #imm,@@abs:8
258*a9fa9459Szrj*  bgt  pcrel:16                 btst rs,rd
259*a9fa9459Szrj   ble  pcrel:8                  btst rs,@@rd
260*a9fa9459Szrj*  ble  pcrel:16                 btst rs,@@abs:8
261*a9fa9459Szrj   bclr #imm,rd                  bxor #imm,rd
262*a9fa9459Szrj   bclr #imm,@@rd                 bxor #imm,@@rd
263*a9fa9459Szrj   bclr #imm,@@abs:8              bxor #imm,@@abs:8
264*a9fa9459Szrj   bclr rs,rd                    cmp.b #imm,rd
265*a9fa9459Szrj   bclr rs,@@rd                   cmp.b rs,rd
266*a9fa9459Szrj   bclr rs,@@abs:8                cmp.w rs,rd
267*a9fa9459Szrj   biand #imm,rd                 cmp.w rs,rd
268*a9fa9459Szrj   biand #imm,@@rd             *  cmp.w #imm,rd
269*a9fa9459Szrj   biand #imm,@@abs:8          *  cmp.l #imm,rd
270*a9fa9459Szrj   bild #imm,rd               *  cmp.l rs,rd
271*a9fa9459Szrj   bild #imm,@@rd                 daa  rs
272*a9fa9459Szrj   bild #imm,@@abs:8              das  rs
273*a9fa9459Szrj   bior #imm,rd                  dec.b rs
274*a9fa9459Szrj   bior #imm,@@rd              *  dec.w #imm,rd
275*a9fa9459Szrj   bior #imm,@@abs:8           *  dec.l #imm,rd
276*a9fa9459Szrj   bist #imm,rd                  divxu.b rs,rd
277*a9fa9459Szrj   bist #imm,@@rd              *  divxu.w rs,rd
278*a9fa9459Szrj   bist #imm,@@abs:8           *  divxs.b rs,rd
279*a9fa9459Szrj   bixor #imm,rd              *  divxs.w rs,rd
280*a9fa9459Szrj   bixor #imm,@@rd                eepmov
281*a9fa9459Szrj   bixor #imm,@@abs:8          *  eepmovw
282*a9fa9459Szrj@page
283*a9fa9459Szrj*  exts.w rd                     mov.w rs,@@abs:16
284*a9fa9459Szrj*  exts.l rd                  *  mov.l #imm,rd
285*a9fa9459Szrj*  extu.w rd                  *  mov.l rs,rd
286*a9fa9459Szrj*  extu.l rd                  *  mov.l @@rs,rd
287*a9fa9459Szrj   inc  rs                    *  mov.l @@(disp:16,rs),rd
288*a9fa9459Szrj*  inc.w #imm,rd              *  mov.l @@(disp:24,rs),rd
289*a9fa9459Szrj*  inc.l #imm,rd              *  mov.l @@rs+,rd
290*a9fa9459Szrj   jmp  @@rs                   *  mov.l @@abs:16,rd
291*a9fa9459Szrj   jmp  abs                   *  mov.l @@abs:24,rd
292*a9fa9459Szrj   jmp  @@@@abs:8               *  mov.l rs,@@rd
293*a9fa9459Szrj   jsr  @@rs                   *  mov.l rs,@@(disp:16,rd)
294*a9fa9459Szrj   jsr  abs                   *  mov.l rs,@@(disp:24,rd)
295*a9fa9459Szrj   jsr  @@@@abs:8               *  mov.l rs,@@-rd
296*a9fa9459Szrj   ldc  #imm,ccr              *  mov.l rs,@@abs:16
297*a9fa9459Szrj   ldc  rs,ccr                *  mov.l rs,@@abs:24
298*a9fa9459Szrj*  ldc  @@abs:16,ccr              movfpe @@abs:16,rd
299*a9fa9459Szrj*  ldc  @@abs:24,ccr              movtpe rs,@@abs:16
300*a9fa9459Szrj*  ldc  @@(disp:16,rs),ccr        mulxu.b rs,rd
301*a9fa9459Szrj*  ldc  @@(disp:24,rs),ccr     *  mulxu.w rs,rd
302*a9fa9459Szrj*  ldc  @@rs+,ccr              *  mulxs.b rs,rd
303*a9fa9459Szrj*  ldc  @@rs,ccr               *  mulxs.w rs,rd
304*a9fa9459Szrj*  mov.b @@(disp:24,rs),rd        neg.b rs
305*a9fa9459Szrj*  mov.b rs,@@(disp:24,rd)     *  neg.w rs
306*a9fa9459Szrj   mov.b @@abs:16,rd           *  neg.l rs
307*a9fa9459Szrj   mov.b rs,rd                   nop
308*a9fa9459Szrj   mov.b @@abs:8,rd               not.b rs
309*a9fa9459Szrj   mov.b rs,@@abs:8            *  not.w rs
310*a9fa9459Szrj   mov.b rs,rd                *  not.l rs
311*a9fa9459Szrj   mov.b #imm,rd                 or.b #imm,rd
312*a9fa9459Szrj   mov.b @@rs,rd                  or.b rs,rd
313*a9fa9459Szrj   mov.b @@(disp:16,rs),rd     *  or.w #imm,rd
314*a9fa9459Szrj   mov.b @@rs+,rd              *  or.w rs,rd
315*a9fa9459Szrj   mov.b @@abs:8,rd            *  or.l #imm,rd
316*a9fa9459Szrj   mov.b rs,@@rd               *  or.l rs,rd
317*a9fa9459Szrj   mov.b rs,@@(disp:16,rd)        orc  #imm,ccr
318*a9fa9459Szrj   mov.b rs,@@-rd                 pop.w rs
319*a9fa9459Szrj   mov.b rs,@@abs:8            *  pop.l rs
320*a9fa9459Szrj   mov.w rs,@@rd                  push.w rs
321*a9fa9459Szrj*  mov.w @@(disp:24,rs),rd     *  push.l rs
322*a9fa9459Szrj*  mov.w rs,@@(disp:24,rd)        rotl.b rs
323*a9fa9459Szrj*  mov.w @@abs:24,rd           *  rotl.w rs
324*a9fa9459Szrj*  mov.w rs,@@abs:24           *  rotl.l rs
325*a9fa9459Szrj   mov.w rs,rd                   rotr.b rs
326*a9fa9459Szrj   mov.w #imm,rd              *  rotr.w rs
327*a9fa9459Szrj   mov.w @@rs,rd               *  rotr.l rs
328*a9fa9459Szrj   mov.w @@(disp:16,rs),rd        rotxl.b rs
329*a9fa9459Szrj   mov.w @@rs+,rd              *  rotxl.w rs
330*a9fa9459Szrj   mov.w @@abs:16,rd           *  rotxl.l rs
331*a9fa9459Szrj   mov.w rs,@@(disp:16,rd)        rotxr.b rs
332*a9fa9459Szrj   mov.w rs,@@-rd              *  rotxr.w rs
333*a9fa9459Szrj@page
334*a9fa9459Szrj*  rotxr.l rs                 *  stc  ccr,@@(disp:24,rd)
335*a9fa9459Szrj   bpt                        *  stc  ccr,@@-rd
336*a9fa9459Szrj   rte                        *  stc  ccr,@@abs:16
337*a9fa9459Szrj   rts                        *  stc  ccr,@@abs:24
338*a9fa9459Szrj   shal.b rs                     sub.b rs,rd
339*a9fa9459Szrj*  shal.w rs                     sub.w rs,rd
340*a9fa9459Szrj*  shal.l rs                  *  sub.w #imm,rd
341*a9fa9459Szrj   shar.b rs                  *  sub.l rs,rd
342*a9fa9459Szrj*  shar.w rs                  *  sub.l #imm,rd
343*a9fa9459Szrj*  shar.l rs                     subs #imm,rd
344*a9fa9459Szrj   shll.b rs                     subx #imm,rd
345*a9fa9459Szrj*  shll.w rs                     subx rs,rd
346*a9fa9459Szrj*  shll.l rs                  *  trapa #imm
347*a9fa9459Szrj   shlr.b rs                     xor  #imm,rd
348*a9fa9459Szrj*  shlr.w rs                     xor  rs,rd
349*a9fa9459Szrj*  shlr.l rs                  *  xor.w #imm,rd
350*a9fa9459Szrj   sleep                      *  xor.w rs,rd
351*a9fa9459Szrj   stc  ccr,rd                *  xor.l #imm,rd
352*a9fa9459Szrj*  stc  ccr,@@rs               *  xor.l rs,rd
353*a9fa9459Szrj*  stc  ccr,@@(disp:16,rd)        xorc #imm,ccr
354*a9fa9459Szrj@end smallexample
355*a9fa9459Szrj@end ifset
356*a9fa9459Szrj
357*a9fa9459Szrj@cindex size suffixes, H8/300
358*a9fa9459Szrj@cindex H8/300 size suffixes
359*a9fa9459SzrjFour H8/300 instructions (@code{add}, @code{cmp}, @code{mov},
360*a9fa9459Szrj@code{sub}) are defined with variants using the suffixes @samp{.b},
361*a9fa9459Szrj@samp{.w}, and @samp{.l} to specify the size of a memory operand.
362*a9fa9459Szrj@code{@value{AS}} supports these suffixes, but does not require them;
363*a9fa9459Szrjsince one of the operands is always a register, @code{@value{AS}} can
364*a9fa9459Szrjdeduce the correct size.
365*a9fa9459Szrj
366*a9fa9459SzrjFor example, since @code{r0} refers to a 16-bit register,
367*a9fa9459Szrj@example
368*a9fa9459Szrjmov    r0,@@foo
369*a9fa9459Szrj@exdent is equivalent to
370*a9fa9459Szrjmov.w  r0,@@foo
371*a9fa9459Szrj@end example
372*a9fa9459Szrj
373*a9fa9459SzrjIf you use the size suffixes, @code{@value{AS}} issues a warning when
374*a9fa9459Szrjthe suffix and the register size do not match.
375