123357Smckusick /* 229255Smckusick * Copyright (c) 1982, 1986 Regents of the University of California. 323357Smckusick * All rights reserved. The Berkeley software License Agreement 423357Smckusick * specifies the terms and conditions for redistribution. 523357Smckusick * 6*44395Smarc * @(#)ut.c 7.10 (Berkeley) 06/28/90 723357Smckusick */ 84744Swnj 94862Sroot #include "tj.h" 104744Swnj #if NUT > 0 114744Swnj /* 124744Swnj * System Industries Model 9700 Tape Drive 134744Swnj * emulates a TU45 on the UNIBUS 144744Swnj * 154744Swnj * TODO: 164744Swnj * check out attention processing 174744Swnj * try reset code and dump code 184744Swnj */ 1917083Sbloom #include "param.h" 2017083Sbloom #include "systm.h" 2117083Sbloom #include "buf.h" 2217083Sbloom #include "conf.h" 2317083Sbloom #include "file.h" 2417083Sbloom #include "map.h" 2517083Sbloom #include "ioctl.h" 2617083Sbloom #include "mtio.h" 2717083Sbloom #include "cmap.h" 2817083Sbloom #include "uio.h" 2917083Sbloom #include "kernel.h" 3030917Skarels #include "syslog.h" 31*44395Smarc #include "tprintf.h" 324744Swnj 3337511Smckusick #include "machine/pte.h" 348483Sroot #include "../vax/cpu.h" 3517083Sbloom #include "ubareg.h" 3617083Sbloom #include "ubavar.h" 3717083Sbloom #include "utreg.h" 384744Swnj 394744Swnj struct buf cutbuf[NUT]; /* bufs for control operations */ 404744Swnj struct buf tjutab[NTJ]; /* bufs for slave queue headers */ 414744Swnj 424744Swnj struct uba_ctlr *utminfo[NUT]; 434744Swnj struct uba_device *tjdinfo[NTJ]; 444833Swnj int utprobe(), utslave(), utattach(), utdgo(), utintr(), uttimer(); 454744Swnj u_short utstd[] = { 0772440, 0 }; 464744Swnj struct uba_driver utdriver = 474744Swnj { utprobe, utslave, utattach, utdgo, utstd, "tj", tjdinfo, "ut", utminfo, 0 }; 484744Swnj 4911176Ssam #define MASKREG(reg) ((reg)&0xffff) 5011176Ssam 514744Swnj /* bits in minor device */ 524744Swnj #define TJUNIT(dev) (minor(dev)&03) 534744Swnj #define T_NOREWIND 04 544744Swnj #define T_1600BPI 010 554744Swnj #define T_6250BPI 020 564744Swnj short utdens[] = { UT_NRZI, UT_PE, UT_GCR, UT_NRZI }; 574744Swnj 584744Swnj /* slave to controller mapping table */ 594744Swnj short tjtout[NTJ]; 604744Swnj #define UTUNIT(dev) (tjtout[TJUNIT(dev)]) 614744Swnj 624744Swnj #define INF (daddr_t)1000000L /* a block number that wont exist */ 634744Swnj 644744Swnj struct tj_softc { 654744Swnj char sc_openf; /* exclusive open */ 664744Swnj char sc_lastiow; /* last I/O operation was a write */ 674744Swnj daddr_t sc_blkno; /* next block to transfer */ 684744Swnj daddr_t sc_nxrec; /* next record on tape */ 694744Swnj u_short sc_erreg; /* image of uter */ 704744Swnj u_short sc_dsreg; /* image of utds */ 714746Ssam u_short sc_resid; /* residual from transfer */ 724744Swnj u_short sc_dens; /* sticky selected density */ 734833Swnj daddr_t sc_timo; /* time until timeout expires */ 744833Swnj short sc_tact; /* timeout is active flag */ 75*44395Smarc tpr_t sc_tpr; /* tprintf handle */ 7630917Skarels int sc_blks; /* number of I/O operations since open */ 7730917Skarels int sc_softerrs; /* number of soft I/O errors since open */ 784744Swnj } tj_softc[NTJ]; 794744Swnj 804744Swnj /* 814744Swnj * Internal per/slave states found in sc_state 824744Swnj */ 834744Swnj #define SSEEK 1 /* seeking */ 844744Swnj #define SIO 2 /* doing sequential I/O */ 854744Swnj #define SCOM 3 /* sending a control command */ 864744Swnj #define SREW 4 /* doing a rewind op */ 874746Ssam #define SERASE 5 /* erase inter-record gap */ 884746Ssam #define SERASED 6 /* erased inter-record gap */ 894744Swnj 904941Swnj /*ARGSUSED*/ 914744Swnj utprobe(reg) 924744Swnj caddr_t reg; 934744Swnj { 944744Swnj register int br, cvec; 954744Swnj #ifdef lint 964744Swnj br=0; cvec=br; br=cvec; 974941Swnj utintr(0); 984744Swnj #endif 994746Ssam /* 1006954Sroot * The SI documentation says you must set the RDY bit 1016954Sroot * (even though it's read-only) to force an interrupt. 1024746Ssam */ 1036954Sroot ((struct utdevice *) reg)->utcs1 = UT_IE|UT_NOP|UT_RDY; 1044744Swnj DELAY(10000); 1057405Skre return (sizeof (struct utdevice)); 1064744Swnj } 1074744Swnj 1084744Swnj /*ARGSUSED*/ 1094744Swnj utslave(ui, reg) 1104744Swnj struct uba_device *ui; 1114744Swnj caddr_t reg; 1124744Swnj { 1134744Swnj /* 1144744Swnj * A real TU45 would support the slave present bit 1154744Swnj * int the drive type register, but this thing doesn't, 1164744Swnj * so there's no way to determine if a slave is present or not. 1174744Swnj */ 1184744Swnj return(1); 1194744Swnj } 1204744Swnj 1214744Swnj utattach(ui) 1224744Swnj struct uba_device *ui; 1234744Swnj { 1244744Swnj tjtout[ui->ui_unit] = ui->ui_mi->um_ctlr; 1254744Swnj } 1264744Swnj 1274744Swnj /* 1284744Swnj * Open the device with exclusive access. 1294744Swnj */ 1304744Swnj utopen(dev, flag) 1314744Swnj dev_t dev; 1324744Swnj int flag; 1334744Swnj { 1344744Swnj register int tjunit = TJUNIT(dev); 1354744Swnj register struct uba_device *ui; 1364744Swnj register struct tj_softc *sc; 13740725Skarels int olddens, dens, error; 1385439Sroot register int s; 1394744Swnj 14025053Skarels if (tjunit >= NTJ || (ui = tjdinfo[tjunit]) == 0 || ui->ui_alive == 0) 1418577Sroot return (ENXIO); 14225053Skarels if ((sc = &tj_softc[tjunit])->sc_openf) 14325053Skarels return (EBUSY); 14430917Skarels sc->sc_openf = 1; 1454744Swnj olddens = sc->sc_dens; 1468577Sroot dens = sc->sc_dens = 1478577Sroot utdens[(minor(dev)&(T_1600BPI|T_6250BPI))>>3]| 1488577Sroot PDP11FMT|(ui->ui_slave&07); 1494744Swnj get: 1504744Swnj utcommand(dev, UT_SENSE, 1); 1514744Swnj if (sc->sc_dsreg&UTDS_PIP) { 15240725Skarels if (error = tsleep((caddr_t)&lbolt, (PZERO+1) | PCATCH, 15340725Skarels devopn, 0)) 15440725Skarels return (error); 1554744Swnj goto get; 1564744Swnj } 1574744Swnj sc->sc_dens = olddens; 1584744Swnj if ((sc->sc_dsreg&UTDS_MOL) == 0) { 15930917Skarels sc->sc_openf = 0; 1604744Swnj uprintf("tj%d: not online\n", tjunit); 1618577Sroot return (EIO); 1624744Swnj } 1634744Swnj if ((flag&FWRITE) && (sc->sc_dsreg&UTDS_WRL)) { 16430917Skarels sc->sc_openf = 0; 1654744Swnj uprintf("tj%d: no write ring\n", tjunit); 1668577Sroot return (EIO); 1674744Swnj } 1684744Swnj if ((sc->sc_dsreg&UTDS_BOT) == 0 && (flag&FWRITE) && 1694744Swnj dens != sc->sc_dens) { 17030917Skarels sc->sc_openf = 0; 1714744Swnj uprintf("tj%d: can't change density in mid-tape\n", tjunit); 1728577Sroot return (EIO); 1734744Swnj } 1744744Swnj sc->sc_blkno = (daddr_t)0; 1754744Swnj sc->sc_nxrec = INF; 1764744Swnj sc->sc_lastiow = 0; 17730917Skarels sc->sc_blks = 0; 17830917Skarels sc->sc_softerrs = 0; 1794744Swnj sc->sc_dens = dens; 180*44395Smarc sc->sc_tpr = tprintf_open(); 1814746Ssam /* 1824746Ssam * For 6250 bpi take exclusive use of the UNIBUS. 1834746Ssam */ 1844746Ssam ui->ui_driver->ud_xclu = (dens&(T_1600BPI|T_6250BPI)) == T_6250BPI; 18526374Skarels s = splclock(); 1864833Swnj if (sc->sc_tact == 0) { 1874833Swnj sc->sc_timo = INF; 1884833Swnj sc->sc_tact = 1; 1894833Swnj timeout(uttimer, (caddr_t)dev, 5*hz); 1904833Swnj } 1915439Sroot splx(s); 1928577Sroot return (0); 1934744Swnj } 1944744Swnj 1954744Swnj utclose(dev, flag) 1964744Swnj register dev_t dev; 1974744Swnj register flag; 1984744Swnj { 1994744Swnj register struct tj_softc *sc = &tj_softc[TJUNIT(dev)]; 2004744Swnj 2014744Swnj if (flag == FWRITE || ((flag&FWRITE) && sc->sc_lastiow)) { 2024744Swnj utcommand(dev, UT_WEOF, 1); 2034744Swnj utcommand(dev, UT_WEOF, 1); 2044744Swnj utcommand(dev, UT_SREV, 1); 2054744Swnj } 2064744Swnj if ((minor(dev)&T_NOREWIND) == 0) 2074744Swnj utcommand(dev, UT_REW, 0); 20830917Skarels if (sc->sc_blks > 100 && sc->sc_softerrs > sc->sc_blks / 100) 20930917Skarels log(LOG_INFO, "tj%d: %d soft errors in %d blocks\n", 21030917Skarels TJUNIT(dev), sc->sc_softerrs, sc->sc_blks); 211*44395Smarc tprintf_close(sc->sc_tpr); 2124744Swnj sc->sc_openf = 0; 21340725Skarels return (0); 2144744Swnj } 2154744Swnj 2164744Swnj utcommand(dev, com, count) 2174744Swnj dev_t dev; 2184744Swnj int com, count; 2194744Swnj { 2204744Swnj register struct buf *bp; 2215439Sroot register int s; 2224744Swnj 2234744Swnj bp = &cutbuf[UTUNIT(dev)]; 2245439Sroot s = spl5(); 2254744Swnj while (bp->b_flags&B_BUSY) { 2264744Swnj if(bp->b_repcnt == 0 && (bp->b_flags&B_DONE)) 2274744Swnj break; 2284744Swnj bp->b_flags |= B_WANTED; 2294744Swnj sleep((caddr_t)bp, PRIBIO); 2304744Swnj } 2314744Swnj bp->b_flags = B_BUSY|B_READ; 2325439Sroot splx(s); 2334744Swnj bp->b_dev = dev; 2344744Swnj bp->b_command = com; 2354744Swnj bp->b_repcnt = count; 2364744Swnj bp->b_blkno = 0; 2374744Swnj utstrategy(bp); 2384744Swnj if (count == 0) 2394744Swnj return; 2404744Swnj iowait(bp); 2414744Swnj if (bp->b_flags&B_WANTED) 2424744Swnj wakeup((caddr_t)bp); 2434744Swnj bp->b_flags &= B_ERROR; 2444744Swnj } 2454744Swnj 2464744Swnj /* 2474744Swnj * Queue a tape operation. 2484744Swnj */ 2494744Swnj utstrategy(bp) 2504744Swnj register struct buf *bp; 2514744Swnj { 2524744Swnj int tjunit = TJUNIT(bp->b_dev); 2534744Swnj register struct uba_ctlr *um; 2544744Swnj register struct buf *dp; 25534218Sbostic int s; 2564744Swnj 2574744Swnj /* 2584744Swnj * Put transfer at end of unit queue 2594744Swnj */ 2604744Swnj dp = &tjutab[tjunit]; 2614744Swnj bp->av_forw = NULL; 26217433Skarels um = tjdinfo[tjunit]->ui_mi; 26334218Sbostic s = spl5(); 2644744Swnj if (dp->b_actf == NULL) { 2654744Swnj dp->b_actf = bp; 2664744Swnj /* 2674744Swnj * Transport not active, so... 2684744Swnj * put at end of controller queue 2694744Swnj */ 2704744Swnj dp->b_forw = NULL; 2714744Swnj if (um->um_tab.b_actf == NULL) 2724744Swnj um->um_tab.b_actf = dp; 2734744Swnj else 2744744Swnj um->um_tab.b_actl->b_forw = dp; 2754744Swnj um->um_tab.b_actl = dp; 2764744Swnj } else 2774744Swnj dp->b_actl->av_forw = bp; 2784744Swnj dp->b_actl = bp; 2794744Swnj /* 2804744Swnj * If the controller is not busy, set it going. 2814744Swnj */ 2824746Ssam if (um->um_tab.b_state == 0) 2834744Swnj utstart(um); 28434218Sbostic splx(s); 2854744Swnj } 2864744Swnj 2874744Swnj utstart(um) 2884744Swnj register struct uba_ctlr *um; 2894744Swnj { 2904746Ssam register struct utdevice *addr; 2914744Swnj register struct buf *bp, *dp; 2924744Swnj register struct tj_softc *sc; 2934744Swnj struct uba_device *ui; 2944744Swnj int tjunit; 2954744Swnj daddr_t blkno; 2964744Swnj 2974744Swnj loop: 2984744Swnj /* 2994744Swnj * Scan controller queue looking for units with 3004744Swnj * transaction queues to dispatch 3014744Swnj */ 3024744Swnj if ((dp = um->um_tab.b_actf) == NULL) 3034744Swnj return; 3044744Swnj if ((bp = dp->b_actf) == NULL) { 3054744Swnj um->um_tab.b_actf = dp->b_forw; 3064744Swnj goto loop; 3074744Swnj } 3084746Ssam addr = (struct utdevice *)um->um_addr; 3094744Swnj tjunit = TJUNIT(bp->b_dev); 3104744Swnj ui = tjdinfo[tjunit]; 3114744Swnj sc = &tj_softc[tjunit]; 3124744Swnj /* note slave select, density, and format were merged on open */ 3134746Ssam addr->uttc = sc->sc_dens; 3144746Ssam sc->sc_dsreg = addr->utds; 3154746Ssam sc->sc_erreg = addr->uter; 31611176Ssam sc->sc_resid = MASKREG(addr->utfc); 3174744Swnj /* 3184744Swnj * Default is that last command was NOT a write command; 3194744Swnj * if we do a write command we will notice this in utintr(). 3204744Swnj */ 3214744Swnj sc->sc_lastiow = 0; 3224746Ssam if (sc->sc_openf < 0 || (addr->utds&UTDS_MOL) == 0) { 3234744Swnj /* 3244744Swnj * Have had a hard error on a non-raw tape 3254744Swnj * or the tape unit is now unavailable 3264744Swnj * (e.g. taken off line). 3274744Swnj */ 3284744Swnj bp->b_flags |= B_ERROR; 3294744Swnj goto next; 3304744Swnj } 3314744Swnj if (bp == &cutbuf[UTUNIT(bp->b_dev)]) { 3324744Swnj /* 3334744Swnj * Execute a control operation with the specified 3344744Swnj * count. 3354744Swnj */ 3364744Swnj if (bp->b_command == UT_SENSE) 3374744Swnj goto next; 33811176Ssam if (bp->b_command == UT_SFORW && (addr->utds & UTDS_EOT)) { 33911176Ssam bp->b_resid = bp->b_bcount; 34011176Ssam goto next; 34111176Ssam } 3424744Swnj /* 3434744Swnj * Set next state; handle timeouts 3444744Swnj */ 3454833Swnj if (bp->b_command == UT_REW) { 3464746Ssam um->um_tab.b_state = SREW; 3474833Swnj sc->sc_timo = 5*60; 3484833Swnj } else { 3494746Ssam um->um_tab.b_state = SCOM; 3504833Swnj sc->sc_timo = imin(imax(10*(int)-bp->b_repcnt,60),5*60); 3514833Swnj } 3524744Swnj /* NOTE: this depends on the ut command values */ 3534744Swnj if (bp->b_command >= UT_SFORW && bp->b_command <= UT_SREVF) 3544746Ssam addr->utfc = -bp->b_repcnt; 3554744Swnj goto dobpcmd; 3564744Swnj } 3574744Swnj /* 35834218Sbostic * For raw I/O, save the current block 35934218Sbostic * number in case we have to retry. 3604744Swnj */ 36134218Sbostic if (bp->b_flags & B_RAW) { 36234218Sbostic if (um->um_tab.b_errcnt == 0) { 36334218Sbostic sc->sc_blkno = bdbtofsb(bp->b_blkno); 36434218Sbostic sc->sc_nxrec = sc->sc_blkno + 1; 36534218Sbostic } 3664744Swnj } 36734218Sbostic else { 36834218Sbostic /* 36934218Sbostic * Handle boundary cases for operation 37034218Sbostic * on non-raw tapes. 37134218Sbostic */ 37234218Sbostic if (bdbtofsb(bp->b_blkno) > sc->sc_nxrec) { 37334218Sbostic /* can't read past end of file */ 37434218Sbostic bp->b_flags |= B_ERROR; 37534218Sbostic bp->b_error = ENXIO; 37634218Sbostic goto next; 37734218Sbostic } 37834218Sbostic if (bdbtofsb(bp->b_blkno) == sc->sc_nxrec && 37934218Sbostic (bp->b_flags&B_READ)) { 38034218Sbostic /* 38134218Sbostic * Reading at end of file returns 0 bytes. 38234218Sbostic */ 38334218Sbostic bp->b_resid = bp->b_bcount; 38434218Sbostic clrbuf(bp); 38534218Sbostic goto next; 38634218Sbostic } 38734218Sbostic if ((bp->b_flags&B_READ) == 0) 38834218Sbostic sc->sc_nxrec = bdbtofsb(bp->b_blkno) + 1; 3894744Swnj } 3904744Swnj /* 3914744Swnj * If the tape is correctly positioned, set up all the 3924744Swnj * registers but the csr, and give control over to the 3934744Swnj * UNIBUS adaptor routines, to wait for resources to 3944744Swnj * start I/O. 3954744Swnj */ 3967382Ssam if ((blkno = sc->sc_blkno) == bdbtofsb(bp->b_blkno)) { 3974746Ssam addr->utwc = -(((bp->b_bcount)+1)>>1); 3984746Ssam addr->utfc = -bp->b_bcount; 3994744Swnj if ((bp->b_flags&B_READ) == 0) { 4004744Swnj /* 4014744Swnj * On write error retries erase the 4024746Ssam * inter-record gap before rewriting. 4034744Swnj */ 4044746Ssam if (um->um_tab.b_errcnt) { 4054746Ssam if (um->um_tab.b_state != SERASED) { 4064759Swnj um->um_tab.b_state = SERASE; 4074833Swnj sc->sc_timo = 60; 4084746Ssam addr->utcs1 = UT_ERASE|UT_IE|UT_GO; 4094746Ssam return; 4104746Ssam } 4114746Ssam } 41211176Ssam if (addr->utds & UTDS_EOT) { 41311176Ssam bp->b_resid = bp->b_bcount; 41411176Ssam um->um_tab.b_state = 0; 41511176Ssam goto next; 41611176Ssam } 4174746Ssam um->um_cmd = UT_WCOM; 4184744Swnj } else 4194744Swnj um->um_cmd = UT_RCOM; 4204833Swnj sc->sc_timo = 60; 4214746Ssam um->um_tab.b_state = SIO; 4224744Swnj (void) ubago(ui); 4234744Swnj return; 4244744Swnj } 4254744Swnj /* 4264744Swnj * Tape positioned incorrectly; seek forwards or 4274744Swnj * backwards to the correct spot. This happens for 4284744Swnj * raw tapes only on error retries. 4294744Swnj */ 4304746Ssam um->um_tab.b_state = SSEEK; 4317382Ssam if (blkno < bdbtofsb(bp->b_blkno)) { 4327382Ssam addr->utfc = blkno - bdbtofsb(bp->b_blkno); 4334744Swnj bp->b_command = UT_SFORW; 4344744Swnj } else { 4357382Ssam addr->utfc = bdbtofsb(bp->b_blkno) - blkno; 4364744Swnj bp->b_command = UT_SREV; 4374744Swnj } 4384833Swnj sc->sc_timo = imin(imax(10 * -addr->utfc, 60), 5*60); 4394744Swnj 4404744Swnj dobpcmd: 4414744Swnj /* 4424744Swnj * Perform the command setup in bp. 4434744Swnj */ 4444746Ssam addr->utcs1 = bp->b_command|UT_IE|UT_GO; 4454744Swnj return; 4464744Swnj next: 4474744Swnj /* 4484744Swnj * Advance to the next command in the slave queue, 4494744Swnj * posting notice and releasing resources as needed. 4504744Swnj */ 4514744Swnj if (um->um_ubinfo) 4524744Swnj ubadone(um); 4534744Swnj um->um_tab.b_errcnt = 0; 4544744Swnj dp->b_actf = bp->av_forw; 4554744Swnj iodone(bp); 4564744Swnj goto loop; 4574744Swnj } 4584744Swnj 4594744Swnj /* 4604744Swnj * Start operation on controller -- 4614744Swnj * UNIBUS resources have been allocated. 4624744Swnj */ 4634744Swnj utdgo(um) 4644744Swnj register struct uba_ctlr *um; 4654744Swnj { 4664744Swnj register struct utdevice *addr = (struct utdevice *)um->um_addr; 4674744Swnj 4684744Swnj addr->utba = (u_short) um->um_ubinfo; 46911176Ssam addr->utcs1 = um->um_cmd|((um->um_ubinfo>>8)&0x300)|UT_IE|UT_GO; 4704744Swnj } 4714744Swnj 4724744Swnj /* 4734744Swnj * Ut interrupt handler 4744744Swnj */ 4754744Swnj /*ARGSUSED*/ 4764744Swnj utintr(ut11) 4774744Swnj int ut11; 4784744Swnj { 4794744Swnj struct buf *dp; 4804744Swnj register struct buf *bp; 4814744Swnj register struct uba_ctlr *um = utminfo[ut11]; 4824744Swnj register struct utdevice *addr; 4834744Swnj register struct tj_softc *sc; 4844746Ssam u_short tjunit, cs2, cs1; 4854744Swnj register state; 4864744Swnj 4874744Swnj if ((dp = um->um_tab.b_actf) == NULL) 4884744Swnj return; 4894744Swnj bp = dp->b_actf; 4904744Swnj tjunit = TJUNIT(bp->b_dev); 4914744Swnj addr = (struct utdevice *)tjdinfo[tjunit]->ui_addr; 4924744Swnj sc = &tj_softc[tjunit]; 4934744Swnj /* 4944744Swnj * Record status... 4954744Swnj */ 4964877Ssam sc->sc_timo = INF; 4974744Swnj sc->sc_dsreg = addr->utds; 4984744Swnj sc->sc_erreg = addr->uter; 49911176Ssam sc->sc_resid = MASKREG(addr->utfc); 5004746Ssam if ((bp->b_flags&B_READ) == 0) 5014744Swnj sc->sc_lastiow = 1; 5024746Ssam state = um->um_tab.b_state; 5034746Ssam um->um_tab.b_state = 0; 5044744Swnj /* 5054744Swnj * Check for errors... 5064744Swnj */ 5074744Swnj if ((addr->utds&UTDS_ERR) || (addr->utcs1&UT_TRE)) { 5084744Swnj /* 5094759Swnj * To clear the ERR bit, we must issue a drive clear 5104759Swnj * command, and to clear the TRE bit we must set the 5114759Swnj * controller clear bit. 5124759Swnj */ 5134759Swnj cs2 = addr->utcs2; 5144759Swnj if ((cs1 = addr->utcs1)&UT_TRE) 5154759Swnj addr->utcs2 |= UTCS2_CLR; 5164759Swnj /* is this dangerous ?? */ 5174759Swnj while ((addr->utcs1&UT_RDY) == 0) 5184759Swnj ; 5194759Swnj addr->utcs1 = UT_CLEAR|UT_GO; 5204759Swnj /* 52111176Ssam * If we were reading at 1600 or 6250 bpi and the error 52211176Ssam * was corrected, then don't consider this an error. 5234744Swnj */ 52411190Ssam if (sc->sc_erreg & UTER_COR && (bp->b_flags & B_READ) && 52511176Ssam (addr->uttc & UTTC_DEN) != UT_NRZI) { 526*44395Smarc tprintf(sc->sc_tpr, 52711176Ssam "ut%d: soft error bn%d cs1=%b er=%b cs2=%b ds=%b\n", 52811176Ssam tjunit, bp->b_blkno, cs1, UT_BITS, sc->sc_erreg, 52911176Ssam UTER_BITS, cs2, UTCS2_BITS, sc->sc_dsreg, UTDS_BITS); 53011176Ssam sc->sc_erreg &= ~UTER_COR; 5314744Swnj } 5324744Swnj /* 5334744Swnj * If we were reading from a raw tape and the only error 5344744Swnj * was that the record was too long, then we don't consider 5354744Swnj * this an error. 5364744Swnj */ 53734218Sbostic if ((bp->b_flags & (B_READ|B_RAW)) == (B_READ|B_RAW) && 5384744Swnj (sc->sc_erreg&UTER_FCE)) 53911176Ssam sc->sc_erreg &= ~UTER_FCE; 54011197Slayer if (sc->sc_erreg == 0) 5414744Swnj goto ignoreerr; 5424744Swnj /* 54311176Ssam * Fix up errors which occur due to backspacing 54411176Ssam * "over" the front of the tape. 5454746Ssam */ 54611176Ssam if ((sc->sc_dsreg & UTDS_BOT) && bp->b_command == UT_SREV && 5474746Ssam ((sc->sc_erreg &= ~(UTER_NEF|UTER_FCE)) == 0)) 5484746Ssam goto opdone; 5494746Ssam /* 5504744Swnj * Retry soft errors up to 8 times 5514744Swnj */ 5524744Swnj if ((sc->sc_erreg&UTER_HARD) == 0 && state == SIO) { 5534744Swnj if (++um->um_tab.b_errcnt < 7) { 5544744Swnj sc->sc_blkno++; 5554744Swnj ubadone(um); 5564744Swnj goto opcont; 5574744Swnj } 55811176Ssam } 5594744Swnj /* 56011176Ssam * Hard or non-I/O errors on non-raw tape 56111176Ssam * cause it to close. 56211176Ssam */ 56334218Sbostic if ((bp->b_flags&B_RAW) == 0 && sc->sc_openf > 0) 56411176Ssam sc->sc_openf = -1; 56511176Ssam /* 5664744Swnj * Couldn't recover error. 5674744Swnj */ 568*44395Smarc tprintf(sc->sc_tpr, 56918323Sralph "ut%d: hard error bn%d cs1=%b er=%b cs2=%b ds=%b\n", 5704746Ssam tjunit, bp->b_blkno, cs1, UT_BITS, sc->sc_erreg, 5714746Ssam UTER_BITS, cs2, UTCS2_BITS, sc->sc_dsreg, UTDS_BITS); 5724744Swnj bp->b_flags |= B_ERROR; 5734744Swnj goto opdone; 5744744Swnj } 57511176Ssam 5764744Swnj ignoreerr: 5774744Swnj /* 57811176Ssam * If we hit a tape mark update our position. 57911176Ssam */ 58011176Ssam if (sc->sc_dsreg & UTDS_TM && bp->b_flags & B_READ) { 58111176Ssam /* 58211176Ssam * Set blkno and nxrec 58311176Ssam */ 58411176Ssam if (bp == &cutbuf[UTUNIT(bp->b_dev)]) { 58511176Ssam if (sc->sc_blkno > bdbtofsb(bp->b_blkno)) { 58611176Ssam sc->sc_nxrec = 58711176Ssam bdbtofsb(bp->b_blkno) - addr->utfc; 58811176Ssam sc->sc_blkno = sc->sc_nxrec; 58911176Ssam } else { 59011176Ssam sc->sc_blkno = 59111176Ssam bdbtofsb(bp->b_blkno) + addr->utfc; 59211176Ssam sc->sc_nxrec = sc->sc_blkno-1; 59311176Ssam } 59411176Ssam } else 59511176Ssam sc->sc_nxrec = bdbtofsb(bp->b_blkno); 59611176Ssam /* 59711176Ssam * Note: if we get a tape mark on a read, the 59811176Ssam * frame count register will be zero, so b_resid 59911176Ssam * will be calculated correctly below. 60011176Ssam */ 60111176Ssam goto opdone; 60211176Ssam } 60311176Ssam /* 6044744Swnj * Advance tape control FSM. 6054744Swnj */ 6064744Swnj switch (state) { 6074744Swnj 6084744Swnj case SIO: /* read/write increments tape block # */ 6094744Swnj sc->sc_blkno++; 61030917Skarels sc->sc_blks++; 61130917Skarels if (um->um_tab.b_errcnt) 61230917Skarels sc->sc_softerrs++; 6134746Ssam break; 6144744Swnj 61511176Ssam case SCOM: /* motion commands update current position */ 6164744Swnj if (bp == &cutbuf[UTUNIT(bp->b_dev)]) 61726296Skarels switch ((int)bp->b_command) { 6184744Swnj 6194744Swnj case UT_SFORW: 6204744Swnj sc->sc_blkno -= bp->b_repcnt; 6214744Swnj break; 6224744Swnj 6234744Swnj case UT_SREV: 6244744Swnj sc->sc_blkno += bp->b_repcnt; 6254744Swnj break; 62611176Ssam 62711176Ssam case UT_REWOFFL: 62811176Ssam addr->utcs1 = UT_CLEAR|UT_GO; 62911176Ssam break; 6304744Swnj } 6314746Ssam break; 6324744Swnj 6334744Swnj case SSEEK: 6347382Ssam sc->sc_blkno = bdbtofsb(bp->b_blkno); 6354744Swnj goto opcont; 6364744Swnj 6374746Ssam case SERASE: 6384746Ssam /* 6394746Ssam * Completed erase of the inter-record gap due to a 6404746Ssam * write error; now retry the write operation. 6414746Ssam */ 6424746Ssam um->um_tab.b_state = SERASED; 6434746Ssam goto opcont; 6444746Ssam 6454746Ssam case SREW: /* clear attention bit */ 6464746Ssam addr->utcs1 = UT_CLEAR|UT_GO; 6474746Ssam break; 6484746Ssam 6494744Swnj default: 6504746Ssam printf("bad state %d\n", state); 6514744Swnj panic("utintr"); 6524744Swnj } 6534744Swnj 6544744Swnj opdone: 6554744Swnj /* 6564744Swnj * Reset error count and remove 6574744Swnj * from device queue 6584744Swnj */ 6594744Swnj um->um_tab.b_errcnt = 0; 6604746Ssam dp->b_actf = bp->av_forw; 66111176Ssam /* 66211176Ssam * For read command, frame count register contains 66311176Ssam * actual length of tape record. Otherwise, it 66411176Ssam * holds negative residual count. 66511176Ssam */ 66611176Ssam if (state == SIO && um->um_cmd == UT_RCOM) { 66711176Ssam bp->b_resid = 0; 66811176Ssam if (bp->b_bcount > MASKREG(addr->utfc)) 66911176Ssam bp->b_resid = bp->b_bcount - MASKREG(addr->utfc); 67011176Ssam } else 67111176Ssam bp->b_resid = MASKREG(-addr->utfc); 6724744Swnj ubadone(um); 6734744Swnj iodone(bp); 6744744Swnj /* 6754744Swnj * Circulate slave to end of controller queue 6764744Swnj * to give other slaves a chance 6774744Swnj */ 6784744Swnj um->um_tab.b_actf = dp->b_forw; 6794744Swnj if (dp->b_actf) { 6804744Swnj dp->b_forw = NULL; 6814744Swnj if (um->um_tab.b_actf == NULL) 6824744Swnj um->um_tab.b_actf = dp; 6834744Swnj else 6844744Swnj um->um_tab.b_actl->b_forw = dp; 6854744Swnj um->um_tab.b_actl = dp; 6864744Swnj } 6874744Swnj if (um->um_tab.b_actf == 0) 6884744Swnj return; 6894744Swnj opcont: 6904744Swnj utstart(um); 6914744Swnj } 6924744Swnj 6934744Swnj /* 6944833Swnj * Watchdog timer routine. 6954833Swnj */ 6964833Swnj uttimer(dev) 6974833Swnj int dev; 6984833Swnj { 6994833Swnj register struct tj_softc *sc = &tj_softc[TJUNIT(dev)]; 7004846Sroot register short x; 7014833Swnj 7024833Swnj if (sc->sc_timo != INF && (sc->sc_timo -= 5) < 0) { 7034859Ssam printf("tj%d: lost interrupt\n", TJUNIT(dev)); 7044833Swnj sc->sc_timo = INF; 7054846Sroot x = spl5(); 7064833Swnj utintr(UTUNIT(dev)); 7074846Sroot (void) splx(x); 7084833Swnj } 7094833Swnj timeout(uttimer, (caddr_t)dev, 5*hz); 7104833Swnj } 7114833Swnj 7124744Swnj /*ARGSUSED*/ 7137634Ssam utioctl(dev, cmd, data, flag) 7144744Swnj dev_t dev; 7157634Ssam caddr_t data; 7164744Swnj { 7174744Swnj register struct tj_softc *sc = &tj_softc[TJUNIT(dev)]; 7184744Swnj register struct buf *bp = &cutbuf[UTUNIT(dev)]; 7194744Swnj register callcount; 72040911Ssklower int fcount, error = 0; 7217634Ssam struct mtop *mtop; 7227634Ssam struct mtget *mtget; 7234744Swnj /* we depend of the values and order of the MT codes here */ 7244744Swnj static utops[] = 7254744Swnj {UT_WEOF,UT_SFORWF,UT_SREVF,UT_SFORW,UT_SREV,UT_REW,UT_REWOFFL,UT_SENSE}; 7264744Swnj 7274744Swnj switch (cmd) { 7284744Swnj 7294744Swnj case MTIOCTOP: 7307634Ssam mtop = (struct mtop *)data; 7317634Ssam switch(mtop->mt_op) { 7324744Swnj 7334744Swnj case MTWEOF: 73411413Ssam case MTFSF: case MTBSF: 73511413Ssam case MTFSR: case MTBSR: 7367634Ssam callcount = mtop->mt_count; 7374744Swnj fcount = 1; 7384744Swnj break; 7394744Swnj 7404744Swnj case MTREW: case MTOFFL: case MTNOP: 7414744Swnj callcount = 1; 7424744Swnj fcount = 1; 7434744Swnj break; 7444744Swnj 7454744Swnj default: 7468577Sroot return (ENXIO); 7474744Swnj } 7488577Sroot if (callcount <= 0 || fcount <= 0) 7498577Sroot return (EINVAL); 7504744Swnj while (--callcount >= 0) { 7517634Ssam utcommand(dev, utops[mtop->mt_op], fcount); 7524744Swnj if ((bp->b_flags&B_ERROR) || (sc->sc_dsreg&UTDS_BOT)) 7534744Swnj break; 7544744Swnj } 75540911Ssklower if (bp->b_flags&B_ERROR) 75640911Ssklower if ((error = bp->b_error)==0) 75740911Ssklower return (EIO); 75840911Ssklower return (error); 7594744Swnj 7604744Swnj case MTIOCGET: 7617634Ssam mtget = (struct mtget *)data; 7627634Ssam mtget->mt_dsreg = sc->sc_dsreg; 7637634Ssam mtget->mt_erreg = sc->sc_erreg; 7647634Ssam mtget->mt_resid = sc->sc_resid; 7657634Ssam mtget->mt_type = MT_ISUT; 7668577Sroot break; 7674744Swnj 7684744Swnj default: 7698577Sroot return (ENXIO); 7704744Swnj } 7718577Sroot return (0); 7724744Swnj } 7734744Swnj 7744744Swnj utreset(uban) 7754744Swnj int uban; 7764744Swnj { 7774744Swnj register struct uba_ctlr *um; 7784744Swnj register ut11, tjunit; 7794744Swnj register struct uba_device *ui; 7804744Swnj register struct buf *dp; 7814744Swnj 7824744Swnj for (ut11 = 0; ut11 < NUT; ut11++) { 7834744Swnj if ((um = utminfo[ut11]) == 0 || um->um_alive == 0 || 7844744Swnj um->um_ubanum != uban) 7854744Swnj continue; 7864744Swnj printf(" ut%d", ut11); 7874746Ssam um->um_tab.b_state = 0; 7884744Swnj um->um_tab.b_actf = um->um_tab.b_actl = 0; 7894744Swnj if (um->um_ubinfo) { 7904744Swnj printf("<%d>", (um->um_ubinfo>>28)&0xf); 7919358Ssam um->um_ubinfo = 0; 7924744Swnj } 7934744Swnj ((struct utdevice *)(um->um_addr))->utcs1 = UT_CLEAR|UT_GO; 7944746Ssam ((struct utdevice *)(um->um_addr))->utcs2 |= UTCS2_CLR; 7954744Swnj for (tjunit = 0; tjunit < NTJ; tjunit++) { 7964744Swnj if ((ui = tjdinfo[tjunit]) == 0 || ui->ui_mi != um || 7974744Swnj ui->ui_alive == 0) 7984744Swnj continue; 7994744Swnj dp = &tjutab[tjunit]; 8004746Ssam dp->b_state = 0; 8014744Swnj dp->b_forw = 0; 8024744Swnj if (um->um_tab.b_actf == NULL) 8034744Swnj um->um_tab.b_actf = dp; 8044744Swnj else 8054744Swnj um->um_tab.b_actl->b_forw = dp; 8064744Swnj um->um_tab.b_actl = dp; 8074744Swnj if (tj_softc[tjunit].sc_openf > 0) 8084744Swnj tj_softc[tjunit].sc_openf = -1; 8094744Swnj } 8104744Swnj utstart(um); 8114744Swnj } 8124744Swnj } 8134744Swnj 8144744Swnj /* 8154744Swnj * Do a stand-alone core dump to tape -- 8164744Swnj * from here down, routines are used only in dump context 8174744Swnj */ 8184744Swnj #define DBSIZE 20 8194744Swnj 8204744Swnj utdump() 8214744Swnj { 8224744Swnj register struct uba_device *ui; 8234744Swnj register struct uba_regs *up; 8244746Ssam register struct utdevice *addr; 8254744Swnj int blk, num = maxfree; 8264744Swnj int start = 0; 8274744Swnj 8284744Swnj #define phys(a,b) ((b)((int)(a)&0x7fffffff)) 8294744Swnj if (tjdinfo[0] == 0) 8304744Swnj return (ENXIO); 8314744Swnj ui = phys(tjdinfo[0], struct uba_device *); 8324744Swnj up = phys(ui->ui_hd, struct uba_hd *)->uh_physuba; 8334941Swnj ubainit(up); 8344744Swnj DELAY(1000000); 8354941Swnj addr = (struct utdevice *)ui->ui_physaddr; 8364746Ssam utwait(addr); 8374746Ssam /* 8384746Ssam * Be sure to set the appropriate density here. We use 8394746Ssam * 6250, but maybe it should be done at 1600 to insure the 8404746Ssam * tape can be read by most any other tape drive available. 8414746Ssam */ 8424746Ssam addr->uttc = UT_GCR|PDP11FMT; /* implicit slave 0 or-ed in */ 8434746Ssam addr->utcs1 = UT_CLEAR|UT_GO; 8444744Swnj while (num > 0) { 8454744Swnj blk = num > DBSIZE ? DBSIZE : num; 8464746Ssam utdwrite(start, blk, addr, up); 8474746Ssam if ((addr->utds&UTDS_ERR) || (addr->utcs1&UT_TRE)) 8484746Ssam return(EIO); 8494744Swnj start += blk; 8504744Swnj num -= blk; 8514744Swnj } 8524746Ssam uteof(addr); 8534746Ssam uteof(addr); 8544746Ssam utwait(addr); 8554746Ssam if ((addr->utds&UTDS_ERR) || (addr->utcs1&UT_TRE)) 8564744Swnj return(EIO); 8574746Ssam addr->utcs1 = UT_REW|UT_GO; 8584744Swnj return (0); 8594744Swnj } 8604744Swnj 8614746Ssam utdwrite(dbuf, num, addr, up) 8624744Swnj register dbuf, num; 8634746Ssam register struct utdevice *addr; 8644744Swnj struct uba_regs *up; 8654744Swnj { 8664744Swnj register struct pte *io; 8674744Swnj register int npf; 8684744Swnj 8694746Ssam utwait(addr); 8704744Swnj io = up->uba_map; 8714744Swnj npf = num + 1; 8724744Swnj while (--npf != 0) 8734744Swnj *(int *)io++ = (dbuf++ | (1<<UBAMR_DPSHIFT) | UBAMR_MRV); 8744744Swnj *(int *)io = 0; 8754746Ssam addr->utwc = -((num*NBPG)>>1); 8764746Ssam addr->utfc = -(num*NBPG); 8774746Ssam addr->utba = 0; 8784746Ssam addr->utcs1 = UT_WCOM|UT_GO; 8794744Swnj } 8804744Swnj 8814746Ssam utwait(addr) 8824746Ssam struct utdevice *addr; 8834744Swnj { 8844744Swnj register s; 8854744Swnj 8864744Swnj do 8874746Ssam s = addr->utds; 8884744Swnj while ((s&UTDS_DRY) == 0); 8894744Swnj } 8904744Swnj 8914746Ssam uteof(addr) 8924746Ssam struct utdevice *addr; 8934744Swnj { 8944744Swnj 8954746Ssam utwait(addr); 8964746Ssam addr->utcs1 = UT_WEOF|UT_GO; 8974744Swnj } 8984744Swnj #endif 899