123357Smckusick /* 229255Smckusick * Copyright (c) 1982, 1986 Regents of the University of California. 323357Smckusick * All rights reserved. The Berkeley software License Agreement 423357Smckusick * specifies the terms and conditions for redistribution. 523357Smckusick * 6*40725Skarels * @(#)ut.c 7.7 (Berkeley) 04/03/90 723357Smckusick */ 84744Swnj 94862Sroot #include "tj.h" 104744Swnj #if NUT > 0 114744Swnj /* 124744Swnj * System Industries Model 9700 Tape Drive 134744Swnj * emulates a TU45 on the UNIBUS 144744Swnj * 154744Swnj * TODO: 164744Swnj * check out attention processing 174744Swnj * try reset code and dump code 184744Swnj */ 1917083Sbloom #include "param.h" 2017083Sbloom #include "systm.h" 2117083Sbloom #include "buf.h" 2217083Sbloom #include "conf.h" 2317083Sbloom #include "file.h" 2417083Sbloom #include "user.h" 2517083Sbloom #include "map.h" 2617083Sbloom #include "ioctl.h" 2717083Sbloom #include "mtio.h" 2817083Sbloom #include "cmap.h" 2917083Sbloom #include "uio.h" 3017083Sbloom #include "kernel.h" 3118323Sralph #include "tty.h" 3230917Skarels #include "syslog.h" 334744Swnj 3437511Smckusick #include "machine/pte.h" 358483Sroot #include "../vax/cpu.h" 3617083Sbloom #include "ubareg.h" 3717083Sbloom #include "ubavar.h" 3817083Sbloom #include "utreg.h" 394744Swnj 404744Swnj struct buf cutbuf[NUT]; /* bufs for control operations */ 414744Swnj struct buf tjutab[NTJ]; /* bufs for slave queue headers */ 424744Swnj 434744Swnj struct uba_ctlr *utminfo[NUT]; 444744Swnj struct uba_device *tjdinfo[NTJ]; 454833Swnj int utprobe(), utslave(), utattach(), utdgo(), utintr(), uttimer(); 464744Swnj u_short utstd[] = { 0772440, 0 }; 474744Swnj struct uba_driver utdriver = 484744Swnj { utprobe, utslave, utattach, utdgo, utstd, "tj", tjdinfo, "ut", utminfo, 0 }; 494744Swnj 5011176Ssam #define MASKREG(reg) ((reg)&0xffff) 5111176Ssam 524744Swnj /* bits in minor device */ 534744Swnj #define TJUNIT(dev) (minor(dev)&03) 544744Swnj #define T_NOREWIND 04 554744Swnj #define T_1600BPI 010 564744Swnj #define T_6250BPI 020 574744Swnj short utdens[] = { UT_NRZI, UT_PE, UT_GCR, UT_NRZI }; 584744Swnj 594744Swnj /* slave to controller mapping table */ 604744Swnj short tjtout[NTJ]; 614744Swnj #define UTUNIT(dev) (tjtout[TJUNIT(dev)]) 624744Swnj 634744Swnj #define INF (daddr_t)1000000L /* a block number that wont exist */ 644744Swnj 654744Swnj struct tj_softc { 664744Swnj char sc_openf; /* exclusive open */ 674744Swnj char sc_lastiow; /* last I/O operation was a write */ 684744Swnj daddr_t sc_blkno; /* next block to transfer */ 694744Swnj daddr_t sc_nxrec; /* next record on tape */ 704744Swnj u_short sc_erreg; /* image of uter */ 714744Swnj u_short sc_dsreg; /* image of utds */ 724746Ssam u_short sc_resid; /* residual from transfer */ 734744Swnj u_short sc_dens; /* sticky selected density */ 744833Swnj daddr_t sc_timo; /* time until timeout expires */ 754833Swnj short sc_tact; /* timeout is active flag */ 7640045Smarc caddr_t sc_ctty; /* user's controlling tty (vnode) */ 7730917Skarels int sc_blks; /* number of I/O operations since open */ 7830917Skarels int sc_softerrs; /* number of soft I/O errors since open */ 794744Swnj } tj_softc[NTJ]; 804744Swnj 814744Swnj /* 824744Swnj * Internal per/slave states found in sc_state 834744Swnj */ 844744Swnj #define SSEEK 1 /* seeking */ 854744Swnj #define SIO 2 /* doing sequential I/O */ 864744Swnj #define SCOM 3 /* sending a control command */ 874744Swnj #define SREW 4 /* doing a rewind op */ 884746Ssam #define SERASE 5 /* erase inter-record gap */ 894746Ssam #define SERASED 6 /* erased inter-record gap */ 904744Swnj 914941Swnj /*ARGSUSED*/ 924744Swnj utprobe(reg) 934744Swnj caddr_t reg; 944744Swnj { 954744Swnj register int br, cvec; 964744Swnj #ifdef lint 974744Swnj br=0; cvec=br; br=cvec; 984941Swnj utintr(0); 994744Swnj #endif 1004746Ssam /* 1016954Sroot * The SI documentation says you must set the RDY bit 1026954Sroot * (even though it's read-only) to force an interrupt. 1034746Ssam */ 1046954Sroot ((struct utdevice *) reg)->utcs1 = UT_IE|UT_NOP|UT_RDY; 1054744Swnj DELAY(10000); 1067405Skre return (sizeof (struct utdevice)); 1074744Swnj } 1084744Swnj 1094744Swnj /*ARGSUSED*/ 1104744Swnj utslave(ui, reg) 1114744Swnj struct uba_device *ui; 1124744Swnj caddr_t reg; 1134744Swnj { 1144744Swnj /* 1154744Swnj * A real TU45 would support the slave present bit 1164744Swnj * int the drive type register, but this thing doesn't, 1174744Swnj * so there's no way to determine if a slave is present or not. 1184744Swnj */ 1194744Swnj return(1); 1204744Swnj } 1214744Swnj 1224744Swnj utattach(ui) 1234744Swnj struct uba_device *ui; 1244744Swnj { 1254744Swnj tjtout[ui->ui_unit] = ui->ui_mi->um_ctlr; 1264744Swnj } 1274744Swnj 1284744Swnj /* 1294744Swnj * Open the device with exclusive access. 1304744Swnj */ 1314744Swnj utopen(dev, flag) 1324744Swnj dev_t dev; 1334744Swnj int flag; 1344744Swnj { 1354744Swnj register int tjunit = TJUNIT(dev); 1364744Swnj register struct uba_device *ui; 1374744Swnj register struct tj_softc *sc; 138*40725Skarels int olddens, dens, error; 1395439Sroot register int s; 1404744Swnj 14125053Skarels if (tjunit >= NTJ || (ui = tjdinfo[tjunit]) == 0 || ui->ui_alive == 0) 1428577Sroot return (ENXIO); 14325053Skarels if ((sc = &tj_softc[tjunit])->sc_openf) 14425053Skarels return (EBUSY); 14530917Skarels sc->sc_openf = 1; 1464744Swnj olddens = sc->sc_dens; 1478577Sroot dens = sc->sc_dens = 1488577Sroot utdens[(minor(dev)&(T_1600BPI|T_6250BPI))>>3]| 1498577Sroot PDP11FMT|(ui->ui_slave&07); 1504744Swnj get: 1514744Swnj utcommand(dev, UT_SENSE, 1); 1524744Swnj if (sc->sc_dsreg&UTDS_PIP) { 153*40725Skarels if (error = tsleep((caddr_t)&lbolt, (PZERO+1) | PCATCH, 154*40725Skarels devopn, 0)) 155*40725Skarels return (error); 1564744Swnj goto get; 1574744Swnj } 1584744Swnj sc->sc_dens = olddens; 1594744Swnj if ((sc->sc_dsreg&UTDS_MOL) == 0) { 16030917Skarels sc->sc_openf = 0; 1614744Swnj uprintf("tj%d: not online\n", tjunit); 1628577Sroot return (EIO); 1634744Swnj } 1644744Swnj if ((flag&FWRITE) && (sc->sc_dsreg&UTDS_WRL)) { 16530917Skarels sc->sc_openf = 0; 1664744Swnj uprintf("tj%d: no write ring\n", tjunit); 1678577Sroot return (EIO); 1684744Swnj } 1694744Swnj if ((sc->sc_dsreg&UTDS_BOT) == 0 && (flag&FWRITE) && 1704744Swnj dens != sc->sc_dens) { 17130917Skarels sc->sc_openf = 0; 1724744Swnj uprintf("tj%d: can't change density in mid-tape\n", tjunit); 1738577Sroot return (EIO); 1744744Swnj } 1754744Swnj sc->sc_blkno = (daddr_t)0; 1764744Swnj sc->sc_nxrec = INF; 1774744Swnj sc->sc_lastiow = 0; 17830917Skarels sc->sc_blks = 0; 17930917Skarels sc->sc_softerrs = 0; 1804744Swnj sc->sc_dens = dens; 18140045Smarc sc->sc_ctty = (caddr_t)(u.u_procp->p_flag&SCTTY ? 18240045Smarc u.u_procp->p_session->s_ttyvp : 0); 1834746Ssam /* 1844746Ssam * For 6250 bpi take exclusive use of the UNIBUS. 1854746Ssam */ 1864746Ssam ui->ui_driver->ud_xclu = (dens&(T_1600BPI|T_6250BPI)) == T_6250BPI; 18726374Skarels s = splclock(); 1884833Swnj if (sc->sc_tact == 0) { 1894833Swnj sc->sc_timo = INF; 1904833Swnj sc->sc_tact = 1; 1914833Swnj timeout(uttimer, (caddr_t)dev, 5*hz); 1924833Swnj } 1935439Sroot splx(s); 1948577Sroot return (0); 1954744Swnj } 1964744Swnj 1974744Swnj utclose(dev, flag) 1984744Swnj register dev_t dev; 1994744Swnj register flag; 2004744Swnj { 2014744Swnj register struct tj_softc *sc = &tj_softc[TJUNIT(dev)]; 2024744Swnj 2034744Swnj if (flag == FWRITE || ((flag&FWRITE) && sc->sc_lastiow)) { 2044744Swnj utcommand(dev, UT_WEOF, 1); 2054744Swnj utcommand(dev, UT_WEOF, 1); 2064744Swnj utcommand(dev, UT_SREV, 1); 2074744Swnj } 2084744Swnj if ((minor(dev)&T_NOREWIND) == 0) 2094744Swnj utcommand(dev, UT_REW, 0); 21030917Skarels if (sc->sc_blks > 100 && sc->sc_softerrs > sc->sc_blks / 100) 21130917Skarels log(LOG_INFO, "tj%d: %d soft errors in %d blocks\n", 21230917Skarels TJUNIT(dev), sc->sc_softerrs, sc->sc_blks); 2134744Swnj sc->sc_openf = 0; 214*40725Skarels return (0); 2154744Swnj } 2164744Swnj 2174744Swnj utcommand(dev, com, count) 2184744Swnj dev_t dev; 2194744Swnj int com, count; 2204744Swnj { 2214744Swnj register struct buf *bp; 2225439Sroot register int s; 2234744Swnj 2244744Swnj bp = &cutbuf[UTUNIT(dev)]; 2255439Sroot s = spl5(); 2264744Swnj while (bp->b_flags&B_BUSY) { 2274744Swnj if(bp->b_repcnt == 0 && (bp->b_flags&B_DONE)) 2284744Swnj break; 2294744Swnj bp->b_flags |= B_WANTED; 2304744Swnj sleep((caddr_t)bp, PRIBIO); 2314744Swnj } 2324744Swnj bp->b_flags = B_BUSY|B_READ; 2335439Sroot splx(s); 2344744Swnj bp->b_dev = dev; 2354744Swnj bp->b_command = com; 2364744Swnj bp->b_repcnt = count; 2374744Swnj bp->b_blkno = 0; 2384744Swnj utstrategy(bp); 2394744Swnj if (count == 0) 2404744Swnj return; 2414744Swnj iowait(bp); 2424744Swnj if (bp->b_flags&B_WANTED) 2434744Swnj wakeup((caddr_t)bp); 2444744Swnj bp->b_flags &= B_ERROR; 2454744Swnj } 2464744Swnj 2474744Swnj /* 2484744Swnj * Queue a tape operation. 2494744Swnj */ 2504744Swnj utstrategy(bp) 2514744Swnj register struct buf *bp; 2524744Swnj { 2534744Swnj int tjunit = TJUNIT(bp->b_dev); 2544744Swnj register struct uba_ctlr *um; 2554744Swnj register struct buf *dp; 25634218Sbostic int s; 2574744Swnj 2584744Swnj /* 2594744Swnj * Put transfer at end of unit queue 2604744Swnj */ 2614744Swnj dp = &tjutab[tjunit]; 2624744Swnj bp->av_forw = NULL; 26317433Skarels um = tjdinfo[tjunit]->ui_mi; 26434218Sbostic s = spl5(); 2654744Swnj if (dp->b_actf == NULL) { 2664744Swnj dp->b_actf = bp; 2674744Swnj /* 2684744Swnj * Transport not active, so... 2694744Swnj * put at end of controller queue 2704744Swnj */ 2714744Swnj dp->b_forw = NULL; 2724744Swnj if (um->um_tab.b_actf == NULL) 2734744Swnj um->um_tab.b_actf = dp; 2744744Swnj else 2754744Swnj um->um_tab.b_actl->b_forw = dp; 2764744Swnj um->um_tab.b_actl = dp; 2774744Swnj } else 2784744Swnj dp->b_actl->av_forw = bp; 2794744Swnj dp->b_actl = bp; 2804744Swnj /* 2814744Swnj * If the controller is not busy, set it going. 2824744Swnj */ 2834746Ssam if (um->um_tab.b_state == 0) 2844744Swnj utstart(um); 28534218Sbostic splx(s); 2864744Swnj } 2874744Swnj 2884744Swnj utstart(um) 2894744Swnj register struct uba_ctlr *um; 2904744Swnj { 2914746Ssam register struct utdevice *addr; 2924744Swnj register struct buf *bp, *dp; 2934744Swnj register struct tj_softc *sc; 2944744Swnj struct uba_device *ui; 2954744Swnj int tjunit; 2964744Swnj daddr_t blkno; 2974744Swnj 2984744Swnj loop: 2994744Swnj /* 3004744Swnj * Scan controller queue looking for units with 3014744Swnj * transaction queues to dispatch 3024744Swnj */ 3034744Swnj if ((dp = um->um_tab.b_actf) == NULL) 3044744Swnj return; 3054744Swnj if ((bp = dp->b_actf) == NULL) { 3064744Swnj um->um_tab.b_actf = dp->b_forw; 3074744Swnj goto loop; 3084744Swnj } 3094746Ssam addr = (struct utdevice *)um->um_addr; 3104744Swnj tjunit = TJUNIT(bp->b_dev); 3114744Swnj ui = tjdinfo[tjunit]; 3124744Swnj sc = &tj_softc[tjunit]; 3134744Swnj /* note slave select, density, and format were merged on open */ 3144746Ssam addr->uttc = sc->sc_dens; 3154746Ssam sc->sc_dsreg = addr->utds; 3164746Ssam sc->sc_erreg = addr->uter; 31711176Ssam sc->sc_resid = MASKREG(addr->utfc); 3184744Swnj /* 3194744Swnj * Default is that last command was NOT a write command; 3204744Swnj * if we do a write command we will notice this in utintr(). 3214744Swnj */ 3224744Swnj sc->sc_lastiow = 0; 3234746Ssam if (sc->sc_openf < 0 || (addr->utds&UTDS_MOL) == 0) { 3244744Swnj /* 3254744Swnj * Have had a hard error on a non-raw tape 3264744Swnj * or the tape unit is now unavailable 3274744Swnj * (e.g. taken off line). 3284744Swnj */ 3294744Swnj bp->b_flags |= B_ERROR; 3304744Swnj goto next; 3314744Swnj } 3324744Swnj if (bp == &cutbuf[UTUNIT(bp->b_dev)]) { 3334744Swnj /* 3344744Swnj * Execute a control operation with the specified 3354744Swnj * count. 3364744Swnj */ 3374744Swnj if (bp->b_command == UT_SENSE) 3384744Swnj goto next; 33911176Ssam if (bp->b_command == UT_SFORW && (addr->utds & UTDS_EOT)) { 34011176Ssam bp->b_resid = bp->b_bcount; 34111176Ssam goto next; 34211176Ssam } 3434744Swnj /* 3444744Swnj * Set next state; handle timeouts 3454744Swnj */ 3464833Swnj if (bp->b_command == UT_REW) { 3474746Ssam um->um_tab.b_state = SREW; 3484833Swnj sc->sc_timo = 5*60; 3494833Swnj } else { 3504746Ssam um->um_tab.b_state = SCOM; 3514833Swnj sc->sc_timo = imin(imax(10*(int)-bp->b_repcnt,60),5*60); 3524833Swnj } 3534744Swnj /* NOTE: this depends on the ut command values */ 3544744Swnj if (bp->b_command >= UT_SFORW && bp->b_command <= UT_SREVF) 3554746Ssam addr->utfc = -bp->b_repcnt; 3564744Swnj goto dobpcmd; 3574744Swnj } 3584744Swnj /* 35934218Sbostic * For raw I/O, save the current block 36034218Sbostic * number in case we have to retry. 3614744Swnj */ 36234218Sbostic if (bp->b_flags & B_RAW) { 36334218Sbostic if (um->um_tab.b_errcnt == 0) { 36434218Sbostic sc->sc_blkno = bdbtofsb(bp->b_blkno); 36534218Sbostic sc->sc_nxrec = sc->sc_blkno + 1; 36634218Sbostic } 3674744Swnj } 36834218Sbostic else { 36934218Sbostic /* 37034218Sbostic * Handle boundary cases for operation 37134218Sbostic * on non-raw tapes. 37234218Sbostic */ 37334218Sbostic if (bdbtofsb(bp->b_blkno) > sc->sc_nxrec) { 37434218Sbostic /* can't read past end of file */ 37534218Sbostic bp->b_flags |= B_ERROR; 37634218Sbostic bp->b_error = ENXIO; 37734218Sbostic goto next; 37834218Sbostic } 37934218Sbostic if (bdbtofsb(bp->b_blkno) == sc->sc_nxrec && 38034218Sbostic (bp->b_flags&B_READ)) { 38134218Sbostic /* 38234218Sbostic * Reading at end of file returns 0 bytes. 38334218Sbostic */ 38434218Sbostic bp->b_resid = bp->b_bcount; 38534218Sbostic clrbuf(bp); 38634218Sbostic goto next; 38734218Sbostic } 38834218Sbostic if ((bp->b_flags&B_READ) == 0) 38934218Sbostic sc->sc_nxrec = bdbtofsb(bp->b_blkno) + 1; 3904744Swnj } 3914744Swnj /* 3924744Swnj * If the tape is correctly positioned, set up all the 3934744Swnj * registers but the csr, and give control over to the 3944744Swnj * UNIBUS adaptor routines, to wait for resources to 3954744Swnj * start I/O. 3964744Swnj */ 3977382Ssam if ((blkno = sc->sc_blkno) == bdbtofsb(bp->b_blkno)) { 3984746Ssam addr->utwc = -(((bp->b_bcount)+1)>>1); 3994746Ssam addr->utfc = -bp->b_bcount; 4004744Swnj if ((bp->b_flags&B_READ) == 0) { 4014744Swnj /* 4024744Swnj * On write error retries erase the 4034746Ssam * inter-record gap before rewriting. 4044744Swnj */ 4054746Ssam if (um->um_tab.b_errcnt) { 4064746Ssam if (um->um_tab.b_state != SERASED) { 4074759Swnj um->um_tab.b_state = SERASE; 4084833Swnj sc->sc_timo = 60; 4094746Ssam addr->utcs1 = UT_ERASE|UT_IE|UT_GO; 4104746Ssam return; 4114746Ssam } 4124746Ssam } 41311176Ssam if (addr->utds & UTDS_EOT) { 41411176Ssam bp->b_resid = bp->b_bcount; 41511176Ssam um->um_tab.b_state = 0; 41611176Ssam goto next; 41711176Ssam } 4184746Ssam um->um_cmd = UT_WCOM; 4194744Swnj } else 4204744Swnj um->um_cmd = UT_RCOM; 4214833Swnj sc->sc_timo = 60; 4224746Ssam um->um_tab.b_state = SIO; 4234744Swnj (void) ubago(ui); 4244744Swnj return; 4254744Swnj } 4264744Swnj /* 4274744Swnj * Tape positioned incorrectly; seek forwards or 4284744Swnj * backwards to the correct spot. This happens for 4294744Swnj * raw tapes only on error retries. 4304744Swnj */ 4314746Ssam um->um_tab.b_state = SSEEK; 4327382Ssam if (blkno < bdbtofsb(bp->b_blkno)) { 4337382Ssam addr->utfc = blkno - bdbtofsb(bp->b_blkno); 4344744Swnj bp->b_command = UT_SFORW; 4354744Swnj } else { 4367382Ssam addr->utfc = bdbtofsb(bp->b_blkno) - blkno; 4374744Swnj bp->b_command = UT_SREV; 4384744Swnj } 4394833Swnj sc->sc_timo = imin(imax(10 * -addr->utfc, 60), 5*60); 4404744Swnj 4414744Swnj dobpcmd: 4424744Swnj /* 4434744Swnj * Perform the command setup in bp. 4444744Swnj */ 4454746Ssam addr->utcs1 = bp->b_command|UT_IE|UT_GO; 4464744Swnj return; 4474744Swnj next: 4484744Swnj /* 4494744Swnj * Advance to the next command in the slave queue, 4504744Swnj * posting notice and releasing resources as needed. 4514744Swnj */ 4524744Swnj if (um->um_ubinfo) 4534744Swnj ubadone(um); 4544744Swnj um->um_tab.b_errcnt = 0; 4554744Swnj dp->b_actf = bp->av_forw; 4564744Swnj iodone(bp); 4574744Swnj goto loop; 4584744Swnj } 4594744Swnj 4604744Swnj /* 4614744Swnj * Start operation on controller -- 4624744Swnj * UNIBUS resources have been allocated. 4634744Swnj */ 4644744Swnj utdgo(um) 4654744Swnj register struct uba_ctlr *um; 4664744Swnj { 4674744Swnj register struct utdevice *addr = (struct utdevice *)um->um_addr; 4684744Swnj 4694744Swnj addr->utba = (u_short) um->um_ubinfo; 47011176Ssam addr->utcs1 = um->um_cmd|((um->um_ubinfo>>8)&0x300)|UT_IE|UT_GO; 4714744Swnj } 4724744Swnj 4734744Swnj /* 4744744Swnj * Ut interrupt handler 4754744Swnj */ 4764744Swnj /*ARGSUSED*/ 4774744Swnj utintr(ut11) 4784744Swnj int ut11; 4794744Swnj { 4804744Swnj struct buf *dp; 4814744Swnj register struct buf *bp; 4824744Swnj register struct uba_ctlr *um = utminfo[ut11]; 4834744Swnj register struct utdevice *addr; 4844744Swnj register struct tj_softc *sc; 4854746Ssam u_short tjunit, cs2, cs1; 4864744Swnj register state; 4874744Swnj 4884744Swnj if ((dp = um->um_tab.b_actf) == NULL) 4894744Swnj return; 4904744Swnj bp = dp->b_actf; 4914744Swnj tjunit = TJUNIT(bp->b_dev); 4924744Swnj addr = (struct utdevice *)tjdinfo[tjunit]->ui_addr; 4934744Swnj sc = &tj_softc[tjunit]; 4944744Swnj /* 4954744Swnj * Record status... 4964744Swnj */ 4974877Ssam sc->sc_timo = INF; 4984744Swnj sc->sc_dsreg = addr->utds; 4994744Swnj sc->sc_erreg = addr->uter; 50011176Ssam sc->sc_resid = MASKREG(addr->utfc); 5014746Ssam if ((bp->b_flags&B_READ) == 0) 5024744Swnj sc->sc_lastiow = 1; 5034746Ssam state = um->um_tab.b_state; 5044746Ssam um->um_tab.b_state = 0; 5054744Swnj /* 5064744Swnj * Check for errors... 5074744Swnj */ 5084744Swnj if ((addr->utds&UTDS_ERR) || (addr->utcs1&UT_TRE)) { 5094744Swnj /* 5104759Swnj * To clear the ERR bit, we must issue a drive clear 5114759Swnj * command, and to clear the TRE bit we must set the 5124759Swnj * controller clear bit. 5134759Swnj */ 5144759Swnj cs2 = addr->utcs2; 5154759Swnj if ((cs1 = addr->utcs1)&UT_TRE) 5164759Swnj addr->utcs2 |= UTCS2_CLR; 5174759Swnj /* is this dangerous ?? */ 5184759Swnj while ((addr->utcs1&UT_RDY) == 0) 5194759Swnj ; 5204759Swnj addr->utcs1 = UT_CLEAR|UT_GO; 5214759Swnj /* 52211176Ssam * If we were reading at 1600 or 6250 bpi and the error 52311176Ssam * was corrected, then don't consider this an error. 5244744Swnj */ 52511190Ssam if (sc->sc_erreg & UTER_COR && (bp->b_flags & B_READ) && 52611176Ssam (addr->uttc & UTTC_DEN) != UT_NRZI) { 52740045Smarc tprintf(sc->sc_ctty, 52811176Ssam "ut%d: soft error bn%d cs1=%b er=%b cs2=%b ds=%b\n", 52911176Ssam tjunit, bp->b_blkno, cs1, UT_BITS, sc->sc_erreg, 53011176Ssam UTER_BITS, cs2, UTCS2_BITS, sc->sc_dsreg, UTDS_BITS); 53111176Ssam sc->sc_erreg &= ~UTER_COR; 5324744Swnj } 5334744Swnj /* 5344744Swnj * If we were reading from a raw tape and the only error 5354744Swnj * was that the record was too long, then we don't consider 5364744Swnj * this an error. 5374744Swnj */ 53834218Sbostic if ((bp->b_flags & (B_READ|B_RAW)) == (B_READ|B_RAW) && 5394744Swnj (sc->sc_erreg&UTER_FCE)) 54011176Ssam sc->sc_erreg &= ~UTER_FCE; 54111197Slayer if (sc->sc_erreg == 0) 5424744Swnj goto ignoreerr; 5434744Swnj /* 54411176Ssam * Fix up errors which occur due to backspacing 54511176Ssam * "over" the front of the tape. 5464746Ssam */ 54711176Ssam if ((sc->sc_dsreg & UTDS_BOT) && bp->b_command == UT_SREV && 5484746Ssam ((sc->sc_erreg &= ~(UTER_NEF|UTER_FCE)) == 0)) 5494746Ssam goto opdone; 5504746Ssam /* 5514744Swnj * Retry soft errors up to 8 times 5524744Swnj */ 5534744Swnj if ((sc->sc_erreg&UTER_HARD) == 0 && state == SIO) { 5544744Swnj if (++um->um_tab.b_errcnt < 7) { 5554744Swnj sc->sc_blkno++; 5564744Swnj ubadone(um); 5574744Swnj goto opcont; 5584744Swnj } 55911176Ssam } 5604744Swnj /* 56111176Ssam * Hard or non-I/O errors on non-raw tape 56211176Ssam * cause it to close. 56311176Ssam */ 56434218Sbostic if ((bp->b_flags&B_RAW) == 0 && sc->sc_openf > 0) 56511176Ssam sc->sc_openf = -1; 56611176Ssam /* 5674744Swnj * Couldn't recover error. 5684744Swnj */ 56940045Smarc tprintf(sc->sc_ctty, 57018323Sralph "ut%d: hard error bn%d cs1=%b er=%b cs2=%b ds=%b\n", 5714746Ssam tjunit, bp->b_blkno, cs1, UT_BITS, sc->sc_erreg, 5724746Ssam UTER_BITS, cs2, UTCS2_BITS, sc->sc_dsreg, UTDS_BITS); 5734744Swnj bp->b_flags |= B_ERROR; 5744744Swnj goto opdone; 5754744Swnj } 57611176Ssam 5774744Swnj ignoreerr: 5784744Swnj /* 57911176Ssam * If we hit a tape mark update our position. 58011176Ssam */ 58111176Ssam if (sc->sc_dsreg & UTDS_TM && bp->b_flags & B_READ) { 58211176Ssam /* 58311176Ssam * Set blkno and nxrec 58411176Ssam */ 58511176Ssam if (bp == &cutbuf[UTUNIT(bp->b_dev)]) { 58611176Ssam if (sc->sc_blkno > bdbtofsb(bp->b_blkno)) { 58711176Ssam sc->sc_nxrec = 58811176Ssam bdbtofsb(bp->b_blkno) - addr->utfc; 58911176Ssam sc->sc_blkno = sc->sc_nxrec; 59011176Ssam } else { 59111176Ssam sc->sc_blkno = 59211176Ssam bdbtofsb(bp->b_blkno) + addr->utfc; 59311176Ssam sc->sc_nxrec = sc->sc_blkno-1; 59411176Ssam } 59511176Ssam } else 59611176Ssam sc->sc_nxrec = bdbtofsb(bp->b_blkno); 59711176Ssam /* 59811176Ssam * Note: if we get a tape mark on a read, the 59911176Ssam * frame count register will be zero, so b_resid 60011176Ssam * will be calculated correctly below. 60111176Ssam */ 60211176Ssam goto opdone; 60311176Ssam } 60411176Ssam /* 6054744Swnj * Advance tape control FSM. 6064744Swnj */ 6074744Swnj switch (state) { 6084744Swnj 6094744Swnj case SIO: /* read/write increments tape block # */ 6104744Swnj sc->sc_blkno++; 61130917Skarels sc->sc_blks++; 61230917Skarels if (um->um_tab.b_errcnt) 61330917Skarels sc->sc_softerrs++; 6144746Ssam break; 6154744Swnj 61611176Ssam case SCOM: /* motion commands update current position */ 6174744Swnj if (bp == &cutbuf[UTUNIT(bp->b_dev)]) 61826296Skarels switch ((int)bp->b_command) { 6194744Swnj 6204744Swnj case UT_SFORW: 6214744Swnj sc->sc_blkno -= bp->b_repcnt; 6224744Swnj break; 6234744Swnj 6244744Swnj case UT_SREV: 6254744Swnj sc->sc_blkno += bp->b_repcnt; 6264744Swnj break; 62711176Ssam 62811176Ssam case UT_REWOFFL: 62911176Ssam addr->utcs1 = UT_CLEAR|UT_GO; 63011176Ssam break; 6314744Swnj } 6324746Ssam break; 6334744Swnj 6344744Swnj case SSEEK: 6357382Ssam sc->sc_blkno = bdbtofsb(bp->b_blkno); 6364744Swnj goto opcont; 6374744Swnj 6384746Ssam case SERASE: 6394746Ssam /* 6404746Ssam * Completed erase of the inter-record gap due to a 6414746Ssam * write error; now retry the write operation. 6424746Ssam */ 6434746Ssam um->um_tab.b_state = SERASED; 6444746Ssam goto opcont; 6454746Ssam 6464746Ssam case SREW: /* clear attention bit */ 6474746Ssam addr->utcs1 = UT_CLEAR|UT_GO; 6484746Ssam break; 6494746Ssam 6504744Swnj default: 6514746Ssam printf("bad state %d\n", state); 6524744Swnj panic("utintr"); 6534744Swnj } 6544744Swnj 6554744Swnj opdone: 6564744Swnj /* 6574744Swnj * Reset error count and remove 6584744Swnj * from device queue 6594744Swnj */ 6604744Swnj um->um_tab.b_errcnt = 0; 6614746Ssam dp->b_actf = bp->av_forw; 66211176Ssam /* 66311176Ssam * For read command, frame count register contains 66411176Ssam * actual length of tape record. Otherwise, it 66511176Ssam * holds negative residual count. 66611176Ssam */ 66711176Ssam if (state == SIO && um->um_cmd == UT_RCOM) { 66811176Ssam bp->b_resid = 0; 66911176Ssam if (bp->b_bcount > MASKREG(addr->utfc)) 67011176Ssam bp->b_resid = bp->b_bcount - MASKREG(addr->utfc); 67111176Ssam } else 67211176Ssam bp->b_resid = MASKREG(-addr->utfc); 6734744Swnj ubadone(um); 6744744Swnj iodone(bp); 6754744Swnj /* 6764744Swnj * Circulate slave to end of controller queue 6774744Swnj * to give other slaves a chance 6784744Swnj */ 6794744Swnj um->um_tab.b_actf = dp->b_forw; 6804744Swnj if (dp->b_actf) { 6814744Swnj dp->b_forw = NULL; 6824744Swnj if (um->um_tab.b_actf == NULL) 6834744Swnj um->um_tab.b_actf = dp; 6844744Swnj else 6854744Swnj um->um_tab.b_actl->b_forw = dp; 6864744Swnj um->um_tab.b_actl = dp; 6874744Swnj } 6884744Swnj if (um->um_tab.b_actf == 0) 6894744Swnj return; 6904744Swnj opcont: 6914744Swnj utstart(um); 6924744Swnj } 6934744Swnj 6944744Swnj /* 6954833Swnj * Watchdog timer routine. 6964833Swnj */ 6974833Swnj uttimer(dev) 6984833Swnj int dev; 6994833Swnj { 7004833Swnj register struct tj_softc *sc = &tj_softc[TJUNIT(dev)]; 7014846Sroot register short x; 7024833Swnj 7034833Swnj if (sc->sc_timo != INF && (sc->sc_timo -= 5) < 0) { 7044859Ssam printf("tj%d: lost interrupt\n", TJUNIT(dev)); 7054833Swnj sc->sc_timo = INF; 7064846Sroot x = spl5(); 7074833Swnj utintr(UTUNIT(dev)); 7084846Sroot (void) splx(x); 7094833Swnj } 7104833Swnj timeout(uttimer, (caddr_t)dev, 5*hz); 7114833Swnj } 7124833Swnj 7134744Swnj /*ARGSUSED*/ 7147634Ssam utioctl(dev, cmd, data, flag) 7154744Swnj dev_t dev; 7167634Ssam caddr_t data; 7174744Swnj { 7184744Swnj register struct tj_softc *sc = &tj_softc[TJUNIT(dev)]; 7194744Swnj register struct buf *bp = &cutbuf[UTUNIT(dev)]; 7204744Swnj register callcount; 7214744Swnj int fcount; 7227634Ssam struct mtop *mtop; 7237634Ssam struct mtget *mtget; 7244744Swnj /* we depend of the values and order of the MT codes here */ 7254744Swnj static utops[] = 7264744Swnj {UT_WEOF,UT_SFORWF,UT_SREVF,UT_SFORW,UT_SREV,UT_REW,UT_REWOFFL,UT_SENSE}; 7274744Swnj 7284744Swnj switch (cmd) { 7294744Swnj 7304744Swnj case MTIOCTOP: 7317634Ssam mtop = (struct mtop *)data; 7327634Ssam switch(mtop->mt_op) { 7334744Swnj 7344744Swnj case MTWEOF: 73511413Ssam case MTFSF: case MTBSF: 73611413Ssam case MTFSR: case MTBSR: 7377634Ssam callcount = mtop->mt_count; 7384744Swnj fcount = 1; 7394744Swnj break; 7404744Swnj 7414744Swnj case MTREW: case MTOFFL: case MTNOP: 7424744Swnj callcount = 1; 7434744Swnj fcount = 1; 7444744Swnj break; 7454744Swnj 7464744Swnj default: 7478577Sroot return (ENXIO); 7484744Swnj } 7498577Sroot if (callcount <= 0 || fcount <= 0) 7508577Sroot return (EINVAL); 7514744Swnj while (--callcount >= 0) { 7527634Ssam utcommand(dev, utops[mtop->mt_op], fcount); 7534744Swnj if ((bp->b_flags&B_ERROR) || (sc->sc_dsreg&UTDS_BOT)) 7544744Swnj break; 7554744Swnj } 7568650Sroot return (geterror(bp)); 7574744Swnj 7584744Swnj case MTIOCGET: 7597634Ssam mtget = (struct mtget *)data; 7607634Ssam mtget->mt_dsreg = sc->sc_dsreg; 7617634Ssam mtget->mt_erreg = sc->sc_erreg; 7627634Ssam mtget->mt_resid = sc->sc_resid; 7637634Ssam mtget->mt_type = MT_ISUT; 7648577Sroot break; 7654744Swnj 7664744Swnj default: 7678577Sroot return (ENXIO); 7684744Swnj } 7698577Sroot return (0); 7704744Swnj } 7714744Swnj 7724744Swnj utreset(uban) 7734744Swnj int uban; 7744744Swnj { 7754744Swnj register struct uba_ctlr *um; 7764744Swnj register ut11, tjunit; 7774744Swnj register struct uba_device *ui; 7784744Swnj register struct buf *dp; 7794744Swnj 7804744Swnj for (ut11 = 0; ut11 < NUT; ut11++) { 7814744Swnj if ((um = utminfo[ut11]) == 0 || um->um_alive == 0 || 7824744Swnj um->um_ubanum != uban) 7834744Swnj continue; 7844744Swnj printf(" ut%d", ut11); 7854746Ssam um->um_tab.b_state = 0; 7864744Swnj um->um_tab.b_actf = um->um_tab.b_actl = 0; 7874744Swnj if (um->um_ubinfo) { 7884744Swnj printf("<%d>", (um->um_ubinfo>>28)&0xf); 7899358Ssam um->um_ubinfo = 0; 7904744Swnj } 7914744Swnj ((struct utdevice *)(um->um_addr))->utcs1 = UT_CLEAR|UT_GO; 7924746Ssam ((struct utdevice *)(um->um_addr))->utcs2 |= UTCS2_CLR; 7934744Swnj for (tjunit = 0; tjunit < NTJ; tjunit++) { 7944744Swnj if ((ui = tjdinfo[tjunit]) == 0 || ui->ui_mi != um || 7954744Swnj ui->ui_alive == 0) 7964744Swnj continue; 7974744Swnj dp = &tjutab[tjunit]; 7984746Ssam dp->b_state = 0; 7994744Swnj dp->b_forw = 0; 8004744Swnj if (um->um_tab.b_actf == NULL) 8014744Swnj um->um_tab.b_actf = dp; 8024744Swnj else 8034744Swnj um->um_tab.b_actl->b_forw = dp; 8044744Swnj um->um_tab.b_actl = dp; 8054744Swnj if (tj_softc[tjunit].sc_openf > 0) 8064744Swnj tj_softc[tjunit].sc_openf = -1; 8074744Swnj } 8084744Swnj utstart(um); 8094744Swnj } 8104744Swnj } 8114744Swnj 8124744Swnj /* 8134744Swnj * Do a stand-alone core dump to tape -- 8144744Swnj * from here down, routines are used only in dump context 8154744Swnj */ 8164744Swnj #define DBSIZE 20 8174744Swnj 8184744Swnj utdump() 8194744Swnj { 8204744Swnj register struct uba_device *ui; 8214744Swnj register struct uba_regs *up; 8224746Ssam register struct utdevice *addr; 8234744Swnj int blk, num = maxfree; 8244744Swnj int start = 0; 8254744Swnj 8264744Swnj #define phys(a,b) ((b)((int)(a)&0x7fffffff)) 8274744Swnj if (tjdinfo[0] == 0) 8284744Swnj return (ENXIO); 8294744Swnj ui = phys(tjdinfo[0], struct uba_device *); 8304744Swnj up = phys(ui->ui_hd, struct uba_hd *)->uh_physuba; 8314941Swnj ubainit(up); 8324744Swnj DELAY(1000000); 8334941Swnj addr = (struct utdevice *)ui->ui_physaddr; 8344746Ssam utwait(addr); 8354746Ssam /* 8364746Ssam * Be sure to set the appropriate density here. We use 8374746Ssam * 6250, but maybe it should be done at 1600 to insure the 8384746Ssam * tape can be read by most any other tape drive available. 8394746Ssam */ 8404746Ssam addr->uttc = UT_GCR|PDP11FMT; /* implicit slave 0 or-ed in */ 8414746Ssam addr->utcs1 = UT_CLEAR|UT_GO; 8424744Swnj while (num > 0) { 8434744Swnj blk = num > DBSIZE ? DBSIZE : num; 8444746Ssam utdwrite(start, blk, addr, up); 8454746Ssam if ((addr->utds&UTDS_ERR) || (addr->utcs1&UT_TRE)) 8464746Ssam return(EIO); 8474744Swnj start += blk; 8484744Swnj num -= blk; 8494744Swnj } 8504746Ssam uteof(addr); 8514746Ssam uteof(addr); 8524746Ssam utwait(addr); 8534746Ssam if ((addr->utds&UTDS_ERR) || (addr->utcs1&UT_TRE)) 8544744Swnj return(EIO); 8554746Ssam addr->utcs1 = UT_REW|UT_GO; 8564744Swnj return (0); 8574744Swnj } 8584744Swnj 8594746Ssam utdwrite(dbuf, num, addr, up) 8604744Swnj register dbuf, num; 8614746Ssam register struct utdevice *addr; 8624744Swnj struct uba_regs *up; 8634744Swnj { 8644744Swnj register struct pte *io; 8654744Swnj register int npf; 8664744Swnj 8674746Ssam utwait(addr); 8684744Swnj io = up->uba_map; 8694744Swnj npf = num + 1; 8704744Swnj while (--npf != 0) 8714744Swnj *(int *)io++ = (dbuf++ | (1<<UBAMR_DPSHIFT) | UBAMR_MRV); 8724744Swnj *(int *)io = 0; 8734746Ssam addr->utwc = -((num*NBPG)>>1); 8744746Ssam addr->utfc = -(num*NBPG); 8754746Ssam addr->utba = 0; 8764746Ssam addr->utcs1 = UT_WCOM|UT_GO; 8774744Swnj } 8784744Swnj 8794746Ssam utwait(addr) 8804746Ssam struct utdevice *addr; 8814744Swnj { 8824744Swnj register s; 8834744Swnj 8844744Swnj do 8854746Ssam s = addr->utds; 8864744Swnj while ((s&UTDS_DRY) == 0); 8874744Swnj } 8884744Swnj 8894746Ssam uteof(addr) 8904746Ssam struct utdevice *addr; 8914744Swnj { 8924744Swnj 8934746Ssam utwait(addr); 8944746Ssam addr->utcs1 = UT_WEOF|UT_GO; 8954744Swnj } 8964744Swnj #endif 897