xref: /csrg-svn/sys/vax/uba/up.c (revision 6953)
1*6953Swnj /*	up.c	4.53	82/05/27	*/
2264Sbill 
31937Swnj #include "up.h"
42646Swnj #if NSC > 0
5264Sbill /*
6885Sbill  * UNIBUS disk driver with overlapped seeks and ECC recovery.
72889Swnj  *
82889Swnj  * TODO:
92889Swnj  *	Add bad sector forwarding code
103445Sroot  *	Check that offset recovery code works
11264Sbill  */
12264Sbill 
13264Sbill #include "../h/param.h"
14264Sbill #include "../h/systm.h"
152395Swnj #include "../h/cpu.h"
162395Swnj #include "../h/nexus.h"
17308Sbill #include "../h/dk.h"
18264Sbill #include "../h/buf.h"
19264Sbill #include "../h/conf.h"
20264Sbill #include "../h/dir.h"
21264Sbill #include "../h/user.h"
22264Sbill #include "../h/map.h"
23420Sbill #include "../h/pte.h"
24264Sbill #include "../h/mtpr.h"
252571Swnj #include "../h/vm.h"
262983Swnj #include "../h/ubavar.h"
272983Swnj #include "../h/ubareg.h"
282379Swnj #include "../h/cmap.h"
29264Sbill 
302379Swnj #include "../h/upreg.h"
31264Sbill 
322395Swnj struct	up_softc {
332395Swnj 	int	sc_softas;
342607Swnj 	int	sc_ndrive;
352395Swnj 	int	sc_wticks;
362674Swnj 	int	sc_recal;
372646Swnj } up_softc[NSC];
38275Sbill 
392395Swnj /* THIS SHOULD BE READ OFF THE PACK, PER DRIVE */
40264Sbill struct	size
41264Sbill {
42264Sbill 	daddr_t	nblocks;
43264Sbill 	int	cyloff;
44264Sbill } up_sizes[8] = {
456436Swnj #ifdef ERNIE
466436Swnj 	49324,	0,		/* A=cyl 0 thru 26 */
476436Swnj #else
48264Sbill 	15884,	0,		/* A=cyl 0 thru 26 */
496436Swnj #endif
50264Sbill 	33440,	27,		/* B=cyl 27 thru 81 */
51341Sbill 	495520,	0,		/* C=cyl 0 thru 814 */
52264Sbill 	15884,	562,		/* D=cyl 562 thru 588 */
53264Sbill 	55936,	589,		/* E=cyl 589 thru 680 */
543730Sroot #ifndef NOBADSECT
553730Sroot 	81376,	681,		/* F=cyl 681 thru 814 */
563730Sroot 	153728,	562,		/* G=cyl 562 thru 814 */
573730Sroot #else
583730Sroot 	81472,	681,
593730Sroot 	153824,	562,
603730Sroot #endif
61264Sbill 	291346,	82,		/* H=cyl 82 thru 561 */
622395Swnj }, fj_sizes[8] = {
632395Swnj 	15884,	0,		/* A=cyl 0 thru 49 */
642395Swnj 	33440,	50,		/* B=cyl 50 thru 154 */
652395Swnj 	263360,	0,		/* C=cyl 0 thru 822 */
662395Swnj 	0,	0,
672395Swnj 	0,	0,
682395Swnj 	0,	0,
692395Swnj 	0,	0,
703730Sroot #ifndef NOBADSECT
713730Sroot 	213664,	155,		/* H=cyl 155 thru 822 */
723730Sroot #else
733730Sroot 	213760,	155,
743730Sroot #endif
756851Ssam }, upam_sizes[8] = {
766305Sroot 	15884,	0,		/* A=cyl 0 thru 31 */
776305Sroot 	33440,	32,		/* B=cyl 32 thru 97 */
786305Sroot 	524288,	0,		/* C=cyl 0 thru 1023 */
796602Ssam 	27786,	668,
806602Ssam 	27786,	723,
816602Ssam 	125440,	778,
826305Sroot 	181760,	668,		/* G=cyl 668 thru 1022 */
836305Sroot 	291346,	98,		/* H=cyl 98 thru 667 */
84264Sbill };
852395Swnj /* END OF STUFF WHICH SHOULD BE READ IN PER DISK */
86264Sbill 
876346Swnj /*
886346Swnj  * On a 780 upSDIST could be 2, but
896346Swnj  * in the interest of 750's...
906346Swnj  */
916346Swnj #define	_upSDIST	3		/* 1.5 msec */
922395Swnj #define	_upRDIST	4		/* 2.0 msec */
93264Sbill 
942395Swnj int	upSDIST = _upSDIST;
952395Swnj int	upRDIST = _upRDIST;
962395Swnj 
972607Swnj int	upprobe(), upslave(), upattach(), updgo(), upintr();
982983Swnj struct	uba_ctlr *upminfo[NSC];
992983Swnj struct	uba_device *updinfo[NUP];
1006383Swnj #define	UPIPUNITS	8
1016383Swnj struct	uba_device *upip[NSC][UPIPUNITS]; /* fuji w/fixed head gives n,n+4 */
1022395Swnj 
1032607Swnj u_short	upstd[] = { 0776700, 0774400, 0776300, 0 };
1042616Swnj struct	uba_driver scdriver =
1052607Swnj     { upprobe, upslave, upattach, updgo, upstd, "up", updinfo, "sc", upminfo };
1062395Swnj struct	buf	uputab[NUP];
1072395Swnj 
1082395Swnj struct	upst {
1092395Swnj 	short	nsect;
1102395Swnj 	short	ntrak;
1112395Swnj 	short	nspc;
1122395Swnj 	short	ncyl;
1132395Swnj 	struct	size *sizes;
1142395Swnj } upst[] = {
1152607Swnj 	32,	19,	32*19,	823,	up_sizes,	/* 9300/cdc */
1162607Swnj /* 9300 actually has 815 cylinders... */
1172395Swnj 	32,	10,	32*10,	823,	fj_sizes,	/* fujitsu 160m */
1186851Ssam 	32,	16,	32*16,	1024,	upam_sizes,	/* ampex capricorn */
1192395Swnj };
1202395Swnj 
1212629Swnj u_char	up_offset[16] = {
1223445Sroot     UPOF_P400, UPOF_M400, UPOF_P400, UPOF_M400,
1233445Sroot     UPOF_P800, UPOF_M800, UPOF_P800, UPOF_M800,
1243445Sroot     UPOF_P1200, UPOF_M1200, UPOF_P1200, UPOF_M1200,
1253445Sroot     0, 0, 0, 0
1262629Swnj };
127264Sbill 
1282616Swnj struct	buf	rupbuf[NUP];
129264Sbill 
130264Sbill #define	b_cylin b_resid
131264Sbill 
132264Sbill #ifdef INTRLVE
133264Sbill daddr_t dkblock();
134264Sbill #endif
1352395Swnj 
1362395Swnj int	upwstart, upwatch();		/* Have started guardian */
1372470Swnj int	upseek;
1382681Swnj int	upwaitdry;
1392395Swnj 
1402395Swnj /*ARGSUSED*/
1412607Swnj upprobe(reg)
1422395Swnj 	caddr_t reg;
1432395Swnj {
1442459Swnj 	register int br, cvec;
1452459Swnj 
1462607Swnj #ifdef lint
1472607Swnj 	br = 0; cvec = br; br = cvec;
1482607Swnj #endif
1492629Swnj 	((struct updevice *)reg)->upcs1 = UP_IE|UP_RDY;
1502607Swnj 	DELAY(10);
1512629Swnj 	((struct updevice *)reg)->upcs1 = 0;
1522459Swnj 	return (1);
1532395Swnj }
1542395Swnj 
1552607Swnj upslave(ui, reg)
1562983Swnj 	struct uba_device *ui;
1572395Swnj 	caddr_t reg;
1582395Swnj {
1592629Swnj 	register struct updevice *upaddr = (struct updevice *)reg;
1602395Swnj 
1612395Swnj 	upaddr->upcs1 = 0;		/* conservative */
1622607Swnj 	upaddr->upcs2 = ui->ui_slave;
1636843Swnj 	upaddr->upcs1 = UP_NOP|UP_GO;
1643445Sroot 	if (upaddr->upcs2&UPCS2_NED) {
1652629Swnj 		upaddr->upcs1 = UP_DCLR|UP_GO;
1662395Swnj 		return (0);
1672395Swnj 	}
1682607Swnj 	return (1);
1692607Swnj }
1702607Swnj 
1712607Swnj upattach(ui)
1722983Swnj 	register struct uba_device *ui;
1732607Swnj {
1742629Swnj 	register struct updevice *upaddr;
1752607Swnj 
1762395Swnj 	if (upwstart == 0) {
1772759Swnj 		timeout(upwatch, (caddr_t)0, hz);
1782395Swnj 		upwstart++;
1792395Swnj 	}
1802571Swnj 	if (ui->ui_dk >= 0)
1812571Swnj 		dk_mspw[ui->ui_dk] = .0000020345;
1822607Swnj 	upip[ui->ui_ctlr][ui->ui_slave] = ui;
1832607Swnj 	up_softc[ui->ui_ctlr].sc_ndrive++;
1842629Swnj 	upaddr = (struct updevice *)ui->ui_addr;
1852629Swnj 	upaddr->upcs1 = 0;
1862629Swnj 	upaddr->upcs2 = ui->ui_slave;
1873496Sroot 	upaddr->uphr = UPHR_MAXTRAK;
1883553Swnj 	if (upaddr->uphr == 9)
1893496Sroot 		ui->ui_type = 1;		/* fujitsu hack */
1906305Sroot 	else if (upaddr->uphr == 15)
1916305Sroot 		ui->ui_type = 2;		/* ampex hack */
1923496Sroot 	upaddr->upcs2 = UPCS2_CLR;
1933496Sroot /*
1943496Sroot 	upaddr->uphr = UPHR_MAXCYL;
1953496Sroot 	printf("maxcyl %d\n", upaddr->uphr);
1963496Sroot 	upaddr->uphr = UPHR_MAXTRAK;
1973496Sroot 	printf("maxtrak %d\n", upaddr->uphr);
1983496Sroot 	upaddr->uphr = UPHR_MAXSECT;
1993496Sroot 	printf("maxsect %d\n", upaddr->uphr);
2003496Sroot */
2012395Swnj }
202264Sbill 
203264Sbill upstrategy(bp)
2042395Swnj 	register struct buf *bp;
205264Sbill {
2062983Swnj 	register struct uba_device *ui;
2072395Swnj 	register struct upst *st;
2082395Swnj 	register int unit;
2092470Swnj 	register struct buf *dp;
2102395Swnj 	int xunit = minor(bp->b_dev) & 07;
2112470Swnj 	long bn, sz;
212264Sbill 
2132470Swnj 	sz = (bp->b_bcount+511) >> 9;
214264Sbill 	unit = dkunit(bp);
2152395Swnj 	if (unit >= NUP)
2162395Swnj 		goto bad;
2172395Swnj 	ui = updinfo[unit];
2182395Swnj 	if (ui == 0 || ui->ui_alive == 0)
2192395Swnj 		goto bad;
2202395Swnj 	st = &upst[ui->ui_type];
2212395Swnj 	if (bp->b_blkno < 0 ||
2222395Swnj 	    (bn = dkblock(bp))+sz > st->sizes[xunit].nblocks)
2232395Swnj 		goto bad;
2242395Swnj 	bp->b_cylin = bn/st->nspc + st->sizes[xunit].cyloff;
2256305Sroot 	(void) spl5();
2262470Swnj 	dp = &uputab[ui->ui_unit];
2272470Swnj 	disksort(dp, bp);
2282470Swnj 	if (dp->b_active == 0) {
2292395Swnj 		(void) upustart(ui);
2302395Swnj 		bp = &ui->ui_mi->um_tab;
2312395Swnj 		if (bp->b_actf && bp->b_active == 0)
2322395Swnj 			(void) upstart(ui->ui_mi);
233264Sbill 	}
2346305Sroot 	(void) spl0();
2352395Swnj 	return;
2362395Swnj 
2372395Swnj bad:
2382395Swnj 	bp->b_flags |= B_ERROR;
2392395Swnj 	iodone(bp);
2402395Swnj 	return;
241264Sbill }
242264Sbill 
2432674Swnj /*
2442674Swnj  * Unit start routine.
2452674Swnj  * Seek the drive to be where the data is
2462674Swnj  * and then generate another interrupt
2472674Swnj  * to actually start the transfer.
2482674Swnj  * If there is only one drive on the controller,
2492674Swnj  * or we are very close to the data, don't
2502674Swnj  * bother with the search.  If called after
2512674Swnj  * searching once, don't bother to look where
2522674Swnj  * we are, just queue for transfer (to avoid
2532674Swnj  * positioning forever without transferrring.)
2542674Swnj  */
2552395Swnj upustart(ui)
2562983Swnj 	register struct uba_device *ui;
257264Sbill {
258264Sbill 	register struct buf *bp, *dp;
2592983Swnj 	register struct uba_ctlr *um;
2602629Swnj 	register struct updevice *upaddr;
2612395Swnj 	register struct upst *st;
262264Sbill 	daddr_t bn;
2632674Swnj 	int sn, csn;
2642607Swnj 	/*
2652607Swnj 	 * The SC21 cancels commands if you just say
2662629Swnj 	 *	cs1 = UP_IE
2672607Swnj 	 * so we are cautious about handling of cs1.
2682607Swnj 	 * Also don't bother to clear as bits other than in upintr().
2692607Swnj 	 */
2702674Swnj 	int didie = 0;
2712674Swnj 
2722674Swnj 	if (ui == 0)
2732674Swnj 		return (0);
2742983Swnj 	um = ui->ui_mi;
2752395Swnj 	dk_busy &= ~(1<<ui->ui_dk);
2762395Swnj 	dp = &uputab[ui->ui_unit];
277266Sbill 	if ((bp = dp->b_actf) == NULL)
278268Sbill 		goto out;
2792674Swnj 	/*
2802674Swnj 	 * If the controller is active, just remember
2812674Swnj 	 * that this device would like to be positioned...
2822674Swnj 	 * if we tried to position now we would confuse the SC21.
2832674Swnj 	 */
2842395Swnj 	if (um->um_tab.b_active) {
2852459Swnj 		up_softc[um->um_ctlr].sc_softas |= 1<<ui->ui_slave;
286275Sbill 		return (0);
287275Sbill 	}
2882674Swnj 	/*
2892674Swnj 	 * If we have already positioned this drive,
2902674Swnj 	 * then just put it on the ready queue.
2912674Swnj 	 */
292276Sbill 	if (dp->b_active)
293276Sbill 		goto done;
294276Sbill 	dp->b_active = 1;
2952629Swnj 	upaddr = (struct updevice *)um->um_addr;
2962395Swnj 	upaddr->upcs2 = ui->ui_slave;
2972674Swnj 	/*
2982674Swnj 	 * If drive has just come up,
2992674Swnj 	 * setup the pack.
3002674Swnj 	 */
3013445Sroot 	if ((upaddr->upds & UPDS_VV) == 0) {
3022607Swnj 		/* SHOULD WARN SYSTEM THAT THIS HAPPENED */
3032629Swnj 		upaddr->upcs1 = UP_IE|UP_DCLR|UP_GO;
3042629Swnj 		upaddr->upcs1 = UP_IE|UP_PRESET|UP_GO;
3053445Sroot 		upaddr->upof = UPOF_FMT22;
306268Sbill 		didie = 1;
307264Sbill 	}
3082674Swnj 	/*
3092674Swnj 	 * If drive is offline, forget about positioning.
3102674Swnj 	 */
3113445Sroot 	if ((upaddr->upds & (UPDS_DPR|UPDS_MOL)) != (UPDS_DPR|UPDS_MOL))
312275Sbill 		goto done;
3132674Swnj 	/*
3142674Swnj 	 * If there is only one drive,
3152674Swnj 	 * dont bother searching.
3162674Swnj 	 */
3172607Swnj 	if (up_softc[um->um_ctlr].sc_ndrive == 1)
3182607Swnj 		goto done;
3192674Swnj 	/*
3202674Swnj 	 * Figure out where this transfer is going to
3212674Swnj 	 * and see if we are close enough to justify not searching.
3222674Swnj 	 */
3232395Swnj 	st = &upst[ui->ui_type];
324264Sbill 	bn = dkblock(bp);
3252395Swnj 	sn = bn%st->nspc;
3262395Swnj 	sn = (sn + st->nsect - upSDIST) % st->nsect;
3272674Swnj 	if (bp->b_cylin - upaddr->updc)
328266Sbill 		goto search;		/* Not on-cylinder */
329275Sbill 	else if (upseek)
330275Sbill 		goto done;		/* Ok just to be on-cylinder */
331264Sbill 	csn = (upaddr->upla>>6) - sn - 1;
332266Sbill 	if (csn < 0)
3332395Swnj 		csn += st->nsect;
3342395Swnj 	if (csn > st->nsect - upRDIST)
335264Sbill 		goto done;
336264Sbill search:
3372674Swnj 	upaddr->updc = bp->b_cylin;
3382674Swnj 	/*
3392674Swnj 	 * Not on cylinder at correct position,
3402674Swnj 	 * seek/search.
3412674Swnj 	 */
342275Sbill 	if (upseek)
3432629Swnj 		upaddr->upcs1 = UP_IE|UP_SEEK|UP_GO;
3442470Swnj 	else {
345275Sbill 		upaddr->upda = sn;
3462629Swnj 		upaddr->upcs1 = UP_IE|UP_SEARCH|UP_GO;
347275Sbill 	}
348268Sbill 	didie = 1;
3492674Swnj 	/*
3502674Swnj 	 * Mark unit busy for iostat.
3512674Swnj 	 */
3522395Swnj 	if (ui->ui_dk >= 0) {
3532395Swnj 		dk_busy |= 1<<ui->ui_dk;
3542395Swnj 		dk_seek[ui->ui_dk]++;
355264Sbill 	}
356268Sbill 	goto out;
357264Sbill done:
3582674Swnj 	/*
3592674Swnj 	 * Device is ready to go.
3602674Swnj 	 * Put it on the ready queue for the controller
3612674Swnj 	 * (unless its already there.)
3622674Swnj 	 */
3632629Swnj 	if (dp->b_active != 2) {
3642629Swnj 		dp->b_forw = NULL;
3652629Swnj 		if (um->um_tab.b_actf == NULL)
3662629Swnj 			um->um_tab.b_actf = dp;
3672629Swnj 		else
3682629Swnj 			um->um_tab.b_actl->b_forw = dp;
3692629Swnj 		um->um_tab.b_actl = dp;
3702629Swnj 		dp->b_active = 2;
3712629Swnj 	}
372268Sbill out:
373268Sbill 	return (didie);
374264Sbill }
375264Sbill 
3762674Swnj /*
3772674Swnj  * Start up a transfer on a drive.
3782674Swnj  */
3792395Swnj upstart(um)
3802983Swnj 	register struct uba_ctlr *um;
381264Sbill {
382264Sbill 	register struct buf *bp, *dp;
3832983Swnj 	register struct uba_device *ui;
3842629Swnj 	register struct updevice *upaddr;
3852470Swnj 	struct upst *st;
386264Sbill 	daddr_t bn;
3872681Swnj 	int dn, sn, tn, cmd, waitdry;
388264Sbill 
389264Sbill loop:
3902674Swnj 	/*
3912674Swnj 	 * Pull a request off the controller queue
3922674Swnj 	 */
3932395Swnj 	if ((dp = um->um_tab.b_actf) == NULL)
394268Sbill 		return (0);
395264Sbill 	if ((bp = dp->b_actf) == NULL) {
3962395Swnj 		um->um_tab.b_actf = dp->b_forw;
397264Sbill 		goto loop;
398264Sbill 	}
3992674Swnj 	/*
4002674Swnj 	 * Mark controller busy, and
4012674Swnj 	 * determine destination of this request.
4022674Swnj 	 */
4032395Swnj 	um->um_tab.b_active++;
4042395Swnj 	ui = updinfo[dkunit(bp)];
405264Sbill 	bn = dkblock(bp);
4062395Swnj 	dn = ui->ui_slave;
4072395Swnj 	st = &upst[ui->ui_type];
4082395Swnj 	sn = bn%st->nspc;
4092395Swnj 	tn = sn/st->nsect;
4102395Swnj 	sn %= st->nsect;
4112629Swnj 	upaddr = (struct updevice *)ui->ui_addr;
4122674Swnj 	/*
4132674Swnj 	 * Select drive if not selected already.
4142674Swnj 	 */
4152674Swnj 	if ((upaddr->upcs2&07) != dn)
4162674Swnj 		upaddr->upcs2 = dn;
4172674Swnj 	/*
4182674Swnj 	 * Check that it is ready and online
4192674Swnj 	 */
4202681Swnj 	waitdry = 0;
4213445Sroot 	while ((upaddr->upds&UPDS_DRY) == 0) {
4222681Swnj 		if (++waitdry > 512)
4232681Swnj 			break;
4242681Swnj 		upwaitdry++;
4252681Swnj 	}
4263445Sroot 	if ((upaddr->upds & UPDS_DREADY) != UPDS_DREADY) {
4272931Swnj 		printf("up%d: not ready", dkunit(bp));
4283445Sroot 		if ((upaddr->upds & UPDS_DREADY) != UPDS_DREADY) {
4292607Swnj 			printf("\n");
4302395Swnj 			um->um_tab.b_active = 0;
4312395Swnj 			um->um_tab.b_errcnt = 0;
432893Sbill 			dp->b_actf = bp->av_forw;
433893Sbill 			dp->b_active = 0;
434893Sbill 			bp->b_flags |= B_ERROR;
435893Sbill 			iodone(bp);
436893Sbill 			goto loop;
437893Sbill 		}
4382674Swnj 		/*
4392674Swnj 		 * Oh, well, sometimes this
4402674Swnj 		 * happens, for reasons unknown.
4412674Swnj 		 */
4422629Swnj 		printf(" (flakey)\n");
443264Sbill 	}
4442674Swnj 	/*
4452674Swnj 	 * Setup for the transfer, and get in the
4462674Swnj 	 * UNIBUS adaptor queue.
4472674Swnj 	 */
4482424Skre 	upaddr->updc = bp->b_cylin;
449264Sbill 	upaddr->upda = (tn << 8) + sn;
450264Sbill 	upaddr->upwc = -bp->b_bcount / sizeof (short);
451264Sbill 	if (bp->b_flags & B_READ)
4522629Swnj 		cmd = UP_IE|UP_RCOM|UP_GO;
453264Sbill 	else
4542629Swnj 		cmd = UP_IE|UP_WCOM|UP_GO;
4552571Swnj 	um->um_cmd = cmd;
4563107Swnj 	(void) ubago(ui);
457268Sbill 	return (1);
458264Sbill }
459264Sbill 
4602674Swnj /*
4612674Swnj  * Now all ready to go, stuff the registers.
4622674Swnj  */
4632571Swnj updgo(um)
4642983Swnj 	struct uba_ctlr *um;
4652395Swnj {
4662629Swnj 	register struct updevice *upaddr = (struct updevice *)um->um_addr;
4672470Swnj 
468*6953Swnj 	um->um_tab.b_active = 2;	/* should now be 2 */
4692571Swnj 	upaddr->upba = um->um_ubinfo;
4702571Swnj 	upaddr->upcs1 = um->um_cmd|((um->um_ubinfo>>8)&0x300);
4712395Swnj }
4722395Swnj 
4732674Swnj /*
4742674Swnj  * Handle a disk interrupt.
4752674Swnj  */
4762707Swnj upintr(sc21)
4772395Swnj 	register sc21;
478264Sbill {
479264Sbill 	register struct buf *bp, *dp;
4802983Swnj 	register struct uba_ctlr *um = upminfo[sc21];
4812983Swnj 	register struct uba_device *ui;
4822629Swnj 	register struct updevice *upaddr = (struct updevice *)um->um_addr;
483264Sbill 	register unit;
4842470Swnj 	struct up_softc *sc = &up_softc[um->um_ctlr];
4852607Swnj 	int as = (upaddr->upas & 0377) | sc->sc_softas;
4862681Swnj 	int needie = 1, waitdry;
487264Sbill 
4882470Swnj 	sc->sc_wticks = 0;
4892607Swnj 	sc->sc_softas = 0;
4902674Swnj 	/*
4912674Swnj 	 * If controller wasn't transferring, then this is an
4922674Swnj 	 * interrupt for attention status on seeking drives.
4932674Swnj 	 * Just service them.
4942674Swnj 	 */
4956346Swnj 	if (um->um_tab.b_active != 2 && !sc->sc_recal) {
4962674Swnj 		if (upaddr->upcs1 & UP_TRE)
4972674Swnj 			upaddr->upcs1 = UP_TRE;
4982674Swnj 		goto doattn;
4992674Swnj 	}
500*6953Swnj 	um->um_tab.b_active = 1;
5012674Swnj 	/*
5022674Swnj 	 * Get device and block structures, and a pointer
5032983Swnj 	 * to the uba_device for the drive.  Select the drive.
5042674Swnj 	 */
5052674Swnj 	dp = um->um_tab.b_actf;
5062674Swnj 	bp = dp->b_actf;
5072674Swnj 	ui = updinfo[dkunit(bp)];
5082674Swnj 	dk_busy &= ~(1 << ui->ui_dk);
5092674Swnj 	if ((upaddr->upcs2&07) != ui->ui_slave)
5102395Swnj 		upaddr->upcs2 = ui->ui_slave;
5112674Swnj 	/*
5122674Swnj 	 * Check for and process errors on
5132674Swnj 	 * either the drive or the controller.
5142674Swnj 	 */
5153445Sroot 	if ((upaddr->upds&UPDS_ERR) || (upaddr->upcs1&UP_TRE)) {
5162681Swnj 		waitdry = 0;
5173445Sroot 		while ((upaddr->upds & UPDS_DRY) == 0) {
5182681Swnj 			if (++waitdry > 512)
5192681Swnj 				break;
5202681Swnj 			upwaitdry++;
5212681Swnj 		}
5223445Sroot 		if (upaddr->uper1&UPER1_WLE) {
5232674Swnj 			/*
5242674Swnj 			 * Give up on write locked devices
5252674Swnj 			 * immediately.
5262674Swnj 			 */
5272931Swnj 			printf("up%d: write locked\n", dkunit(bp));
5282674Swnj 			bp->b_flags |= B_ERROR;
5292674Swnj 		} else if (++um->um_tab.b_errcnt > 27) {
5302674Swnj 			/*
5312674Swnj 			 * After 28 retries (16 without offset, and
5322674Swnj 			 * 12 with offset positioning) give up.
5332674Swnj 			 */
5342931Swnj 			harderr(bp, "up");
5352931Swnj 			printf("cs2=%b er1=%b er2=%b\n",
5362785Swnj 			    upaddr->upcs2, UPCS2_BITS,
5372785Swnj 			    upaddr->uper1, UPER1_BITS,
5382785Swnj 			    upaddr->uper2, UPER2_BITS);
5392674Swnj 			bp->b_flags |= B_ERROR;
5402674Swnj 		} else {
5412674Swnj 			/*
5422674Swnj 			 * Retriable error.
5432674Swnj 			 * If a soft ecc, correct it (continuing
5442674Swnj 			 * by returning if necessary.
5452674Swnj 			 * Otherwise fall through and retry the transfer
5462674Swnj 			 */
5472674Swnj 			um->um_tab.b_active = 0;	 /* force retry */
5483445Sroot 			if ((upaddr->uper1&(UPER1_DCK|UPER1_ECH))==UPER1_DCK)
5492629Swnj 				if (upecc(ui))
5502629Swnj 					return;
5512674Swnj 		}
5522674Swnj 		/*
5532674Swnj 		 * Clear drive error and, every eight attempts,
5542674Swnj 		 * (starting with the fourth)
5552674Swnj 		 * recalibrate to clear the slate.
5562674Swnj 		 */
5572674Swnj 		upaddr->upcs1 = UP_TRE|UP_IE|UP_DCLR|UP_GO;
5582674Swnj 		needie = 0;
5593182Swnj 		if ((um->um_tab.b_errcnt&07) == 4 && um->um_tab.b_active == 0) {
5602674Swnj 			upaddr->upcs1 = UP_RECAL|UP_IE|UP_GO;
5613160Swnj 			sc->sc_recal = 0;
5623160Swnj 			goto nextrecal;
5632674Swnj 		}
5642674Swnj 	}
5652674Swnj 	/*
5663160Swnj 	 * Advance recalibration finite state machine
5673160Swnj 	 * if recalibrate in progress, through
5683160Swnj 	 *	RECAL
5693160Swnj 	 *	SEEK
5703160Swnj 	 *	OFFSET (optional)
5713160Swnj 	 *	RETRY
5722674Swnj 	 */
5733160Swnj 	switch (sc->sc_recal) {
5743160Swnj 
5753160Swnj 	case 1:
5763160Swnj 		upaddr->updc = bp->b_cylin;
5773160Swnj 		upaddr->upcs1 = UP_SEEK|UP_IE|UP_GO;
5783160Swnj 		goto nextrecal;
5793160Swnj 	case 2:
5803160Swnj 		if (um->um_tab.b_errcnt < 16 || (bp->b_flags&B_READ) == 0)
5813160Swnj 			goto donerecal;
5823445Sroot 		upaddr->upof = up_offset[um->um_tab.b_errcnt & 017] | UPOF_FMT22;
5833160Swnj 		upaddr->upcs1 = UP_IE|UP_OFFSET|UP_GO;
5843160Swnj 		goto nextrecal;
5853160Swnj 	nextrecal:
5863160Swnj 		sc->sc_recal++;
5873160Swnj 		um->um_tab.b_active = 1;
5883160Swnj 		return;
5893160Swnj 	donerecal:
5903160Swnj 	case 3:
5912674Swnj 		sc->sc_recal = 0;
5923160Swnj 		um->um_tab.b_active = 0;
5933160Swnj 		break;
5942674Swnj 	}
5952674Swnj 	/*
5962674Swnj 	 * If still ``active'', then don't need any more retries.
5972674Swnj 	 */
5982674Swnj 	if (um->um_tab.b_active) {
5992674Swnj 		/*
6002674Swnj 		 * If we were offset positioning,
6012674Swnj 		 * return to centerline.
6022674Swnj 		 */
6032674Swnj 		if (um->um_tab.b_errcnt >= 16) {
6043445Sroot 			upaddr->upof = UPOF_FMT22;
6052674Swnj 			upaddr->upcs1 = UP_RTC|UP_GO|UP_IE;
6063445Sroot 			while (upaddr->upds & UPDS_PIP)
6072674Swnj 				DELAY(25);
608268Sbill 			needie = 0;
609264Sbill 		}
6102674Swnj 		um->um_tab.b_active = 0;
6112674Swnj 		um->um_tab.b_errcnt = 0;
6122674Swnj 		um->um_tab.b_actf = dp->b_forw;
6132674Swnj 		dp->b_active = 0;
6142674Swnj 		dp->b_errcnt = 0;
6152674Swnj 		dp->b_actf = bp->av_forw;
6162674Swnj 		bp->b_resid = (-upaddr->upwc * sizeof(short));
6172674Swnj 		iodone(bp);
6182674Swnj 		/*
6192674Swnj 		 * If this unit has more work to do,
6202674Swnj 		 * then start it up right away.
6212674Swnj 		 */
6222674Swnj 		if (dp->b_actf)
6232674Swnj 			if (upustart(ui))
624268Sbill 				needie = 0;
625264Sbill 	}
6262674Swnj 	as &= ~(1<<ui->ui_slave);
6273403Swnj 	/*
6283403Swnj 	 * Release unibus resources and flush data paths.
6293403Swnj 	 */
6303403Swnj 	ubadone(um);
6312674Swnj doattn:
6322674Swnj 	/*
6332674Swnj 	 * Process other units which need attention.
6342674Swnj 	 * For each unit which needs attention, call
6352674Swnj 	 * the unit start routine to place the slave
6362674Swnj 	 * on the controller device queue.
6372674Swnj 	 */
6383160Swnj 	while (unit = ffs(as)) {
6393160Swnj 		unit--;		/* was 1 origin */
6403160Swnj 		as &= ~(1<<unit);
6413160Swnj 		upaddr->upas = 1<<unit;
6426383Swnj 		if (unit < UPIPUNITS && upustart(upip[sc21][unit]))
6433160Swnj 			needie = 0;
6443160Swnj 	}
6452674Swnj 	/*
6462674Swnj 	 * If the controller is not transferring, but
6472674Swnj 	 * there are devices ready to transfer, start
6482674Swnj 	 * the controller.
6492674Swnj 	 */
6502395Swnj 	if (um->um_tab.b_actf && um->um_tab.b_active == 0)
6512395Swnj 		if (upstart(um))
652268Sbill 			needie = 0;
653275Sbill 	if (needie)
6542629Swnj 		upaddr->upcs1 = UP_IE;
655264Sbill }
656264Sbill 
657264Sbill upread(dev)
6582616Swnj 	dev_t dev;
659264Sbill {
6602616Swnj 	register int unit = minor(dev) >> 3;
6612470Swnj 
6622616Swnj 	if (unit >= NUP)
6632616Swnj 		u.u_error = ENXIO;
6642616Swnj 	else
6652616Swnj 		physio(upstrategy, &rupbuf[unit], dev, B_READ, minphys);
666264Sbill }
667264Sbill 
668264Sbill upwrite(dev)
6692616Swnj 	dev_t dev;
670264Sbill {
6712616Swnj 	register int unit = minor(dev) >> 3;
6722470Swnj 
6732616Swnj 	if (unit >= NUP)
6742616Swnj 		u.u_error = ENXIO;
6752616Swnj 	else
6762616Swnj 		physio(upstrategy, &rupbuf[unit], dev, B_WRITE, minphys);
677264Sbill }
678264Sbill 
679266Sbill /*
680266Sbill  * Correct an ECC error, and restart the i/o to complete
681266Sbill  * the transfer if necessary.  This is quite complicated because
682266Sbill  * the transfer may be going to an odd memory address base and/or
683266Sbill  * across a page boundary.
684266Sbill  */
6852395Swnj upecc(ui)
6862983Swnj 	register struct uba_device *ui;
687264Sbill {
6882629Swnj 	register struct updevice *up = (struct updevice *)ui->ui_addr;
6892395Swnj 	register struct buf *bp = uputab[ui->ui_unit].b_actf;
6902983Swnj 	register struct uba_ctlr *um = ui->ui_mi;
6912395Swnj 	register struct upst *st;
6922395Swnj 	struct uba_regs *ubp = ui->ui_hd->uh_uba;
693266Sbill 	register int i;
694264Sbill 	caddr_t addr;
695266Sbill 	int reg, bit, byte, npf, mask, o, cmd, ubaddr;
696264Sbill 	int bn, cn, tn, sn;
697264Sbill 
698264Sbill 	/*
699266Sbill 	 * Npf is the number of sectors transferred before the sector
700266Sbill 	 * containing the ECC error, and reg is the UBA register
701266Sbill 	 * mapping (the first part of) the transfer.
702266Sbill 	 * O is offset within a memory page of the first byte transferred.
703264Sbill 	 */
704266Sbill 	npf = btop((up->upwc * sizeof(short)) + bp->b_bcount) - 1;
7052571Swnj 	reg = btop(um->um_ubinfo&0x3ffff) + npf;
706264Sbill 	o = (int)bp->b_un.b_addr & PGOFSET;
7072983Swnj 	printf("up%d%c: soft ecc sn%d\n", dkunit(bp),
7082889Swnj 	    'a'+(minor(bp->b_dev)&07), bp->b_blkno + npf);
709264Sbill 	mask = up->upec2;
7103445Sroot #ifdef UPECCDEBUG
7113403Swnj 	printf("npf %d reg %x o %d mask %o pos %d\n", npf, reg, o, mask,
7123403Swnj 	    up->upec1);
7133445Sroot #endif
714266Sbill 	/*
715266Sbill 	 * Flush the buffered data path, and compute the
716266Sbill 	 * byte and bit position of the error.  The variable i
717266Sbill 	 * is the byte offset in the transfer, the variable byte
718266Sbill 	 * is the offset from a page boundary in main memory.
719266Sbill 	 */
7202725Swnj 	ubapurge(um);
721266Sbill 	i = up->upec1 - 1;		/* -1 makes 0 origin */
722266Sbill 	bit = i&07;
723266Sbill 	i = (i&~07)>>3;
724264Sbill 	byte = i + o;
725266Sbill 	/*
726266Sbill 	 * Correct while possible bits remain of mask.  Since mask
727266Sbill 	 * contains 11 bits, we continue while the bit offset is > -11.
728266Sbill 	 * Also watch out for end of this block and the end of the whole
729266Sbill 	 * transfer.
730266Sbill 	 */
731266Sbill 	while (i < 512 && (int)ptob(npf)+i < bp->b_bcount && bit > -11) {
732266Sbill 		addr = ptob(ubp->uba_map[reg+btop(byte)].pg_pfnum)+
733266Sbill 		    (byte & PGOFSET);
7343445Sroot #ifdef UPECCDEBUG
7353403Swnj 		printf("addr %x map reg %x\n",
7363403Swnj 		    addr, *(int *)(&ubp->uba_map[reg+btop(byte)]));
7373403Swnj 		printf("old: %x, ", getmemc(addr));
7383445Sroot #endif
739266Sbill 		putmemc(addr, getmemc(addr)^(mask<<bit));
7403445Sroot #ifdef UPECCDEBUG
7413403Swnj 		printf("new: %x\n", getmemc(addr));
7423445Sroot #endif
743266Sbill 		byte++;
744266Sbill 		i++;
745266Sbill 		bit -= 8;
746264Sbill 	}
747264Sbill 	if (up->upwc == 0)
748264Sbill 		return (0);
749266Sbill 	/*
750266Sbill 	 * Have to continue the transfer... clear the drive,
751266Sbill 	 * and compute the position where the transfer is to continue.
752266Sbill 	 * We have completed npf+1 sectors of the transfer already;
753266Sbill 	 * restart at offset o of next sector (i.e. in UBA register reg+1).
754266Sbill 	 */
7552629Swnj #ifdef notdef
7562629Swnj 	up->uper1 = 0;
7572629Swnj 	up->upcs1 |= UP_GO;
7582629Swnj #else
7592629Swnj 	up->upcs1 = UP_TRE|UP_IE|UP_DCLR|UP_GO;
760264Sbill 	bn = dkblock(bp);
7612395Swnj 	st = &upst[ui->ui_type];
762264Sbill 	cn = bp->b_cylin;
7632395Swnj 	sn = bn%st->nspc + npf + 1;
7642395Swnj 	tn = sn/st->nsect;
7652395Swnj 	sn %= st->nsect;
7662395Swnj 	cn += tn/st->ntrak;
7672395Swnj 	tn %= st->ntrak;
768264Sbill 	up->updc = cn;
769266Sbill 	up->upda = (tn << 8) | sn;
770266Sbill 	ubaddr = (int)ptob(reg+1) + o;
771266Sbill 	up->upba = ubaddr;
772266Sbill 	cmd = (ubaddr >> 8) & 0x300;
7732629Swnj 	cmd |= UP_IE|UP_GO|UP_RCOM;
774*6953Swnj 	um->um_tab.b_active = 2;	/* continuing transfer ... */
775266Sbill 	up->upcs1 = cmd;
7762629Swnj #endif
777264Sbill 	return (1);
778264Sbill }
779286Sbill 
780286Sbill /*
781286Sbill  * Reset driver after UBA init.
782286Sbill  * Cancel software state of all pending transfers
783286Sbill  * and restart all units and the controller.
784286Sbill  */
7852395Swnj upreset(uban)
7862931Swnj 	int uban;
787286Sbill {
7882983Swnj 	register struct uba_ctlr *um;
7892983Swnj 	register struct uba_device *ui;
7902395Swnj 	register sc21, unit;
791286Sbill 
7922646Swnj 	for (sc21 = 0; sc21 < NSC; sc21++) {
7932470Swnj 		if ((um = upminfo[sc21]) == 0 || um->um_ubanum != uban ||
7942470Swnj 		    um->um_alive == 0)
7952395Swnj 			continue;
7962931Swnj 		printf(" sc%d", sc21);
7972395Swnj 		um->um_tab.b_active = 0;
7982395Swnj 		um->um_tab.b_actf = um->um_tab.b_actl = 0;
7992931Swnj 		up_softc[sc21].sc_recal = 0;
8006346Swnj 		up_softc[sc21].sc_wticks = 0;
8012571Swnj 		if (um->um_ubinfo) {
8022571Swnj 			printf("<%d>", (um->um_ubinfo>>28)&0xf);
8032616Swnj 			ubadone(um);
8042395Swnj 		}
8053445Sroot 		((struct updevice *)(um->um_addr))->upcs2 = UPCS2_CLR;
8062395Swnj 		for (unit = 0; unit < NUP; unit++) {
8072395Swnj 			if ((ui = updinfo[unit]) == 0)
8082395Swnj 				continue;
8092931Swnj 			if (ui->ui_alive == 0 || ui->ui_mi != um)
8102395Swnj 				continue;
8112395Swnj 			uputab[unit].b_active = 0;
8122395Swnj 			(void) upustart(ui);
8132395Swnj 		}
8142395Swnj 		(void) upstart(um);
815286Sbill 	}
816286Sbill }
817313Sbill 
818313Sbill /*
819313Sbill  * Wake up every second and if an interrupt is pending
820313Sbill  * but nothing has happened increment a counter.
8212931Swnj  * If nothing happens for 20 seconds, reset the UNIBUS
822313Sbill  * and begin anew.
823313Sbill  */
824313Sbill upwatch()
825313Sbill {
8262983Swnj 	register struct uba_ctlr *um;
8272395Swnj 	register sc21, unit;
8282470Swnj 	register struct up_softc *sc;
829313Sbill 
8302759Swnj 	timeout(upwatch, (caddr_t)0, hz);
8312646Swnj 	for (sc21 = 0; sc21 < NSC; sc21++) {
8322395Swnj 		um = upminfo[sc21];
8332470Swnj 		if (um == 0 || um->um_alive == 0)
8342470Swnj 			continue;
8352470Swnj 		sc = &up_softc[sc21];
8362395Swnj 		if (um->um_tab.b_active == 0) {
8372395Swnj 			for (unit = 0; unit < NUP; unit++)
8382629Swnj 				if (uputab[unit].b_active &&
8392629Swnj 				    updinfo[unit]->ui_mi == um)
8402395Swnj 					goto active;
8412470Swnj 			sc->sc_wticks = 0;
8422395Swnj 			continue;
8432395Swnj 		}
8442931Swnj active:
8452470Swnj 		sc->sc_wticks++;
8462470Swnj 		if (sc->sc_wticks >= 20) {
8472470Swnj 			sc->sc_wticks = 0;
8482931Swnj 			printf("sc%d: lost interrupt\n", sc21);
8492646Swnj 			ubareset(um->um_ubanum);
8502395Swnj 		}
851313Sbill 	}
852313Sbill }
8532379Swnj 
8542379Swnj #define	DBSIZE	20
8552379Swnj 
8562379Swnj updump(dev)
8572379Swnj 	dev_t dev;
8582379Swnj {
8592629Swnj 	struct updevice *upaddr;
8602379Swnj 	char *start;
8613107Swnj 	int num, blk, unit;
8622379Swnj 	struct size *sizes;
8632395Swnj 	register struct uba_regs *uba;
8642983Swnj 	register struct uba_device *ui;
8652379Swnj 	register short *rp;
8662395Swnj 	struct upst *st;
8676848Ssam 	register int retry;
8682379Swnj 
8692395Swnj 	unit = minor(dev) >> 3;
8702889Swnj 	if (unit >= NUP)
8712889Swnj 		return (ENXIO);
8722470Swnj #define	phys(cast, addr) ((cast)((int)addr & 0x7fffffff))
8732983Swnj 	ui = phys(struct uba_device *, updinfo[unit]);
8742889Swnj 	if (ui->ui_alive == 0)
8752889Swnj 		return (ENXIO);
8762395Swnj 	uba = phys(struct uba_hd *, ui->ui_hd)->uh_physuba;
8772983Swnj 	ubainit(uba);
8782629Swnj 	upaddr = (struct updevice *)ui->ui_physaddr;
8796848Ssam 	DELAY(5000000);
8802379Swnj 	num = maxfree;
8812379Swnj 	upaddr->upcs2 = unit;
8822983Swnj 	DELAY(100);
8836848Ssam 	upaddr->upcs1 = UP_DCLR|UP_GO;
8846848Ssam 	upaddr->upcs1 = UP_PRESET|UP_GO;
8856848Ssam 	upaddr->upof = UPOF_FMT22;
8866848Ssam 	retry = 0;
8876848Ssam 	do {
8886848Ssam 		DELAY(25);
8896848Ssam 		if (++retry > 527)
8906848Ssam 			break;
8916861Ssam 	} while ((upaddr->upds & UP_RDY) == 0);
8923445Sroot 	if ((upaddr->upds & UPDS_DREADY) != UPDS_DREADY)
8932889Swnj 		return (EFAULT);
8946848Ssam 	start = 0;
8952470Swnj 	st = &upst[ui->ui_type];
8962395Swnj 	sizes = phys(struct size *, st->sizes);
8972889Swnj 	if (dumplo < 0 || dumplo + num >= sizes[minor(dev)&07].nblocks)
8982889Swnj 		return (EINVAL);
8992379Swnj 	while (num > 0) {
9002379Swnj 		register struct pte *io;
9012379Swnj 		register int i;
9022379Swnj 		int cn, sn, tn;
9032379Swnj 		daddr_t bn;
9042379Swnj 
9052379Swnj 		blk = num > DBSIZE ? DBSIZE : num;
9062395Swnj 		io = uba->uba_map;
9072379Swnj 		for (i = 0; i < blk; i++)
9082983Swnj 			*(int *)io++ = (btop(start)+i) | (1<<21) | UBAMR_MRV;
9092379Swnj 		*(int *)io = 0;
9102379Swnj 		bn = dumplo + btop(start);
9112607Swnj 		cn = bn/st->nspc + sizes[minor(dev)&07].cyloff;
9122607Swnj 		sn = bn%st->nspc;
9132607Swnj 		tn = sn/st->nsect;
9142607Swnj 		sn = sn%st->nsect;
9152379Swnj 		upaddr->updc = cn;
9162379Swnj 		rp = (short *) &upaddr->upda;
9172379Swnj 		*rp = (tn << 8) + sn;
9182379Swnj 		*--rp = 0;
9192379Swnj 		*--rp = -blk*NBPG / sizeof (short);
9202629Swnj 		*--rp = UP_GO|UP_WCOM;
9216848Ssam 		retry = 0;
9222379Swnj 		do {
9232379Swnj 			DELAY(25);
9246848Ssam 			if (++retry > 527)
9256848Ssam 				break;
9262629Swnj 		} while ((upaddr->upcs1 & UP_RDY) == 0);
9276848Ssam 		if ((upaddr->upds & UPDS_DREADY) != UPDS_DREADY) {
9286861Ssam 			printf("up%d: not ready", unit);
9296848Ssam 			if ((upaddr->upds & UPDS_DREADY) != UPDS_DREADY) {
9306848Ssam 				printf("\n");
9316848Ssam 				return (EIO);
9326848Ssam 			}
9336848Ssam 			printf(" (flakey)\n");
9346848Ssam 		}
9353445Sroot 		if (upaddr->upds&UPDS_ERR)
9362889Swnj 			return (EIO);
9372379Swnj 		start += blk*NBPG;
9382379Swnj 		num -= blk;
9392379Swnj 	}
9402379Swnj 	return (0);
9412379Swnj }
9421902Swnj #endif
943