xref: /csrg-svn/sys/vax/uba/up.c (revision 6602)
16383Swnj /*	up.c	4.45	82/03/31	*/
2264Sbill 
31937Swnj #include "up.h"
42646Swnj #if NSC > 0
5264Sbill /*
6885Sbill  * UNIBUS disk driver with overlapped seeks and ECC recovery.
72889Swnj  *
82889Swnj  * TODO:
92889Swnj  *	Add bad sector forwarding code
103445Sroot  *	Check that offset recovery code works
11264Sbill  */
12264Sbill 
13264Sbill #include "../h/param.h"
14264Sbill #include "../h/systm.h"
152395Swnj #include "../h/cpu.h"
162395Swnj #include "../h/nexus.h"
17308Sbill #include "../h/dk.h"
18264Sbill #include "../h/buf.h"
19264Sbill #include "../h/conf.h"
20264Sbill #include "../h/dir.h"
21264Sbill #include "../h/user.h"
22264Sbill #include "../h/map.h"
23420Sbill #include "../h/pte.h"
24264Sbill #include "../h/mtpr.h"
252571Swnj #include "../h/vm.h"
262983Swnj #include "../h/ubavar.h"
272983Swnj #include "../h/ubareg.h"
282379Swnj #include "../h/cmap.h"
29264Sbill 
302379Swnj #include "../h/upreg.h"
31264Sbill 
322395Swnj struct	up_softc {
332395Swnj 	int	sc_softas;
342607Swnj 	int	sc_ndrive;
352395Swnj 	int	sc_wticks;
362674Swnj 	int	sc_recal;
372646Swnj } up_softc[NSC];
38275Sbill 
392395Swnj /* THIS SHOULD BE READ OFF THE PACK, PER DRIVE */
40264Sbill struct	size
41264Sbill {
42264Sbill 	daddr_t	nblocks;
43264Sbill 	int	cyloff;
44264Sbill } up_sizes[8] = {
456436Swnj #ifdef ERNIE
466436Swnj 	49324,	0,		/* A=cyl 0 thru 26 */
476436Swnj #else
48264Sbill 	15884,	0,		/* A=cyl 0 thru 26 */
496436Swnj #endif
50264Sbill 	33440,	27,		/* B=cyl 27 thru 81 */
51341Sbill 	495520,	0,		/* C=cyl 0 thru 814 */
52264Sbill 	15884,	562,		/* D=cyl 562 thru 588 */
53264Sbill 	55936,	589,		/* E=cyl 589 thru 680 */
543730Sroot #ifndef NOBADSECT
553730Sroot 	81376,	681,		/* F=cyl 681 thru 814 */
563730Sroot 	153728,	562,		/* G=cyl 562 thru 814 */
573730Sroot #else
583730Sroot 	81472,	681,
593730Sroot 	153824,	562,
603730Sroot #endif
61264Sbill 	291346,	82,		/* H=cyl 82 thru 561 */
622395Swnj }, fj_sizes[8] = {
632395Swnj 	15884,	0,		/* A=cyl 0 thru 49 */
642395Swnj 	33440,	50,		/* B=cyl 50 thru 154 */
652395Swnj 	263360,	0,		/* C=cyl 0 thru 822 */
662395Swnj 	0,	0,
672395Swnj 	0,	0,
682395Swnj 	0,	0,
692395Swnj 	0,	0,
703730Sroot #ifndef NOBADSECT
713730Sroot 	213664,	155,		/* H=cyl 155 thru 822 */
723730Sroot #else
733730Sroot 	213760,	155,
743730Sroot #endif
756305Sroot }, am_sizes[8] = {
766305Sroot 	15884,	0,		/* A=cyl 0 thru 31 */
776305Sroot 	33440,	32,		/* B=cyl 32 thru 97 */
786305Sroot 	524288,	0,		/* C=cyl 0 thru 1023 */
79*6602Ssam 	27786,	668,
80*6602Ssam 	27786,	723,
81*6602Ssam 	125440,	778,
826305Sroot 	181760,	668,		/* G=cyl 668 thru 1022 */
836305Sroot 	291346,	98,		/* H=cyl 98 thru 667 */
84264Sbill };
852395Swnj /* END OF STUFF WHICH SHOULD BE READ IN PER DISK */
86264Sbill 
876346Swnj /*
886346Swnj  * On a 780 upSDIST could be 2, but
896346Swnj  * in the interest of 750's...
906346Swnj  */
916346Swnj #define	_upSDIST	3		/* 1.5 msec */
922395Swnj #define	_upRDIST	4		/* 2.0 msec */
93264Sbill 
942395Swnj int	upSDIST = _upSDIST;
952395Swnj int	upRDIST = _upRDIST;
962395Swnj 
972607Swnj int	upprobe(), upslave(), upattach(), updgo(), upintr();
982983Swnj struct	uba_ctlr *upminfo[NSC];
992983Swnj struct	uba_device *updinfo[NUP];
1006383Swnj #define	UPIPUNITS	8
1016383Swnj struct	uba_device *upip[NSC][UPIPUNITS]; /* fuji w/fixed head gives n,n+4 */
1022395Swnj 
1032607Swnj u_short	upstd[] = { 0776700, 0774400, 0776300, 0 };
1042616Swnj struct	uba_driver scdriver =
1052607Swnj     { upprobe, upslave, upattach, updgo, upstd, "up", updinfo, "sc", upminfo };
1062395Swnj struct	buf	uputab[NUP];
1072395Swnj 
1082395Swnj struct	upst {
1092395Swnj 	short	nsect;
1102395Swnj 	short	ntrak;
1112395Swnj 	short	nspc;
1122395Swnj 	short	ncyl;
1132395Swnj 	struct	size *sizes;
1142395Swnj } upst[] = {
1152607Swnj 	32,	19,	32*19,	823,	up_sizes,	/* 9300/cdc */
1162607Swnj /* 9300 actually has 815 cylinders... */
1172395Swnj 	32,	10,	32*10,	823,	fj_sizes,	/* fujitsu 160m */
1186346Swnj 	32,	16,	32*16,	1024,	am_sizes,	/* ampex capricorn */
1192395Swnj };
1202395Swnj 
1212629Swnj u_char	up_offset[16] = {
1223445Sroot     UPOF_P400, UPOF_M400, UPOF_P400, UPOF_M400,
1233445Sroot     UPOF_P800, UPOF_M800, UPOF_P800, UPOF_M800,
1243445Sroot     UPOF_P1200, UPOF_M1200, UPOF_P1200, UPOF_M1200,
1253445Sroot     0, 0, 0, 0
1262629Swnj };
127264Sbill 
1282616Swnj struct	buf	rupbuf[NUP];
129264Sbill 
130264Sbill #define	b_cylin b_resid
131264Sbill 
132264Sbill #ifdef INTRLVE
133264Sbill daddr_t dkblock();
134264Sbill #endif
1352395Swnj 
1362395Swnj int	upwstart, upwatch();		/* Have started guardian */
1372470Swnj int	upseek;
1382681Swnj int	upwaitdry;
1392395Swnj 
1402395Swnj /*ARGSUSED*/
1412607Swnj upprobe(reg)
1422395Swnj 	caddr_t reg;
1432395Swnj {
1442459Swnj 	register int br, cvec;
1452459Swnj 
1462607Swnj #ifdef lint
1472607Swnj 	br = 0; cvec = br; br = cvec;
1482607Swnj #endif
1492629Swnj 	((struct updevice *)reg)->upcs1 = UP_IE|UP_RDY;
1502607Swnj 	DELAY(10);
1512629Swnj 	((struct updevice *)reg)->upcs1 = 0;
1522459Swnj 	return (1);
1532395Swnj }
1542395Swnj 
1552607Swnj upslave(ui, reg)
1562983Swnj 	struct uba_device *ui;
1572395Swnj 	caddr_t reg;
1582395Swnj {
1592629Swnj 	register struct updevice *upaddr = (struct updevice *)reg;
1602395Swnj 
1612395Swnj 	upaddr->upcs1 = 0;		/* conservative */
1622607Swnj 	upaddr->upcs2 = ui->ui_slave;
1633445Sroot 	if (upaddr->upcs2&UPCS2_NED) {
1642629Swnj 		upaddr->upcs1 = UP_DCLR|UP_GO;
1652395Swnj 		return (0);
1662395Swnj 	}
1672607Swnj 	return (1);
1682607Swnj }
1692607Swnj 
1702607Swnj upattach(ui)
1712983Swnj 	register struct uba_device *ui;
1722607Swnj {
1732629Swnj 	register struct updevice *upaddr;
1742607Swnj 
1752395Swnj 	if (upwstart == 0) {
1762759Swnj 		timeout(upwatch, (caddr_t)0, hz);
1772395Swnj 		upwstart++;
1782395Swnj 	}
1792571Swnj 	if (ui->ui_dk >= 0)
1802571Swnj 		dk_mspw[ui->ui_dk] = .0000020345;
1812607Swnj 	upip[ui->ui_ctlr][ui->ui_slave] = ui;
1822607Swnj 	up_softc[ui->ui_ctlr].sc_ndrive++;
1832629Swnj 	upaddr = (struct updevice *)ui->ui_addr;
1842629Swnj 	upaddr->upcs1 = 0;
1852629Swnj 	upaddr->upcs2 = ui->ui_slave;
1863496Sroot 	upaddr->uphr = UPHR_MAXTRAK;
1873553Swnj 	if (upaddr->uphr == 9)
1883496Sroot 		ui->ui_type = 1;		/* fujitsu hack */
1896305Sroot 	else if (upaddr->uphr == 15)
1906305Sroot 		ui->ui_type = 2;		/* ampex hack */
1913496Sroot 	upaddr->upcs2 = UPCS2_CLR;
1923496Sroot /*
1933496Sroot 	upaddr->uphr = UPHR_MAXCYL;
1943496Sroot 	printf("maxcyl %d\n", upaddr->uphr);
1953496Sroot 	upaddr->uphr = UPHR_MAXTRAK;
1963496Sroot 	printf("maxtrak %d\n", upaddr->uphr);
1973496Sroot 	upaddr->uphr = UPHR_MAXSECT;
1983496Sroot 	printf("maxsect %d\n", upaddr->uphr);
1993496Sroot */
2002395Swnj }
201264Sbill 
202264Sbill upstrategy(bp)
2032395Swnj 	register struct buf *bp;
204264Sbill {
2052983Swnj 	register struct uba_device *ui;
2062395Swnj 	register struct upst *st;
2072395Swnj 	register int unit;
2082470Swnj 	register struct buf *dp;
2092395Swnj 	int xunit = minor(bp->b_dev) & 07;
2102470Swnj 	long bn, sz;
211264Sbill 
2122470Swnj 	sz = (bp->b_bcount+511) >> 9;
213264Sbill 	unit = dkunit(bp);
2142395Swnj 	if (unit >= NUP)
2152395Swnj 		goto bad;
2162395Swnj 	ui = updinfo[unit];
2172395Swnj 	if (ui == 0 || ui->ui_alive == 0)
2182395Swnj 		goto bad;
2192395Swnj 	st = &upst[ui->ui_type];
2202395Swnj 	if (bp->b_blkno < 0 ||
2212395Swnj 	    (bn = dkblock(bp))+sz > st->sizes[xunit].nblocks)
2222395Swnj 		goto bad;
2232395Swnj 	bp->b_cylin = bn/st->nspc + st->sizes[xunit].cyloff;
2246305Sroot 	(void) spl5();
2252470Swnj 	dp = &uputab[ui->ui_unit];
2262470Swnj 	disksort(dp, bp);
2272470Swnj 	if (dp->b_active == 0) {
2282395Swnj 		(void) upustart(ui);
2292395Swnj 		bp = &ui->ui_mi->um_tab;
2302395Swnj 		if (bp->b_actf && bp->b_active == 0)
2312395Swnj 			(void) upstart(ui->ui_mi);
232264Sbill 	}
2336305Sroot 	(void) spl0();
2342395Swnj 	return;
2352395Swnj 
2362395Swnj bad:
2372395Swnj 	bp->b_flags |= B_ERROR;
2382395Swnj 	iodone(bp);
2392395Swnj 	return;
240264Sbill }
241264Sbill 
2422674Swnj /*
2432674Swnj  * Unit start routine.
2442674Swnj  * Seek the drive to be where the data is
2452674Swnj  * and then generate another interrupt
2462674Swnj  * to actually start the transfer.
2472674Swnj  * If there is only one drive on the controller,
2482674Swnj  * or we are very close to the data, don't
2492674Swnj  * bother with the search.  If called after
2502674Swnj  * searching once, don't bother to look where
2512674Swnj  * we are, just queue for transfer (to avoid
2522674Swnj  * positioning forever without transferrring.)
2532674Swnj  */
2542395Swnj upustart(ui)
2552983Swnj 	register struct uba_device *ui;
256264Sbill {
257264Sbill 	register struct buf *bp, *dp;
2582983Swnj 	register struct uba_ctlr *um;
2592629Swnj 	register struct updevice *upaddr;
2602395Swnj 	register struct upst *st;
261264Sbill 	daddr_t bn;
2622674Swnj 	int sn, csn;
2632607Swnj 	/*
2642607Swnj 	 * The SC21 cancels commands if you just say
2652629Swnj 	 *	cs1 = UP_IE
2662607Swnj 	 * so we are cautious about handling of cs1.
2672607Swnj 	 * Also don't bother to clear as bits other than in upintr().
2682607Swnj 	 */
2692674Swnj 	int didie = 0;
2702674Swnj 
2712674Swnj 	if (ui == 0)
2722674Swnj 		return (0);
2732983Swnj 	um = ui->ui_mi;
2742395Swnj 	dk_busy &= ~(1<<ui->ui_dk);
2752395Swnj 	dp = &uputab[ui->ui_unit];
276266Sbill 	if ((bp = dp->b_actf) == NULL)
277268Sbill 		goto out;
2782674Swnj 	/*
2792674Swnj 	 * If the controller is active, just remember
2802674Swnj 	 * that this device would like to be positioned...
2812674Swnj 	 * if we tried to position now we would confuse the SC21.
2822674Swnj 	 */
2832395Swnj 	if (um->um_tab.b_active) {
2842459Swnj 		up_softc[um->um_ctlr].sc_softas |= 1<<ui->ui_slave;
285275Sbill 		return (0);
286275Sbill 	}
2872674Swnj 	/*
2882674Swnj 	 * If we have already positioned this drive,
2892674Swnj 	 * then just put it on the ready queue.
2902674Swnj 	 */
291276Sbill 	if (dp->b_active)
292276Sbill 		goto done;
293276Sbill 	dp->b_active = 1;
2942629Swnj 	upaddr = (struct updevice *)um->um_addr;
2952395Swnj 	upaddr->upcs2 = ui->ui_slave;
2962674Swnj 	/*
2972674Swnj 	 * If drive has just come up,
2982674Swnj 	 * setup the pack.
2992674Swnj 	 */
3003445Sroot 	if ((upaddr->upds & UPDS_VV) == 0) {
3012607Swnj 		/* SHOULD WARN SYSTEM THAT THIS HAPPENED */
3022629Swnj 		upaddr->upcs1 = UP_IE|UP_DCLR|UP_GO;
3032629Swnj 		upaddr->upcs1 = UP_IE|UP_PRESET|UP_GO;
3043445Sroot 		upaddr->upof = UPOF_FMT22;
305268Sbill 		didie = 1;
306264Sbill 	}
3072674Swnj 	/*
3082674Swnj 	 * If drive is offline, forget about positioning.
3092674Swnj 	 */
3103445Sroot 	if ((upaddr->upds & (UPDS_DPR|UPDS_MOL)) != (UPDS_DPR|UPDS_MOL))
311275Sbill 		goto done;
3122674Swnj 	/*
3132674Swnj 	 * If there is only one drive,
3142674Swnj 	 * dont bother searching.
3152674Swnj 	 */
3162607Swnj 	if (up_softc[um->um_ctlr].sc_ndrive == 1)
3172607Swnj 		goto done;
3182674Swnj 	/*
3192674Swnj 	 * Figure out where this transfer is going to
3202674Swnj 	 * and see if we are close enough to justify not searching.
3212674Swnj 	 */
3222395Swnj 	st = &upst[ui->ui_type];
323264Sbill 	bn = dkblock(bp);
3242395Swnj 	sn = bn%st->nspc;
3252395Swnj 	sn = (sn + st->nsect - upSDIST) % st->nsect;
3262674Swnj 	if (bp->b_cylin - upaddr->updc)
327266Sbill 		goto search;		/* Not on-cylinder */
328275Sbill 	else if (upseek)
329275Sbill 		goto done;		/* Ok just to be on-cylinder */
330264Sbill 	csn = (upaddr->upla>>6) - sn - 1;
331266Sbill 	if (csn < 0)
3322395Swnj 		csn += st->nsect;
3332395Swnj 	if (csn > st->nsect - upRDIST)
334264Sbill 		goto done;
335264Sbill search:
3362674Swnj 	upaddr->updc = bp->b_cylin;
3372674Swnj 	/*
3382674Swnj 	 * Not on cylinder at correct position,
3392674Swnj 	 * seek/search.
3402674Swnj 	 */
341275Sbill 	if (upseek)
3422629Swnj 		upaddr->upcs1 = UP_IE|UP_SEEK|UP_GO;
3432470Swnj 	else {
344275Sbill 		upaddr->upda = sn;
3452629Swnj 		upaddr->upcs1 = UP_IE|UP_SEARCH|UP_GO;
346275Sbill 	}
347268Sbill 	didie = 1;
3482674Swnj 	/*
3492674Swnj 	 * Mark unit busy for iostat.
3502674Swnj 	 */
3512395Swnj 	if (ui->ui_dk >= 0) {
3522395Swnj 		dk_busy |= 1<<ui->ui_dk;
3532395Swnj 		dk_seek[ui->ui_dk]++;
354264Sbill 	}
355268Sbill 	goto out;
356264Sbill done:
3572674Swnj 	/*
3582674Swnj 	 * Device is ready to go.
3592674Swnj 	 * Put it on the ready queue for the controller
3602674Swnj 	 * (unless its already there.)
3612674Swnj 	 */
3622629Swnj 	if (dp->b_active != 2) {
3632629Swnj 		dp->b_forw = NULL;
3642629Swnj 		if (um->um_tab.b_actf == NULL)
3652629Swnj 			um->um_tab.b_actf = dp;
3662629Swnj 		else
3672629Swnj 			um->um_tab.b_actl->b_forw = dp;
3682629Swnj 		um->um_tab.b_actl = dp;
3692629Swnj 		dp->b_active = 2;
3702629Swnj 	}
371268Sbill out:
372268Sbill 	return (didie);
373264Sbill }
374264Sbill 
3752674Swnj /*
3762674Swnj  * Start up a transfer on a drive.
3772674Swnj  */
3782395Swnj upstart(um)
3792983Swnj 	register struct uba_ctlr *um;
380264Sbill {
381264Sbill 	register struct buf *bp, *dp;
3822983Swnj 	register struct uba_device *ui;
3832629Swnj 	register struct updevice *upaddr;
3842470Swnj 	struct upst *st;
385264Sbill 	daddr_t bn;
3862681Swnj 	int dn, sn, tn, cmd, waitdry;
387264Sbill 
388264Sbill loop:
3892674Swnj 	/*
3902674Swnj 	 * Pull a request off the controller queue
3912674Swnj 	 */
3922395Swnj 	if ((dp = um->um_tab.b_actf) == NULL)
393268Sbill 		return (0);
394264Sbill 	if ((bp = dp->b_actf) == NULL) {
3952395Swnj 		um->um_tab.b_actf = dp->b_forw;
396264Sbill 		goto loop;
397264Sbill 	}
3982674Swnj 	/*
3992674Swnj 	 * Mark controller busy, and
4002674Swnj 	 * determine destination of this request.
4012674Swnj 	 */
4022395Swnj 	um->um_tab.b_active++;
4032395Swnj 	ui = updinfo[dkunit(bp)];
404264Sbill 	bn = dkblock(bp);
4052395Swnj 	dn = ui->ui_slave;
4062395Swnj 	st = &upst[ui->ui_type];
4072395Swnj 	sn = bn%st->nspc;
4082395Swnj 	tn = sn/st->nsect;
4092395Swnj 	sn %= st->nsect;
4102629Swnj 	upaddr = (struct updevice *)ui->ui_addr;
4112674Swnj 	/*
4122674Swnj 	 * Select drive if not selected already.
4132674Swnj 	 */
4142674Swnj 	if ((upaddr->upcs2&07) != dn)
4152674Swnj 		upaddr->upcs2 = dn;
4162674Swnj 	/*
4172674Swnj 	 * Check that it is ready and online
4182674Swnj 	 */
4192681Swnj 	waitdry = 0;
4203445Sroot 	while ((upaddr->upds&UPDS_DRY) == 0) {
4212681Swnj 		if (++waitdry > 512)
4222681Swnj 			break;
4232681Swnj 		upwaitdry++;
4242681Swnj 	}
4253445Sroot 	if ((upaddr->upds & UPDS_DREADY) != UPDS_DREADY) {
4262931Swnj 		printf("up%d: not ready", dkunit(bp));
4273445Sroot 		if ((upaddr->upds & UPDS_DREADY) != UPDS_DREADY) {
4282607Swnj 			printf("\n");
4292395Swnj 			um->um_tab.b_active = 0;
4302395Swnj 			um->um_tab.b_errcnt = 0;
431893Sbill 			dp->b_actf = bp->av_forw;
432893Sbill 			dp->b_active = 0;
433893Sbill 			bp->b_flags |= B_ERROR;
434893Sbill 			iodone(bp);
435893Sbill 			goto loop;
436893Sbill 		}
4372674Swnj 		/*
4382674Swnj 		 * Oh, well, sometimes this
4392674Swnj 		 * happens, for reasons unknown.
4402674Swnj 		 */
4412629Swnj 		printf(" (flakey)\n");
442264Sbill 	}
4432674Swnj 	/*
4442674Swnj 	 * Setup for the transfer, and get in the
4452674Swnj 	 * UNIBUS adaptor queue.
4462674Swnj 	 */
4472424Skre 	upaddr->updc = bp->b_cylin;
448264Sbill 	upaddr->upda = (tn << 8) + sn;
449264Sbill 	upaddr->upwc = -bp->b_bcount / sizeof (short);
450264Sbill 	if (bp->b_flags & B_READ)
4512629Swnj 		cmd = UP_IE|UP_RCOM|UP_GO;
452264Sbill 	else
4532629Swnj 		cmd = UP_IE|UP_WCOM|UP_GO;
4542571Swnj 	um->um_cmd = cmd;
4553107Swnj 	(void) ubago(ui);
456268Sbill 	return (1);
457264Sbill }
458264Sbill 
4592674Swnj /*
4602674Swnj  * Now all ready to go, stuff the registers.
4612674Swnj  */
4622571Swnj updgo(um)
4632983Swnj 	struct uba_ctlr *um;
4642395Swnj {
4652629Swnj 	register struct updevice *upaddr = (struct updevice *)um->um_addr;
4662470Swnj 
4676346Swnj 	um->um_tab.b_active++;	/* should now be 2 */
4682571Swnj 	upaddr->upba = um->um_ubinfo;
4692571Swnj 	upaddr->upcs1 = um->um_cmd|((um->um_ubinfo>>8)&0x300);
4702395Swnj }
4712395Swnj 
4722674Swnj /*
4732674Swnj  * Handle a disk interrupt.
4742674Swnj  */
4752707Swnj upintr(sc21)
4762395Swnj 	register sc21;
477264Sbill {
478264Sbill 	register struct buf *bp, *dp;
4792983Swnj 	register struct uba_ctlr *um = upminfo[sc21];
4802983Swnj 	register struct uba_device *ui;
4812629Swnj 	register struct updevice *upaddr = (struct updevice *)um->um_addr;
482264Sbill 	register unit;
4832470Swnj 	struct up_softc *sc = &up_softc[um->um_ctlr];
4842607Swnj 	int as = (upaddr->upas & 0377) | sc->sc_softas;
4852681Swnj 	int needie = 1, waitdry;
486264Sbill 
4872470Swnj 	sc->sc_wticks = 0;
4882607Swnj 	sc->sc_softas = 0;
4892674Swnj 	/*
4902674Swnj 	 * If controller wasn't transferring, then this is an
4912674Swnj 	 * interrupt for attention status on seeking drives.
4922674Swnj 	 * Just service them.
4932674Swnj 	 */
4946346Swnj 	if (um->um_tab.b_active != 2 && !sc->sc_recal) {
4952674Swnj 		if (upaddr->upcs1 & UP_TRE)
4962674Swnj 			upaddr->upcs1 = UP_TRE;
4972674Swnj 		goto doattn;
4982674Swnj 	}
4992674Swnj 	/*
5002674Swnj 	 * Get device and block structures, and a pointer
5012983Swnj 	 * to the uba_device for the drive.  Select the drive.
5022674Swnj 	 */
5032674Swnj 	dp = um->um_tab.b_actf;
5042674Swnj 	bp = dp->b_actf;
5052674Swnj 	ui = updinfo[dkunit(bp)];
5062674Swnj 	dk_busy &= ~(1 << ui->ui_dk);
5072674Swnj 	if ((upaddr->upcs2&07) != ui->ui_slave)
5082395Swnj 		upaddr->upcs2 = ui->ui_slave;
5092674Swnj 	/*
5102674Swnj 	 * Check for and process errors on
5112674Swnj 	 * either the drive or the controller.
5122674Swnj 	 */
5133445Sroot 	if ((upaddr->upds&UPDS_ERR) || (upaddr->upcs1&UP_TRE)) {
5142681Swnj 		waitdry = 0;
5153445Sroot 		while ((upaddr->upds & UPDS_DRY) == 0) {
5162681Swnj 			if (++waitdry > 512)
5172681Swnj 				break;
5182681Swnj 			upwaitdry++;
5192681Swnj 		}
5203445Sroot 		if (upaddr->uper1&UPER1_WLE) {
5212674Swnj 			/*
5222674Swnj 			 * Give up on write locked devices
5232674Swnj 			 * immediately.
5242674Swnj 			 */
5252931Swnj 			printf("up%d: write locked\n", dkunit(bp));
5262674Swnj 			bp->b_flags |= B_ERROR;
5272674Swnj 		} else if (++um->um_tab.b_errcnt > 27) {
5282674Swnj 			/*
5292674Swnj 			 * After 28 retries (16 without offset, and
5302674Swnj 			 * 12 with offset positioning) give up.
5312674Swnj 			 */
5322931Swnj 			harderr(bp, "up");
5332931Swnj 			printf("cs2=%b er1=%b er2=%b\n",
5342785Swnj 			    upaddr->upcs2, UPCS2_BITS,
5352785Swnj 			    upaddr->uper1, UPER1_BITS,
5362785Swnj 			    upaddr->uper2, UPER2_BITS);
5372674Swnj 			bp->b_flags |= B_ERROR;
5382674Swnj 		} else {
5392674Swnj 			/*
5402674Swnj 			 * Retriable error.
5412674Swnj 			 * If a soft ecc, correct it (continuing
5422674Swnj 			 * by returning if necessary.
5432674Swnj 			 * Otherwise fall through and retry the transfer
5442674Swnj 			 */
5452674Swnj 			um->um_tab.b_active = 0;	 /* force retry */
5463445Sroot 			if ((upaddr->uper1&(UPER1_DCK|UPER1_ECH))==UPER1_DCK)
5472629Swnj 				if (upecc(ui))
5482629Swnj 					return;
5492674Swnj 		}
5502674Swnj 		/*
5512674Swnj 		 * Clear drive error and, every eight attempts,
5522674Swnj 		 * (starting with the fourth)
5532674Swnj 		 * recalibrate to clear the slate.
5542674Swnj 		 */
5552674Swnj 		upaddr->upcs1 = UP_TRE|UP_IE|UP_DCLR|UP_GO;
5562674Swnj 		needie = 0;
5573182Swnj 		if ((um->um_tab.b_errcnt&07) == 4 && um->um_tab.b_active == 0) {
5582674Swnj 			upaddr->upcs1 = UP_RECAL|UP_IE|UP_GO;
5593160Swnj 			sc->sc_recal = 0;
5603160Swnj 			goto nextrecal;
5612674Swnj 		}
5622674Swnj 	}
5632674Swnj 	/*
5643160Swnj 	 * Advance recalibration finite state machine
5653160Swnj 	 * if recalibrate in progress, through
5663160Swnj 	 *	RECAL
5673160Swnj 	 *	SEEK
5683160Swnj 	 *	OFFSET (optional)
5693160Swnj 	 *	RETRY
5702674Swnj 	 */
5713160Swnj 	switch (sc->sc_recal) {
5723160Swnj 
5733160Swnj 	case 1:
5743160Swnj 		upaddr->updc = bp->b_cylin;
5753160Swnj 		upaddr->upcs1 = UP_SEEK|UP_IE|UP_GO;
5763160Swnj 		goto nextrecal;
5773160Swnj 	case 2:
5783160Swnj 		if (um->um_tab.b_errcnt < 16 || (bp->b_flags&B_READ) == 0)
5793160Swnj 			goto donerecal;
5803445Sroot 		upaddr->upof = up_offset[um->um_tab.b_errcnt & 017] | UPOF_FMT22;
5813160Swnj 		upaddr->upcs1 = UP_IE|UP_OFFSET|UP_GO;
5823160Swnj 		goto nextrecal;
5833160Swnj 	nextrecal:
5843160Swnj 		sc->sc_recal++;
5853160Swnj 		um->um_tab.b_active = 1;
5863160Swnj 		return;
5873160Swnj 	donerecal:
5883160Swnj 	case 3:
5892674Swnj 		sc->sc_recal = 0;
5903160Swnj 		um->um_tab.b_active = 0;
5913160Swnj 		break;
5922674Swnj 	}
5932674Swnj 	/*
5942674Swnj 	 * If still ``active'', then don't need any more retries.
5952674Swnj 	 */
5962674Swnj 	if (um->um_tab.b_active) {
5972674Swnj 		/*
5982674Swnj 		 * If we were offset positioning,
5992674Swnj 		 * return to centerline.
6002674Swnj 		 */
6012674Swnj 		if (um->um_tab.b_errcnt >= 16) {
6023445Sroot 			upaddr->upof = UPOF_FMT22;
6032674Swnj 			upaddr->upcs1 = UP_RTC|UP_GO|UP_IE;
6043445Sroot 			while (upaddr->upds & UPDS_PIP)
6052674Swnj 				DELAY(25);
606268Sbill 			needie = 0;
607264Sbill 		}
6082674Swnj 		um->um_tab.b_active = 0;
6092674Swnj 		um->um_tab.b_errcnt = 0;
6102674Swnj 		um->um_tab.b_actf = dp->b_forw;
6112674Swnj 		dp->b_active = 0;
6122674Swnj 		dp->b_errcnt = 0;
6132674Swnj 		dp->b_actf = bp->av_forw;
6142674Swnj 		bp->b_resid = (-upaddr->upwc * sizeof(short));
6152674Swnj 		iodone(bp);
6162674Swnj 		/*
6172674Swnj 		 * If this unit has more work to do,
6182674Swnj 		 * then start it up right away.
6192674Swnj 		 */
6202674Swnj 		if (dp->b_actf)
6212674Swnj 			if (upustart(ui))
622268Sbill 				needie = 0;
623264Sbill 	}
6242674Swnj 	as &= ~(1<<ui->ui_slave);
6253403Swnj 	/*
6263403Swnj 	 * Release unibus resources and flush data paths.
6273403Swnj 	 */
6283403Swnj 	ubadone(um);
6292674Swnj doattn:
6302674Swnj 	/*
6312674Swnj 	 * Process other units which need attention.
6322674Swnj 	 * For each unit which needs attention, call
6332674Swnj 	 * the unit start routine to place the slave
6342674Swnj 	 * on the controller device queue.
6352674Swnj 	 */
6363160Swnj 	while (unit = ffs(as)) {
6373160Swnj 		unit--;		/* was 1 origin */
6383160Swnj 		as &= ~(1<<unit);
6393160Swnj 		upaddr->upas = 1<<unit;
6406383Swnj 		if (unit < UPIPUNITS && upustart(upip[sc21][unit]))
6413160Swnj 			needie = 0;
6423160Swnj 	}
6432674Swnj 	/*
6442674Swnj 	 * If the controller is not transferring, but
6452674Swnj 	 * there are devices ready to transfer, start
6462674Swnj 	 * the controller.
6472674Swnj 	 */
6482395Swnj 	if (um->um_tab.b_actf && um->um_tab.b_active == 0)
6492395Swnj 		if (upstart(um))
650268Sbill 			needie = 0;
651275Sbill 	if (needie)
6522629Swnj 		upaddr->upcs1 = UP_IE;
653264Sbill }
654264Sbill 
655264Sbill upread(dev)
6562616Swnj 	dev_t dev;
657264Sbill {
6582616Swnj 	register int unit = minor(dev) >> 3;
6592470Swnj 
6602616Swnj 	if (unit >= NUP)
6612616Swnj 		u.u_error = ENXIO;
6622616Swnj 	else
6632616Swnj 		physio(upstrategy, &rupbuf[unit], dev, B_READ, minphys);
664264Sbill }
665264Sbill 
666264Sbill upwrite(dev)
6672616Swnj 	dev_t dev;
668264Sbill {
6692616Swnj 	register int unit = minor(dev) >> 3;
6702470Swnj 
6712616Swnj 	if (unit >= NUP)
6722616Swnj 		u.u_error = ENXIO;
6732616Swnj 	else
6742616Swnj 		physio(upstrategy, &rupbuf[unit], dev, B_WRITE, minphys);
675264Sbill }
676264Sbill 
677266Sbill /*
678266Sbill  * Correct an ECC error, and restart the i/o to complete
679266Sbill  * the transfer if necessary.  This is quite complicated because
680266Sbill  * the transfer may be going to an odd memory address base and/or
681266Sbill  * across a page boundary.
682266Sbill  */
6832395Swnj upecc(ui)
6842983Swnj 	register struct uba_device *ui;
685264Sbill {
6862629Swnj 	register struct updevice *up = (struct updevice *)ui->ui_addr;
6872395Swnj 	register struct buf *bp = uputab[ui->ui_unit].b_actf;
6882983Swnj 	register struct uba_ctlr *um = ui->ui_mi;
6892395Swnj 	register struct upst *st;
6902395Swnj 	struct uba_regs *ubp = ui->ui_hd->uh_uba;
691266Sbill 	register int i;
692264Sbill 	caddr_t addr;
693266Sbill 	int reg, bit, byte, npf, mask, o, cmd, ubaddr;
694264Sbill 	int bn, cn, tn, sn;
695264Sbill 
696264Sbill 	/*
697266Sbill 	 * Npf is the number of sectors transferred before the sector
698266Sbill 	 * containing the ECC error, and reg is the UBA register
699266Sbill 	 * mapping (the first part of) the transfer.
700266Sbill 	 * O is offset within a memory page of the first byte transferred.
701264Sbill 	 */
702266Sbill 	npf = btop((up->upwc * sizeof(short)) + bp->b_bcount) - 1;
7032571Swnj 	reg = btop(um->um_ubinfo&0x3ffff) + npf;
704264Sbill 	o = (int)bp->b_un.b_addr & PGOFSET;
7052983Swnj 	printf("up%d%c: soft ecc sn%d\n", dkunit(bp),
7062889Swnj 	    'a'+(minor(bp->b_dev)&07), bp->b_blkno + npf);
707264Sbill 	mask = up->upec2;
7083445Sroot #ifdef UPECCDEBUG
7093403Swnj 	printf("npf %d reg %x o %d mask %o pos %d\n", npf, reg, o, mask,
7103403Swnj 	    up->upec1);
7113445Sroot #endif
712266Sbill 	/*
713266Sbill 	 * Flush the buffered data path, and compute the
714266Sbill 	 * byte and bit position of the error.  The variable i
715266Sbill 	 * is the byte offset in the transfer, the variable byte
716266Sbill 	 * is the offset from a page boundary in main memory.
717266Sbill 	 */
7182725Swnj 	ubapurge(um);
719266Sbill 	i = up->upec1 - 1;		/* -1 makes 0 origin */
720266Sbill 	bit = i&07;
721266Sbill 	i = (i&~07)>>3;
722264Sbill 	byte = i + o;
723266Sbill 	/*
724266Sbill 	 * Correct while possible bits remain of mask.  Since mask
725266Sbill 	 * contains 11 bits, we continue while the bit offset is > -11.
726266Sbill 	 * Also watch out for end of this block and the end of the whole
727266Sbill 	 * transfer.
728266Sbill 	 */
729266Sbill 	while (i < 512 && (int)ptob(npf)+i < bp->b_bcount && bit > -11) {
730266Sbill 		addr = ptob(ubp->uba_map[reg+btop(byte)].pg_pfnum)+
731266Sbill 		    (byte & PGOFSET);
7323445Sroot #ifdef UPECCDEBUG
7333403Swnj 		printf("addr %x map reg %x\n",
7343403Swnj 		    addr, *(int *)(&ubp->uba_map[reg+btop(byte)]));
7353403Swnj 		printf("old: %x, ", getmemc(addr));
7363445Sroot #endif
737266Sbill 		putmemc(addr, getmemc(addr)^(mask<<bit));
7383445Sroot #ifdef UPECCDEBUG
7393403Swnj 		printf("new: %x\n", getmemc(addr));
7403445Sroot #endif
741266Sbill 		byte++;
742266Sbill 		i++;
743266Sbill 		bit -= 8;
744264Sbill 	}
7456346Swnj 	um->um_tab.b_active = 2;	/* Either complete or continuing... */
746264Sbill 	if (up->upwc == 0)
747264Sbill 		return (0);
748266Sbill 	/*
749266Sbill 	 * Have to continue the transfer... clear the drive,
750266Sbill 	 * and compute the position where the transfer is to continue.
751266Sbill 	 * We have completed npf+1 sectors of the transfer already;
752266Sbill 	 * restart at offset o of next sector (i.e. in UBA register reg+1).
753266Sbill 	 */
7542629Swnj #ifdef notdef
7552629Swnj 	up->uper1 = 0;
7562629Swnj 	up->upcs1 |= UP_GO;
7572629Swnj #else
7582629Swnj 	up->upcs1 = UP_TRE|UP_IE|UP_DCLR|UP_GO;
759264Sbill 	bn = dkblock(bp);
7602395Swnj 	st = &upst[ui->ui_type];
761264Sbill 	cn = bp->b_cylin;
7622395Swnj 	sn = bn%st->nspc + npf + 1;
7632395Swnj 	tn = sn/st->nsect;
7642395Swnj 	sn %= st->nsect;
7652395Swnj 	cn += tn/st->ntrak;
7662395Swnj 	tn %= st->ntrak;
767264Sbill 	up->updc = cn;
768266Sbill 	up->upda = (tn << 8) | sn;
769266Sbill 	ubaddr = (int)ptob(reg+1) + o;
770266Sbill 	up->upba = ubaddr;
771266Sbill 	cmd = (ubaddr >> 8) & 0x300;
7722629Swnj 	cmd |= UP_IE|UP_GO|UP_RCOM;
773266Sbill 	up->upcs1 = cmd;
7742629Swnj #endif
775264Sbill 	return (1);
776264Sbill }
777286Sbill 
778286Sbill /*
779286Sbill  * Reset driver after UBA init.
780286Sbill  * Cancel software state of all pending transfers
781286Sbill  * and restart all units and the controller.
782286Sbill  */
7832395Swnj upreset(uban)
7842931Swnj 	int uban;
785286Sbill {
7862983Swnj 	register struct uba_ctlr *um;
7872983Swnj 	register struct uba_device *ui;
7882395Swnj 	register sc21, unit;
789286Sbill 
7902646Swnj 	for (sc21 = 0; sc21 < NSC; sc21++) {
7912470Swnj 		if ((um = upminfo[sc21]) == 0 || um->um_ubanum != uban ||
7922470Swnj 		    um->um_alive == 0)
7932395Swnj 			continue;
7942931Swnj 		printf(" sc%d", sc21);
7952395Swnj 		um->um_tab.b_active = 0;
7962395Swnj 		um->um_tab.b_actf = um->um_tab.b_actl = 0;
7972931Swnj 		up_softc[sc21].sc_recal = 0;
7986346Swnj 		up_softc[sc21].sc_wticks = 0;
7992571Swnj 		if (um->um_ubinfo) {
8002571Swnj 			printf("<%d>", (um->um_ubinfo>>28)&0xf);
8012616Swnj 			ubadone(um);
8022395Swnj 		}
8033445Sroot 		((struct updevice *)(um->um_addr))->upcs2 = UPCS2_CLR;
8042395Swnj 		for (unit = 0; unit < NUP; unit++) {
8052395Swnj 			if ((ui = updinfo[unit]) == 0)
8062395Swnj 				continue;
8072931Swnj 			if (ui->ui_alive == 0 || ui->ui_mi != um)
8082395Swnj 				continue;
8092395Swnj 			uputab[unit].b_active = 0;
8102395Swnj 			(void) upustart(ui);
8112395Swnj 		}
8122395Swnj 		(void) upstart(um);
813286Sbill 	}
814286Sbill }
815313Sbill 
816313Sbill /*
817313Sbill  * Wake up every second and if an interrupt is pending
818313Sbill  * but nothing has happened increment a counter.
8192931Swnj  * If nothing happens for 20 seconds, reset the UNIBUS
820313Sbill  * and begin anew.
821313Sbill  */
822313Sbill upwatch()
823313Sbill {
8242983Swnj 	register struct uba_ctlr *um;
8252395Swnj 	register sc21, unit;
8262470Swnj 	register struct up_softc *sc;
827313Sbill 
8282759Swnj 	timeout(upwatch, (caddr_t)0, hz);
8292646Swnj 	for (sc21 = 0; sc21 < NSC; sc21++) {
8302395Swnj 		um = upminfo[sc21];
8312470Swnj 		if (um == 0 || um->um_alive == 0)
8322470Swnj 			continue;
8332470Swnj 		sc = &up_softc[sc21];
8342395Swnj 		if (um->um_tab.b_active == 0) {
8352395Swnj 			for (unit = 0; unit < NUP; unit++)
8362629Swnj 				if (uputab[unit].b_active &&
8372629Swnj 				    updinfo[unit]->ui_mi == um)
8382395Swnj 					goto active;
8392470Swnj 			sc->sc_wticks = 0;
8402395Swnj 			continue;
8412395Swnj 		}
8422931Swnj active:
8432470Swnj 		sc->sc_wticks++;
8442470Swnj 		if (sc->sc_wticks >= 20) {
8452470Swnj 			sc->sc_wticks = 0;
8462931Swnj 			printf("sc%d: lost interrupt\n", sc21);
8472646Swnj 			ubareset(um->um_ubanum);
8482395Swnj 		}
849313Sbill 	}
850313Sbill }
8512379Swnj 
8522379Swnj #define	DBSIZE	20
8532379Swnj 
8542379Swnj updump(dev)
8552379Swnj 	dev_t dev;
8562379Swnj {
8572629Swnj 	struct updevice *upaddr;
8582379Swnj 	char *start;
8593107Swnj 	int num, blk, unit;
8602379Swnj 	struct size *sizes;
8612395Swnj 	register struct uba_regs *uba;
8622983Swnj 	register struct uba_device *ui;
8632379Swnj 	register short *rp;
8642395Swnj 	struct upst *st;
8652379Swnj 
8662395Swnj 	unit = minor(dev) >> 3;
8672889Swnj 	if (unit >= NUP)
8682889Swnj 		return (ENXIO);
8692470Swnj #define	phys(cast, addr) ((cast)((int)addr & 0x7fffffff))
8702983Swnj 	ui = phys(struct uba_device *, updinfo[unit]);
8712889Swnj 	if (ui->ui_alive == 0)
8722889Swnj 		return (ENXIO);
8732395Swnj 	uba = phys(struct uba_hd *, ui->ui_hd)->uh_physuba;
8742983Swnj 	ubainit(uba);
8752629Swnj 	upaddr = (struct updevice *)ui->ui_physaddr;
8762983Swnj 	DELAY(2000000);
8772379Swnj 	num = maxfree;
8782379Swnj 	start = 0;
8792379Swnj 	upaddr->upcs2 = unit;
8802983Swnj 	DELAY(100);
8812983Swnj 	if ((upaddr->upcs1&UP_DVA) == 0)
8822983Swnj 		return (EFAULT);
8833445Sroot 	if ((upaddr->upds & UPDS_VV) == 0) {
8842629Swnj 		upaddr->upcs1 = UP_DCLR|UP_GO;
8852629Swnj 		upaddr->upcs1 = UP_PRESET|UP_GO;
8863445Sroot 		upaddr->upof = UPOF_FMT22;
8872379Swnj 	}
8883445Sroot 	if ((upaddr->upds & UPDS_DREADY) != UPDS_DREADY)
8892889Swnj 		return (EFAULT);
8902470Swnj 	st = &upst[ui->ui_type];
8912395Swnj 	sizes = phys(struct size *, st->sizes);
8922889Swnj 	if (dumplo < 0 || dumplo + num >= sizes[minor(dev)&07].nblocks)
8932889Swnj 		return (EINVAL);
8942379Swnj 	while (num > 0) {
8952379Swnj 		register struct pte *io;
8962379Swnj 		register int i;
8972379Swnj 		int cn, sn, tn;
8982379Swnj 		daddr_t bn;
8992379Swnj 
9002379Swnj 		blk = num > DBSIZE ? DBSIZE : num;
9012395Swnj 		io = uba->uba_map;
9022379Swnj 		for (i = 0; i < blk; i++)
9032983Swnj 			*(int *)io++ = (btop(start)+i) | (1<<21) | UBAMR_MRV;
9042379Swnj 		*(int *)io = 0;
9052379Swnj 		bn = dumplo + btop(start);
9062607Swnj 		cn = bn/st->nspc + sizes[minor(dev)&07].cyloff;
9072607Swnj 		sn = bn%st->nspc;
9082607Swnj 		tn = sn/st->nsect;
9092607Swnj 		sn = sn%st->nsect;
9102379Swnj 		upaddr->updc = cn;
9112379Swnj 		rp = (short *) &upaddr->upda;
9122379Swnj 		*rp = (tn << 8) + sn;
9132379Swnj 		*--rp = 0;
9142379Swnj 		*--rp = -blk*NBPG / sizeof (short);
9152629Swnj 		*--rp = UP_GO|UP_WCOM;
9162379Swnj 		do {
9172379Swnj 			DELAY(25);
9182629Swnj 		} while ((upaddr->upcs1 & UP_RDY) == 0);
9193445Sroot 		if (upaddr->upds&UPDS_ERR)
9202889Swnj 			return (EIO);
9212379Swnj 		start += blk*NBPG;
9222379Swnj 		num -= blk;
9232379Swnj 	}
9242379Swnj 	return (0);
9252379Swnj }
9261902Swnj #endif
927