1272Sbill int trc = -1; 2272Sbill int trcw = 0; 3271Sbill int csdel0 = 30; 4272Sbill int csdel1 = 0; 5272Sbill int csdel2 = 0; 6268Sbill int asdel = 500; 7272Sbill int csdel3 = 100; 8272Sbill int softas; 9*273Sbill /* 10/14/12 3.9 06/19/80 */ 10264Sbill 11264Sbill /* 12264Sbill * Emulex UNIBUS disk driver with overlapped seeks and ECC recovery. 13264Sbill * 14266Sbill * NB: This device is very sensitive: be aware that the code is the way 15266Sbill * it is for good reason and that there are delay loops here which may 16266Sbill * have to be lengthened if your processor is faster and which should 17266Sbill * probably be shortened if your processor is slower. 18266Sbill * 19264Sbill * This driver has been tested on a SC-11B Controller, configured 20264Sbill * with the following internal switch settings: 21264Sbill * SW1-1 5/19 surfaces (off, 19 surfaces on Ampex 9300) 22264Sbill * SW1-2 chksum enable (off, checksum disabled) 23264Sbill * SW1-3 volume select (off, 815 cylinders) 24264Sbill * SW1-4 sector select (on, 32 sectors) 25264Sbill * SW1-5 unused (off) 26264Sbill * SW1-6 port select (on, single port) 27264Sbill * SW1-7 npr delay (off, disable) 28264Sbill * SW1-8 ecc test mode (off, disable) 29264Sbill * and top mounted switches: 30264Sbill * SW2-1 extend opcodes (off=open, disable) 31264Sbill * SW2-2 extend diag (off=open, disable) 32264Sbill * SW2-3 4 wd dma burst (off=open, disable) 33264Sbill * SW2-4 unused (off=open) 34264Sbill * 35264Sbill * The controller transfers data much more rapidly with SW2-3 set, 36264Sbill * but we have previously experienced problems with it set this way. 37264Sbill * We intend to try this again in the near future. 38264Sbill * 39264Sbill * wnj June 14, 1980 40264Sbill */ 41264Sbill 42264Sbill #include "../h/param.h" 43264Sbill #include "../h/systm.h" 44264Sbill #include "../h/buf.h" 45264Sbill #include "../h/conf.h" 46264Sbill #include "../h/dir.h" 47264Sbill #include "../h/user.h" 48264Sbill #include "../h/map.h" 49264Sbill #include "../h/mba.h" 50264Sbill #include "../h/mtpr.h" 51264Sbill #include "../h/pte.h" 52264Sbill #include "../h/uba.h" 53264Sbill #include "../h/vm.h" 54264Sbill 55264Sbill /* 56264Sbill * Define number of drives, and range of sampling information to be used. 57264Sbill * 58264Sbill * Normally, DK_N .. DK_N+NUP-1 gather individual drive stats, 59264Sbill * and DK_N+NUP gathers controller transferring stats. 60264Sbill * 61264Sbill * If DK_N+NUP > DK_NMAX, then transfer stats are divided per drive. 62264Sbill * If DK_NMAX is yet smaller, some drives are not monitored. 63264Sbill */ 64264Sbill #define DK_N 1 65264Sbill #define DK_NMAX 2 66264Sbill 67264Sbill #define ushort unsigned short 68264Sbill 69264Sbill struct device 70264Sbill { 71264Sbill ushort upcs1; /* control and status register 1 */ 72264Sbill short upwc; /* word count register */ 73264Sbill ushort upba; /* UNIBUS address register */ 74264Sbill ushort upda; /* desired address register */ 75264Sbill ushort upcs2; /* control and status register 2 */ 76264Sbill ushort upds; /* drive Status */ 77264Sbill ushort uper1; /* error register 1 */ 78264Sbill ushort upas; /* attention summary */ 79264Sbill ushort upla; /* look ahead */ 80264Sbill ushort updb; /* data buffer */ 81264Sbill ushort upmr; /* maintenance */ 82264Sbill ushort updt; /* drive type */ 83264Sbill ushort upsn; /* serial number */ 84264Sbill ushort upof; /* offset register */ 85264Sbill ushort updc; /* desired cylinder address register */ 86264Sbill ushort upcc; /* current cylinder */ 87264Sbill ushort uper2; /* error register 2 */ 88264Sbill ushort uper3; /* error register 3 */ 89264Sbill ushort upec1; /* burst error bit position */ 90264Sbill ushort upec2; /* burst error bit pattern */ 91264Sbill }; 92264Sbill 93264Sbill #define UPADDR ((struct device *)(UBA0_DEV + 0176700)) 94264Sbill 95264Sbill #define NUP 2 /* Number of drives this installation */ 96264Sbill 97264Sbill #define NSECT 32 98264Sbill #define NTRAC 19 99264Sbill 100264Sbill /* 101264Sbill * Constants controlling on-cylinder SEARCH usage. 102264Sbill * 103264Sbill * We assume that it takes SDIST sectors of time to set up a transfer. 104264Sbill * If a drive is on-cylinder, and between SDIST and SDIST+RDIST sectors 105264Sbill * from the first sector to be transferred, then we just perform the 106264Sbill * transfer. SDIST represents interrupt latency, RDIST the amount 107264Sbill * of rotation which is tolerable to avoid another interrupt. 108264Sbill */ 109266Sbill #define SDIST 3 /* 2-3 sectors 1-1.5 msec */ 110266Sbill #define RDIST 6 /* 5-6 sectors 2.5-3 msec */ 111264Sbill 112264Sbill /* 113264Sbill * To fill a 300M drive: 114264Sbill * A is designed to be used as a root. 115264Sbill * B is suitable for a swap area. 116264Sbill * H is the primary storage area. 117264Sbill * On systems with RP06'es, we normally use only 291346 blocks of the H 118264Sbill * area, and use DEF or G to cover the rest of the drive. The C system 119264Sbill * covers the whole drive and can be used for pack-pack copying. 120264Sbill */ 121264Sbill struct size 122264Sbill { 123264Sbill daddr_t nblocks; 124264Sbill int cyloff; 125264Sbill } up_sizes[8] = { 126264Sbill 15884, 0, /* A=cyl 0 thru 26 */ 127264Sbill 33440, 27, /* B=cyl 27 thru 81 */ 128264Sbill 494912, 0, /* C=cyl 0 thru 814 */ 129264Sbill 15884, 562, /* D=cyl 562 thru 588 */ 130264Sbill 55936, 589, /* E=cyl 589 thru 680 */ 131264Sbill 81472, 681, /* F=cyl 681 thru 814 */ 132264Sbill 153824, 562, /* G=cyl 562 thru 814 */ 133264Sbill 445664, 82, /* H=cyl 82 thru 814 */ 134264Sbill /* Later, and more safely for H area... 135264Sbill 291346, 82, /* H=cyl 82 thru 561 */ 136264Sbill }; 137264Sbill 138264Sbill /* 139264Sbill * The following defines are used in offset positioning 140264Sbill * when trying to recover disk errors, with the constants being 141264Sbill * +/- microinches. Note that header compare inhibit (HCI) is not 142264Sbill * tried (this makes sense only during read, in any case.) 143264Sbill * 144264Sbill * ARE ALL THESE IMPLEMENTED ON 9300? 145264Sbill */ 146264Sbill #define P400 020 147264Sbill #define M400 0220 148264Sbill #define P800 040 149264Sbill #define M800 0240 150264Sbill #define P1200 060 151264Sbill #define M1200 0260 152264Sbill #define HCI 020000 153264Sbill 154264Sbill int up_offset[16] = 155264Sbill { 156264Sbill P400, M400, P400, M400, 157264Sbill P800, M800, P800, M800, 158264Sbill P1200, M1200, P1200, M1200, 159264Sbill 0, 0, 0, 0, 160264Sbill }; 161264Sbill 162264Sbill /* 163264Sbill * Each drive has a table uputab[i]. On this table are sorted the 164264Sbill * pending requests implementing an elevator algorithm (see dsort.c.) 165264Sbill * In the upustart() routine, each drive is independently advanced 166264Sbill * until it is on the desired cylinder for the next transfer and near 167264Sbill * the desired sector. The drive is then chained onto the uptab 168264Sbill * table, and the transfer is initiated by the upstart() routine. 169264Sbill * When the transfer is completed the driver reinvokes the upustart() 170264Sbill * routine to set up the next transfer. 171264Sbill */ 172264Sbill struct buf uptab; 173264Sbill struct buf uputab[NUP]; 174264Sbill 175264Sbill struct buf rupbuf; /* Buffer for raw i/o */ 176264Sbill 177264Sbill /* Drive commands, placed in upcs1 */ 178264Sbill #define GO 01 /* Go bit, set in all commands */ 179264Sbill #define PRESET 020 /* Preset drive at init or after errors */ 180264Sbill #define OFFSET 014 /* Offset heads to try to recover error */ 181264Sbill #define RTC 016 /* Return to center-line after OFFSET */ 182264Sbill #define SEARCH 030 /* Search for cylinder+sector */ 183264Sbill #define RECAL 06 /* Recalibrate, needed after seek error */ 184264Sbill #define DCLR 010 /* Drive clear, after error */ 185264Sbill #define WCOM 060 /* Write */ 186264Sbill #define RCOM 070 /* Read */ 187264Sbill 188264Sbill /* Other bits of upcs1 */ 189264Sbill #define IE 0100 /* Controller wide interrupt enable */ 190264Sbill #define TRE 040000 /* Transfer error */ 191266Sbill #define RDY 020 /* Transfer terminated */ 192264Sbill 193264Sbill /* Drive status bits of upds */ 194264Sbill #define PIP 020000 /* Positioning in progress */ 195264Sbill #define ERR 040000 /* Error has occurred, DCLR necessary */ 196264Sbill #define VV 0100 /* Volume is valid, set by PRESET */ 197264Sbill #define DPR 0400 /* Drive has been preset */ 198264Sbill #define MOL 010000 /* Drive is online, heads loaded, etc */ 199264Sbill #define DRY 0200 /* Drive ready */ 200264Sbill 201264Sbill /* Bits of uper1 */ 202264Sbill #define DCK 0100000 /* Ecc error occurred */ 203264Sbill #define ECH 0100 /* Ecc error was unrecoverable */ 204264Sbill #define WLE 04000 /* Attempt to write read-only drive */ 205264Sbill 206264Sbill /* Bits of upof; the offset bits above are also in this register */ 207264Sbill #define FMT22 010000 /* 16 bits/word, must be always set */ 208264Sbill 209264Sbill #define b_cylin b_resid 210264Sbill 211264Sbill int up_ubinfo; /* Information about UBA usage saved here */ 212264Sbill /* 213264Sbill * The EMULEX controller balks if accessed quickly after 214264Sbill * certain operations. The exact timing has not yet been 215264Sbill * determined, but delays are known to be needed when changing 216264Sbill * the selected drive (by writing in upcs2), and thought to be 217264Sbill * needed after operations like PRESET and DCLR. The following 218264Sbill * variables control the delay, DELAY(n) is approximately n usec. 219264Sbill */ 220264Sbill int idelay = 500; /* Delay after PRESET or DCLR */ 221268Sbill int sdelay = 150; /* Delay after selecting drive in upcs2 */ 222264Sbill 223264Sbill #define DELAY(N) { register int d; d = N; while (--d > 0); } 224264Sbill 225264Sbill int nwaitcs2; /* How many sdelay loops ? */ 226264Sbill int neasycs2; /* How many sdelay loops not needed ? */ 227264Sbill 228264Sbill #ifdef INTRLVE 229264Sbill daddr_t dkblock(); 230264Sbill #endif 231264Sbill 232264Sbill /* 233264Sbill * Queue an i/o request for a drive, checking first that it is in range. 234264Sbill * 235264Sbill * A unit start is issued if the drive is inactive, causing 236264Sbill * a SEARCH for the correct cylinder/sector. If the drive is 237264Sbill * already nearly on the money and the controller is not transferring 238264Sbill * we kick it to start the transfer. 239264Sbill */ 240264Sbill upstrategy(bp) 241264Sbill register struct buf *bp; 242264Sbill { 243264Sbill register struct buf *dp; 244264Sbill register unit, xunit; 245264Sbill long sz, bn; 246264Sbill 247264Sbill xunit = minor(bp->b_dev) & 077; 248264Sbill sz = bp->b_bcount; 249264Sbill sz = (sz+511) >> 9; /* transfer size in 512 byte sectors */ 250264Sbill unit = dkunit(bp); 251264Sbill if (unit >= NUP || 252264Sbill bp->b_blkno < 0 || 253264Sbill (bn = dkblock(bp))+sz > up_sizes[xunit&07].nblocks) { 254264Sbill bp->b_flags |= B_ERROR; 255264Sbill iodone(bp); 256264Sbill return; 257264Sbill } 258264Sbill bp->b_cylin = bn/(NSECT*NTRAC) + up_sizes[xunit&07].cyloff; 259264Sbill dp = &uputab[unit]; 260264Sbill (void) spl5(); 261264Sbill disksort(dp, bp); 262264Sbill if (dp->b_active == 0) { 263268Sbill (void) upustart(unit); 264264Sbill if (uptab.b_actf && uptab.b_active == 0) 265268Sbill (void) upstart(); 266264Sbill } 267264Sbill (void) spl0(); 268264Sbill } 269264Sbill 270264Sbill /* 271264Sbill * Start activity on specified drive; called when drive is inactive 272264Sbill * and new transfer request arrives and also when upas indicates that 273264Sbill * a SEARCH command is complete. 274264Sbill */ 275264Sbill upustart(unit) 276264Sbill register unit; 277264Sbill { 278264Sbill register struct buf *bp, *dp; 279264Sbill register struct device *upaddr = UPADDR; 280264Sbill daddr_t bn; 281264Sbill int sn, cn, csn; 282268Sbill int didie = 0; 283264Sbill 284266Sbill if (unit >= NUP) 285268Sbill goto out; 286272Sbill if (uptab.b_active) { 287272Sbill softas |= 1<<unit; 288272Sbill return; 289272Sbill } 290266Sbill /* 291266Sbill * Whether or not it was before, this unit is no longer busy. 292266Sbill * Check to see if there is (still or now) a request in this 293266Sbill * drives queue, and if there is, select this unit. 294266Sbill */ 295264Sbill if (unit+DK_N <= DK_NMAX) 296264Sbill dk_busy &= ~(1<<(unit+DK_N)); 297264Sbill dp = &uputab[unit]; 298266Sbill if ((bp = dp->b_actf) == NULL) 299268Sbill goto out; 300264Sbill if ((upaddr->upcs2 & 07) != unit) { 301264Sbill upaddr->upcs2 = unit; 302264Sbill DELAY(sdelay); 303264Sbill nwaitcs2++; 304264Sbill } else 305264Sbill neasycs2++; 306266Sbill /* 307266Sbill * If we have changed packs or just initialized, 308266Sbill * the the volume will not be valid; if so, clear 309266Sbill * the drive, preset it and put in 16bit/word mode. 310266Sbill */ 311266Sbill if ((upaddr->upds & VV) == 0) { 312266Sbill upaddr->upcs1 = IE|DCLR|GO; 313266Sbill DELAY(idelay); 314264Sbill upaddr->upcs1 = IE|PRESET|GO; 315264Sbill DELAY(idelay); 316264Sbill upaddr->upof = FMT22; 317268Sbill didie = 1; 318264Sbill } 319264Sbill /* 320266Sbill * We are called from upstrategy when a new request arrives 321266Sbill * if we are not already active (with dp->b_active == 0), 322266Sbill * and we then set dp->b_active to 1 if we are to SEARCH 323266Sbill * for the desired cylinder, or 2 if we are on-cylinder. 324266Sbill * If we SEARCH then we will later be called from upintr() 325266Sbill * when the search is complete, and will link this disk onto 326266Sbill * the uptab. We then set dp->b_active to 2 so that upintr() 327266Sbill * will not call us again. 328266Sbill * 329266Sbill * NB: Other drives clear the bit in the attention status 330266Sbill * (i.e. upas) register corresponding to the drive when they 331266Sbill * place the drive on the ready (i.e. uptab) queue. This does 332266Sbill * not work with the Emulex, as the controller hangs the UBA 333266Sbill * of the VAX shortly after the upas register is set, for 334266Sbill * reasons unknown. This only occurs in multi-spindle configurations, 335266Sbill * but to avoid the problem we use the fact that dp->b_active is 336266Sbill * 2 to replace the clearing of the upas bit. 337264Sbill */ 338266Sbill if (dp->b_active) 339264Sbill goto done; 340266Sbill dp->b_active = 1; 341264Sbill if ((upaddr->upds & (DPR|MOL)) != (DPR|MOL)) 342266Sbill goto done; /* Will redetect error in upstart() soon */ 343264Sbill 344266Sbill /* 345266Sbill * Do enough of the disk address decoding to determine 346266Sbill * which cylinder and sector the request is on. 347266Sbill * Then compute the number of the sector SDIST sectors before 348266Sbill * the one where the transfer is to start, this being the 349266Sbill * point where we wish to attempt to begin the transfer, 350266Sbill * allowing approximately SDIST/2 msec for interrupt latency 351266Sbill * and preparation of the request. 352266Sbill * 353266Sbill * If we are on the correct cylinder and the desired sector 354266Sbill * lies between SDIST and SDIST+RDIST sectors ahead of us, then 355266Sbill * we don't bother to SEARCH but just begin the transfer asap. 356266Sbill */ 357264Sbill bn = dkblock(bp); 358264Sbill cn = bp->b_cylin; 359264Sbill sn = bn%(NSECT*NTRAC); 360264Sbill sn = (sn+NSECT-SDIST)%NSECT; 361264Sbill 362266Sbill if (cn - upaddr->updc) 363266Sbill goto search; /* Not on-cylinder */ 364264Sbill csn = (upaddr->upla>>6) - sn - 1; 365266Sbill if (csn < 0) 366264Sbill csn += NSECT; 367266Sbill if (csn > NSECT-RDIST) 368264Sbill goto done; 369264Sbill 370264Sbill search: 371264Sbill upaddr->updc = cn; 372264Sbill upaddr->upda = sn; 373264Sbill upaddr->upcs1 = IE|SEARCH|GO; 374268Sbill didie = 1; 375266Sbill /* 376266Sbill * Mark this unit busy. 377266Sbill */ 378264Sbill unit += DK_N; 379264Sbill if (unit <= DK_NMAX) { 380264Sbill dk_busy |= 1<<unit; 381264Sbill dk_numb[unit]++; 382264Sbill } 383270Sbill if (csdel0) DELAY(csdel0); 384268Sbill goto out; 385264Sbill 386264Sbill done: 387266Sbill /* 388266Sbill * This unit is ready to go. Make active == 2 so 389266Sbill * we won't get called again (by upintr() because upas&(1<<unit)) 390266Sbill * and link us onto the chain of ready disks. 391266Sbill */ 392266Sbill dp->b_active = 2; 393264Sbill dp->b_forw = NULL; 394266Sbill if (uptab.b_actf == NULL) 395264Sbill uptab.b_actf = dp; 396264Sbill else 397264Sbill uptab.b_actl->b_forw = dp; 398264Sbill uptab.b_actl = dp; 399268Sbill 400268Sbill out: 401272Sbill if (csdel1) DELAY(csdel1); 402268Sbill return (didie); 403264Sbill } 404264Sbill 405264Sbill /* 406264Sbill * Start a transfer; call from top level at spl5() or on interrupt. 407264Sbill */ 408264Sbill upstart() 409264Sbill { 410264Sbill register struct buf *bp, *dp; 411264Sbill register unit; 412264Sbill register struct device *upaddr; 413264Sbill daddr_t bn; 414266Sbill int dn, sn, tn, cn, cmd; 415264Sbill 416264Sbill loop: 417272Sbill if (csdel2) DELAY(csdel2); 418266Sbill /* 419266Sbill * Pick a drive off the queue of ready drives, and 420266Sbill * perform the first transfer on its queue. 421266Sbill * 422266Sbill * Looping here is completely for the sake of drives which 423266Sbill * are not present and on-line, for which we completely clear the 424266Sbill * request queue. 425266Sbill */ 426*273Sbill if ((dp = uptab.b_actf) == NULL) 427268Sbill return (0); 428264Sbill if ((bp = dp->b_actf) == NULL) { 429264Sbill uptab.b_actf = dp->b_forw; 430264Sbill goto loop; 431264Sbill } 432266Sbill /* 433266Sbill * Mark the controller busy, and multi-part disk address. 434266Sbill * Select the unit on which the i/o is to take place. 435266Sbill */ 436264Sbill uptab.b_active++; 437264Sbill unit = minor(bp->b_dev) & 077; 438264Sbill dn = dkunit(bp); 439264Sbill bn = dkblock(bp); 440264Sbill cn = up_sizes[unit&07].cyloff; 441264Sbill cn += bn/(NSECT*NTRAC); 442264Sbill sn = bn%(NSECT*NTRAC); 443264Sbill tn = sn/NSECT; 444266Sbill sn %= NSECT; 445264Sbill upaddr = UPADDR; 446264Sbill if ((upaddr->upcs2 & 07) != dn) { 447264Sbill upaddr->upcs2 = dn; 448264Sbill DELAY(sdelay); 449264Sbill nwaitcs2++; 450264Sbill } else 451264Sbill neasycs2++; 452266Sbill up_ubinfo = ubasetup(bp, 1); /* In a funny place for delay... */ 453266Sbill /* 454266Sbill * If drive is not present and on-line, then 455266Sbill * get rid of this with an error and loop to get 456266Sbill * rid of the rest of its queued requests. 457266Sbill * (Then on to any other ready drives.) 458266Sbill */ 459264Sbill if ((upaddr->upds & (DPR|MOL)) != (DPR|MOL)) { 460264Sbill uptab.b_active = 0; 461264Sbill uptab.b_errcnt = 0; 462264Sbill dp->b_actf = bp->av_forw; 463266Sbill dp->b_active = 0; 464264Sbill bp->b_flags |= B_ERROR; 465264Sbill iodone(bp); 466266Sbill ubafree(up_ubinfo), up_ubinfo = 0; /* A funny place ... */ 467264Sbill goto loop; 468264Sbill } 469266Sbill /* 470266Sbill * If this is a retry, then with the 16'th retry we 471266Sbill * begin to try offsetting the heads to recover the data. 472266Sbill */ 473266Sbill if (uptab.b_errcnt >= 16) { 474264Sbill upaddr->upof = up_offset[uptab.b_errcnt & 017] | FMT22; 475266Sbill upaddr->upcs1 = IE|OFFSET|GO; 476264Sbill DELAY(idelay); 477266Sbill while (upaddr->upds & PIP) 478264Sbill DELAY(25); 479264Sbill } 480266Sbill /* 481266Sbill * Now set up the transfer, retrieving the high 482266Sbill * 2 bits of the UNIBUS address from the information 483266Sbill * returned by ubasetup() for the cs1 register bits 8 and 9. 484266Sbill */ 485264Sbill upaddr->updc = cn; 486264Sbill upaddr->upda = (tn << 8) + sn; 487264Sbill upaddr->upba = up_ubinfo; 488264Sbill upaddr->upwc = -bp->b_bcount / sizeof (short); 489266Sbill cmd = (up_ubinfo >> 8) & 0x300; 490264Sbill if (bp->b_flags & B_READ) 491266Sbill cmd |= IE|RCOM|GO; 492264Sbill else 493266Sbill cmd |= IE|WCOM|GO; 494266Sbill upaddr->upcs1 = cmd; 495266Sbill /* 496266Sbill * This is a controller busy situation. 497266Sbill * Record in dk slot NUP+DK_N (after last drive) 498266Sbill * unless there aren't that many slots reserved for 499266Sbill * us in which case we record this as a drive busy 500266Sbill * (if there is room for that). 501266Sbill */ 502264Sbill unit = dn+DK_N; 503264Sbill if (NUP+DK_N == DK_NMAX) 504264Sbill unit = NUP+DK_N; 505264Sbill if (unit <= DK_NMAX) { 506264Sbill dk_busy |= 1<<unit; 507264Sbill dk_numb[unit]++; 508264Sbill dk_wds[unit] += bp->b_bcount>>6; 509264Sbill } 510268Sbill return (1); 511264Sbill } 512264Sbill 513264Sbill /* 514264Sbill * Handle a device interrupt. 515264Sbill * 516264Sbill * If the transferring drive needs attention, service it 517264Sbill * retrying on error or beginning next transfer. 518264Sbill * Service all other ready drives, calling ustart to transfer 519264Sbill * their blocks to the ready queue in uptab, and then restart 520264Sbill * the controller if there is anything to do. 521264Sbill */ 522264Sbill upintr() 523264Sbill { 524264Sbill register struct buf *bp, *dp; 525264Sbill register unit; 526264Sbill register struct device *upaddr = UPADDR; 527264Sbill int as = upaddr->upas & 0377; 528272Sbill int osoftas; 529268Sbill int needie = 1; 530264Sbill 531266Sbill if (uptab.b_active) { 532266Sbill /* 533266Sbill * The drive is transferring, thus the hardware 534266Sbill * (say the designers) will only interrupt when the transfer 535266Sbill * completes; check for it anyways. 536266Sbill */ 537266Sbill if ((upaddr->upcs1 & RDY) == 0) { 538272Sbill printf("!RDY: cs1 %o, ds %o, wc %d\n", upaddr->upcs1, 539272Sbill upaddr->upds, upaddr->upwc); 540267Sbill printf("as=%d act %d %d %d\n", as, uptab.b_active, uputab[0].b_active, uputab[1].b_active); 541269Sbill } 542266Sbill /* 543266Sbill * Mark controller or drive not busy, and check for an 544266Sbill * error condition which may have resulted from the transfer. 545266Sbill */ 546264Sbill dp = uptab.b_actf; 547264Sbill bp = dp->b_actf; 548264Sbill unit = dkunit(bp); 549264Sbill if (DK_N+NUP == DK_NMAX) 550264Sbill dk_busy &= ~(1<<(DK_N+NUP)); 551264Sbill else if (DK_N+unit <= DK_NMAX) 552264Sbill dk_busy &= ~(1<<(DK_N+unit)); 553264Sbill if (upaddr->upcs1 & TRE) { 554266Sbill /* 555266Sbill * An error occurred, indeed. Select this unit 556266Sbill * to get at the drive status (a SEARCH may have 557266Sbill * intervened to change the selected unit), and 558266Sbill * wait for the command which caused the interrupt 559266Sbill * to complete (DRY). 560266Sbill * 561266Sbill * WHY IS THE WAIT NECESSARY? 562266Sbill */ 563264Sbill if ((upaddr->upcs2 & 07) != unit) { 564264Sbill upaddr->upcs2 = unit; 565264Sbill DELAY(sdelay); 566264Sbill nwaitcs2++; 567264Sbill } else 568264Sbill neasycs2++; 569266Sbill while ((upaddr->upds & DRY) == 0) 570264Sbill DELAY(25); 571266Sbill /* 572266Sbill * After 28 retries (16 w/o servo offsets, and then 573266Sbill * 12 with servo offsets), or if we encountered 574266Sbill * an error because the drive is write-protected, 575266Sbill * give up. Print an error message on the last 2 576266Sbill * retries before a hard failure. 577266Sbill */ 578266Sbill if (++uptab.b_errcnt > 28 || upaddr->uper1&WLE) 579264Sbill bp->b_flags |= B_ERROR; 580264Sbill else 581266Sbill uptab.b_active = 0; /* To force retry */ 582266Sbill if (uptab.b_errcnt > 27) 583264Sbill deverror(bp, upaddr->upcs2, upaddr->uper1); 584266Sbill /* 585266Sbill * If this was a correctible ECC error, let upecc 586266Sbill * do the dirty work to correct it. If upecc 587266Sbill * starts another READ for the rest of the data 588266Sbill * then it returns 1 (having set uptab.b_active). 589266Sbill * Otherwise we are done and fall through to 590266Sbill * finish up. 591266Sbill */ 592266Sbill if ((upaddr->uper1&(DCK|ECH))==DCK && upecc(upaddr, bp)) 593266Sbill return; 594266Sbill /* 595266Sbill * Clear the drive and, every 4 retries, recalibrate 596266Sbill * to hopefully help clear up seek positioning problems. 597266Sbill */ 598264Sbill upaddr->upcs1 = TRE|IE|DCLR|GO; 599264Sbill DELAY(idelay); 600268Sbill needie = 0; 601266Sbill if ((uptab.b_errcnt&07) == 4) { 602264Sbill upaddr->upcs1 = RECAL|GO|IE; 603264Sbill DELAY(idelay); 604264Sbill while(upaddr->upds & PIP) 605264Sbill DELAY(25); 606264Sbill } 607264Sbill } 608266Sbill /* 609266Sbill * If we are still noted as active, then no 610266Sbill * (further) retries are necessary. 611266Sbill * 612266Sbill * Make sure the correct unit is selected, 613266Sbill * return it to centerline if necessary, and mark 614266Sbill * this i/o complete, starting the next transfer 615266Sbill * on this drive with the upustart routine (if any). 616266Sbill */ 617266Sbill if (uptab.b_active) { 618266Sbill if ((upaddr->upcs2 & 07) != unit) { 619266Sbill upaddr->upcs2 = unit; 620266Sbill DELAY(sdelay); 621266Sbill nwaitcs2++; 622266Sbill } else 623266Sbill neasycs2++; 624266Sbill if (uptab.b_errcnt >= 16) { 625266Sbill upaddr->upcs1 = RTC|GO|IE; 626264Sbill DELAY(idelay); 627266Sbill while (upaddr->upds & PIP) 628264Sbill DELAY(25); 629268Sbill needie = 0; 630264Sbill } 631264Sbill uptab.b_active = 0; 632264Sbill uptab.b_errcnt = 0; 633264Sbill uptab.b_actf = dp->b_forw; 634264Sbill dp->b_active = 0; 635264Sbill dp->b_errcnt = 0; 636264Sbill dp->b_actf = bp->av_forw; 637266Sbill bp->b_resid = (-upaddr->upwc * sizeof(short)); 638264Sbill iodone(bp); 639264Sbill if(dp->b_actf) 640268Sbill if (upustart(unit)) 641268Sbill needie = 0; 642264Sbill } 643264Sbill as &= ~(1<<unit); 644272Sbill softas &= ~(1<<unit); 645264Sbill ubafree(up_ubinfo), up_ubinfo = 0; 646*273Sbill } else { 647264Sbill if (upaddr->upcs1 & TRE) { 648264Sbill upaddr->upcs1 = TRE; 649264Sbill DELAY(idelay); 650264Sbill } 651264Sbill } 652266Sbill /* 653266Sbill * If we have a unit with an outstanding SEARCH, 654266Sbill * and the hardware indicates the unit requires attention, 655266Sbill * the bring the drive to the ready queue. 656266Sbill * Finally, if the controller is not transferring 657266Sbill * start it if any drives are now ready to transfer. 658266Sbill */ 659272Sbill as |= softas; 660272Sbill osoftas = softas; 661272Sbill softas = 0; 662266Sbill for (unit = 0; unit < NUP; unit++) 663*273Sbill if ((as|osoftas) & (1<<unit)) { 664*273Sbill if (as & (1<<unit)) { 665267Sbill upaddr->upas = 1<<unit; 666268Sbill if (asdel) DELAY(asdel); 667272Sbill } 668*273Sbill if (upustart(unit)) 669*273Sbill needie = 0; 670*273Sbill } 671266Sbill if (uptab.b_actf && uptab.b_active == 0) 672268Sbill if (upstart()) 673268Sbill needie = 0; 674266Sbill out: 675269Sbill if (needie) { 676266Sbill upaddr->upcs1 = IE; 677269Sbill } 678264Sbill } 679264Sbill 680264Sbill upread(dev) 681264Sbill { 682264Sbill 683264Sbill physio(upstrategy, &rupbuf, dev, B_READ, minphys); 684264Sbill } 685264Sbill 686264Sbill upwrite(dev) 687264Sbill { 688264Sbill 689264Sbill physio(upstrategy, &rupbuf, dev, B_WRITE, minphys); 690264Sbill } 691264Sbill 692266Sbill /* 693266Sbill * Correct an ECC error, and restart the i/o to complete 694266Sbill * the transfer if necessary. This is quite complicated because 695266Sbill * the transfer may be going to an odd memory address base and/or 696266Sbill * across a page boundary. 697266Sbill */ 698264Sbill upecc(up, bp) 699264Sbill register struct device *up; 700264Sbill register struct buf *bp; 701264Sbill { 702264Sbill struct uba_regs *ubp = (struct uba_regs *)UBA0; 703266Sbill register int i; 704264Sbill caddr_t addr; 705266Sbill int reg, bit, byte, npf, mask, o, cmd, ubaddr; 706264Sbill int bn, cn, tn, sn; 707264Sbill 708264Sbill /* 709266Sbill * Npf is the number of sectors transferred before the sector 710266Sbill * containing the ECC error, and reg is the UBA register 711266Sbill * mapping (the first part of) the transfer. 712266Sbill * O is offset within a memory page of the first byte transferred. 713264Sbill */ 714266Sbill npf = btop((up->upwc * sizeof(short)) + bp->b_bcount) - 1; 715266Sbill reg = btop(up_ubinfo&0x3ffff) + npf; 716264Sbill o = (int)bp->b_un.b_addr & PGOFSET; 717264Sbill printf("%D ", bp->b_blkno+npf); 718264Sbill prdev("ECC", bp->b_dev); 719264Sbill mask = up->upec2; 720264Sbill if (mask == 0) { 721266Sbill up->upof = FMT22; /* == RTC ???? */ 722264Sbill DELAY(idelay); 723264Sbill return (0); 724264Sbill } 725266Sbill /* 726266Sbill * Flush the buffered data path, and compute the 727266Sbill * byte and bit position of the error. The variable i 728266Sbill * is the byte offset in the transfer, the variable byte 729266Sbill * is the offset from a page boundary in main memory. 730266Sbill */ 731266Sbill ubp->uba_dpr[(up_ubinfo>>28)&0x0f] |= BNE; 732266Sbill i = up->upec1 - 1; /* -1 makes 0 origin */ 733266Sbill bit = i&07; 734266Sbill i = (i&~07)>>3; 735264Sbill byte = i + o; 736266Sbill /* 737266Sbill * Correct while possible bits remain of mask. Since mask 738266Sbill * contains 11 bits, we continue while the bit offset is > -11. 739266Sbill * Also watch out for end of this block and the end of the whole 740266Sbill * transfer. 741266Sbill */ 742266Sbill while (i < 512 && (int)ptob(npf)+i < bp->b_bcount && bit > -11) { 743266Sbill addr = ptob(ubp->uba_map[reg+btop(byte)].pg_pfnum)+ 744266Sbill (byte & PGOFSET); 745266Sbill putmemc(addr, getmemc(addr)^(mask<<bit)); 746266Sbill byte++; 747266Sbill i++; 748266Sbill bit -= 8; 749264Sbill } 750266Sbill uptab.b_active++; /* Either complete or continuing... */ 751264Sbill if (up->upwc == 0) 752264Sbill return (0); 753266Sbill /* 754266Sbill * Have to continue the transfer... clear the drive, 755266Sbill * and compute the position where the transfer is to continue. 756266Sbill * We have completed npf+1 sectors of the transfer already; 757266Sbill * restart at offset o of next sector (i.e. in UBA register reg+1). 758266Sbill */ 759266Sbill up->upcs1 = TRE|IE|DCLR|GO; 760264Sbill DELAY(idelay); 761264Sbill bn = dkblock(bp); 762264Sbill cn = bp->b_cylin; 763266Sbill sn = bn%(NSECT*NTRAC) + npf + 1; 764264Sbill tn = sn/NSECT; 765264Sbill sn %= NSECT; 766266Sbill cn += tn/NTRAC; 767266Sbill tn %= NTRAC; 768264Sbill up->updc = cn; 769266Sbill up->upda = (tn << 8) | sn; 770266Sbill ubaddr = (int)ptob(reg+1) + o; 771266Sbill up->upba = ubaddr; 772266Sbill cmd = (ubaddr >> 8) & 0x300; 773266Sbill cmd |= IE|GO|RCOM; 774266Sbill up->upcs1 = cmd; 775264Sbill return (1); 776264Sbill } 777