1*2725Swnj /* up.c 4.25 81/02/26 */ 2264Sbill 31937Swnj #include "up.h" 42646Swnj #if NSC > 0 5264Sbill /* 6885Sbill * UNIBUS disk driver with overlapped seeks and ECC recovery. 7264Sbill */ 81756Sbill #define DELAY(N) { register int d; d = N; while (--d > 0); } 9264Sbill 10264Sbill #include "../h/param.h" 11264Sbill #include "../h/systm.h" 122395Swnj #include "../h/cpu.h" 132395Swnj #include "../h/nexus.h" 14308Sbill #include "../h/dk.h" 15264Sbill #include "../h/buf.h" 16264Sbill #include "../h/conf.h" 17264Sbill #include "../h/dir.h" 18264Sbill #include "../h/user.h" 19264Sbill #include "../h/map.h" 20420Sbill #include "../h/pte.h" 21264Sbill #include "../h/mtpr.h" 222571Swnj #include "../h/vm.h" 23264Sbill #include "../h/uba.h" 242379Swnj #include "../h/cmap.h" 25264Sbill 262379Swnj #include "../h/upreg.h" 27264Sbill 282395Swnj struct up_softc { 292395Swnj int sc_softas; 302607Swnj int sc_ndrive; 312395Swnj int sc_wticks; 322674Swnj int sc_recal; 332646Swnj } up_softc[NSC]; 34275Sbill 352395Swnj /* THIS SHOULD BE READ OFF THE PACK, PER DRIVE */ 36264Sbill struct size 37264Sbill { 38264Sbill daddr_t nblocks; 39264Sbill int cyloff; 40264Sbill } up_sizes[8] = { 41264Sbill 15884, 0, /* A=cyl 0 thru 26 */ 42264Sbill 33440, 27, /* B=cyl 27 thru 81 */ 43341Sbill 495520, 0, /* C=cyl 0 thru 814 */ 44264Sbill 15884, 562, /* D=cyl 562 thru 588 */ 45264Sbill 55936, 589, /* E=cyl 589 thru 680 */ 46264Sbill 81472, 681, /* F=cyl 681 thru 814 */ 47264Sbill 153824, 562, /* G=cyl 562 thru 814 */ 48264Sbill 291346, 82, /* H=cyl 82 thru 561 */ 492395Swnj }, fj_sizes[8] = { 502395Swnj 15884, 0, /* A=cyl 0 thru 49 */ 512395Swnj 33440, 50, /* B=cyl 50 thru 154 */ 522395Swnj 263360, 0, /* C=cyl 0 thru 822 */ 532395Swnj 0, 0, 542395Swnj 0, 0, 552395Swnj 0, 0, 562395Swnj 0, 0, 572395Swnj 213760, 155, /* H=cyl 155 thru 822 */ 58264Sbill }; 592395Swnj /* END OF STUFF WHICH SHOULD BE READ IN PER DISK */ 60264Sbill 612395Swnj #define _upSDIST 2 /* 1.0 msec */ 622395Swnj #define _upRDIST 4 /* 2.0 msec */ 63264Sbill 642395Swnj int upSDIST = _upSDIST; 652395Swnj int upRDIST = _upRDIST; 662395Swnj 672607Swnj int upprobe(), upslave(), upattach(), updgo(), upintr(); 682646Swnj struct uba_minfo *upminfo[NSC]; 692395Swnj struct uba_dinfo *updinfo[NUP]; 702646Swnj struct uba_dinfo *upip[NSC][4]; 712395Swnj 722607Swnj u_short upstd[] = { 0776700, 0774400, 0776300, 0 }; 732616Swnj struct uba_driver scdriver = 742607Swnj { upprobe, upslave, upattach, updgo, upstd, "up", updinfo, "sc", upminfo }; 752395Swnj struct buf uputab[NUP]; 762395Swnj 772395Swnj struct upst { 782395Swnj short nsect; 792395Swnj short ntrak; 802395Swnj short nspc; 812395Swnj short ncyl; 822395Swnj struct size *sizes; 832395Swnj } upst[] = { 842607Swnj 32, 19, 32*19, 823, up_sizes, /* 9300/cdc */ 852607Swnj /* 9300 actually has 815 cylinders... */ 862395Swnj 32, 10, 32*10, 823, fj_sizes, /* fujitsu 160m */ 872395Swnj }; 882395Swnj 892629Swnj u_char up_offset[16] = { 902629Swnj UP_P400, UP_M400, UP_P400, UP_M400, UP_P800, UP_M800, UP_P800, UP_M800, 912629Swnj UP_P1200, UP_M1200, UP_P1200, UP_M1200, 0, 0, 0, 0 922629Swnj }; 93264Sbill 942616Swnj struct buf rupbuf[NUP]; 95264Sbill 96264Sbill #define b_cylin b_resid 97264Sbill 98264Sbill #ifdef INTRLVE 99264Sbill daddr_t dkblock(); 100264Sbill #endif 1012395Swnj 1022395Swnj int upwstart, upwatch(); /* Have started guardian */ 1032470Swnj int upseek; 1042681Swnj int upwaitdry; 1052395Swnj 1062395Swnj /*ARGSUSED*/ 1072607Swnj upprobe(reg) 1082395Swnj caddr_t reg; 1092395Swnj { 1102459Swnj register int br, cvec; 1112459Swnj 1122607Swnj #ifdef lint 1132607Swnj br = 0; cvec = br; br = cvec; 1142607Swnj #endif 1152629Swnj ((struct updevice *)reg)->upcs1 = UP_IE|UP_RDY; 1162607Swnj DELAY(10); 1172629Swnj ((struct updevice *)reg)->upcs1 = 0; 1182459Swnj return (1); 1192395Swnj } 1202395Swnj 1212607Swnj upslave(ui, reg) 1222395Swnj struct uba_dinfo *ui; 1232395Swnj caddr_t reg; 1242395Swnj { 1252629Swnj register struct updevice *upaddr = (struct updevice *)reg; 1262395Swnj 1272395Swnj upaddr->upcs1 = 0; /* conservative */ 1282607Swnj upaddr->upcs2 = ui->ui_slave; 1292629Swnj if (upaddr->upcs2&UP_NED) { 1302629Swnj upaddr->upcs1 = UP_DCLR|UP_GO; 1312395Swnj return (0); 1322395Swnj } 1332607Swnj return (1); 1342607Swnj } 1352607Swnj 1362607Swnj upattach(ui) 1372607Swnj register struct uba_dinfo *ui; 1382607Swnj { 1392629Swnj #ifdef notdef 1402629Swnj register struct updevice *upaddr; 1412629Swnj #endif 1422607Swnj 1432395Swnj if (upwstart == 0) { 1442395Swnj timeout(upwatch, (caddr_t)0, HZ); 1452395Swnj upwstart++; 1462395Swnj } 1472571Swnj if (ui->ui_dk >= 0) 1482571Swnj dk_mspw[ui->ui_dk] = .0000020345; 1492607Swnj upip[ui->ui_ctlr][ui->ui_slave] = ui; 1502607Swnj up_softc[ui->ui_ctlr].sc_ndrive++; 1512629Swnj #ifdef notdef 1522629Swnj upaddr = (struct updevice *)ui->ui_addr; 1532629Swnj upaddr->upcs1 = 0; 1542629Swnj upaddr->upcs2 = ui->ui_slave; 1552629Swnj upaddr->uphr = -1; 1562629Swnj /* ... */ 1572629Swnj if (upaddr-> ... == 10) 1582629Swnj ui->ui_type = 1; 1592629Swnj #endif 1602395Swnj } 161264Sbill 162264Sbill upstrategy(bp) 1632395Swnj register struct buf *bp; 164264Sbill { 1652395Swnj register struct uba_dinfo *ui; 1662395Swnj register struct upst *st; 1672395Swnj register int unit; 1682470Swnj register struct buf *dp; 1692395Swnj int xunit = minor(bp->b_dev) & 07; 1702470Swnj long bn, sz; 171264Sbill 1722470Swnj sz = (bp->b_bcount+511) >> 9; 173264Sbill unit = dkunit(bp); 1742395Swnj if (unit >= NUP) 1752395Swnj goto bad; 1762395Swnj ui = updinfo[unit]; 1772395Swnj if (ui == 0 || ui->ui_alive == 0) 1782395Swnj goto bad; 1792395Swnj st = &upst[ui->ui_type]; 1802395Swnj if (bp->b_blkno < 0 || 1812395Swnj (bn = dkblock(bp))+sz > st->sizes[xunit].nblocks) 1822395Swnj goto bad; 1832395Swnj bp->b_cylin = bn/st->nspc + st->sizes[xunit].cyloff; 184264Sbill (void) spl5(); 1852470Swnj dp = &uputab[ui->ui_unit]; 1862470Swnj disksort(dp, bp); 1872470Swnj if (dp->b_active == 0) { 1882395Swnj (void) upustart(ui); 1892395Swnj bp = &ui->ui_mi->um_tab; 1902395Swnj if (bp->b_actf && bp->b_active == 0) 1912395Swnj (void) upstart(ui->ui_mi); 192264Sbill } 193264Sbill (void) spl0(); 1942395Swnj return; 1952395Swnj 1962395Swnj bad: 1972395Swnj bp->b_flags |= B_ERROR; 1982395Swnj iodone(bp); 1992395Swnj return; 200264Sbill } 201264Sbill 2022674Swnj /* 2032674Swnj * Unit start routine. 2042674Swnj * Seek the drive to be where the data is 2052674Swnj * and then generate another interrupt 2062674Swnj * to actually start the transfer. 2072674Swnj * If there is only one drive on the controller, 2082674Swnj * or we are very close to the data, don't 2092674Swnj * bother with the search. If called after 2102674Swnj * searching once, don't bother to look where 2112674Swnj * we are, just queue for transfer (to avoid 2122674Swnj * positioning forever without transferrring.) 2132674Swnj */ 2142395Swnj upustart(ui) 2152395Swnj register struct uba_dinfo *ui; 216264Sbill { 217264Sbill register struct buf *bp, *dp; 2182674Swnj register struct uba_minfo *um = ui->ui_mi; 2192629Swnj register struct updevice *upaddr; 2202395Swnj register struct upst *st; 221264Sbill daddr_t bn; 2222674Swnj int sn, csn; 2232607Swnj /* 2242607Swnj * The SC21 cancels commands if you just say 2252629Swnj * cs1 = UP_IE 2262607Swnj * so we are cautious about handling of cs1. 2272607Swnj * Also don't bother to clear as bits other than in upintr(). 2282607Swnj */ 2292674Swnj int didie = 0; 2302674Swnj 2312674Swnj if (ui == 0) 2322674Swnj return (0); 2332395Swnj dk_busy &= ~(1<<ui->ui_dk); 2342395Swnj dp = &uputab[ui->ui_unit]; 235266Sbill if ((bp = dp->b_actf) == NULL) 236268Sbill goto out; 2372674Swnj /* 2382674Swnj * If the controller is active, just remember 2392674Swnj * that this device would like to be positioned... 2402674Swnj * if we tried to position now we would confuse the SC21. 2412674Swnj */ 2422395Swnj if (um->um_tab.b_active) { 2432459Swnj up_softc[um->um_ctlr].sc_softas |= 1<<ui->ui_slave; 244275Sbill return (0); 245275Sbill } 2462674Swnj /* 2472674Swnj * If we have already positioned this drive, 2482674Swnj * then just put it on the ready queue. 2492674Swnj */ 250276Sbill if (dp->b_active) 251276Sbill goto done; 252276Sbill dp->b_active = 1; 2532629Swnj upaddr = (struct updevice *)um->um_addr; 2542395Swnj upaddr->upcs2 = ui->ui_slave; 2552674Swnj /* 2562674Swnj * If drive has just come up, 2572674Swnj * setup the pack. 2582674Swnj */ 2592629Swnj if ((upaddr->upds & UP_VV) == 0) { 2602607Swnj /* SHOULD WARN SYSTEM THAT THIS HAPPENED */ 2612629Swnj upaddr->upcs1 = UP_IE|UP_DCLR|UP_GO; 2622629Swnj upaddr->upcs1 = UP_IE|UP_PRESET|UP_GO; 2632629Swnj upaddr->upof = UP_FMT22; 264268Sbill didie = 1; 265264Sbill } 2662674Swnj /* 2672674Swnj * If drive is offline, forget about positioning. 2682674Swnj */ 2692629Swnj if ((upaddr->upds & (UP_DPR|UP_MOL)) != (UP_DPR|UP_MOL)) 270275Sbill goto done; 2712674Swnj /* 2722674Swnj * If there is only one drive, 2732674Swnj * dont bother searching. 2742674Swnj */ 2752607Swnj if (up_softc[um->um_ctlr].sc_ndrive == 1) 2762607Swnj goto done; 2772674Swnj /* 2782674Swnj * Figure out where this transfer is going to 2792674Swnj * and see if we are close enough to justify not searching. 2802674Swnj */ 2812395Swnj st = &upst[ui->ui_type]; 282264Sbill bn = dkblock(bp); 2832395Swnj sn = bn%st->nspc; 2842395Swnj sn = (sn + st->nsect - upSDIST) % st->nsect; 2852674Swnj if (bp->b_cylin - upaddr->updc) 286266Sbill goto search; /* Not on-cylinder */ 287275Sbill else if (upseek) 288275Sbill goto done; /* Ok just to be on-cylinder */ 289264Sbill csn = (upaddr->upla>>6) - sn - 1; 290266Sbill if (csn < 0) 2912395Swnj csn += st->nsect; 2922395Swnj if (csn > st->nsect - upRDIST) 293264Sbill goto done; 294264Sbill search: 2952674Swnj upaddr->updc = bp->b_cylin; 2962674Swnj /* 2972674Swnj * Not on cylinder at correct position, 2982674Swnj * seek/search. 2992674Swnj */ 300275Sbill if (upseek) 3012629Swnj upaddr->upcs1 = UP_IE|UP_SEEK|UP_GO; 3022470Swnj else { 303275Sbill upaddr->upda = sn; 3042629Swnj upaddr->upcs1 = UP_IE|UP_SEARCH|UP_GO; 305275Sbill } 306268Sbill didie = 1; 3072674Swnj /* 3082674Swnj * Mark unit busy for iostat. 3092674Swnj */ 3102395Swnj if (ui->ui_dk >= 0) { 3112395Swnj dk_busy |= 1<<ui->ui_dk; 3122395Swnj dk_seek[ui->ui_dk]++; 313264Sbill } 314268Sbill goto out; 315264Sbill done: 3162674Swnj /* 3172674Swnj * Device is ready to go. 3182674Swnj * Put it on the ready queue for the controller 3192674Swnj * (unless its already there.) 3202674Swnj */ 3212629Swnj if (dp->b_active != 2) { 3222629Swnj dp->b_forw = NULL; 3232629Swnj if (um->um_tab.b_actf == NULL) 3242629Swnj um->um_tab.b_actf = dp; 3252629Swnj else 3262629Swnj um->um_tab.b_actl->b_forw = dp; 3272629Swnj um->um_tab.b_actl = dp; 3282629Swnj dp->b_active = 2; 3292629Swnj } 330268Sbill out: 331268Sbill return (didie); 332264Sbill } 333264Sbill 3342674Swnj /* 3352674Swnj * Start up a transfer on a drive. 3362674Swnj */ 3372395Swnj upstart(um) 3382395Swnj register struct uba_minfo *um; 339264Sbill { 340264Sbill register struct buf *bp, *dp; 3412395Swnj register struct uba_dinfo *ui; 3422629Swnj register struct updevice *upaddr; 3432470Swnj struct upst *st; 344264Sbill daddr_t bn; 3452681Swnj int dn, sn, tn, cmd, waitdry; 346264Sbill 347264Sbill loop: 3482674Swnj /* 3492674Swnj * Pull a request off the controller queue 3502674Swnj */ 3512395Swnj if ((dp = um->um_tab.b_actf) == NULL) 352268Sbill return (0); 353264Sbill if ((bp = dp->b_actf) == NULL) { 3542395Swnj um->um_tab.b_actf = dp->b_forw; 355264Sbill goto loop; 356264Sbill } 3572674Swnj /* 3582674Swnj * Mark controller busy, and 3592674Swnj * determine destination of this request. 3602674Swnj */ 3612395Swnj um->um_tab.b_active++; 3622395Swnj ui = updinfo[dkunit(bp)]; 363264Sbill bn = dkblock(bp); 3642395Swnj dn = ui->ui_slave; 3652395Swnj st = &upst[ui->ui_type]; 3662395Swnj sn = bn%st->nspc; 3672395Swnj tn = sn/st->nsect; 3682395Swnj sn %= st->nsect; 3692629Swnj upaddr = (struct updevice *)ui->ui_addr; 3702674Swnj /* 3712674Swnj * Select drive if not selected already. 3722674Swnj */ 3732674Swnj if ((upaddr->upcs2&07) != dn) 3742674Swnj upaddr->upcs2 = dn; 3752674Swnj /* 3762674Swnj * Check that it is ready and online 3772674Swnj */ 3782681Swnj waitdry = 0; 3792681Swnj while ((upaddr->upds&UP_DRY) == 0) { 3802681Swnj if (++waitdry > 512) 3812681Swnj break; 3822681Swnj upwaitdry++; 3832681Swnj } 3842681Swnj if ((upaddr->upds & UP_DREADY) != UP_DREADY) { 3852607Swnj printf("up%d not ready", dkunit(bp)); 3862681Swnj if ((upaddr->upds & UP_DREADY) != UP_DREADY) { 3872607Swnj printf("\n"); 3882395Swnj um->um_tab.b_active = 0; 3892395Swnj um->um_tab.b_errcnt = 0; 390893Sbill dp->b_actf = bp->av_forw; 391893Sbill dp->b_active = 0; 392893Sbill bp->b_flags |= B_ERROR; 393893Sbill iodone(bp); 394893Sbill goto loop; 395893Sbill } 3962674Swnj /* 3972674Swnj * Oh, well, sometimes this 3982674Swnj * happens, for reasons unknown. 3992674Swnj */ 4002629Swnj printf(" (flakey)\n"); 401264Sbill } 4022674Swnj /* 4032674Swnj * After 16th retry, do offset positioning 4042674Swnj */ 4052395Swnj if (um->um_tab.b_errcnt >= 16 && (bp->b_flags&B_READ) != 0) { 4062629Swnj upaddr->upof = up_offset[um->um_tab.b_errcnt & 017] | UP_FMT22; 4072629Swnj upaddr->upcs1 = UP_IE|UP_OFFSET|UP_GO; 4082629Swnj while (upaddr->upds & UP_PIP) 409264Sbill DELAY(25); 410264Sbill } 4112674Swnj /* 4122674Swnj * Setup for the transfer, and get in the 4132674Swnj * UNIBUS adaptor queue. 4142674Swnj */ 4152424Skre upaddr->updc = bp->b_cylin; 416264Sbill upaddr->upda = (tn << 8) + sn; 417264Sbill upaddr->upwc = -bp->b_bcount / sizeof (short); 418264Sbill if (bp->b_flags & B_READ) 4192629Swnj cmd = UP_IE|UP_RCOM|UP_GO; 420264Sbill else 4212629Swnj cmd = UP_IE|UP_WCOM|UP_GO; 4222571Swnj um->um_cmd = cmd; 4232571Swnj ubago(ui); 424268Sbill return (1); 425264Sbill } 426264Sbill 4272674Swnj /* 4282674Swnj * Now all ready to go, stuff the registers. 4292674Swnj */ 4302571Swnj updgo(um) 4312571Swnj struct uba_minfo *um; 4322395Swnj { 4332629Swnj register struct updevice *upaddr = (struct updevice *)um->um_addr; 4342470Swnj 4352571Swnj upaddr->upba = um->um_ubinfo; 4362571Swnj upaddr->upcs1 = um->um_cmd|((um->um_ubinfo>>8)&0x300); 4372395Swnj } 4382395Swnj 4392674Swnj /* 4402674Swnj * Handle a disk interrupt. 4412674Swnj */ 4422707Swnj upintr(sc21) 4432395Swnj register sc21; 444264Sbill { 445264Sbill register struct buf *bp, *dp; 4462395Swnj register struct uba_minfo *um = upminfo[sc21]; 4472395Swnj register struct uba_dinfo *ui; 4482629Swnj register struct updevice *upaddr = (struct updevice *)um->um_addr; 449264Sbill register unit; 4502470Swnj struct up_softc *sc = &up_softc[um->um_ctlr]; 4512607Swnj int as = (upaddr->upas & 0377) | sc->sc_softas; 4522681Swnj int needie = 1, waitdry; 453264Sbill 4542470Swnj sc->sc_wticks = 0; 4552607Swnj sc->sc_softas = 0; 4562674Swnj /* 4572674Swnj * If controller wasn't transferring, then this is an 4582674Swnj * interrupt for attention status on seeking drives. 4592674Swnj * Just service them. 4602674Swnj */ 4612674Swnj if (um->um_tab.b_active == 0) { 4622674Swnj if (upaddr->upcs1 & UP_TRE) 4632674Swnj upaddr->upcs1 = UP_TRE; 4642674Swnj goto doattn; 4652674Swnj } 4662674Swnj if ((upaddr->upcs1 & UP_RDY) == 0) 4672674Swnj printf("upintr !RDY\n"); /* shouldn't happen */ 4682674Swnj /* 4692674Swnj * Get device and block structures, and a pointer 4702674Swnj * to the uba_dinfo for the drive. Select the drive. 4712674Swnj */ 4722674Swnj dp = um->um_tab.b_actf; 4732674Swnj bp = dp->b_actf; 4742674Swnj ui = updinfo[dkunit(bp)]; 4752674Swnj dk_busy &= ~(1 << ui->ui_dk); 4762674Swnj if ((upaddr->upcs2&07) != ui->ui_slave) 4772395Swnj upaddr->upcs2 = ui->ui_slave; 4782674Swnj /* 4792674Swnj * Check for and process errors on 4802674Swnj * either the drive or the controller. 4812674Swnj */ 4822674Swnj if ((upaddr->upds&UP_ERR) || (upaddr->upcs1&UP_TRE)) { 4832681Swnj waitdry = 0; 4842681Swnj while ((upaddr->upds & UP_DRY) == 0) { 4852681Swnj if (++waitdry > 512) 4862681Swnj break; 4872681Swnj upwaitdry++; 4882681Swnj } 4892681Swnj if ((upaddr->upds&UP_DREADY) != UP_DREADY) { 4902681Swnj printf("up%d not ready", dkunit(bp)); 4912681Swnj bp->b_flags |= B_ERROR; 4922681Swnj } else if (upaddr->uper1&UP_WLE) { 4932674Swnj /* 4942674Swnj * Give up on write locked devices 4952674Swnj * immediately. 4962674Swnj */ 4972674Swnj printf("up%d is write locked\n", dkunit(bp)); 4982674Swnj bp->b_flags |= B_ERROR; 4992674Swnj } else if (++um->um_tab.b_errcnt > 27) { 5002674Swnj /* 5012674Swnj * After 28 retries (16 without offset, and 5022674Swnj * 12 with offset positioning) give up. 5032674Swnj */ 5042674Swnj if (upaddr->upcs2&(UP_NEM|UP_MXF)) { 5052674Swnj printf("FLAKEY UP "); 5062674Swnj ubareset(um->um_ubanum); 5072674Swnj return; 5082395Swnj } 5092674Swnj harderr(bp); 5102674Swnj printf("up%d cs2 %b er1 %b er2 %b\n", 5112674Swnj dkunit(bp), upaddr->upcs2, UPCS2_BITS, upaddr->uper1, 5122674Swnj UPER1_BITS, upaddr->uper2, UPER2_BITS); 5132674Swnj bp->b_flags |= B_ERROR; 5142674Swnj } else { 5152674Swnj /* 5162674Swnj * Retriable error. 5172674Swnj * If a soft ecc, correct it (continuing 5182674Swnj * by returning if necessary. 5192674Swnj * Otherwise fall through and retry the transfer 5202674Swnj */ 5212674Swnj um->um_tab.b_active = 0; /* force retry */ 5222629Swnj if ((upaddr->uper1&(UP_DCK|UP_ECH))==UP_DCK) 5232629Swnj if (upecc(ui)) 5242629Swnj return; 5252674Swnj } 5262674Swnj /* 5272674Swnj * Clear drive error and, every eight attempts, 5282674Swnj * (starting with the fourth) 5292674Swnj * recalibrate to clear the slate. 5302674Swnj */ 5312674Swnj upaddr->upcs1 = UP_TRE|UP_IE|UP_DCLR|UP_GO; 5322674Swnj needie = 0; 5332674Swnj if ((um->um_tab.b_errcnt&07) == 4) { 5342674Swnj upaddr->upcs1 = UP_RECAL|UP_IE|UP_GO; 5352674Swnj um->um_tab.b_active = 1; 5362674Swnj sc->sc_recal = 1; 5372674Swnj return; 5382674Swnj } 5392674Swnj } 5402674Swnj /* 5412674Swnj * Done retrying transfer... release 5422674Swnj * resources... if we were recalibrating, 5432674Swnj * then retry the transfer. 5442674Swnj * Mathematical note: 28%8 != 4. 5452674Swnj */ 5462674Swnj ubadone(um); 5472674Swnj if (sc->sc_recal) { 5482674Swnj sc->sc_recal = 0; 5492674Swnj um->um_tab.b_active = 0; /* force retry */ 5502674Swnj } 5512674Swnj /* 5522674Swnj * If still ``active'', then don't need any more retries. 5532674Swnj */ 5542674Swnj if (um->um_tab.b_active) { 5552674Swnj /* 5562674Swnj * If we were offset positioning, 5572674Swnj * return to centerline. 5582674Swnj */ 5592674Swnj if (um->um_tab.b_errcnt >= 16) { 5602674Swnj upaddr->upof = UP_FMT22; 5612674Swnj upaddr->upcs1 = UP_RTC|UP_GO|UP_IE; 5622674Swnj while (upaddr->upds & UP_PIP) 5632674Swnj DELAY(25); 564268Sbill needie = 0; 565264Sbill } 5662674Swnj um->um_tab.b_active = 0; 5672674Swnj um->um_tab.b_errcnt = 0; 5682674Swnj um->um_tab.b_actf = dp->b_forw; 5692674Swnj dp->b_active = 0; 5702674Swnj dp->b_errcnt = 0; 5712674Swnj dp->b_actf = bp->av_forw; 5722674Swnj bp->b_resid = (-upaddr->upwc * sizeof(short)); 5732674Swnj iodone(bp); 5742674Swnj /* 5752674Swnj * If this unit has more work to do, 5762674Swnj * then start it up right away. 5772674Swnj */ 5782674Swnj if (dp->b_actf) 5792674Swnj if (upustart(ui)) 580268Sbill needie = 0; 581264Sbill } 5822674Swnj as &= ~(1<<ui->ui_slave); 5832674Swnj doattn: 5842674Swnj /* 5852674Swnj * Process other units which need attention. 5862674Swnj * For each unit which needs attention, call 5872674Swnj * the unit start routine to place the slave 5882674Swnj * on the controller device queue. 5892674Swnj */ 5902607Swnj for (unit = 0; as; as >>= 1, unit++) 5912607Swnj if (as & 1) { 5922470Swnj upaddr->upas = 1<<unit; 5932607Swnj if (upustart(upip[sc21][unit])) 594273Sbill needie = 0; 595273Sbill } 5962674Swnj /* 5972674Swnj * If the controller is not transferring, but 5982674Swnj * there are devices ready to transfer, start 5992674Swnj * the controller. 6002674Swnj */ 6012395Swnj if (um->um_tab.b_actf && um->um_tab.b_active == 0) 6022395Swnj if (upstart(um)) 603268Sbill needie = 0; 604275Sbill if (needie) 6052629Swnj upaddr->upcs1 = UP_IE; 606264Sbill } 607264Sbill 608264Sbill upread(dev) 6092616Swnj dev_t dev; 610264Sbill { 6112616Swnj register int unit = minor(dev) >> 3; 6122470Swnj 6132616Swnj if (unit >= NUP) 6142616Swnj u.u_error = ENXIO; 6152616Swnj else 6162616Swnj physio(upstrategy, &rupbuf[unit], dev, B_READ, minphys); 617264Sbill } 618264Sbill 619264Sbill upwrite(dev) 6202616Swnj dev_t dev; 621264Sbill { 6222616Swnj register int unit = minor(dev) >> 3; 6232470Swnj 6242616Swnj if (unit >= NUP) 6252616Swnj u.u_error = ENXIO; 6262616Swnj else 6272616Swnj physio(upstrategy, &rupbuf[unit], dev, B_WRITE, minphys); 628264Sbill } 629264Sbill 630266Sbill /* 631266Sbill * Correct an ECC error, and restart the i/o to complete 632266Sbill * the transfer if necessary. This is quite complicated because 633266Sbill * the transfer may be going to an odd memory address base and/or 634266Sbill * across a page boundary. 635266Sbill */ 6362395Swnj upecc(ui) 6372395Swnj register struct uba_dinfo *ui; 638264Sbill { 6392629Swnj register struct updevice *up = (struct updevice *)ui->ui_addr; 6402395Swnj register struct buf *bp = uputab[ui->ui_unit].b_actf; 6412395Swnj register struct uba_minfo *um = ui->ui_mi; 6422395Swnj register struct upst *st; 6432395Swnj struct uba_regs *ubp = ui->ui_hd->uh_uba; 644266Sbill register int i; 645264Sbill caddr_t addr; 646266Sbill int reg, bit, byte, npf, mask, o, cmd, ubaddr; 647264Sbill int bn, cn, tn, sn; 648264Sbill 649264Sbill /* 650266Sbill * Npf is the number of sectors transferred before the sector 651266Sbill * containing the ECC error, and reg is the UBA register 652266Sbill * mapping (the first part of) the transfer. 653266Sbill * O is offset within a memory page of the first byte transferred. 654264Sbill */ 655266Sbill npf = btop((up->upwc * sizeof(short)) + bp->b_bcount) - 1; 6562571Swnj reg = btop(um->um_ubinfo&0x3ffff) + npf; 657264Sbill o = (int)bp->b_un.b_addr & PGOFSET; 658264Sbill printf("%D ", bp->b_blkno+npf); 659264Sbill prdev("ECC", bp->b_dev); 660264Sbill mask = up->upec2; 661264Sbill if (mask == 0) { 6622629Swnj up->upof = UP_FMT22; /* == RTC ???? */ 663264Sbill return (0); 664264Sbill } 665266Sbill /* 666266Sbill * Flush the buffered data path, and compute the 667266Sbill * byte and bit position of the error. The variable i 668266Sbill * is the byte offset in the transfer, the variable byte 669266Sbill * is the offset from a page boundary in main memory. 670266Sbill */ 671*2725Swnj ubapurge(um); 672266Sbill i = up->upec1 - 1; /* -1 makes 0 origin */ 673266Sbill bit = i&07; 674266Sbill i = (i&~07)>>3; 675264Sbill byte = i + o; 676266Sbill /* 677266Sbill * Correct while possible bits remain of mask. Since mask 678266Sbill * contains 11 bits, we continue while the bit offset is > -11. 679266Sbill * Also watch out for end of this block and the end of the whole 680266Sbill * transfer. 681266Sbill */ 682266Sbill while (i < 512 && (int)ptob(npf)+i < bp->b_bcount && bit > -11) { 683266Sbill addr = ptob(ubp->uba_map[reg+btop(byte)].pg_pfnum)+ 684266Sbill (byte & PGOFSET); 685266Sbill putmemc(addr, getmemc(addr)^(mask<<bit)); 686266Sbill byte++; 687266Sbill i++; 688266Sbill bit -= 8; 689264Sbill } 6902395Swnj um->um_tab.b_active++; /* Either complete or continuing... */ 691264Sbill if (up->upwc == 0) 692264Sbill return (0); 693266Sbill /* 694266Sbill * Have to continue the transfer... clear the drive, 695266Sbill * and compute the position where the transfer is to continue. 696266Sbill * We have completed npf+1 sectors of the transfer already; 697266Sbill * restart at offset o of next sector (i.e. in UBA register reg+1). 698266Sbill */ 6992629Swnj #ifdef notdef 7002629Swnj up->uper1 = 0; 7012629Swnj up->upcs1 |= UP_GO; 7022629Swnj #else 7032629Swnj up->upcs1 = UP_TRE|UP_IE|UP_DCLR|UP_GO; 704264Sbill bn = dkblock(bp); 7052395Swnj st = &upst[ui->ui_type]; 706264Sbill cn = bp->b_cylin; 7072395Swnj sn = bn%st->nspc + npf + 1; 7082395Swnj tn = sn/st->nsect; 7092395Swnj sn %= st->nsect; 7102395Swnj cn += tn/st->ntrak; 7112395Swnj tn %= st->ntrak; 712264Sbill up->updc = cn; 713266Sbill up->upda = (tn << 8) | sn; 714266Sbill ubaddr = (int)ptob(reg+1) + o; 715266Sbill up->upba = ubaddr; 716266Sbill cmd = (ubaddr >> 8) & 0x300; 7172629Swnj cmd |= UP_IE|UP_GO|UP_RCOM; 718266Sbill up->upcs1 = cmd; 7192629Swnj #endif 720264Sbill return (1); 721264Sbill } 722286Sbill 723286Sbill /* 724286Sbill * Reset driver after UBA init. 725286Sbill * Cancel software state of all pending transfers 726286Sbill * and restart all units and the controller. 727286Sbill */ 7282395Swnj upreset(uban) 729286Sbill { 7302395Swnj register struct uba_minfo *um; 7312395Swnj register struct uba_dinfo *ui; 7322395Swnj register sc21, unit; 7332424Skre int any = 0; 734286Sbill 7352646Swnj for (sc21 = 0; sc21 < NSC; sc21++) { 7362470Swnj if ((um = upminfo[sc21]) == 0 || um->um_ubanum != uban || 7372470Swnj um->um_alive == 0) 7382395Swnj continue; 7392424Skre if (any == 0) { 7402424Skre printf(" up"); 7412470Swnj DELAY(10000000); /* give it time to self-test */ 7422424Skre any++; 7432424Skre } 7442395Swnj um->um_tab.b_active = 0; 7452395Swnj um->um_tab.b_actf = um->um_tab.b_actl = 0; 7462571Swnj if (um->um_ubinfo) { 7472571Swnj printf("<%d>", (um->um_ubinfo>>28)&0xf); 7482616Swnj ubadone(um); 7492395Swnj } 7502629Swnj ((struct updevice *)(um->um_addr))->upcs2 = UP_CLR; 7512395Swnj for (unit = 0; unit < NUP; unit++) { 7522395Swnj if ((ui = updinfo[unit]) == 0) 7532395Swnj continue; 7542395Swnj if (ui->ui_alive == 0) 7552395Swnj continue; 7562395Swnj uputab[unit].b_active = 0; 7572395Swnj (void) upustart(ui); 7582395Swnj } 7592395Swnj (void) upstart(um); 760286Sbill } 761286Sbill } 762313Sbill 763313Sbill /* 764313Sbill * Wake up every second and if an interrupt is pending 765313Sbill * but nothing has happened increment a counter. 766313Sbill * If nothing happens for 20 seconds, reset the controller 767313Sbill * and begin anew. 768313Sbill */ 769313Sbill upwatch() 770313Sbill { 7712395Swnj register struct uba_minfo *um; 7722395Swnj register sc21, unit; 7732470Swnj register struct up_softc *sc; 774313Sbill 7751783Sbill timeout(upwatch, (caddr_t)0, HZ); 7762646Swnj for (sc21 = 0; sc21 < NSC; sc21++) { 7772395Swnj um = upminfo[sc21]; 7782470Swnj if (um == 0 || um->um_alive == 0) 7792470Swnj continue; 7802470Swnj sc = &up_softc[sc21]; 7812395Swnj if (um->um_tab.b_active == 0) { 7822395Swnj for (unit = 0; unit < NUP; unit++) 7832629Swnj if (uputab[unit].b_active && 7842629Swnj updinfo[unit]->ui_mi == um) 7852395Swnj goto active; 7862470Swnj sc->sc_wticks = 0; 7872395Swnj continue; 7882395Swnj } 7892395Swnj active: 7902470Swnj sc->sc_wticks++; 7912470Swnj if (sc->sc_wticks >= 20) { 7922470Swnj sc->sc_wticks = 0; 7932646Swnj printf("LOST upintr "); 7942646Swnj ubareset(um->um_ubanum); 7952395Swnj } 796313Sbill } 797313Sbill } 7982379Swnj 7992379Swnj #define DBSIZE 20 8002379Swnj 8012379Swnj updump(dev) 8022379Swnj dev_t dev; 8032379Swnj { 8042629Swnj struct updevice *upaddr; 8052379Swnj char *start; 8062607Swnj int num, blk, unit; 8072379Swnj struct size *sizes; 8082395Swnj register struct uba_regs *uba; 8092395Swnj register struct uba_dinfo *ui; 8102379Swnj register short *rp; 8112395Swnj struct upst *st; 8122379Swnj 8132395Swnj unit = minor(dev) >> 3; 8142395Swnj if (unit >= NUP) { 8152395Swnj printf("bad unit\n"); 8162395Swnj return (-1); 8172395Swnj } 8182470Swnj #define phys(cast, addr) ((cast)((int)addr & 0x7fffffff)) 8192395Swnj ui = phys(struct uba_dinfo *, updinfo[unit]); 8202395Swnj if (ui->ui_alive == 0) { 8212395Swnj printf("dna\n"); 8222395Swnj return(-1); 8232395Swnj } 8242395Swnj uba = phys(struct uba_hd *, ui->ui_hd)->uh_physuba; 8252395Swnj #if VAX780 8262470Swnj if (cpu == VAX_780) 8272470Swnj ubainit(uba); 8281809Sbill #endif 8292379Swnj DELAY(1000000); 8302629Swnj upaddr = (struct updevice *)ui->ui_physaddr; 8312629Swnj while ((upaddr->upcs1&UP_DVA) == 0) 8322379Swnj ; 8332379Swnj num = maxfree; 8342379Swnj start = 0; 8352379Swnj upaddr->upcs2 = unit; 8362629Swnj if ((upaddr->upds & UP_VV) == 0) { 8372629Swnj upaddr->upcs1 = UP_DCLR|UP_GO; 8382629Swnj upaddr->upcs1 = UP_PRESET|UP_GO; 8392629Swnj upaddr->upof = UP_FMT22; 8402379Swnj } 8412629Swnj if ((upaddr->upds & (UP_DPR|UP_MOL)) != (UP_DPR|UP_MOL)) { 8422629Swnj printf("dna\n"); 8432379Swnj return (-1); 8442379Swnj } 8452470Swnj st = &upst[ui->ui_type]; 8462395Swnj sizes = phys(struct size *, st->sizes); 8472379Swnj if (dumplo < 0 || dumplo + num >= sizes[minor(dev)&07].nblocks) { 8482395Swnj printf("oor\n"); 8492379Swnj return (-1); 8502379Swnj } 8512379Swnj while (num > 0) { 8522379Swnj register struct pte *io; 8532379Swnj register int i; 8542379Swnj int cn, sn, tn; 8552379Swnj daddr_t bn; 8562379Swnj 8572379Swnj blk = num > DBSIZE ? DBSIZE : num; 8582395Swnj io = uba->uba_map; 8592379Swnj for (i = 0; i < blk; i++) 8602395Swnj *(int *)io++ = (btop(start)+i) | (1<<21) | UBA_MRV; 8612379Swnj *(int *)io = 0; 8622379Swnj bn = dumplo + btop(start); 8632607Swnj cn = bn/st->nspc + sizes[minor(dev)&07].cyloff; 8642607Swnj sn = bn%st->nspc; 8652607Swnj tn = sn/st->nsect; 8662607Swnj sn = sn%st->nsect; 8672379Swnj upaddr->updc = cn; 8682379Swnj rp = (short *) &upaddr->upda; 8692379Swnj *rp = (tn << 8) + sn; 8702379Swnj *--rp = 0; 8712379Swnj *--rp = -blk*NBPG / sizeof (short); 8722629Swnj *--rp = UP_GO|UP_WCOM; 8732379Swnj do { 8742379Swnj DELAY(25); 8752629Swnj } while ((upaddr->upcs1 & UP_RDY) == 0); 8762629Swnj if (upaddr->upcs1&UP_ERR) { 8772379Swnj printf("up dump dsk err: (%d,%d,%d) cs1=%x, er1=%x\n", 8782379Swnj cn, tn, sn, upaddr->upcs1, upaddr->uper1); 8792379Swnj return (-1); 8802379Swnj } 8812379Swnj start += blk*NBPG; 8822379Swnj num -= blk; 8832379Swnj } 8842379Swnj return (0); 8852379Swnj } 8861902Swnj #endif 887