1*271Sbill int csdel0 = 30; 2268Sbill int asdel = 500; 3*271Sbill /* 10/14/12 3.7 06/19/80 */ 4264Sbill 5264Sbill /* 6264Sbill * Emulex UNIBUS disk driver with overlapped seeks and ECC recovery. 7264Sbill * 8266Sbill * NB: This device is very sensitive: be aware that the code is the way 9266Sbill * it is for good reason and that there are delay loops here which may 10266Sbill * have to be lengthened if your processor is faster and which should 11266Sbill * probably be shortened if your processor is slower. 12266Sbill * 13264Sbill * This driver has been tested on a SC-11B Controller, configured 14264Sbill * with the following internal switch settings: 15264Sbill * SW1-1 5/19 surfaces (off, 19 surfaces on Ampex 9300) 16264Sbill * SW1-2 chksum enable (off, checksum disabled) 17264Sbill * SW1-3 volume select (off, 815 cylinders) 18264Sbill * SW1-4 sector select (on, 32 sectors) 19264Sbill * SW1-5 unused (off) 20264Sbill * SW1-6 port select (on, single port) 21264Sbill * SW1-7 npr delay (off, disable) 22264Sbill * SW1-8 ecc test mode (off, disable) 23264Sbill * and top mounted switches: 24264Sbill * SW2-1 extend opcodes (off=open, disable) 25264Sbill * SW2-2 extend diag (off=open, disable) 26264Sbill * SW2-3 4 wd dma burst (off=open, disable) 27264Sbill * SW2-4 unused (off=open) 28264Sbill * 29264Sbill * The controller transfers data much more rapidly with SW2-3 set, 30264Sbill * but we have previously experienced problems with it set this way. 31264Sbill * We intend to try this again in the near future. 32264Sbill * 33264Sbill * wnj June 14, 1980 34264Sbill */ 35264Sbill 36264Sbill #include "../h/param.h" 37264Sbill #include "../h/systm.h" 38264Sbill #include "../h/buf.h" 39264Sbill #include "../h/conf.h" 40264Sbill #include "../h/dir.h" 41264Sbill #include "../h/user.h" 42264Sbill #include "../h/map.h" 43264Sbill #include "../h/mba.h" 44264Sbill #include "../h/mtpr.h" 45264Sbill #include "../h/pte.h" 46264Sbill #include "../h/uba.h" 47264Sbill #include "../h/vm.h" 48264Sbill 49264Sbill /* 50264Sbill * Define number of drives, and range of sampling information to be used. 51264Sbill * 52264Sbill * Normally, DK_N .. DK_N+NUP-1 gather individual drive stats, 53264Sbill * and DK_N+NUP gathers controller transferring stats. 54264Sbill * 55264Sbill * If DK_N+NUP > DK_NMAX, then transfer stats are divided per drive. 56264Sbill * If DK_NMAX is yet smaller, some drives are not monitored. 57264Sbill */ 58264Sbill #define DK_N 1 59264Sbill #define DK_NMAX 2 60264Sbill 61264Sbill #define ushort unsigned short 62264Sbill 63264Sbill struct device 64264Sbill { 65264Sbill ushort upcs1; /* control and status register 1 */ 66264Sbill short upwc; /* word count register */ 67264Sbill ushort upba; /* UNIBUS address register */ 68264Sbill ushort upda; /* desired address register */ 69264Sbill ushort upcs2; /* control and status register 2 */ 70264Sbill ushort upds; /* drive Status */ 71264Sbill ushort uper1; /* error register 1 */ 72264Sbill ushort upas; /* attention summary */ 73264Sbill ushort upla; /* look ahead */ 74264Sbill ushort updb; /* data buffer */ 75264Sbill ushort upmr; /* maintenance */ 76264Sbill ushort updt; /* drive type */ 77264Sbill ushort upsn; /* serial number */ 78264Sbill ushort upof; /* offset register */ 79264Sbill ushort updc; /* desired cylinder address register */ 80264Sbill ushort upcc; /* current cylinder */ 81264Sbill ushort uper2; /* error register 2 */ 82264Sbill ushort uper3; /* error register 3 */ 83264Sbill ushort upec1; /* burst error bit position */ 84264Sbill ushort upec2; /* burst error bit pattern */ 85264Sbill }; 86264Sbill 87264Sbill #define UPADDR ((struct device *)(UBA0_DEV + 0176700)) 88264Sbill 89264Sbill #define NUP 2 /* Number of drives this installation */ 90264Sbill 91264Sbill #define NSECT 32 92264Sbill #define NTRAC 19 93264Sbill 94264Sbill /* 95264Sbill * Constants controlling on-cylinder SEARCH usage. 96264Sbill * 97264Sbill * We assume that it takes SDIST sectors of time to set up a transfer. 98264Sbill * If a drive is on-cylinder, and between SDIST and SDIST+RDIST sectors 99264Sbill * from the first sector to be transferred, then we just perform the 100264Sbill * transfer. SDIST represents interrupt latency, RDIST the amount 101264Sbill * of rotation which is tolerable to avoid another interrupt. 102264Sbill */ 103266Sbill #define SDIST 3 /* 2-3 sectors 1-1.5 msec */ 104266Sbill #define RDIST 6 /* 5-6 sectors 2.5-3 msec */ 105264Sbill 106264Sbill /* 107264Sbill * To fill a 300M drive: 108264Sbill * A is designed to be used as a root. 109264Sbill * B is suitable for a swap area. 110264Sbill * H is the primary storage area. 111264Sbill * On systems with RP06'es, we normally use only 291346 blocks of the H 112264Sbill * area, and use DEF or G to cover the rest of the drive. The C system 113264Sbill * covers the whole drive and can be used for pack-pack copying. 114264Sbill */ 115264Sbill struct size 116264Sbill { 117264Sbill daddr_t nblocks; 118264Sbill int cyloff; 119264Sbill } up_sizes[8] = { 120264Sbill 15884, 0, /* A=cyl 0 thru 26 */ 121264Sbill 33440, 27, /* B=cyl 27 thru 81 */ 122264Sbill 494912, 0, /* C=cyl 0 thru 814 */ 123264Sbill 15884, 562, /* D=cyl 562 thru 588 */ 124264Sbill 55936, 589, /* E=cyl 589 thru 680 */ 125264Sbill 81472, 681, /* F=cyl 681 thru 814 */ 126264Sbill 153824, 562, /* G=cyl 562 thru 814 */ 127264Sbill 445664, 82, /* H=cyl 82 thru 814 */ 128264Sbill /* Later, and more safely for H area... 129264Sbill 291346, 82, /* H=cyl 82 thru 561 */ 130264Sbill }; 131264Sbill 132264Sbill /* 133264Sbill * The following defines are used in offset positioning 134264Sbill * when trying to recover disk errors, with the constants being 135264Sbill * +/- microinches. Note that header compare inhibit (HCI) is not 136264Sbill * tried (this makes sense only during read, in any case.) 137264Sbill * 138264Sbill * ARE ALL THESE IMPLEMENTED ON 9300? 139264Sbill */ 140264Sbill #define P400 020 141264Sbill #define M400 0220 142264Sbill #define P800 040 143264Sbill #define M800 0240 144264Sbill #define P1200 060 145264Sbill #define M1200 0260 146264Sbill #define HCI 020000 147264Sbill 148264Sbill int up_offset[16] = 149264Sbill { 150264Sbill P400, M400, P400, M400, 151264Sbill P800, M800, P800, M800, 152264Sbill P1200, M1200, P1200, M1200, 153264Sbill 0, 0, 0, 0, 154264Sbill }; 155264Sbill 156264Sbill /* 157264Sbill * Each drive has a table uputab[i]. On this table are sorted the 158264Sbill * pending requests implementing an elevator algorithm (see dsort.c.) 159264Sbill * In the upustart() routine, each drive is independently advanced 160264Sbill * until it is on the desired cylinder for the next transfer and near 161264Sbill * the desired sector. The drive is then chained onto the uptab 162264Sbill * table, and the transfer is initiated by the upstart() routine. 163264Sbill * When the transfer is completed the driver reinvokes the upustart() 164264Sbill * routine to set up the next transfer. 165264Sbill */ 166264Sbill struct buf uptab; 167264Sbill struct buf uputab[NUP]; 168264Sbill 169264Sbill struct buf rupbuf; /* Buffer for raw i/o */ 170264Sbill 171264Sbill /* Drive commands, placed in upcs1 */ 172264Sbill #define GO 01 /* Go bit, set in all commands */ 173264Sbill #define PRESET 020 /* Preset drive at init or after errors */ 174264Sbill #define OFFSET 014 /* Offset heads to try to recover error */ 175264Sbill #define RTC 016 /* Return to center-line after OFFSET */ 176264Sbill #define SEARCH 030 /* Search for cylinder+sector */ 177264Sbill #define RECAL 06 /* Recalibrate, needed after seek error */ 178264Sbill #define DCLR 010 /* Drive clear, after error */ 179264Sbill #define WCOM 060 /* Write */ 180264Sbill #define RCOM 070 /* Read */ 181264Sbill 182264Sbill /* Other bits of upcs1 */ 183264Sbill #define IE 0100 /* Controller wide interrupt enable */ 184264Sbill #define TRE 040000 /* Transfer error */ 185266Sbill #define RDY 020 /* Transfer terminated */ 186264Sbill 187264Sbill /* Drive status bits of upds */ 188264Sbill #define PIP 020000 /* Positioning in progress */ 189264Sbill #define ERR 040000 /* Error has occurred, DCLR necessary */ 190264Sbill #define VV 0100 /* Volume is valid, set by PRESET */ 191264Sbill #define DPR 0400 /* Drive has been preset */ 192264Sbill #define MOL 010000 /* Drive is online, heads loaded, etc */ 193264Sbill #define DRY 0200 /* Drive ready */ 194264Sbill 195264Sbill /* Bits of uper1 */ 196264Sbill #define DCK 0100000 /* Ecc error occurred */ 197264Sbill #define ECH 0100 /* Ecc error was unrecoverable */ 198264Sbill #define WLE 04000 /* Attempt to write read-only drive */ 199264Sbill 200264Sbill /* Bits of upof; the offset bits above are also in this register */ 201264Sbill #define FMT22 010000 /* 16 bits/word, must be always set */ 202264Sbill 203264Sbill #define b_cylin b_resid 204264Sbill 205264Sbill int up_ubinfo; /* Information about UBA usage saved here */ 206264Sbill /* 207264Sbill * The EMULEX controller balks if accessed quickly after 208264Sbill * certain operations. The exact timing has not yet been 209264Sbill * determined, but delays are known to be needed when changing 210264Sbill * the selected drive (by writing in upcs2), and thought to be 211264Sbill * needed after operations like PRESET and DCLR. The following 212264Sbill * variables control the delay, DELAY(n) is approximately n usec. 213264Sbill */ 214264Sbill int idelay = 500; /* Delay after PRESET or DCLR */ 215268Sbill int sdelay = 150; /* Delay after selecting drive in upcs2 */ 216264Sbill 217264Sbill #define DELAY(N) { register int d; d = N; while (--d > 0); } 218264Sbill 219264Sbill int nwaitcs2; /* How many sdelay loops ? */ 220264Sbill int neasycs2; /* How many sdelay loops not needed ? */ 221264Sbill 222264Sbill #ifdef INTRLVE 223264Sbill daddr_t dkblock(); 224264Sbill #endif 225264Sbill 226264Sbill /* 227264Sbill * Queue an i/o request for a drive, checking first that it is in range. 228264Sbill * 229264Sbill * A unit start is issued if the drive is inactive, causing 230264Sbill * a SEARCH for the correct cylinder/sector. If the drive is 231264Sbill * already nearly on the money and the controller is not transferring 232264Sbill * we kick it to start the transfer. 233264Sbill */ 234264Sbill upstrategy(bp) 235264Sbill register struct buf *bp; 236264Sbill { 237264Sbill register struct buf *dp; 238264Sbill register unit, xunit; 239264Sbill long sz, bn; 240264Sbill 241264Sbill xunit = minor(bp->b_dev) & 077; 242264Sbill sz = bp->b_bcount; 243264Sbill sz = (sz+511) >> 9; /* transfer size in 512 byte sectors */ 244264Sbill unit = dkunit(bp); 245264Sbill if (unit >= NUP || 246264Sbill bp->b_blkno < 0 || 247264Sbill (bn = dkblock(bp))+sz > up_sizes[xunit&07].nblocks) { 248264Sbill bp->b_flags |= B_ERROR; 249264Sbill iodone(bp); 250264Sbill return; 251264Sbill } 252264Sbill bp->b_cylin = bn/(NSECT*NTRAC) + up_sizes[xunit&07].cyloff; 253264Sbill dp = &uputab[unit]; 254264Sbill (void) spl5(); 255264Sbill disksort(dp, bp); 256264Sbill if (dp->b_active == 0) { 257268Sbill (void) upustart(unit); 258264Sbill if (uptab.b_actf && uptab.b_active == 0) 259268Sbill (void) upstart(); 260264Sbill } 261264Sbill (void) spl0(); 262264Sbill } 263264Sbill 264264Sbill /* 265264Sbill * Start activity on specified drive; called when drive is inactive 266264Sbill * and new transfer request arrives and also when upas indicates that 267264Sbill * a SEARCH command is complete. 268264Sbill */ 269264Sbill upustart(unit) 270264Sbill register unit; 271264Sbill { 272264Sbill register struct buf *bp, *dp; 273264Sbill register struct device *upaddr = UPADDR; 274264Sbill daddr_t bn; 275264Sbill int sn, cn, csn; 276268Sbill int didie = 0; 277264Sbill 278266Sbill if (unit >= NUP) 279268Sbill goto out; 280266Sbill /* 281266Sbill * Whether or not it was before, this unit is no longer busy. 282266Sbill * Check to see if there is (still or now) a request in this 283266Sbill * drives queue, and if there is, select this unit. 284266Sbill */ 285264Sbill if (unit+DK_N <= DK_NMAX) 286264Sbill dk_busy &= ~(1<<(unit+DK_N)); 287264Sbill dp = &uputab[unit]; 288266Sbill if ((bp = dp->b_actf) == NULL) 289268Sbill goto out; 290264Sbill if ((upaddr->upcs2 & 07) != unit) { 291264Sbill upaddr->upcs2 = unit; 292264Sbill DELAY(sdelay); 293264Sbill nwaitcs2++; 294264Sbill } else 295264Sbill neasycs2++; 296266Sbill /* 297266Sbill * If we have changed packs or just initialized, 298266Sbill * the the volume will not be valid; if so, clear 299266Sbill * the drive, preset it and put in 16bit/word mode. 300266Sbill */ 301266Sbill if ((upaddr->upds & VV) == 0) { 302266Sbill upaddr->upcs1 = IE|DCLR|GO; 303266Sbill DELAY(idelay); 304264Sbill upaddr->upcs1 = IE|PRESET|GO; 305264Sbill DELAY(idelay); 306264Sbill upaddr->upof = FMT22; 307268Sbill didie = 1; 308264Sbill } 309264Sbill /* 310266Sbill * We are called from upstrategy when a new request arrives 311266Sbill * if we are not already active (with dp->b_active == 0), 312266Sbill * and we then set dp->b_active to 1 if we are to SEARCH 313266Sbill * for the desired cylinder, or 2 if we are on-cylinder. 314266Sbill * If we SEARCH then we will later be called from upintr() 315266Sbill * when the search is complete, and will link this disk onto 316266Sbill * the uptab. We then set dp->b_active to 2 so that upintr() 317266Sbill * will not call us again. 318266Sbill * 319266Sbill * NB: Other drives clear the bit in the attention status 320266Sbill * (i.e. upas) register corresponding to the drive when they 321266Sbill * place the drive on the ready (i.e. uptab) queue. This does 322266Sbill * not work with the Emulex, as the controller hangs the UBA 323266Sbill * of the VAX shortly after the upas register is set, for 324266Sbill * reasons unknown. This only occurs in multi-spindle configurations, 325266Sbill * but to avoid the problem we use the fact that dp->b_active is 326266Sbill * 2 to replace the clearing of the upas bit. 327264Sbill */ 328266Sbill if (dp->b_active) 329264Sbill goto done; 330266Sbill dp->b_active = 1; 331264Sbill if ((upaddr->upds & (DPR|MOL)) != (DPR|MOL)) 332266Sbill goto done; /* Will redetect error in upstart() soon */ 333264Sbill 334266Sbill /* 335266Sbill * Do enough of the disk address decoding to determine 336266Sbill * which cylinder and sector the request is on. 337266Sbill * Then compute the number of the sector SDIST sectors before 338266Sbill * the one where the transfer is to start, this being the 339266Sbill * point where we wish to attempt to begin the transfer, 340266Sbill * allowing approximately SDIST/2 msec for interrupt latency 341266Sbill * and preparation of the request. 342266Sbill * 343266Sbill * If we are on the correct cylinder and the desired sector 344266Sbill * lies between SDIST and SDIST+RDIST sectors ahead of us, then 345266Sbill * we don't bother to SEARCH but just begin the transfer asap. 346266Sbill */ 347264Sbill bn = dkblock(bp); 348264Sbill cn = bp->b_cylin; 349264Sbill sn = bn%(NSECT*NTRAC); 350264Sbill sn = (sn+NSECT-SDIST)%NSECT; 351264Sbill 352266Sbill if (cn - upaddr->updc) 353266Sbill goto search; /* Not on-cylinder */ 354264Sbill csn = (upaddr->upla>>6) - sn - 1; 355266Sbill if (csn < 0) 356264Sbill csn += NSECT; 357266Sbill if (csn > NSECT-RDIST) 358264Sbill goto done; 359264Sbill 360264Sbill search: 361264Sbill upaddr->updc = cn; 362264Sbill upaddr->upda = sn; 363264Sbill upaddr->upcs1 = IE|SEARCH|GO; 364268Sbill didie = 1; 365266Sbill /* 366266Sbill * Mark this unit busy. 367266Sbill */ 368264Sbill unit += DK_N; 369264Sbill if (unit <= DK_NMAX) { 370264Sbill dk_busy |= 1<<unit; 371264Sbill dk_numb[unit]++; 372264Sbill } 373270Sbill if (csdel0) DELAY(csdel0); 374268Sbill goto out; 375264Sbill 376264Sbill done: 377266Sbill /* 378266Sbill * This unit is ready to go. Make active == 2 so 379266Sbill * we won't get called again (by upintr() because upas&(1<<unit)) 380266Sbill * and link us onto the chain of ready disks. 381266Sbill */ 382266Sbill dp->b_active = 2; 383264Sbill dp->b_forw = NULL; 384266Sbill if (uptab.b_actf == NULL) 385264Sbill uptab.b_actf = dp; 386264Sbill else 387264Sbill uptab.b_actl->b_forw = dp; 388264Sbill uptab.b_actl = dp; 389268Sbill 390268Sbill out: 391268Sbill return (didie); 392264Sbill } 393264Sbill 394264Sbill /* 395264Sbill * Start a transfer; call from top level at spl5() or on interrupt. 396264Sbill */ 397264Sbill upstart() 398264Sbill { 399264Sbill register struct buf *bp, *dp; 400264Sbill register unit; 401264Sbill register struct device *upaddr; 402264Sbill daddr_t bn; 403266Sbill int dn, sn, tn, cn, cmd; 404264Sbill 405264Sbill loop: 406266Sbill /* 407266Sbill * Pick a drive off the queue of ready drives, and 408266Sbill * perform the first transfer on its queue. 409266Sbill * 410266Sbill * Looping here is completely for the sake of drives which 411266Sbill * are not present and on-line, for which we completely clear the 412266Sbill * request queue. 413266Sbill */ 414269Sbill if ((dp = uptab.b_actf) == NULL) { 415268Sbill return (0); 416269Sbill } 417264Sbill if ((bp = dp->b_actf) == NULL) { 418264Sbill uptab.b_actf = dp->b_forw; 419264Sbill goto loop; 420264Sbill } 421266Sbill /* 422266Sbill * Mark the controller busy, and multi-part disk address. 423266Sbill * Select the unit on which the i/o is to take place. 424266Sbill */ 425264Sbill uptab.b_active++; 426264Sbill unit = minor(bp->b_dev) & 077; 427264Sbill dn = dkunit(bp); 428264Sbill bn = dkblock(bp); 429264Sbill cn = up_sizes[unit&07].cyloff; 430264Sbill cn += bn/(NSECT*NTRAC); 431264Sbill sn = bn%(NSECT*NTRAC); 432264Sbill tn = sn/NSECT; 433266Sbill sn %= NSECT; 434264Sbill upaddr = UPADDR; 435264Sbill if ((upaddr->upcs2 & 07) != dn) { 436264Sbill upaddr->upcs2 = dn; 437264Sbill DELAY(sdelay); 438264Sbill nwaitcs2++; 439264Sbill } else 440264Sbill neasycs2++; 441266Sbill up_ubinfo = ubasetup(bp, 1); /* In a funny place for delay... */ 442266Sbill /* 443266Sbill * If drive is not present and on-line, then 444266Sbill * get rid of this with an error and loop to get 445266Sbill * rid of the rest of its queued requests. 446266Sbill * (Then on to any other ready drives.) 447266Sbill */ 448264Sbill if ((upaddr->upds & (DPR|MOL)) != (DPR|MOL)) { 449264Sbill uptab.b_active = 0; 450264Sbill uptab.b_errcnt = 0; 451264Sbill dp->b_actf = bp->av_forw; 452266Sbill dp->b_active = 0; 453264Sbill bp->b_flags |= B_ERROR; 454264Sbill iodone(bp); 455266Sbill ubafree(up_ubinfo), up_ubinfo = 0; /* A funny place ... */ 456264Sbill goto loop; 457264Sbill } 458266Sbill /* 459266Sbill * If this is a retry, then with the 16'th retry we 460266Sbill * begin to try offsetting the heads to recover the data. 461266Sbill */ 462266Sbill if (uptab.b_errcnt >= 16) { 463264Sbill upaddr->upof = up_offset[uptab.b_errcnt & 017] | FMT22; 464266Sbill upaddr->upcs1 = IE|OFFSET|GO; 465264Sbill DELAY(idelay); 466266Sbill while (upaddr->upds & PIP) 467264Sbill DELAY(25); 468264Sbill } 469266Sbill /* 470266Sbill * Now set up the transfer, retrieving the high 471266Sbill * 2 bits of the UNIBUS address from the information 472266Sbill * returned by ubasetup() for the cs1 register bits 8 and 9. 473266Sbill */ 474264Sbill upaddr->updc = cn; 475264Sbill upaddr->upda = (tn << 8) + sn; 476264Sbill upaddr->upba = up_ubinfo; 477264Sbill upaddr->upwc = -bp->b_bcount / sizeof (short); 478266Sbill cmd = (up_ubinfo >> 8) & 0x300; 479264Sbill if (bp->b_flags & B_READ) 480266Sbill cmd |= IE|RCOM|GO; 481264Sbill else 482266Sbill cmd |= IE|WCOM|GO; 483266Sbill upaddr->upcs1 = cmd; 484266Sbill /* 485266Sbill * This is a controller busy situation. 486266Sbill * Record in dk slot NUP+DK_N (after last drive) 487266Sbill * unless there aren't that many slots reserved for 488266Sbill * us in which case we record this as a drive busy 489266Sbill * (if there is room for that). 490266Sbill */ 491264Sbill unit = dn+DK_N; 492264Sbill if (NUP+DK_N == DK_NMAX) 493264Sbill unit = NUP+DK_N; 494264Sbill if (unit <= DK_NMAX) { 495264Sbill dk_busy |= 1<<unit; 496264Sbill dk_numb[unit]++; 497264Sbill dk_wds[unit] += bp->b_bcount>>6; 498264Sbill } 499268Sbill return (1); 500264Sbill } 501264Sbill 502264Sbill /* 503264Sbill * Handle a device interrupt. 504264Sbill * 505264Sbill * If the transferring drive needs attention, service it 506264Sbill * retrying on error or beginning next transfer. 507264Sbill * Service all other ready drives, calling ustart to transfer 508264Sbill * their blocks to the ready queue in uptab, and then restart 509264Sbill * the controller if there is anything to do. 510264Sbill */ 511264Sbill upintr() 512264Sbill { 513264Sbill register struct buf *bp, *dp; 514264Sbill register unit; 515264Sbill register struct device *upaddr = UPADDR; 516264Sbill int as = upaddr->upas & 0377; 517268Sbill int needie = 1; 518264Sbill 519266Sbill if (uptab.b_active) { 520266Sbill /* 521266Sbill * The drive is transferring, thus the hardware 522266Sbill * (say the designers) will only interrupt when the transfer 523266Sbill * completes; check for it anyways. 524266Sbill */ 525266Sbill if ((upaddr->upcs1 & RDY) == 0) { 526267Sbill printf("!RDY in upintr: cs1 %o\n", upaddr->upcs1); 527267Sbill printf("as=%d act %d %d %d\n", as, uptab.b_active, uputab[0].b_active, uputab[1].b_active); 528269Sbill } 529266Sbill /* 530266Sbill * Mark controller or drive not busy, and check for an 531266Sbill * error condition which may have resulted from the transfer. 532266Sbill */ 533264Sbill dp = uptab.b_actf; 534264Sbill bp = dp->b_actf; 535264Sbill unit = dkunit(bp); 536264Sbill if (DK_N+NUP == DK_NMAX) 537264Sbill dk_busy &= ~(1<<(DK_N+NUP)); 538264Sbill else if (DK_N+unit <= DK_NMAX) 539264Sbill dk_busy &= ~(1<<(DK_N+unit)); 540264Sbill if (upaddr->upcs1 & TRE) { 541266Sbill /* 542266Sbill * An error occurred, indeed. Select this unit 543266Sbill * to get at the drive status (a SEARCH may have 544266Sbill * intervened to change the selected unit), and 545266Sbill * wait for the command which caused the interrupt 546266Sbill * to complete (DRY). 547266Sbill * 548266Sbill * WHY IS THE WAIT NECESSARY? 549266Sbill */ 550264Sbill if ((upaddr->upcs2 & 07) != unit) { 551264Sbill upaddr->upcs2 = unit; 552264Sbill DELAY(sdelay); 553264Sbill nwaitcs2++; 554264Sbill } else 555264Sbill neasycs2++; 556266Sbill while ((upaddr->upds & DRY) == 0) 557264Sbill DELAY(25); 558266Sbill /* 559266Sbill * After 28 retries (16 w/o servo offsets, and then 560266Sbill * 12 with servo offsets), or if we encountered 561266Sbill * an error because the drive is write-protected, 562266Sbill * give up. Print an error message on the last 2 563266Sbill * retries before a hard failure. 564266Sbill */ 565266Sbill if (++uptab.b_errcnt > 28 || upaddr->uper1&WLE) 566264Sbill bp->b_flags |= B_ERROR; 567264Sbill else 568266Sbill uptab.b_active = 0; /* To force retry */ 569266Sbill if (uptab.b_errcnt > 27) 570264Sbill deverror(bp, upaddr->upcs2, upaddr->uper1); 571266Sbill /* 572266Sbill * If this was a correctible ECC error, let upecc 573266Sbill * do the dirty work to correct it. If upecc 574266Sbill * starts another READ for the rest of the data 575266Sbill * then it returns 1 (having set uptab.b_active). 576266Sbill * Otherwise we are done and fall through to 577266Sbill * finish up. 578266Sbill */ 579266Sbill if ((upaddr->uper1&(DCK|ECH))==DCK && upecc(upaddr, bp)) 580266Sbill return; 581266Sbill /* 582266Sbill * Clear the drive and, every 4 retries, recalibrate 583266Sbill * to hopefully help clear up seek positioning problems. 584266Sbill */ 585264Sbill upaddr->upcs1 = TRE|IE|DCLR|GO; 586264Sbill DELAY(idelay); 587268Sbill needie = 0; 588266Sbill if ((uptab.b_errcnt&07) == 4) { 589264Sbill upaddr->upcs1 = RECAL|GO|IE; 590264Sbill DELAY(idelay); 591264Sbill while(upaddr->upds & PIP) 592264Sbill DELAY(25); 593264Sbill } 594264Sbill } 595266Sbill /* 596266Sbill * If we are still noted as active, then no 597266Sbill * (further) retries are necessary. 598266Sbill * 599266Sbill * Make sure the correct unit is selected, 600266Sbill * return it to centerline if necessary, and mark 601266Sbill * this i/o complete, starting the next transfer 602266Sbill * on this drive with the upustart routine (if any). 603266Sbill */ 604266Sbill if (uptab.b_active) { 605266Sbill if ((upaddr->upcs2 & 07) != unit) { 606266Sbill upaddr->upcs2 = unit; 607266Sbill DELAY(sdelay); 608266Sbill nwaitcs2++; 609266Sbill } else 610266Sbill neasycs2++; 611266Sbill if (uptab.b_errcnt >= 16) { 612266Sbill upaddr->upcs1 = RTC|GO|IE; 613264Sbill DELAY(idelay); 614266Sbill while (upaddr->upds & PIP) 615264Sbill DELAY(25); 616268Sbill needie = 0; 617264Sbill } 618264Sbill uptab.b_active = 0; 619264Sbill uptab.b_errcnt = 0; 620264Sbill uptab.b_actf = dp->b_forw; 621264Sbill dp->b_active = 0; 622264Sbill dp->b_errcnt = 0; 623264Sbill dp->b_actf = bp->av_forw; 624266Sbill bp->b_resid = (-upaddr->upwc * sizeof(short)); 625264Sbill iodone(bp); 626264Sbill if(dp->b_actf) 627268Sbill if (upustart(unit)) 628268Sbill needie = 0; 629264Sbill } 630264Sbill as &= ~(1<<unit); 631264Sbill ubafree(up_ubinfo), up_ubinfo = 0; 632266Sbill } 633266Sbill #ifndef notdef 634266Sbill else { 635264Sbill if (upaddr->upcs1 & TRE) { 636264Sbill upaddr->upcs1 = TRE; 637264Sbill DELAY(idelay); 638264Sbill } 639264Sbill } 640266Sbill #endif 641266Sbill /* 642266Sbill * If we have a unit with an outstanding SEARCH, 643266Sbill * and the hardware indicates the unit requires attention, 644266Sbill * the bring the drive to the ready queue. 645266Sbill * Finally, if the controller is not transferring 646266Sbill * start it if any drives are now ready to transfer. 647266Sbill */ 648266Sbill for (unit = 0; unit < NUP; unit++) 649266Sbill if (as & (1<<unit)) 650267Sbill if (uputab[unit].b_active == 1) { 651267Sbill upaddr->upas = 1<<unit; 652268Sbill if (asdel) DELAY(asdel); 653268Sbill if (upustart(unit)) 654268Sbill needie = 0; 655267Sbill } else { 656266Sbill upaddr->upas = 1<<unit; 657266Sbill DELAY(1000); 658266Sbill } 659266Sbill if (uptab.b_actf && uptab.b_active == 0) 660268Sbill if (upstart()) 661268Sbill needie = 0; 662266Sbill out: 663269Sbill if (needie) { 664266Sbill upaddr->upcs1 = IE; 665269Sbill } 666264Sbill } 667264Sbill 668264Sbill upread(dev) 669264Sbill { 670264Sbill 671264Sbill physio(upstrategy, &rupbuf, dev, B_READ, minphys); 672264Sbill } 673264Sbill 674264Sbill upwrite(dev) 675264Sbill { 676264Sbill 677264Sbill physio(upstrategy, &rupbuf, dev, B_WRITE, minphys); 678264Sbill } 679264Sbill 680266Sbill /* 681266Sbill * Correct an ECC error, and restart the i/o to complete 682266Sbill * the transfer if necessary. This is quite complicated because 683266Sbill * the transfer may be going to an odd memory address base and/or 684266Sbill * across a page boundary. 685266Sbill */ 686264Sbill upecc(up, bp) 687264Sbill register struct device *up; 688264Sbill register struct buf *bp; 689264Sbill { 690264Sbill struct uba_regs *ubp = (struct uba_regs *)UBA0; 691266Sbill register int i; 692264Sbill caddr_t addr; 693266Sbill int reg, bit, byte, npf, mask, o, cmd, ubaddr; 694264Sbill int bn, cn, tn, sn; 695264Sbill 696264Sbill /* 697266Sbill * Npf is the number of sectors transferred before the sector 698266Sbill * containing the ECC error, and reg is the UBA register 699266Sbill * mapping (the first part of) the transfer. 700266Sbill * O is offset within a memory page of the first byte transferred. 701264Sbill */ 702266Sbill npf = btop((up->upwc * sizeof(short)) + bp->b_bcount) - 1; 703266Sbill reg = btop(up_ubinfo&0x3ffff) + npf; 704264Sbill o = (int)bp->b_un.b_addr & PGOFSET; 705264Sbill printf("%D ", bp->b_blkno+npf); 706264Sbill prdev("ECC", bp->b_dev); 707264Sbill mask = up->upec2; 708264Sbill if (mask == 0) { 709266Sbill up->upof = FMT22; /* == RTC ???? */ 710264Sbill DELAY(idelay); 711264Sbill return (0); 712264Sbill } 713266Sbill /* 714266Sbill * Flush the buffered data path, and compute the 715266Sbill * byte and bit position of the error. The variable i 716266Sbill * is the byte offset in the transfer, the variable byte 717266Sbill * is the offset from a page boundary in main memory. 718266Sbill */ 719266Sbill ubp->uba_dpr[(up_ubinfo>>28)&0x0f] |= BNE; 720266Sbill i = up->upec1 - 1; /* -1 makes 0 origin */ 721266Sbill bit = i&07; 722266Sbill i = (i&~07)>>3; 723264Sbill byte = i + o; 724266Sbill /* 725266Sbill * Correct while possible bits remain of mask. Since mask 726266Sbill * contains 11 bits, we continue while the bit offset is > -11. 727266Sbill * Also watch out for end of this block and the end of the whole 728266Sbill * transfer. 729266Sbill */ 730266Sbill while (i < 512 && (int)ptob(npf)+i < bp->b_bcount && bit > -11) { 731266Sbill addr = ptob(ubp->uba_map[reg+btop(byte)].pg_pfnum)+ 732266Sbill (byte & PGOFSET); 733266Sbill putmemc(addr, getmemc(addr)^(mask<<bit)); 734266Sbill byte++; 735266Sbill i++; 736266Sbill bit -= 8; 737264Sbill } 738266Sbill uptab.b_active++; /* Either complete or continuing... */ 739264Sbill if (up->upwc == 0) 740264Sbill return (0); 741266Sbill /* 742266Sbill * Have to continue the transfer... clear the drive, 743266Sbill * and compute the position where the transfer is to continue. 744266Sbill * We have completed npf+1 sectors of the transfer already; 745266Sbill * restart at offset o of next sector (i.e. in UBA register reg+1). 746266Sbill */ 747266Sbill up->upcs1 = TRE|IE|DCLR|GO; 748264Sbill DELAY(idelay); 749264Sbill bn = dkblock(bp); 750264Sbill cn = bp->b_cylin; 751266Sbill sn = bn%(NSECT*NTRAC) + npf + 1; 752264Sbill tn = sn/NSECT; 753264Sbill sn %= NSECT; 754266Sbill cn += tn/NTRAC; 755266Sbill tn %= NTRAC; 756264Sbill up->updc = cn; 757266Sbill up->upda = (tn << 8) | sn; 758266Sbill ubaddr = (int)ptob(reg+1) + o; 759266Sbill up->upba = ubaddr; 760266Sbill cmd = (ubaddr >> 8) & 0x300; 761266Sbill cmd |= IE|GO|RCOM; 762266Sbill up->upcs1 = cmd; 763264Sbill return (1); 764264Sbill } 765