xref: /csrg-svn/sys/vax/uba/up.c (revision 10871)
1*10871Ssam /*	up.c	4.67	83/02/10	*/
2264Sbill 
31937Swnj #include "up.h"
42646Swnj #if NSC > 0
5264Sbill /*
69548Ssam  * UNIBUS disk driver with:
79548Ssam  *	overlapped seeks,
89548Ssam  *	ECC recovery, and
99548Ssam  *	bad sector forwarding.
102889Swnj  *
112889Swnj  * TODO:
123445Sroot  *	Check that offset recovery code works
13264Sbill  */
149782Ssam #include "../machine/pte.h"
15264Sbill 
16264Sbill #include "../h/param.h"
17264Sbill #include "../h/systm.h"
18308Sbill #include "../h/dk.h"
199548Ssam #include "../h/dkbad.h"
20264Sbill #include "../h/buf.h"
21264Sbill #include "../h/conf.h"
22264Sbill #include "../h/dir.h"
23264Sbill #include "../h/user.h"
24264Sbill #include "../h/map.h"
252571Swnj #include "../h/vm.h"
262379Swnj #include "../h/cmap.h"
279357Ssam #include "../h/uio.h"
28*10871Ssam #include "../h/kernel.h"
29264Sbill 
309357Ssam #include "../vax/cpu.h"
319357Ssam #include "../vax/nexus.h"
329357Ssam #include "../vaxuba/ubavar.h"
339357Ssam #include "../vaxuba/ubareg.h"
349357Ssam #include "../vaxuba/upreg.h"
359357Ssam 
362395Swnj struct	up_softc {
372395Swnj 	int	sc_softas;
382607Swnj 	int	sc_ndrive;
392395Swnj 	int	sc_wticks;
402674Swnj 	int	sc_recal;
412646Swnj } up_softc[NSC];
42275Sbill 
432395Swnj /* THIS SHOULD BE READ OFF THE PACK, PER DRIVE */
4410858Ssam struct	size {
45264Sbill 	daddr_t	nblocks;
46264Sbill 	int	cyloff;
47264Sbill } up_sizes[8] = {
48264Sbill 	15884,	0,		/* A=cyl 0 thru 26 */
49264Sbill 	33440,	27,		/* B=cyl 27 thru 81 */
50341Sbill 	495520,	0,		/* C=cyl 0 thru 814 */
51264Sbill 	15884,	562,		/* D=cyl 562 thru 588 */
52264Sbill 	55936,	589,		/* E=cyl 589 thru 680 */
533730Sroot 	81376,	681,		/* F=cyl 681 thru 814 */
543730Sroot 	153728,	562,		/* G=cyl 562 thru 814 */
55264Sbill 	291346,	82,		/* H=cyl 82 thru 561 */
562395Swnj }, fj_sizes[8] = {
572395Swnj 	15884,	0,		/* A=cyl 0 thru 49 */
582395Swnj 	33440,	50,		/* B=cyl 50 thru 154 */
592395Swnj 	263360,	0,		/* C=cyl 0 thru 822 */
602395Swnj 	0,	0,
612395Swnj 	0,	0,
622395Swnj 	0,	0,
632395Swnj 	0,	0,
643730Sroot 	213664,	155,		/* H=cyl 155 thru 822 */
656851Ssam }, upam_sizes[8] = {
666305Sroot 	15884,	0,		/* A=cyl 0 thru 31 */
676305Sroot 	33440,	32,		/* B=cyl 32 thru 97 */
686305Sroot 	524288,	0,		/* C=cyl 0 thru 1023 */
696602Ssam 	27786,	668,
706602Ssam 	27786,	723,
716602Ssam 	125440,	778,
726305Sroot 	181760,	668,		/* G=cyl 668 thru 1022 */
736305Sroot 	291346,	98,		/* H=cyl 98 thru 667 */
74264Sbill };
752395Swnj /* END OF STUFF WHICH SHOULD BE READ IN PER DISK */
76264Sbill 
776346Swnj /*
786346Swnj  * On a 780 upSDIST could be 2, but
796346Swnj  * in the interest of 750's...
806346Swnj  */
816346Swnj #define	_upSDIST	3		/* 1.5 msec */
822395Swnj #define	_upRDIST	4		/* 2.0 msec */
83264Sbill 
842395Swnj int	upSDIST = _upSDIST;
852395Swnj int	upRDIST = _upRDIST;
862395Swnj 
872607Swnj int	upprobe(), upslave(), upattach(), updgo(), upintr();
882983Swnj struct	uba_ctlr *upminfo[NSC];
892983Swnj struct	uba_device *updinfo[NUP];
906383Swnj #define	UPIPUNITS	8
916383Swnj struct	uba_device *upip[NSC][UPIPUNITS]; /* fuji w/fixed head gives n,n+4 */
922395Swnj 
932607Swnj u_short	upstd[] = { 0776700, 0774400, 0776300, 0 };
942616Swnj struct	uba_driver scdriver =
952607Swnj     { upprobe, upslave, upattach, updgo, upstd, "up", updinfo, "sc", upminfo };
962395Swnj struct	buf	uputab[NUP];
979548Ssam char upinit[NUP];
982395Swnj 
992395Swnj struct	upst {
1002395Swnj 	short	nsect;
1012395Swnj 	short	ntrak;
1022395Swnj 	short	nspc;
1032395Swnj 	short	ncyl;
1042395Swnj 	struct	size *sizes;
1052395Swnj } upst[] = {
1062607Swnj 	32,	19,	32*19,	823,	up_sizes,	/* 9300/cdc */
1072607Swnj /* 9300 actually has 815 cylinders... */
1082395Swnj 	32,	10,	32*10,	823,	fj_sizes,	/* fujitsu 160m */
1096851Ssam 	32,	16,	32*16,	1024,	upam_sizes,	/* ampex capricorn */
1102395Swnj };
1112395Swnj 
1122629Swnj u_char	up_offset[16] = {
1139548Ssam 	UPOF_P400, UPOF_M400, UPOF_P400, UPOF_M400,
1149548Ssam 	UPOF_P800, UPOF_M800, UPOF_P800, UPOF_M800,
1159548Ssam 	UPOF_P1200, UPOF_M1200, UPOF_P1200, UPOF_M1200,
1169548Ssam 	0, 0, 0, 0
1172629Swnj };
118264Sbill 
1192616Swnj struct	buf	rupbuf[NUP];
1209548Ssam struct 	buf	bupbuf[NUP];
1219548Ssam struct	dkbad	upbad[NUP];
122264Sbill 
123264Sbill #define	b_cylin b_resid
124264Sbill 
125264Sbill #ifdef INTRLVE
126264Sbill daddr_t dkblock();
127264Sbill #endif
1282395Swnj 
1292395Swnj int	upwstart, upwatch();		/* Have started guardian */
1302470Swnj int	upseek;
1312681Swnj int	upwaitdry;
1322395Swnj 
1332395Swnj /*ARGSUSED*/
1342607Swnj upprobe(reg)
1352395Swnj 	caddr_t reg;
1362395Swnj {
1372459Swnj 	register int br, cvec;
1382459Swnj 
1392607Swnj #ifdef lint
1402607Swnj 	br = 0; cvec = br; br = cvec;
1412607Swnj #endif
1422629Swnj 	((struct updevice *)reg)->upcs1 = UP_IE|UP_RDY;
1432607Swnj 	DELAY(10);
1442629Swnj 	((struct updevice *)reg)->upcs1 = 0;
1459357Ssam 	return (sizeof (struct updevice));
1462395Swnj }
1472395Swnj 
1482607Swnj upslave(ui, reg)
1492983Swnj 	struct uba_device *ui;
1502395Swnj 	caddr_t reg;
1512395Swnj {
1522629Swnj 	register struct updevice *upaddr = (struct updevice *)reg;
1532395Swnj 
1542395Swnj 	upaddr->upcs1 = 0;		/* conservative */
1552607Swnj 	upaddr->upcs2 = ui->ui_slave;
1566843Swnj 	upaddr->upcs1 = UP_NOP|UP_GO;
1573445Sroot 	if (upaddr->upcs2&UPCS2_NED) {
1582629Swnj 		upaddr->upcs1 = UP_DCLR|UP_GO;
1592395Swnj 		return (0);
1602395Swnj 	}
1612607Swnj 	return (1);
1622607Swnj }
1632607Swnj 
1642607Swnj upattach(ui)
1652983Swnj 	register struct uba_device *ui;
1662607Swnj {
1672629Swnj 	register struct updevice *upaddr;
1682607Swnj 
1692395Swnj 	if (upwstart == 0) {
1702759Swnj 		timeout(upwatch, (caddr_t)0, hz);
1712395Swnj 		upwstart++;
1722395Swnj 	}
1732571Swnj 	if (ui->ui_dk >= 0)
1742571Swnj 		dk_mspw[ui->ui_dk] = .0000020345;
1752607Swnj 	upip[ui->ui_ctlr][ui->ui_slave] = ui;
1762607Swnj 	up_softc[ui->ui_ctlr].sc_ndrive++;
1772629Swnj 	upaddr = (struct updevice *)ui->ui_addr;
1782629Swnj 	upaddr->upcs1 = 0;
1792629Swnj 	upaddr->upcs2 = ui->ui_slave;
1803496Sroot 	upaddr->uphr = UPHR_MAXTRAK;
1813553Swnj 	if (upaddr->uphr == 9)
1823496Sroot 		ui->ui_type = 1;		/* fujitsu hack */
1836305Sroot 	else if (upaddr->uphr == 15)
1846305Sroot 		ui->ui_type = 2;		/* ampex hack */
1853496Sroot 	upaddr->upcs2 = UPCS2_CLR;
1862395Swnj }
187264Sbill 
1889548Ssam upopen(dev)
1899548Ssam 	dev_t dev;
1909548Ssam {
1919548Ssam 	register int unit = minor(dev) >> 3;
1929548Ssam 	register struct uba_device *ui;
1939548Ssam 
1949548Ssam 	if (unit >= NUP || (ui = updinfo[unit]) == 0 || ui->ui_alive == 0)
1959548Ssam 		return (ENXIO);
1969548Ssam 	return (0);
1979548Ssam }
1989548Ssam 
199264Sbill upstrategy(bp)
2002395Swnj 	register struct buf *bp;
201264Sbill {
2022983Swnj 	register struct uba_device *ui;
2032395Swnj 	register struct upst *st;
2042395Swnj 	register int unit;
2052470Swnj 	register struct buf *dp;
2062395Swnj 	int xunit = minor(bp->b_dev) & 07;
2072470Swnj 	long bn, sz;
208264Sbill 
2092470Swnj 	sz = (bp->b_bcount+511) >> 9;
210264Sbill 	unit = dkunit(bp);
2112395Swnj 	if (unit >= NUP)
2122395Swnj 		goto bad;
2132395Swnj 	ui = updinfo[unit];
2142395Swnj 	if (ui == 0 || ui->ui_alive == 0)
2152395Swnj 		goto bad;
2162395Swnj 	st = &upst[ui->ui_type];
2172395Swnj 	if (bp->b_blkno < 0 ||
2182395Swnj 	    (bn = dkblock(bp))+sz > st->sizes[xunit].nblocks)
2192395Swnj 		goto bad;
2202395Swnj 	bp->b_cylin = bn/st->nspc + st->sizes[xunit].cyloff;
2216305Sroot 	(void) spl5();
2222470Swnj 	dp = &uputab[ui->ui_unit];
2232470Swnj 	disksort(dp, bp);
2242470Swnj 	if (dp->b_active == 0) {
2252395Swnj 		(void) upustart(ui);
2262395Swnj 		bp = &ui->ui_mi->um_tab;
2272395Swnj 		if (bp->b_actf && bp->b_active == 0)
2282395Swnj 			(void) upstart(ui->ui_mi);
229264Sbill 	}
2306305Sroot 	(void) spl0();
2312395Swnj 	return;
2322395Swnj 
2332395Swnj bad:
2342395Swnj 	bp->b_flags |= B_ERROR;
2352395Swnj 	iodone(bp);
2362395Swnj 	return;
237264Sbill }
238264Sbill 
2392674Swnj /*
2402674Swnj  * Unit start routine.
2412674Swnj  * Seek the drive to be where the data is
2422674Swnj  * and then generate another interrupt
2432674Swnj  * to actually start the transfer.
2442674Swnj  * If there is only one drive on the controller,
2452674Swnj  * or we are very close to the data, don't
2462674Swnj  * bother with the search.  If called after
2472674Swnj  * searching once, don't bother to look where
2482674Swnj  * we are, just queue for transfer (to avoid
2492674Swnj  * positioning forever without transferrring.)
2502674Swnj  */
2512395Swnj upustart(ui)
2522983Swnj 	register struct uba_device *ui;
253264Sbill {
254264Sbill 	register struct buf *bp, *dp;
2552983Swnj 	register struct uba_ctlr *um;
2562629Swnj 	register struct updevice *upaddr;
2572395Swnj 	register struct upst *st;
258264Sbill 	daddr_t bn;
2592674Swnj 	int sn, csn;
2602607Swnj 	/*
2612607Swnj 	 * The SC21 cancels commands if you just say
2622629Swnj 	 *	cs1 = UP_IE
2632607Swnj 	 * so we are cautious about handling of cs1.
2642607Swnj 	 * Also don't bother to clear as bits other than in upintr().
2652607Swnj 	 */
2662674Swnj 	int didie = 0;
2672674Swnj 
2682674Swnj 	if (ui == 0)
2692674Swnj 		return (0);
2702983Swnj 	um = ui->ui_mi;
2712395Swnj 	dk_busy &= ~(1<<ui->ui_dk);
2722395Swnj 	dp = &uputab[ui->ui_unit];
273266Sbill 	if ((bp = dp->b_actf) == NULL)
274268Sbill 		goto out;
2752674Swnj 	/*
2762674Swnj 	 * If the controller is active, just remember
2772674Swnj 	 * that this device would like to be positioned...
2782674Swnj 	 * if we tried to position now we would confuse the SC21.
2792674Swnj 	 */
2802395Swnj 	if (um->um_tab.b_active) {
2812459Swnj 		up_softc[um->um_ctlr].sc_softas |= 1<<ui->ui_slave;
282275Sbill 		return (0);
283275Sbill 	}
2842674Swnj 	/*
2852674Swnj 	 * If we have already positioned this drive,
2862674Swnj 	 * then just put it on the ready queue.
2872674Swnj 	 */
288276Sbill 	if (dp->b_active)
289276Sbill 		goto done;
290276Sbill 	dp->b_active = 1;
2912629Swnj 	upaddr = (struct updevice *)um->um_addr;
2922395Swnj 	upaddr->upcs2 = ui->ui_slave;
2932674Swnj 	/*
2942674Swnj 	 * If drive has just come up,
2952674Swnj 	 * setup the pack.
2962674Swnj 	 */
2979548Ssam 	if ((upaddr->upds & UPDS_VV) == 0 || upinit[ui->ui_unit] == 0) {
2989548Ssam 		struct buf *bbp = &bupbuf[ui->ui_unit];
29910858Ssam 
3002607Swnj 		/* SHOULD WARN SYSTEM THAT THIS HAPPENED */
3019548Ssam 		upinit[ui->ui_unit] = 1;
3022629Swnj 		upaddr->upcs1 = UP_IE|UP_DCLR|UP_GO;
3032629Swnj 		upaddr->upcs1 = UP_IE|UP_PRESET|UP_GO;
3043445Sroot 		upaddr->upof = UPOF_FMT22;
305268Sbill 		didie = 1;
3069548Ssam 		st = &upst[ui->ui_type];
3079548Ssam 		bbp->b_flags = B_READ|B_BUSY;
3089548Ssam 		bbp->b_dev = bp->b_dev;
3099548Ssam 		bbp->b_bcount = 512;
3109548Ssam 		bbp->b_un.b_addr = (caddr_t)&upbad[ui->ui_unit];
3119548Ssam 		bbp->b_blkno = st->ncyl * st->nspc - st->nsect;
3129548Ssam 		bbp->b_cylin = st->ncyl - 1;
3139548Ssam 		dp->b_actf = bbp;
3149548Ssam 		bbp->av_forw = bp;
3159548Ssam 		bp = bbp;
316264Sbill 	}
3172674Swnj 	/*
3182674Swnj 	 * If drive is offline, forget about positioning.
3192674Swnj 	 */
3203445Sroot 	if ((upaddr->upds & (UPDS_DPR|UPDS_MOL)) != (UPDS_DPR|UPDS_MOL))
321275Sbill 		goto done;
3222674Swnj 	/*
3232674Swnj 	 * If there is only one drive,
3242674Swnj 	 * dont bother searching.
3252674Swnj 	 */
3262607Swnj 	if (up_softc[um->um_ctlr].sc_ndrive == 1)
3272607Swnj 		goto done;
3282674Swnj 	/*
3292674Swnj 	 * Figure out where this transfer is going to
3302674Swnj 	 * and see if we are close enough to justify not searching.
3312674Swnj 	 */
3322395Swnj 	st = &upst[ui->ui_type];
333264Sbill 	bn = dkblock(bp);
3342395Swnj 	sn = bn%st->nspc;
3352395Swnj 	sn = (sn + st->nsect - upSDIST) % st->nsect;
3362674Swnj 	if (bp->b_cylin - upaddr->updc)
337266Sbill 		goto search;		/* Not on-cylinder */
338275Sbill 	else if (upseek)
339275Sbill 		goto done;		/* Ok just to be on-cylinder */
340264Sbill 	csn = (upaddr->upla>>6) - sn - 1;
341266Sbill 	if (csn < 0)
3422395Swnj 		csn += st->nsect;
3432395Swnj 	if (csn > st->nsect - upRDIST)
344264Sbill 		goto done;
345264Sbill search:
3462674Swnj 	upaddr->updc = bp->b_cylin;
3472674Swnj 	/*
3482674Swnj 	 * Not on cylinder at correct position,
3492674Swnj 	 * seek/search.
3502674Swnj 	 */
351275Sbill 	if (upseek)
3522629Swnj 		upaddr->upcs1 = UP_IE|UP_SEEK|UP_GO;
3532470Swnj 	else {
354275Sbill 		upaddr->upda = sn;
3552629Swnj 		upaddr->upcs1 = UP_IE|UP_SEARCH|UP_GO;
356275Sbill 	}
357268Sbill 	didie = 1;
3582674Swnj 	/*
3592674Swnj 	 * Mark unit busy for iostat.
3602674Swnj 	 */
3612395Swnj 	if (ui->ui_dk >= 0) {
3622395Swnj 		dk_busy |= 1<<ui->ui_dk;
3632395Swnj 		dk_seek[ui->ui_dk]++;
364264Sbill 	}
365268Sbill 	goto out;
366264Sbill done:
3672674Swnj 	/*
3682674Swnj 	 * Device is ready to go.
3692674Swnj 	 * Put it on the ready queue for the controller
3702674Swnj 	 * (unless its already there.)
3712674Swnj 	 */
3722629Swnj 	if (dp->b_active != 2) {
3732629Swnj 		dp->b_forw = NULL;
3742629Swnj 		if (um->um_tab.b_actf == NULL)
3752629Swnj 			um->um_tab.b_actf = dp;
3762629Swnj 		else
3772629Swnj 			um->um_tab.b_actl->b_forw = dp;
3782629Swnj 		um->um_tab.b_actl = dp;
3792629Swnj 		dp->b_active = 2;
3802629Swnj 	}
381268Sbill out:
382268Sbill 	return (didie);
383264Sbill }
384264Sbill 
3852674Swnj /*
3862674Swnj  * Start up a transfer on a drive.
3872674Swnj  */
3882395Swnj upstart(um)
3892983Swnj 	register struct uba_ctlr *um;
390264Sbill {
391264Sbill 	register struct buf *bp, *dp;
3922983Swnj 	register struct uba_device *ui;
3932629Swnj 	register struct updevice *upaddr;
3942470Swnj 	struct upst *st;
395264Sbill 	daddr_t bn;
3962681Swnj 	int dn, sn, tn, cmd, waitdry;
397264Sbill 
398264Sbill loop:
3992674Swnj 	/*
4002674Swnj 	 * Pull a request off the controller queue
4012674Swnj 	 */
4022395Swnj 	if ((dp = um->um_tab.b_actf) == NULL)
403268Sbill 		return (0);
404264Sbill 	if ((bp = dp->b_actf) == NULL) {
4052395Swnj 		um->um_tab.b_actf = dp->b_forw;
406264Sbill 		goto loop;
407264Sbill 	}
4082674Swnj 	/*
4092674Swnj 	 * Mark controller busy, and
4102674Swnj 	 * determine destination of this request.
4112674Swnj 	 */
4122395Swnj 	um->um_tab.b_active++;
4132395Swnj 	ui = updinfo[dkunit(bp)];
414264Sbill 	bn = dkblock(bp);
4152395Swnj 	dn = ui->ui_slave;
4162395Swnj 	st = &upst[ui->ui_type];
4172395Swnj 	sn = bn%st->nspc;
4182395Swnj 	tn = sn/st->nsect;
4192395Swnj 	sn %= st->nsect;
4202629Swnj 	upaddr = (struct updevice *)ui->ui_addr;
4212674Swnj 	/*
4222674Swnj 	 * Select drive if not selected already.
4232674Swnj 	 */
4242674Swnj 	if ((upaddr->upcs2&07) != dn)
4252674Swnj 		upaddr->upcs2 = dn;
4262674Swnj 	/*
4272674Swnj 	 * Check that it is ready and online
4282674Swnj 	 */
4292681Swnj 	waitdry = 0;
4303445Sroot 	while ((upaddr->upds&UPDS_DRY) == 0) {
4317036Swnj 		printf("up%d: ds wait ds=%o\n",dkunit(bp),upaddr->upds);
4322681Swnj 		if (++waitdry > 512)
4332681Swnj 			break;
4342681Swnj 		upwaitdry++;
4352681Swnj 	}
4363445Sroot 	if ((upaddr->upds & UPDS_DREADY) != UPDS_DREADY) {
4372931Swnj 		printf("up%d: not ready", dkunit(bp));
4383445Sroot 		if ((upaddr->upds & UPDS_DREADY) != UPDS_DREADY) {
4392607Swnj 			printf("\n");
4402395Swnj 			um->um_tab.b_active = 0;
4412395Swnj 			um->um_tab.b_errcnt = 0;
442893Sbill 			dp->b_actf = bp->av_forw;
443893Sbill 			dp->b_active = 0;
444893Sbill 			bp->b_flags |= B_ERROR;
445893Sbill 			iodone(bp);
446893Sbill 			goto loop;
447893Sbill 		}
4482674Swnj 		/*
4492674Swnj 		 * Oh, well, sometimes this
4502674Swnj 		 * happens, for reasons unknown.
4512674Swnj 		 */
4522629Swnj 		printf(" (flakey)\n");
453264Sbill 	}
4542674Swnj 	/*
4552674Swnj 	 * Setup for the transfer, and get in the
4562674Swnj 	 * UNIBUS adaptor queue.
4572674Swnj 	 */
4582424Skre 	upaddr->updc = bp->b_cylin;
459264Sbill 	upaddr->upda = (tn << 8) + sn;
460264Sbill 	upaddr->upwc = -bp->b_bcount / sizeof (short);
461264Sbill 	if (bp->b_flags & B_READ)
4622629Swnj 		cmd = UP_IE|UP_RCOM|UP_GO;
463264Sbill 	else
4642629Swnj 		cmd = UP_IE|UP_WCOM|UP_GO;
4652571Swnj 	um->um_cmd = cmd;
4663107Swnj 	(void) ubago(ui);
467268Sbill 	return (1);
468264Sbill }
469264Sbill 
4702674Swnj /*
4712674Swnj  * Now all ready to go, stuff the registers.
4722674Swnj  */
4732571Swnj updgo(um)
4742983Swnj 	struct uba_ctlr *um;
4752395Swnj {
4762629Swnj 	register struct updevice *upaddr = (struct updevice *)um->um_addr;
4772470Swnj 
4786953Swnj 	um->um_tab.b_active = 2;	/* should now be 2 */
4792571Swnj 	upaddr->upba = um->um_ubinfo;
4802571Swnj 	upaddr->upcs1 = um->um_cmd|((um->um_ubinfo>>8)&0x300);
4812395Swnj }
4822395Swnj 
4832674Swnj /*
4842674Swnj  * Handle a disk interrupt.
4852674Swnj  */
4862707Swnj upintr(sc21)
4872395Swnj 	register sc21;
488264Sbill {
489264Sbill 	register struct buf *bp, *dp;
4902983Swnj 	register struct uba_ctlr *um = upminfo[sc21];
4912983Swnj 	register struct uba_device *ui;
4922629Swnj 	register struct updevice *upaddr = (struct updevice *)um->um_addr;
493264Sbill 	register unit;
4942470Swnj 	struct up_softc *sc = &up_softc[um->um_ctlr];
4952607Swnj 	int as = (upaddr->upas & 0377) | sc->sc_softas;
4962681Swnj 	int needie = 1, waitdry;
497264Sbill 
4982470Swnj 	sc->sc_wticks = 0;
4992607Swnj 	sc->sc_softas = 0;
5002674Swnj 	/*
5012674Swnj 	 * If controller wasn't transferring, then this is an
5022674Swnj 	 * interrupt for attention status on seeking drives.
5032674Swnj 	 * Just service them.
5042674Swnj 	 */
5056346Swnj 	if (um->um_tab.b_active != 2 && !sc->sc_recal) {
5062674Swnj 		if (upaddr->upcs1 & UP_TRE)
5072674Swnj 			upaddr->upcs1 = UP_TRE;
5082674Swnj 		goto doattn;
5092674Swnj 	}
5106953Swnj 	um->um_tab.b_active = 1;
5112674Swnj 	/*
5122674Swnj 	 * Get device and block structures, and a pointer
5132983Swnj 	 * to the uba_device for the drive.  Select the drive.
5142674Swnj 	 */
5152674Swnj 	dp = um->um_tab.b_actf;
5162674Swnj 	bp = dp->b_actf;
5172674Swnj 	ui = updinfo[dkunit(bp)];
5182674Swnj 	dk_busy &= ~(1 << ui->ui_dk);
5192674Swnj 	if ((upaddr->upcs2&07) != ui->ui_slave)
5202395Swnj 		upaddr->upcs2 = ui->ui_slave;
5219548Ssam 	if (bp->b_flags&B_BAD) {
5229548Ssam 		if (upecc(ui, CONT))
5239548Ssam 			return;
5249548Ssam 	}
5252674Swnj 	/*
5262674Swnj 	 * Check for and process errors on
5272674Swnj 	 * either the drive or the controller.
5282674Swnj 	 */
5293445Sroot 	if ((upaddr->upds&UPDS_ERR) || (upaddr->upcs1&UP_TRE)) {
5302681Swnj 		waitdry = 0;
5313445Sroot 		while ((upaddr->upds & UPDS_DRY) == 0) {
5322681Swnj 			if (++waitdry > 512)
5332681Swnj 				break;
5342681Swnj 			upwaitdry++;
5352681Swnj 		}
5363445Sroot 		if (upaddr->uper1&UPER1_WLE) {
5372674Swnj 			/*
5382674Swnj 			 * Give up on write locked devices
5392674Swnj 			 * immediately.
5402674Swnj 			 */
5412931Swnj 			printf("up%d: write locked\n", dkunit(bp));
5422674Swnj 			bp->b_flags |= B_ERROR;
5432674Swnj 		} else if (++um->um_tab.b_errcnt > 27) {
5442674Swnj 			/*
5452674Swnj 			 * After 28 retries (16 without offset, and
5462674Swnj 			 * 12 with offset positioning) give up.
5472674Swnj 			 */
5489548Ssam 	hard:
5492931Swnj 			harderr(bp, "up");
5509548Ssam 			printf("cn=%d tn=%d sn=%d cs2=%b er1=%b er2=%b\n",
5519548Ssam 			        upaddr->updc, ((upaddr->upda)>>8)&077,
5529548Ssam 			        (upaddr->upda)&037,
5539548Ssam 				upaddr->upcs2, UPCS2_BITS,
5549548Ssam 				upaddr->uper1, UPER1_BITS,
5559548Ssam 				upaddr->uper2, UPER2_BITS);
5562674Swnj 			bp->b_flags |= B_ERROR;
5579548Ssam 		} else if (upaddr->uper2 & UPER2_BSE) {
5589548Ssam 			if (upecc(ui, BSE))
5599548Ssam 				return;
5609548Ssam 			else
5619548Ssam 				goto hard;
5622674Swnj 		} else {
5632674Swnj 			/*
5642674Swnj 			 * Retriable error.
5652674Swnj 			 * If a soft ecc, correct it (continuing
5662674Swnj 			 * by returning if necessary.
5672674Swnj 			 * Otherwise fall through and retry the transfer
5682674Swnj 			 */
5697183Sroot 			if ((upaddr->uper1&(UPER1_DCK|UPER1_ECH))==UPER1_DCK) {
5709548Ssam 				if (upecc(ui, ECC))
5712629Swnj 					return;
5727183Sroot 			} else
5737183Sroot 				um->um_tab.b_active = 0; /* force retry */
5742674Swnj 		}
5752674Swnj 		/*
5762674Swnj 		 * Clear drive error and, every eight attempts,
5772674Swnj 		 * (starting with the fourth)
5782674Swnj 		 * recalibrate to clear the slate.
5792674Swnj 		 */
5802674Swnj 		upaddr->upcs1 = UP_TRE|UP_IE|UP_DCLR|UP_GO;
5812674Swnj 		needie = 0;
5823182Swnj 		if ((um->um_tab.b_errcnt&07) == 4 && um->um_tab.b_active == 0) {
5832674Swnj 			upaddr->upcs1 = UP_RECAL|UP_IE|UP_GO;
5843160Swnj 			sc->sc_recal = 0;
5853160Swnj 			goto nextrecal;
5862674Swnj 		}
5872674Swnj 	}
5882674Swnj 	/*
5893160Swnj 	 * Advance recalibration finite state machine
5903160Swnj 	 * if recalibrate in progress, through
5913160Swnj 	 *	RECAL
5923160Swnj 	 *	SEEK
5933160Swnj 	 *	OFFSET (optional)
5943160Swnj 	 *	RETRY
5952674Swnj 	 */
5963160Swnj 	switch (sc->sc_recal) {
5973160Swnj 
5983160Swnj 	case 1:
5993160Swnj 		upaddr->updc = bp->b_cylin;
6003160Swnj 		upaddr->upcs1 = UP_SEEK|UP_IE|UP_GO;
6013160Swnj 		goto nextrecal;
6023160Swnj 	case 2:
6033160Swnj 		if (um->um_tab.b_errcnt < 16 || (bp->b_flags&B_READ) == 0)
6043160Swnj 			goto donerecal;
6053445Sroot 		upaddr->upof = up_offset[um->um_tab.b_errcnt & 017] | UPOF_FMT22;
6063160Swnj 		upaddr->upcs1 = UP_IE|UP_OFFSET|UP_GO;
6073160Swnj 		goto nextrecal;
6083160Swnj 	nextrecal:
6093160Swnj 		sc->sc_recal++;
6103160Swnj 		um->um_tab.b_active = 1;
6113160Swnj 		return;
6123160Swnj 	donerecal:
6133160Swnj 	case 3:
6142674Swnj 		sc->sc_recal = 0;
6153160Swnj 		um->um_tab.b_active = 0;
6163160Swnj 		break;
6172674Swnj 	}
6182674Swnj 	/*
6192674Swnj 	 * If still ``active'', then don't need any more retries.
6202674Swnj 	 */
6212674Swnj 	if (um->um_tab.b_active) {
6222674Swnj 		/*
6232674Swnj 		 * If we were offset positioning,
6242674Swnj 		 * return to centerline.
6252674Swnj 		 */
6262674Swnj 		if (um->um_tab.b_errcnt >= 16) {
6273445Sroot 			upaddr->upof = UPOF_FMT22;
6282674Swnj 			upaddr->upcs1 = UP_RTC|UP_GO|UP_IE;
6293445Sroot 			while (upaddr->upds & UPDS_PIP)
6302674Swnj 				DELAY(25);
631268Sbill 			needie = 0;
632264Sbill 		}
6332674Swnj 		um->um_tab.b_active = 0;
6342674Swnj 		um->um_tab.b_errcnt = 0;
6352674Swnj 		um->um_tab.b_actf = dp->b_forw;
6362674Swnj 		dp->b_active = 0;
6372674Swnj 		dp->b_errcnt = 0;
6382674Swnj 		dp->b_actf = bp->av_forw;
6392674Swnj 		bp->b_resid = (-upaddr->upwc * sizeof(short));
6402674Swnj 		iodone(bp);
6412674Swnj 		/*
6422674Swnj 		 * If this unit has more work to do,
6432674Swnj 		 * then start it up right away.
6442674Swnj 		 */
6452674Swnj 		if (dp->b_actf)
6462674Swnj 			if (upustart(ui))
647268Sbill 				needie = 0;
648264Sbill 	}
6492674Swnj 	as &= ~(1<<ui->ui_slave);
6503403Swnj 	/*
6513403Swnj 	 * Release unibus resources and flush data paths.
6523403Swnj 	 */
6533403Swnj 	ubadone(um);
6542674Swnj doattn:
6552674Swnj 	/*
6562674Swnj 	 * Process other units which need attention.
6572674Swnj 	 * For each unit which needs attention, call
6582674Swnj 	 * the unit start routine to place the slave
6592674Swnj 	 * on the controller device queue.
6602674Swnj 	 */
6613160Swnj 	while (unit = ffs(as)) {
6623160Swnj 		unit--;		/* was 1 origin */
6633160Swnj 		as &= ~(1<<unit);
6643160Swnj 		upaddr->upas = 1<<unit;
6656383Swnj 		if (unit < UPIPUNITS && upustart(upip[sc21][unit]))
6663160Swnj 			needie = 0;
6673160Swnj 	}
6682674Swnj 	/*
6692674Swnj 	 * If the controller is not transferring, but
6702674Swnj 	 * there are devices ready to transfer, start
6712674Swnj 	 * the controller.
6722674Swnj 	 */
6732395Swnj 	if (um->um_tab.b_actf && um->um_tab.b_active == 0)
6742395Swnj 		if (upstart(um))
675268Sbill 			needie = 0;
676275Sbill 	if (needie)
6772629Swnj 		upaddr->upcs1 = UP_IE;
678264Sbill }
679264Sbill 
6809357Ssam upread(dev, uio)
6812616Swnj 	dev_t dev;
6829357Ssam 	struct uio *uio;
683264Sbill {
6842616Swnj 	register int unit = minor(dev) >> 3;
6852470Swnj 
6862616Swnj 	if (unit >= NUP)
6879357Ssam 		return (ENXIO);
6889357Ssam 	return (physio(upstrategy, &rupbuf[unit], dev, B_READ, minphys, uio));
689264Sbill }
690264Sbill 
6919357Ssam upwrite(dev, uio)
6922616Swnj 	dev_t dev;
6939357Ssam 	struct uio *uio;
694264Sbill {
6952616Swnj 	register int unit = minor(dev) >> 3;
6962470Swnj 
6972616Swnj 	if (unit >= NUP)
6989357Ssam 		return (ENXIO);
6999357Ssam 	return (physio(upstrategy, &rupbuf[unit], dev, B_WRITE, minphys, uio));
700264Sbill }
701264Sbill 
702266Sbill /*
703266Sbill  * Correct an ECC error, and restart the i/o to complete
704266Sbill  * the transfer if necessary.  This is quite complicated because
705266Sbill  * the transfer may be going to an odd memory address base and/or
706266Sbill  * across a page boundary.
707266Sbill  */
7089548Ssam upecc(ui, flag)
7092983Swnj 	register struct uba_device *ui;
7109548Ssam 	int flag;
711264Sbill {
7122629Swnj 	register struct updevice *up = (struct updevice *)ui->ui_addr;
7132395Swnj 	register struct buf *bp = uputab[ui->ui_unit].b_actf;
7142983Swnj 	register struct uba_ctlr *um = ui->ui_mi;
7152395Swnj 	register struct upst *st;
7162395Swnj 	struct uba_regs *ubp = ui->ui_hd->uh_uba;
717266Sbill 	register int i;
718264Sbill 	caddr_t addr;
719266Sbill 	int reg, bit, byte, npf, mask, o, cmd, ubaddr;
720264Sbill 	int bn, cn, tn, sn;
721264Sbill 
722264Sbill 	/*
723266Sbill 	 * Npf is the number of sectors transferred before the sector
724266Sbill 	 * containing the ECC error, and reg is the UBA register
725266Sbill 	 * mapping (the first part of) the transfer.
726266Sbill 	 * O is offset within a memory page of the first byte transferred.
727264Sbill 	 */
7289548Ssam 	if (flag == CONT)
7299548Ssam 		npf = bp->b_error;
7309548Ssam 	else
73110858Ssam 		npf = btop((up->upwc * sizeof(short)) + bp->b_bcount);
7322571Swnj 	reg = btop(um->um_ubinfo&0x3ffff) + npf;
733264Sbill 	o = (int)bp->b_un.b_addr & PGOFSET;
734264Sbill 	mask = up->upec2;
7353445Sroot #ifdef UPECCDEBUG
7363403Swnj 	printf("npf %d reg %x o %d mask %o pos %d\n", npf, reg, o, mask,
7373403Swnj 	    up->upec1);
7383445Sroot #endif
7399548Ssam 	bn = dkblock(bp);
7409548Ssam 	st = &upst[ui->ui_type];
7419548Ssam 	cn = bp->b_cylin;
7429548Ssam 	sn = bn%st->nspc + npf;
7439548Ssam 	tn = sn/st->nsect;
7449548Ssam 	sn %= st->nsect;
7459548Ssam 	cn += tn/st->ntrak;
7469548Ssam 	tn %= st->ntrak;
7472725Swnj 	ubapurge(um);
7489548Ssam 	um->um_tab.b_active=2;
749266Sbill 	/*
7509548Ssam 	 * action taken depends on the flag
751266Sbill 	 */
7529548Ssam 	switch(flag){
7539548Ssam 	case ECC:
7549548Ssam 		npf--;
7559548Ssam 		reg--;
7569548Ssam 		mask = up->upec2;
7579548Ssam 		printf("up%d%c: soft ecc sn%d\n", dkunit(bp),
7589548Ssam 			'a'+(minor(bp->b_dev)&07), bp->b_blkno + npf);
7599548Ssam 		/*
7609548Ssam 		 * Flush the buffered data path, and compute the
7619548Ssam 		 * byte and bit position of the error.  The variable i
7629548Ssam 		 * is the byte offset in the transfer, the variable byte
7639548Ssam 		 * is the offset from a page boundary in main memory.
7649548Ssam 		 */
7659548Ssam 		i = up->upec1 - 1;		/* -1 makes 0 origin */
7669548Ssam 		bit = i&07;
7679548Ssam 		i = (i&~07)>>3;
7689548Ssam 		byte = i + o;
7699548Ssam 		/*
7709548Ssam 		 * Correct while possible bits remain of mask.  Since mask
7719548Ssam 		 * contains 11 bits, we continue while the bit offset is > -11.
7729548Ssam 		 * Also watch out for end of this block and the end of the whole
7739548Ssam 		 * transfer.
7749548Ssam 		 */
7759548Ssam 		while (i < 512 && (int)ptob(npf)+i < bp->b_bcount && bit > -11) {
7769548Ssam 			addr = ptob(ubp->uba_map[reg+btop(byte)].pg_pfnum)+
7779548Ssam 				(byte & PGOFSET);
7783445Sroot #ifdef UPECCDEBUG
7799548Ssam 			printf("addr %x map reg %x\n",
7809548Ssam 				addr, *(int *)(&ubp->uba_map[reg+btop(byte)]));
7819548Ssam 			printf("old: %x, ", getmemc(addr));
7823445Sroot #endif
7839548Ssam 			putmemc(addr, getmemc(addr)^(mask<<bit));
7843445Sroot #ifdef UPECCDEBUG
7859548Ssam 			printf("new: %x\n", getmemc(addr));
7863445Sroot #endif
7879548Ssam 			byte++;
7889548Ssam 			i++;
7899580Shelge 			bit -= 8;
7909548Ssam 		}
7919548Ssam 		if (up->upwc == 0)
7929548Ssam 			return (0);
7939548Ssam 		npf++;
7949548Ssam 		reg++;
7959548Ssam 		break;
7969548Ssam 	case BSE:
7979548Ssam 		/*
7989548Ssam 		 * if not in bad sector table, return 0
7999548Ssam 		 */
8009548Ssam 		if ((bn = isbad(&upbad[ui->ui_unit], cn, tn, sn)) < 0)
8019548Ssam 			return(0);
8029548Ssam 		/*
8039548Ssam 		 * flag this one as bad
8049548Ssam 		 */
8059548Ssam 		bp->b_flags |= B_BAD;
8069548Ssam 		bp->b_error = npf + 1;
8079548Ssam #ifdef UPECCDEBUG
8089548Ssam 		printf("BSE: restart at %d\n",npf+1);
8099548Ssam #endif
8109548Ssam 		bn = st->ncyl * st->nspc -st->nsect - 1 - bn;
8119548Ssam 		cn = bn / st->nspc;
8129548Ssam 		sn = bn % st->nspc;
8139548Ssam 		tn = sn / st->nsect;
8149548Ssam 		sn %= st->nsect;
8159548Ssam 		up->upwc = -(512 / sizeof (short));
8169548Ssam #ifdef UPECCDEBUG
8179548Ssam 		printf("revector to cn %d tn %d sn %d\n", cn, tn, sn);
8189548Ssam #endif
8199548Ssam 		break;
8209548Ssam 	case CONT:
8219548Ssam #ifdef UPECCDEBUG
8229548Ssam 		printf("upecc, CONT: bn %d cn %d tn %d sn %d\n", bn, cn, tn, sn);
8239548Ssam #endif
8249548Ssam 		bp->b_flags &= ~B_BAD;
8259548Ssam 		up->upwc = -((bp->b_bcount - (int)ptob(npf)) / sizeof(short));
8269548Ssam 		if (up->upwc == 0)
8279548Ssam 			return(0);
8289548Ssam 		break;
829264Sbill 	}
8307183Sroot 	if (up->upwc == 0) {
8317183Sroot 		um->um_tab.b_active = 0;
832264Sbill 		return (0);
8337183Sroot 	}
834266Sbill 	/*
835266Sbill 	 * Have to continue the transfer... clear the drive,
836266Sbill 	 * and compute the position where the transfer is to continue.
837266Sbill 	 * We have completed npf+1 sectors of the transfer already;
838266Sbill 	 * restart at offset o of next sector (i.e. in UBA register reg+1).
839266Sbill 	 */
8402629Swnj #ifdef notdef
8412629Swnj 	up->uper1 = 0;
8422629Swnj 	up->upcs1 |= UP_GO;
8432629Swnj #else
8442629Swnj 	up->upcs1 = UP_TRE|UP_IE|UP_DCLR|UP_GO;
845264Sbill 	up->updc = cn;
846266Sbill 	up->upda = (tn << 8) | sn;
8479548Ssam 	ubaddr = (int)ptob(reg) + o;
848266Sbill 	up->upba = ubaddr;
849266Sbill 	cmd = (ubaddr >> 8) & 0x300;
8509548Ssam 	cmd |= ((bp->b_flags&B_READ)?UP_RCOM:UP_WCOM)|UP_IE|UP_GO;
8519548Ssam 	um->um_tab.b_errcnt = 0;
852266Sbill 	up->upcs1 = cmd;
8532629Swnj #endif
854264Sbill 	return (1);
855264Sbill }
856286Sbill 
857286Sbill /*
858286Sbill  * Reset driver after UBA init.
859286Sbill  * Cancel software state of all pending transfers
860286Sbill  * and restart all units and the controller.
861286Sbill  */
8622395Swnj upreset(uban)
8632931Swnj 	int uban;
864286Sbill {
8652983Swnj 	register struct uba_ctlr *um;
8662983Swnj 	register struct uba_device *ui;
8672395Swnj 	register sc21, unit;
868286Sbill 
8692646Swnj 	for (sc21 = 0; sc21 < NSC; sc21++) {
8702470Swnj 		if ((um = upminfo[sc21]) == 0 || um->um_ubanum != uban ||
8712470Swnj 		    um->um_alive == 0)
8722395Swnj 			continue;
8732931Swnj 		printf(" sc%d", sc21);
8742395Swnj 		um->um_tab.b_active = 0;
8752395Swnj 		um->um_tab.b_actf = um->um_tab.b_actl = 0;
8762931Swnj 		up_softc[sc21].sc_recal = 0;
8776346Swnj 		up_softc[sc21].sc_wticks = 0;
8782571Swnj 		if (um->um_ubinfo) {
8792571Swnj 			printf("<%d>", (um->um_ubinfo>>28)&0xf);
8809357Ssam 			um->um_ubinfo = 0;
8812395Swnj 		}
8823445Sroot 		((struct updevice *)(um->um_addr))->upcs2 = UPCS2_CLR;
8832395Swnj 		for (unit = 0; unit < NUP; unit++) {
8842395Swnj 			if ((ui = updinfo[unit]) == 0)
8852395Swnj 				continue;
8862931Swnj 			if (ui->ui_alive == 0 || ui->ui_mi != um)
8872395Swnj 				continue;
8882395Swnj 			uputab[unit].b_active = 0;
8892395Swnj 			(void) upustart(ui);
8902395Swnj 		}
8912395Swnj 		(void) upstart(um);
892286Sbill 	}
893286Sbill }
894313Sbill 
895313Sbill /*
896313Sbill  * Wake up every second and if an interrupt is pending
897313Sbill  * but nothing has happened increment a counter.
8982931Swnj  * If nothing happens for 20 seconds, reset the UNIBUS
899313Sbill  * and begin anew.
900313Sbill  */
901313Sbill upwatch()
902313Sbill {
9032983Swnj 	register struct uba_ctlr *um;
9042395Swnj 	register sc21, unit;
9052470Swnj 	register struct up_softc *sc;
906313Sbill 
9072759Swnj 	timeout(upwatch, (caddr_t)0, hz);
9082646Swnj 	for (sc21 = 0; sc21 < NSC; sc21++) {
9092395Swnj 		um = upminfo[sc21];
9102470Swnj 		if (um == 0 || um->um_alive == 0)
9112470Swnj 			continue;
9122470Swnj 		sc = &up_softc[sc21];
9132395Swnj 		if (um->um_tab.b_active == 0) {
9142395Swnj 			for (unit = 0; unit < NUP; unit++)
9152629Swnj 				if (uputab[unit].b_active &&
9162629Swnj 				    updinfo[unit]->ui_mi == um)
9172395Swnj 					goto active;
9182470Swnj 			sc->sc_wticks = 0;
9192395Swnj 			continue;
9202395Swnj 		}
9212931Swnj active:
9222470Swnj 		sc->sc_wticks++;
9232470Swnj 		if (sc->sc_wticks >= 20) {
9242470Swnj 			sc->sc_wticks = 0;
9252931Swnj 			printf("sc%d: lost interrupt\n", sc21);
9262646Swnj 			ubareset(um->um_ubanum);
9272395Swnj 		}
928313Sbill 	}
929313Sbill }
9302379Swnj 
9312379Swnj #define	DBSIZE	20
9322379Swnj 
9332379Swnj updump(dev)
9342379Swnj 	dev_t dev;
9352379Swnj {
9362629Swnj 	struct updevice *upaddr;
9372379Swnj 	char *start;
9383107Swnj 	int num, blk, unit;
9392379Swnj 	struct size *sizes;
9402395Swnj 	register struct uba_regs *uba;
9412983Swnj 	register struct uba_device *ui;
9422379Swnj 	register short *rp;
9432395Swnj 	struct upst *st;
9446848Ssam 	register int retry;
9452379Swnj 
9462395Swnj 	unit = minor(dev) >> 3;
9472889Swnj 	if (unit >= NUP)
9482889Swnj 		return (ENXIO);
9492470Swnj #define	phys(cast, addr) ((cast)((int)addr & 0x7fffffff))
9502983Swnj 	ui = phys(struct uba_device *, updinfo[unit]);
9512889Swnj 	if (ui->ui_alive == 0)
9522889Swnj 		return (ENXIO);
9532395Swnj 	uba = phys(struct uba_hd *, ui->ui_hd)->uh_physuba;
9542983Swnj 	ubainit(uba);
9552629Swnj 	upaddr = (struct updevice *)ui->ui_physaddr;
9566848Ssam 	DELAY(5000000);
9572379Swnj 	num = maxfree;
9582379Swnj 	upaddr->upcs2 = unit;
9592983Swnj 	DELAY(100);
9606848Ssam 	upaddr->upcs1 = UP_DCLR|UP_GO;
9616848Ssam 	upaddr->upcs1 = UP_PRESET|UP_GO;
9626848Ssam 	upaddr->upof = UPOF_FMT22;
9636848Ssam 	retry = 0;
9646848Ssam 	do {
9656848Ssam 		DELAY(25);
9666848Ssam 		if (++retry > 527)
9676848Ssam 			break;
9686861Ssam 	} while ((upaddr->upds & UP_RDY) == 0);
9693445Sroot 	if ((upaddr->upds & UPDS_DREADY) != UPDS_DREADY)
9702889Swnj 		return (EFAULT);
9719357Ssam 	start = 0;
9728489Sroot 	st = &upst[ui->ui_type];
9732395Swnj 	sizes = phys(struct size *, st->sizes);
9742889Swnj 	if (dumplo < 0 || dumplo + num >= sizes[minor(dev)&07].nblocks)
9752889Swnj 		return (EINVAL);
9762379Swnj 	while (num > 0) {
9772379Swnj 		register struct pte *io;
9782379Swnj 		register int i;
9792379Swnj 		int cn, sn, tn;
9802379Swnj 		daddr_t bn;
9812379Swnj 
9822379Swnj 		blk = num > DBSIZE ? DBSIZE : num;
9832395Swnj 		io = uba->uba_map;
9842379Swnj 		for (i = 0; i < blk; i++)
9852983Swnj 			*(int *)io++ = (btop(start)+i) | (1<<21) | UBAMR_MRV;
9862379Swnj 		*(int *)io = 0;
9872379Swnj 		bn = dumplo + btop(start);
9882607Swnj 		cn = bn/st->nspc + sizes[minor(dev)&07].cyloff;
9892607Swnj 		sn = bn%st->nspc;
9902607Swnj 		tn = sn/st->nsect;
9912607Swnj 		sn = sn%st->nsect;
9922379Swnj 		upaddr->updc = cn;
9932379Swnj 		rp = (short *) &upaddr->upda;
9942379Swnj 		*rp = (tn << 8) + sn;
9952379Swnj 		*--rp = 0;
9962379Swnj 		*--rp = -blk*NBPG / sizeof (short);
9972629Swnj 		*--rp = UP_GO|UP_WCOM;
9986848Ssam 		retry = 0;
9992379Swnj 		do {
10002379Swnj 			DELAY(25);
10016848Ssam 			if (++retry > 527)
10026848Ssam 				break;
10032629Swnj 		} while ((upaddr->upcs1 & UP_RDY) == 0);
10046848Ssam 		if ((upaddr->upds & UPDS_DREADY) != UPDS_DREADY) {
10056861Ssam 			printf("up%d: not ready", unit);
10066848Ssam 			if ((upaddr->upds & UPDS_DREADY) != UPDS_DREADY) {
10076848Ssam 				printf("\n");
10086848Ssam 				return (EIO);
10096848Ssam 			}
10106848Ssam 			printf(" (flakey)\n");
10116848Ssam 		}
10123445Sroot 		if (upaddr->upds&UPDS_ERR)
10132889Swnj 			return (EIO);
10142379Swnj 		start += blk*NBPG;
10152379Swnj 		num -= blk;
10162379Swnj 	}
10172379Swnj 	return (0);
10182379Swnj }
10191902Swnj #endif
1020