1*8613Sroot /* uda.c 4.12 82/10/17 */ 24743Swnj 34743Swnj #include "ra.h" 44743Swnj #if NUDA > 0 54743Swnj /* 64743Swnj * UDA50/RAxx disk device driver 74743Swnj * 84743Swnj * Restrictions: 94743Swnj * Unit numbers must be less than 8. 104743Swnj * 114743Swnj * TO DO: 124743Swnj * write dump code 134743Swnj * test on 750 144743Swnj */ 154743Swnj 164743Swnj #include "../h/param.h" 174743Swnj #include "../h/systm.h" 184743Swnj #include "../h/buf.h" 194743Swnj #include "../h/conf.h" 204743Swnj #include "../h/dir.h" 214743Swnj #include "../h/user.h" 224743Swnj #include "../h/pte.h" 234743Swnj #include "../h/map.h" 244743Swnj #include "../h/vm.h" 254743Swnj #include "../h/dk.h" 264743Swnj #include "../h/cmap.h" 277734Sroot #include "../h/uio.h" 284743Swnj 298482Sroot #include "../vax/cpu.h" 308482Sroot #include "../vaxuba/ubareg.h" 318482Sroot #include "../vaxuba/ubavar.h" 32*8613Sroot 33*8613Sroot #define NRSPL2 3 /* log2 number of response packets */ 34*8613Sroot #define NCMDL2 3 /* log2 number of command packets */ 35*8613Sroot #define NRSP (1<<NRSPL2) 36*8613Sroot #define NCMD (1<<NCMDL2) 37*8613Sroot 388482Sroot #include "../vaxuba/udareg.h" 398482Sroot 404743Swnj int udadebug; 414743Swnj #define printd if(udadebug&1)printf 424743Swnj 436964Ssam int udaerror = 0; /* set to cause hex dump of error log packets */ 446964Ssam 458482Sroot #include "../vax/mscp.h" 464743Swnj 474743Swnj struct uda_softc { 484743Swnj short sc_state; /* state of controller */ 494743Swnj short sc_mapped; /* Unibus map allocated for uda struct? */ 504743Swnj int sc_ubainfo; /* Unibus mapping info */ 514743Swnj struct uda *sc_uda; /* Unibus address of uda struct */ 524743Swnj int sc_ivec; /* interrupt vector address */ 534743Swnj short sc_credits; /* transfer credits */ 544743Swnj short sc_lastcmd; /* pointer into command ring */ 554743Swnj short sc_lastrsp; /* pointer into response ring */ 564743Swnj } uda_softc[NUDA]; 574743Swnj 584743Swnj /* 594743Swnj * Controller states 604743Swnj */ 614743Swnj #define S_IDLE 0 /* hasn't been initialized */ 624743Swnj #define S_STEP1 1 /* doing step 1 init */ 634743Swnj #define S_STEP2 2 /* doing step 2 init */ 644743Swnj #define S_STEP3 3 /* doing step 3 init */ 654743Swnj #define S_SCHAR 4 /* doing "set controller characteristics" */ 664743Swnj #define S_RUN 5 /* running */ 674743Swnj 684743Swnj struct uda { 694743Swnj struct udaca uda_ca; /* communications area */ 704743Swnj struct mscp uda_rsp[NRSP]; /* response packets */ 714743Swnj struct mscp uda_cmd[NCMD]; /* command packets */ 724743Swnj } uda[NUDA]; 734743Swnj 744743Swnj /* THIS SHOULD BE READ OFF THE PACK, PER DRIVE */ 754743Swnj struct size { 764743Swnj daddr_t nblocks; 774743Swnj daddr_t blkoff; 784743Swnj } ra_sizes[8] ={ 794743Swnj 15884, 0, /* A=blk 0 thru 15883 */ 804743Swnj 33440, 15884, /* B=blk 15884 thru 49323 */ 814743Swnj -1, 0, /* C=blk 0 thru end */ 826964Ssam 15884, 340670, /* D=blk 340670 thru 356553 */ 836964Ssam 55936, 356554, /* E=blk 356554 thru 412489 */ 846964Ssam -1, 412490, /* F=blk 412490 thru end */ 854743Swnj 82080, 49324, /* G=blk 49324 thru 131403 */ 864743Swnj -1, 131404, /* H=blk 131404 thru end */ 874743Swnj }; 884743Swnj /* END OF STUFF WHICH SHOULD BE READ IN PER DISK */ 894743Swnj 904743Swnj daddr_t radsize[NRA]; /* disk size, from ONLINE end packet */ 914743Swnj 924743Swnj int udprobe(), udslave(), udattach(), udintr(); 934743Swnj struct mscp *udgetcp(); 944743Swnj struct uba_ctlr *udminfo[NUDA]; 954743Swnj struct uba_device *uddinfo[NRA]; 964743Swnj struct uba_device *udip[NUDA][8]; /* 8 == max number of drives */ 974743Swnj 986964Ssam u_short udstd[] = { 0772150, 0 }; 994743Swnj struct uba_driver udadriver = 1004743Swnj { udprobe, udslave, udattach, 0, udstd, "ra", uddinfo, "uda", udminfo, 0 }; 1014743Swnj struct buf rudbuf[NRA]; 1024743Swnj struct buf udutab[NRA]; 1034743Swnj struct buf udwtab[NUDA]; /* I/O wait queue, per controller */ 1044743Swnj 1054743Swnj #define b_qsize b_resid /* queue size per drive, in udutab */ 1064743Swnj #define b_ubinfo b_resid /* Unibus mapping info, per buffer */ 1074743Swnj 1084743Swnj udprobe(reg, ctlr) 1094743Swnj caddr_t reg; 1104743Swnj int ctlr; 1114743Swnj { 1124743Swnj register int br, cvec; 1134743Swnj register struct uda_softc *sc = &uda_softc[ctlr]; 1144743Swnj 1154743Swnj #ifdef lint 1166187Ssam br = 0; cvec = br; br = cvec; reg = reg; 1177845Sroot udread(0, 0); udwrite(0, 0); udreset(0); udintr(0); 1184743Swnj #endif 1194743Swnj /* SHOULD CHECK THAT IT REALLY IS A UDA */ 1204743Swnj br = 0x15; 1214743Swnj cvec = sc->sc_ivec = (uba_hd[numuba].uh_lastiv -= 4); 1227410Skre return(sizeof (struct udadevice)); 1234743Swnj } 1244743Swnj 1254743Swnj udslave(ui, reg) 1264743Swnj struct uba_device *ui; 1274743Swnj caddr_t reg; 1284743Swnj { 1294743Swnj /* 1304743Swnj * TOO HARD TO FIND OUT IF DISK IS THERE UNTIL 1314743Swnj * INITIALIZED. WE'LL FIND OUT WHEN WE FIRST 1324743Swnj * TRY TO ACCESS IT. 1334743Swnj */ 1346187Ssam #ifdef lint 1356187Ssam ui = ui; reg = reg; 1366187Ssam #endif 1374743Swnj return(1); 1384743Swnj } 1394743Swnj 1404743Swnj udattach(ui) 1414743Swnj register struct uba_device *ui; 1424743Swnj { 1434743Swnj 1444743Swnj if (ui->ui_dk > 0) 1454743Swnj dk_mspw[ui->ui_dk] = 1.0 / (60 * 31 * 256); /* approx */ 1464743Swnj ui->ui_flags = 0; 1474743Swnj udip[ui->ui_ctlr][ui->ui_slave] = ui; 1484743Swnj radsize[ui->ui_unit] = (daddr_t)0xffffff; /* max possible size */ 1494743Swnj } 1504743Swnj 1514743Swnj /* 1524743Swnj * Open a UDA. Initialize the device and 1534743Swnj * set the unit online. 1544743Swnj */ 1554743Swnj udopen(dev, flag) 1564743Swnj dev_t dev; 1574743Swnj int flag; 1584743Swnj { 1594743Swnj register int unit; 1604743Swnj register struct uba_device *ui; 1614743Swnj register struct uda_softc *sc; 1625434Sroot int s; 1634743Swnj 1646187Ssam #ifdef lint 1656187Ssam flag = flag; 1666187Ssam #endif 1674743Swnj unit = minor(dev) >> 3; 1688576Sroot if (unit >= NRA || (ui = uddinfo[unit]) == 0 || ui->ui_alive == 0) 1698576Sroot return (ENXIO); 1704743Swnj sc = &uda_softc[ui->ui_ctlr]; 1715434Sroot s = spl5(); 1724743Swnj if (sc->sc_state != S_RUN) { 1734743Swnj if (sc->sc_state == S_IDLE) 1744743Swnj udinit(ui->ui_ctlr); 1756187Ssam /* wait for initialization to complete */ 1766187Ssam sleep((caddr_t)ui->ui_mi, 0); 1778576Sroot if (sc->sc_state != S_RUN) 1788576Sroot return (EIO); 1794743Swnj } 1805434Sroot splx(s); 1814743Swnj /* SHOULD PROBABLY FORCE AN ONLINE ATTEMPT 1824743Swnj TO SEE IF DISK IS REALLY THERE */ 1838576Sroot return (0); 1844743Swnj } 1854743Swnj 1864743Swnj /* 1874743Swnj * Initialize a UDA. Set up UBA mapping registers, 1884743Swnj * initialize data structures, and start hardware 1894743Swnj * initialization sequence. 1904743Swnj */ 1914743Swnj udinit(d) 1924743Swnj int d; 1934743Swnj { 1944743Swnj register struct uda_softc *sc; 1954743Swnj register struct uda *ud; 1964743Swnj struct udadevice *udaddr; 1974743Swnj struct uba_ctlr *um; 1984743Swnj 1994743Swnj sc = &uda_softc[d]; 2004743Swnj um = udminfo[d]; 2014743Swnj um->um_tab.b_active++; 2024743Swnj ud = &uda[d]; 2034743Swnj udaddr = (struct udadevice *)um->um_addr; 2044743Swnj if (sc->sc_mapped == 0) { 2054743Swnj /* 2064743Swnj * Map the communications area and command 2074743Swnj * and response packets into Unibus address 2084743Swnj * space. 2094743Swnj */ 2104743Swnj sc->sc_ubainfo = uballoc(um->um_ubanum, (caddr_t)ud, 2114743Swnj sizeof (struct uda), 0); 2124743Swnj sc->sc_uda = (struct uda *)(sc->sc_ubainfo & 0x3ffff); 2134743Swnj sc->sc_mapped = 1; 2144743Swnj } 2154743Swnj 2164743Swnj /* 2174743Swnj * Start the hardware initialization sequence. 2184743Swnj */ 2194743Swnj udaddr->udaip = 0; /* start initialization */ 2204743Swnj while ((udaddr->udasa & UDA_STEP1) == 0) 2214743Swnj ; 2224743Swnj udaddr->udasa = UDA_ERR|(NCMDL2<<11)|(NRSPL2<<8)|UDA_IE|(sc->sc_ivec/4); 2234743Swnj /* 2244743Swnj * Initialization continues in interrupt routine. 2254743Swnj */ 2264743Swnj sc->sc_state = S_STEP1; 2274743Swnj sc->sc_credits = 0; 2284743Swnj } 2294743Swnj 2304743Swnj udstrategy(bp) 2314743Swnj register struct buf *bp; 2324743Swnj { 2334743Swnj register struct uba_device *ui; 2344743Swnj register struct uba_ctlr *um; 2354743Swnj register struct buf *dp; 2364743Swnj register int unit; 2374743Swnj int xunit = minor(bp->b_dev) & 07; 2384743Swnj daddr_t sz, maxsz; 2395434Sroot int s; 2404743Swnj 2414743Swnj sz = (bp->b_bcount+511) >> 9; 2424743Swnj unit = dkunit(bp); 2434743Swnj if (unit >= NRA) 2444743Swnj goto bad; 2454743Swnj ui = uddinfo[unit]; 2464743Swnj um = ui->ui_mi; 2474743Swnj if (ui == 0 || ui->ui_alive == 0) 2484743Swnj goto bad; 2494743Swnj if ((maxsz = ra_sizes[xunit].nblocks) < 0) 2504743Swnj maxsz = radsize[unit] - ra_sizes[xunit].blkoff; 2514743Swnj if (bp->b_blkno < 0 || bp->b_blkno+sz > maxsz || 2524743Swnj ra_sizes[xunit].blkoff >= radsize[unit]) 2534743Swnj goto bad; 2545434Sroot s = spl5(); 2554743Swnj /* 2564743Swnj * Link the buffer onto the drive queue 2574743Swnj */ 2584743Swnj dp = &udutab[ui->ui_unit]; 2594743Swnj if (dp->b_actf == 0) 2604743Swnj dp->b_actf = bp; 2614743Swnj else 2624743Swnj dp->b_actl->av_forw = bp; 2634743Swnj dp->b_actl = bp; 2644743Swnj bp->av_forw = 0; 2654743Swnj /* 2664743Swnj * Link the drive onto the controller queue 2674743Swnj */ 2684743Swnj if (dp->b_active == 0) { 2694743Swnj dp->b_forw = NULL; 2704743Swnj if (um->um_tab.b_actf == NULL) 2714743Swnj um->um_tab.b_actf = dp; 2724743Swnj else 2734743Swnj um->um_tab.b_actl->b_forw = dp; 2744743Swnj um->um_tab.b_actl = dp; 2754743Swnj dp->b_active = 1; 2764743Swnj } 2774743Swnj if (um->um_tab.b_active == 0) { 2784743Swnj #if defined(VAX750) 2794743Swnj if (cpu == VAX_750) { 2804743Swnj if (um->um_ubinfo != 0) 2814743Swnj printf("uda: ubinfo %x\n",um->um_ubinfo); 2824743Swnj else 2834743Swnj um->um_ubinfo = 2846187Ssam uballoc(um->um_ubanum, (caddr_t)0, 0, 2856187Ssam UBA_NEEDBDP); 2864743Swnj } 2874743Swnj #endif 2884743Swnj (void) udstart(um); 2894743Swnj } 2905434Sroot splx(s); 2914743Swnj return; 2924743Swnj 2934743Swnj bad: 2944743Swnj bp->b_flags |= B_ERROR; 2954743Swnj iodone(bp); 2964743Swnj return; 2974743Swnj } 2984743Swnj 2994743Swnj udstart(um) 3004743Swnj register struct uba_ctlr *um; 3014743Swnj { 3024743Swnj register struct buf *bp, *dp; 3034743Swnj register struct mscp *mp; 3044743Swnj register struct uda_softc *sc; 3054743Swnj register struct uba_device *ui; 3064743Swnj struct udadevice *udaddr; 3074743Swnj int i; 3084743Swnj 3094743Swnj sc = &uda_softc[um->um_ctlr]; 3104743Swnj 3114743Swnj loop: 3124743Swnj if ((dp = um->um_tab.b_actf) == NULL) { 3134743Swnj /* 3144743Swnj * Release uneeded UBA resources and return 3154743Swnj */ 3164743Swnj um->um_tab.b_active = 0; 3174743Swnj #if defined(VAX750) 3184743Swnj if (cpu == VAX_750) { 3194743Swnj if (um->um_ubinfo == 0) 3204743Swnj printf("uda: um_ubinfo == 0\n"); 3214743Swnj else 3224743Swnj ubarelse(um->um_ubanum, &um->um_ubinfo); 3234743Swnj } 3244743Swnj #endif 3256187Ssam return (0); 3264743Swnj } 3274743Swnj if ((bp = dp->b_actf) == NULL) { 3284743Swnj /* 3294743Swnj * No more requests for this drive, remove 3304743Swnj * from controller queue and look at next drive. 3314743Swnj * We know we're at the head of the controller queue. 3324743Swnj */ 3334743Swnj dp->b_active = 0; 3344743Swnj um->um_tab.b_actf = dp->b_forw; 3354743Swnj goto loop; 3364743Swnj } 3374743Swnj um->um_tab.b_active++; 3384743Swnj udaddr = (struct udadevice *)um->um_addr; 3394743Swnj if ((udaddr->udasa&UDA_ERR) || sc->sc_state != S_RUN) { 3404743Swnj harderr(bp, "ra"); 3414743Swnj printf("udasa %o, state %d\n", udaddr->udasa&0xffff, sc->sc_state); 3424743Swnj udinit(um->um_ctlr); 3434743Swnj /* SHOULD REQUEUE OUTSTANDING REQUESTS, LIKE UDRESET */ 3446187Ssam return (0); 3454743Swnj } 3464743Swnj ui = uddinfo[dkunit(bp)]; 3474743Swnj /* 3484743Swnj * If no credits, can't issue any commands 3494743Swnj * until some outstanding commands complete. 3504743Swnj */ 3514743Swnj if (sc->sc_credits < 2) 3526187Ssam return (0); 3534743Swnj if ((mp = udgetcp(um)) == NULL) 3546187Ssam return (0); 3554743Swnj sc->sc_credits--; /* committed to issuing a command */ 3564743Swnj if (ui->ui_flags == 0) { /* not online */ 3574743Swnj mp->mscp_opcode = M_OP_ONLIN; 3584743Swnj mp->mscp_unit = ui->ui_slave; 3594743Swnj dp->b_active = 2; 3604743Swnj um->um_tab.b_actf = dp->b_forw; /* remove from controller q */ 3614743Swnj printd("uda: bring unit %d online\n", ui->ui_slave); 3624743Swnj *((long *)mp->mscp_dscptr) |= UDA_OWN|UDA_INT; 3634743Swnj i = udaddr->udaip; 3644743Swnj goto loop; 3654743Swnj } 3664743Swnj switch (cpu) { 3674743Swnj case VAX_780: 3684743Swnj i = UBA_NEEDBDP|UBA_CANTWAIT; 3694743Swnj break; 3704743Swnj 3714743Swnj case VAX_750: 3724743Swnj i = um->um_ubinfo|UBA_HAVEBDP|UBA_CANTWAIT; 3734743Swnj break; 3744743Swnj 3756949Ssam case VAX_730: 3764743Swnj i = UBA_CANTWAIT; 3774743Swnj break; 3784743Swnj } 3794743Swnj if ((i = ubasetup(um->um_ubanum, bp, i)) == 0) { 3804743Swnj mp->mscp_opcode = M_OP_GTUNT; 3814743Swnj mp->mscp_unit = ui->ui_slave; 3824743Swnj *((long *)mp->mscp_dscptr) |= UDA_OWN|UDA_INT; 3834743Swnj i = udaddr->udaip; /* initiate polling */ 3844743Swnj return(1); /* wait for interrupt */ 3854743Swnj } 3864743Swnj mp->mscp_cmdref = (long)bp; /* pointer to get back */ 3874743Swnj mp->mscp_opcode = bp->b_flags&B_READ ? M_OP_READ : M_OP_WRITE; 3884743Swnj mp->mscp_unit = ui->ui_slave; 3894743Swnj mp->mscp_lbn = bp->b_blkno + ra_sizes[minor(bp->b_dev)&7].blkoff; 3904743Swnj mp->mscp_bytecnt = bp->b_bcount; 3914743Swnj mp->mscp_buffer = (i & 0x3ffff) | (((i>>28)&0xf)<<24); 3924743Swnj #if defined(VAX750) 3934743Swnj if (cpu == VAX_750) 3944743Swnj i &= 0xfffffff; /* mask off bdp */ 3954743Swnj #endif 3964743Swnj bp->b_ubinfo = i; /* save mapping info */ 3974743Swnj *((long *)mp->mscp_dscptr) |= UDA_OWN|UDA_INT; 3984743Swnj i = udaddr->udaip; /* initiate polling */ 3994743Swnj if (ui->ui_dk >= 0) { 4004743Swnj dk_busy |= 1<<ui->ui_dk; 4014743Swnj dp->b_qsize++; 4024743Swnj dk_xfer[ui->ui_dk]++; 4034743Swnj dk_wds[ui->ui_dk] += bp->b_bcount>>6; 4044743Swnj } 4054743Swnj 4064743Swnj /* 4074743Swnj * Move drive to the end of the controller queue 4084743Swnj */ 4094743Swnj if (dp->b_forw != NULL) { 4104743Swnj um->um_tab.b_actf = dp->b_forw; 4114743Swnj um->um_tab.b_actl->b_forw = dp; 4124743Swnj um->um_tab.b_actl = dp; 4134743Swnj dp->b_forw = NULL; 4144743Swnj } 4154743Swnj /* 4164743Swnj * Move buffer to I/O wait queue 4174743Swnj */ 4184743Swnj dp->b_actf = bp->av_forw; 4194743Swnj dp = &udwtab[um->um_ctlr]; 4204743Swnj bp->av_forw = dp; 4214743Swnj bp->av_back = dp->av_back; 4224743Swnj dp->av_back->av_forw = bp; 4234743Swnj dp->av_back = bp; 4244743Swnj goto loop; 4254743Swnj } 4264743Swnj 4274743Swnj /* 4284743Swnj * UDA interrupt routine. 4294743Swnj */ 4304743Swnj udintr(d) 4314743Swnj int d; 4324743Swnj { 4334743Swnj register struct uba_ctlr *um = udminfo[d]; 4344743Swnj register struct udadevice *udaddr = (struct udadevice *)um->um_addr; 4354743Swnj struct buf *bp; 4364743Swnj register int i; 4374743Swnj register struct uda_softc *sc = &uda_softc[d]; 4384743Swnj register struct uda *ud = &uda[d]; 4394743Swnj struct uda *uud; 4404743Swnj struct mscp *mp; 4414743Swnj 4424743Swnj printd("udintr: state %d, udasa %o\n", sc->sc_state, udaddr->udasa); 4434743Swnj switch (sc->sc_state) { 4444743Swnj case S_IDLE: 4454743Swnj printf("uda%d: random interrupt ignored\n", d); 4464743Swnj return; 4474743Swnj 4484743Swnj case S_STEP1: 4496964Ssam #define STEP1MASK 0174377 4504743Swnj #define STEP1GOOD (UDA_STEP2|UDA_IE|(NCMDL2<<3)|NRSPL2) 4516964Ssam if ((udaddr->udasa&STEP1MASK) != STEP1GOOD) { 4524743Swnj sc->sc_state = S_IDLE; 4536187Ssam wakeup((caddr_t)um); 4544743Swnj return; 4554743Swnj } 4564743Swnj udaddr->udasa = ((int)&sc->sc_uda->uda_ca.ca_ringbase)| 4574743Swnj (cpu == VAX_780 ? UDA_PI : 0); 4584743Swnj sc->sc_state = S_STEP2; 4594743Swnj return; 4604743Swnj 4614743Swnj case S_STEP2: 4626964Ssam #define STEP2MASK 0174377 4634743Swnj #define STEP2GOOD (UDA_STEP3|UDA_IE|(sc->sc_ivec/4)) 4646964Ssam if ((udaddr->udasa&STEP2MASK) != STEP2GOOD) { 4654743Swnj sc->sc_state = S_IDLE; 4666187Ssam wakeup((caddr_t)um); 4674743Swnj return; 4684743Swnj } 4694743Swnj udaddr->udasa = ((int)&sc->sc_uda->uda_ca.ca_ringbase)>>16; 4704743Swnj sc->sc_state = S_STEP3; 4714743Swnj return; 4724743Swnj 4734743Swnj case S_STEP3: 4746964Ssam #define STEP3MASK 0174000 4754743Swnj #define STEP3GOOD UDA_STEP4 4766964Ssam if ((udaddr->udasa&STEP3MASK) != STEP3GOOD) { 4774743Swnj sc->sc_state = S_IDLE; 4786187Ssam wakeup((caddr_t)um); 4794743Swnj return; 4804743Swnj } 4814743Swnj udaddr->udasa = UDA_GO; 4824743Swnj sc->sc_state = S_SCHAR; 4834743Swnj 4844743Swnj /* 4854743Swnj * Initialize the data structures. 4864743Swnj */ 4874743Swnj uud = sc->sc_uda; 4884743Swnj for (i = 0; i < NRSP; i++) { 4894743Swnj ud->uda_ca.ca_rspdsc[i] = UDA_OWN|UDA_INT| 4904743Swnj (long)&uud->uda_rsp[i].mscp_cmdref; 4914743Swnj ud->uda_rsp[i].mscp_dscptr = &ud->uda_ca.ca_rspdsc[i]; 4924743Swnj ud->uda_rsp[i].mscp_header.uda_msglen = sizeof (struct mscp); 4934743Swnj } 4944743Swnj for (i = 0; i < NCMD; i++) { 4954743Swnj ud->uda_ca.ca_cmddsc[i] = UDA_INT| 4964743Swnj (long)&uud->uda_cmd[i].mscp_cmdref; 4974743Swnj ud->uda_cmd[i].mscp_dscptr = &ud->uda_ca.ca_cmddsc[i]; 4984743Swnj ud->uda_cmd[i].mscp_header.uda_msglen = sizeof (struct mscp); 4994743Swnj } 5004743Swnj bp = &udwtab[d]; 5014743Swnj bp->av_forw = bp->av_back = bp; 5024743Swnj sc->sc_lastcmd = 0; 5034743Swnj sc->sc_lastrsp = 0; 5044743Swnj if ((mp = udgetcp(um)) == NULL) { 5054743Swnj sc->sc_state = S_IDLE; 5066187Ssam wakeup((caddr_t)um); 5074743Swnj return; 5084743Swnj } 5094743Swnj mp->mscp_opcode = M_OP_STCON; 5104743Swnj mp->mscp_cntflgs = M_CF_ATTN|M_CF_MISC|M_CF_THIS; 5114743Swnj *((long *)mp->mscp_dscptr) |= UDA_OWN|UDA_INT; 5124743Swnj i = udaddr->udaip; /* initiate polling */ 5134743Swnj return; 5144743Swnj 5154743Swnj case S_SCHAR: 5164743Swnj case S_RUN: 5174743Swnj break; 5184743Swnj 5194743Swnj default: 5204743Swnj printf("uda%d: interrupt in unknown state %d ignored\n", 5214743Swnj d, sc->sc_state); 5224743Swnj return; 5234743Swnj } 5244743Swnj 5254743Swnj if (udaddr->udasa&UDA_ERR) { 5264743Swnj printf("uda%d: fatal error (%o)\n", d, udaddr->udasa&0xffff); 5274743Swnj udaddr->udaip = 0; 5286187Ssam wakeup((caddr_t)um); 5294743Swnj } 5304743Swnj 5314743Swnj /* 5324743Swnj * Check for a buffer purge request. 5334743Swnj */ 5344743Swnj if (ud->uda_ca.ca_bdp) { 5354743Swnj /* 5364743Swnj * THIS IS A KLUDGE. 5374743Swnj * Maybe we should change the entire 5384743Swnj * UBA interface structure. 5394743Swnj */ 5404743Swnj int s = spl7(); 5414743Swnj 5424743Swnj i = um->um_ubinfo; 5434743Swnj printd("uda: purge bdp %d\n", ud->uda_ca.ca_bdp); 5444743Swnj um->um_ubinfo = ud->uda_ca.ca_bdp<<28; 5454743Swnj ubapurge(um); 5464743Swnj um->um_ubinfo = i; 5474743Swnj (void) splx(s); 5484743Swnj ud->uda_ca.ca_bdp = 0; 5494743Swnj udaddr->udasa = 0; /* signal purge complete */ 5504743Swnj } 5514743Swnj 5524743Swnj /* 5534743Swnj * Check for response ring transition. 5544743Swnj */ 5554743Swnj if (ud->uda_ca.ca_rspint) { 5564743Swnj ud->uda_ca.ca_rspint = 0; 5574743Swnj for (i = sc->sc_lastrsp;; i++) { 5584743Swnj i %= NRSP; 5594743Swnj if (ud->uda_ca.ca_rspdsc[i]&UDA_OWN) 5604743Swnj break; 5614743Swnj udrsp(um, ud, sc, i); 5624743Swnj ud->uda_ca.ca_rspdsc[i] |= UDA_OWN; 5634743Swnj } 5644743Swnj sc->sc_lastrsp = i; 5654743Swnj } 5664743Swnj 5674743Swnj /* 5684743Swnj * Check for command ring transition. 5694743Swnj */ 5704743Swnj if (ud->uda_ca.ca_cmdint) { 5714743Swnj printd("uda: command ring transition\n"); 5724743Swnj ud->uda_ca.ca_cmdint = 0; 5734743Swnj } 5746187Ssam (void) udstart(um); 5754743Swnj } 5764743Swnj 5774743Swnj /* 5784743Swnj * Process a response packet 5794743Swnj */ 5804743Swnj udrsp(um, ud, sc, i) 5814743Swnj register struct uba_ctlr *um; 5824743Swnj register struct uda *ud; 5834743Swnj register struct uda_softc *sc; 5844743Swnj int i; 5854743Swnj { 5864743Swnj register struct mscp *mp; 5874743Swnj struct uba_device *ui; 5884743Swnj struct buf *dp, *bp; 5894743Swnj int st; 5904743Swnj 5914743Swnj mp = &ud->uda_rsp[i]; 5924743Swnj mp->mscp_header.uda_msglen = sizeof (struct mscp); 5934743Swnj sc->sc_credits += mp->mscp_header.uda_credits & 0xf; 5944743Swnj if ((mp->mscp_header.uda_credits & 0xf0) > 0x10) 5954743Swnj return; 5964743Swnj /* 5974743Swnj * If it's an error log message (datagram), 5984743Swnj * pass it on for more extensive processing. 5994743Swnj */ 6004743Swnj if ((mp->mscp_header.uda_credits & 0xf0) == 0x10) { 6014743Swnj uderror(um, (struct mslg *)mp); 6024743Swnj return; 6034743Swnj } 6044743Swnj if (mp->mscp_unit >= 8) 6054743Swnj return; 6064743Swnj if ((ui = udip[um->um_ctlr][mp->mscp_unit]) == 0) 6074743Swnj return; 6084743Swnj st = mp->mscp_status&M_ST_MASK; 6094743Swnj switch (mp->mscp_opcode) { 6104743Swnj case M_OP_STCON|M_OP_END: 6114743Swnj if (st == M_ST_SUCC) 6124743Swnj sc->sc_state = S_RUN; 6134743Swnj else 6144743Swnj sc->sc_state = S_IDLE; 6154743Swnj um->um_tab.b_active = 0; 6166187Ssam wakeup((caddr_t)um); 6174743Swnj break; 6184743Swnj 6194743Swnj case M_OP_ONLIN|M_OP_END: 6204743Swnj /* 6214743Swnj * Link the drive onto the controller queue 6224743Swnj */ 6234743Swnj dp = &udutab[ui->ui_unit]; 6244743Swnj dp->b_forw = NULL; 6254743Swnj if (um->um_tab.b_actf == NULL) 6264743Swnj um->um_tab.b_actf = dp; 6274743Swnj else 6284743Swnj um->um_tab.b_actl->b_forw = dp; 6294743Swnj um->um_tab.b_actl = dp; 6304743Swnj if (st == M_ST_SUCC) { 6314743Swnj ui->ui_flags = 1; /* mark it online */ 6324743Swnj radsize[ui->ui_unit] = (daddr_t)mp->mscp_untsize; 6334743Swnj printd("uda: unit %d online\n", mp->mscp_unit); 6344743Swnj } else { 6354743Swnj harderr(dp->b_actf, "ra"); 6364743Swnj printf("OFFLINE\n"); 6374743Swnj while (bp = dp->b_actf) { 6384743Swnj dp->b_actf = bp->av_forw; 6394743Swnj bp->b_flags |= B_ERROR; 6404743Swnj iodone(bp); 6414743Swnj } 6424743Swnj } 6434743Swnj dp->b_active = 1; 6444743Swnj break; 6454743Swnj 6464743Swnj case M_OP_AVATN: 6474743Swnj printd("uda: unit %d attention\n", mp->mscp_unit); 6484743Swnj ui->ui_flags = 0; /* it went offline and we didn't notice */ 6494743Swnj break; 6504743Swnj 6514743Swnj case M_OP_READ|M_OP_END: 6524743Swnj case M_OP_WRITE|M_OP_END: 6534743Swnj bp = (struct buf *)mp->mscp_cmdref; 6546964Ssam ubarelse(um->um_ubanum, (int *)&bp->b_ubinfo); 6554743Swnj /* 6564743Swnj * Unlink buffer from I/O wait queue. 6574743Swnj */ 6584743Swnj bp->av_back->av_forw = bp->av_forw; 6594743Swnj bp->av_forw->av_back = bp->av_back; 6604743Swnj dp = &udutab[ui->ui_unit]; 6614743Swnj if (ui->ui_dk >= 0) 6624743Swnj if (--dp->b_qsize == 0) 6634743Swnj dk_busy &= ~(1<<ui->ui_dk); 6644743Swnj if (st == M_ST_OFFLN || st == M_ST_AVLBL) { 6654743Swnj ui->ui_flags = 0; /* mark unit offline */ 6664743Swnj /* 6674743Swnj * Link the buffer onto the front of the drive queue 6684743Swnj */ 6694743Swnj if ((bp->av_forw = dp->b_actf) == 0) 6704743Swnj dp->b_actl = bp; 6714743Swnj dp->b_actf = bp; 6724743Swnj /* 6734743Swnj * Link the drive onto the controller queue 6744743Swnj */ 6754743Swnj if (dp->b_active == 0) { 6764743Swnj dp->b_forw = NULL; 6774743Swnj if (um->um_tab.b_actf == NULL) 6784743Swnj um->um_tab.b_actf = dp; 6794743Swnj else 6804743Swnj um->um_tab.b_actl->b_forw = dp; 6814743Swnj um->um_tab.b_actl = dp; 6824743Swnj dp->b_active = 1; 6834743Swnj } 6844743Swnj return; 6854743Swnj } 6864743Swnj if (st != M_ST_SUCC) { 6874743Swnj harderr(bp, "ra"); 6884743Swnj printf("status %o\n", mp->mscp_status); 6894743Swnj bp->b_flags |= B_ERROR; 6904743Swnj } 6914743Swnj bp->b_resid = bp->b_bcount - mp->mscp_bytecnt; 6924743Swnj iodone(bp); 6934743Swnj break; 6944743Swnj 6954743Swnj case M_OP_GTUNT|M_OP_END: 6964743Swnj break; 6974743Swnj 6984743Swnj default: 6994743Swnj printf("uda: unknown packet\n"); 7004743Swnj } 7014743Swnj } 7024743Swnj 7034743Swnj 7044743Swnj /* 7054743Swnj * Process an error log message 7064743Swnj * 7074743Swnj * For now, just log the error on the console. 7084743Swnj * Only minimal decoding is done, only "useful" 7094743Swnj * information is printed. Eventually should 7104743Swnj * send message to an error logger. 7114743Swnj */ 7124743Swnj uderror(um, mp) 7134743Swnj register struct uba_ctlr *um; 7144743Swnj register struct mslg *mp; 7154743Swnj { 7166964Ssam printf("uda%d: %s error, ", um->um_ctlr, 7174743Swnj mp->mslg_flags&M_LF_SUCC ? "soft" : "hard"); 7184743Swnj switch (mp->mslg_format) { 7194743Swnj case M_FM_CNTERR: 7204743Swnj printf("controller error, event 0%o\n", mp->mslg_event); 7214743Swnj break; 7224743Swnj 7234743Swnj case M_FM_BUSADDR: 7244743Swnj printf("host memory access error, event 0%o, addr 0%o\n", 7254743Swnj mp->mslg_event, *((long *)&mp->mslg_busaddr[0])); 7264743Swnj break; 7274743Swnj 7284743Swnj case M_FM_DISKTRN: 7296964Ssam printf("disk transfer error, unit %d\n", mp->mslg_unit); 7304743Swnj break; 7314743Swnj 7324743Swnj case M_FM_SDI: 7336964Ssam printf("SDI error, unit %d, event 0%o\n", mp->mslg_unit, 7346964Ssam mp->mslg_event); 7354743Swnj break; 7364743Swnj 7374743Swnj case M_FM_SMLDSK: 7384743Swnj printf("small disk error, unit %d, event 0%o, cyl %d\n", 7394743Swnj mp->mslg_unit, mp->mslg_event, mp->mslg_sdecyl); 7404743Swnj break; 7414743Swnj 7424743Swnj default: 7434743Swnj printf("unknown error, unit %d, format 0%o, event 0%o\n", 7444743Swnj mp->mslg_unit, mp->mslg_format, mp->mslg_event); 7454743Swnj } 7466964Ssam 7476964Ssam if (udaerror) { 7486964Ssam register long *p = (long *)mp; 7496964Ssam register int i; 7506964Ssam 7516964Ssam for (i = 0; i < mp->mslg_header.uda_msglen; i += sizeof(*p)) 7526964Ssam printf("%x ", *p++); 7536964Ssam printf("\n"); 7546964Ssam } 7554743Swnj } 7564743Swnj 7574743Swnj 7584743Swnj /* 7594743Swnj * Find an unused command packet 7604743Swnj */ 7614743Swnj struct mscp * 7624743Swnj udgetcp(um) 7634743Swnj struct uba_ctlr *um; 7644743Swnj { 7654743Swnj register struct mscp *mp; 7664743Swnj register struct udaca *cp; 7674743Swnj register struct uda_softc *sc; 7684743Swnj register int i; 7694743Swnj 7704743Swnj cp = &uda[um->um_ctlr].uda_ca; 7714743Swnj sc = &uda_softc[um->um_ctlr]; 7724743Swnj i = sc->sc_lastcmd; 7734743Swnj if ((cp->ca_cmddsc[i] & (UDA_OWN|UDA_INT)) == UDA_INT) { 7744743Swnj cp->ca_cmddsc[i] &= ~UDA_INT; 7754743Swnj mp = &uda[um->um_ctlr].uda_cmd[i]; 7764743Swnj mp->mscp_unit = mp->mscp_modifier = 0; 7774743Swnj mp->mscp_opcode = mp->mscp_flags = 0; 7784743Swnj mp->mscp_bytecnt = mp->mscp_buffer = 0; 7794743Swnj mp->mscp_errlgfl = mp->mscp_copyspd = 0; 7804743Swnj sc->sc_lastcmd = (i + 1) % NCMD; 7814743Swnj return(mp); 7824743Swnj } 7834743Swnj return(NULL); 7844743Swnj } 7854743Swnj 7867734Sroot udread(dev, uio) 7874743Swnj dev_t dev; 7887734Sroot struct uio *uio; 7894743Swnj { 7904743Swnj register int unit = minor(dev) >> 3; 7914743Swnj 7924743Swnj if (unit >= NRA) 7938165Sroot return (ENXIO); 7948165Sroot return (physio(udstrategy, &rudbuf[unit], dev, B_READ, minphys, uio)); 7954743Swnj } 7964743Swnj 7977845Sroot udwrite(dev, uio) 7984743Swnj dev_t dev; 7997845Sroot struct uio *uio; 8004743Swnj { 8014743Swnj register int unit = minor(dev) >> 3; 8024743Swnj 8034743Swnj if (unit >= NRA) 8048165Sroot return (ENXIO); 8058165Sroot return (physio(udstrategy, &rudbuf[unit], dev, B_WRITE, minphys, uio)); 8064743Swnj } 8074743Swnj 8084743Swnj udreset(uban) 8094743Swnj int uban; 8104743Swnj { 8114743Swnj register struct uba_ctlr *um; 8124743Swnj register struct uba_device *ui; 8134743Swnj register struct buf *bp, *dp; 8144743Swnj register int unit; 8154743Swnj struct buf *nbp; 8164743Swnj int d; 8174743Swnj 8184743Swnj for (d = 0; d < NUDA; d++) { 8194743Swnj if ((um = udminfo[d]) == 0 || um->um_ubanum != uban || 8204743Swnj um->um_alive == 0) 8214743Swnj continue; 8224743Swnj printf(" uda%d", d); 8234743Swnj um->um_tab.b_active = 0; 8244743Swnj um->um_tab.b_actf = um->um_tab.b_actl = 0; 8254743Swnj uda_softc[d].sc_state = S_IDLE; 8264743Swnj for (unit = 0; unit < NRA; unit++) { 8274743Swnj if ((ui = uddinfo[unit]) == 0) 8284743Swnj continue; 8294743Swnj if (ui->ui_alive == 0 || ui->ui_mi != um) 8304743Swnj continue; 8314743Swnj udutab[unit].b_active = 0; 8324743Swnj udutab[unit].b_qsize = 0; 8334743Swnj } 8344743Swnj for (bp = udwtab[d].av_forw; bp != &udwtab[d]; bp = nbp) { 8354743Swnj nbp = bp->av_forw; 8368576Sroot bp->b_ubinfo = 0; 8374743Swnj /* 8384743Swnj * Link the buffer onto the drive queue 8394743Swnj */ 8404743Swnj dp = &udutab[dkunit(bp)]; 8414743Swnj if (dp->b_actf == 0) 8424743Swnj dp->b_actf = bp; 8434743Swnj else 8444743Swnj dp->b_actl->av_forw = bp; 8454743Swnj dp->b_actl = bp; 8464743Swnj bp->av_forw = 0; 8474743Swnj /* 8484743Swnj * Link the drive onto the controller queue 8494743Swnj */ 8504743Swnj if (dp->b_active == 0) { 8514743Swnj dp->b_forw = NULL; 8524743Swnj if (um->um_tab.b_actf == NULL) 8534743Swnj um->um_tab.b_actf = dp; 8544743Swnj else 8554743Swnj um->um_tab.b_actl->b_forw = dp; 8564743Swnj um->um_tab.b_actl = dp; 8574743Swnj dp->b_active = 1; 8584743Swnj } 8594743Swnj } 8604743Swnj udinit(d); 8614743Swnj } 8624743Swnj } 8634743Swnj 8644743Swnj uddump() 8654743Swnj { 8664743Swnj return(ENXIO); 8674743Swnj } 868