1*7845Sroot /* uda.c 4.8 82/08/22 */ 24743Swnj 34743Swnj #include "ra.h" 44743Swnj #if NUDA > 0 54743Swnj /* 64743Swnj * UDA50/RAxx disk device driver 74743Swnj * 84743Swnj * Restrictions: 94743Swnj * Unit numbers must be less than 8. 104743Swnj * 114743Swnj * TO DO: 124743Swnj * write dump code 134743Swnj * test on 750 144743Swnj */ 154743Swnj 164743Swnj #include "../h/param.h" 174743Swnj #include "../h/systm.h" 184743Swnj #include "../h/buf.h" 194743Swnj #include "../h/conf.h" 204743Swnj #include "../h/dir.h" 214743Swnj #include "../h/user.h" 224743Swnj #include "../h/pte.h" 234743Swnj #include "../h/map.h" 244743Swnj #include "../h/vm.h" 254743Swnj #include "../h/ubareg.h" 264743Swnj #include "../h/ubavar.h" 274743Swnj #include "../h/dk.h" 284743Swnj #include "../h/cpu.h" 294743Swnj #include "../h/cmap.h" 307734Sroot #include "../h/uio.h" 314743Swnj 324743Swnj int udadebug; 334743Swnj #define printd if(udadebug&1)printf 344743Swnj 356964Ssam int udaerror = 0; /* set to cause hex dump of error log packets */ 366964Ssam 374743Swnj /* 384743Swnj * Parameters for the communications area 394743Swnj */ 404743Swnj 416964Ssam #define NRSPL2 3 /* log2 number of response packets */ 426964Ssam #define NCMDL2 3 /* log2 number of command packets */ 434743Swnj #define NRSP (1<<NRSPL2) 444743Swnj #define NCMD (1<<NCMDL2) 454743Swnj 464743Swnj #include "../h/udareg.h" 474743Swnj #include "../h/mscp.h" 484743Swnj 494743Swnj struct uda_softc { 504743Swnj short sc_state; /* state of controller */ 514743Swnj short sc_mapped; /* Unibus map allocated for uda struct? */ 524743Swnj int sc_ubainfo; /* Unibus mapping info */ 534743Swnj struct uda *sc_uda; /* Unibus address of uda struct */ 544743Swnj int sc_ivec; /* interrupt vector address */ 554743Swnj short sc_credits; /* transfer credits */ 564743Swnj short sc_lastcmd; /* pointer into command ring */ 574743Swnj short sc_lastrsp; /* pointer into response ring */ 584743Swnj } uda_softc[NUDA]; 594743Swnj 604743Swnj /* 614743Swnj * Controller states 624743Swnj */ 634743Swnj #define S_IDLE 0 /* hasn't been initialized */ 644743Swnj #define S_STEP1 1 /* doing step 1 init */ 654743Swnj #define S_STEP2 2 /* doing step 2 init */ 664743Swnj #define S_STEP3 3 /* doing step 3 init */ 674743Swnj #define S_SCHAR 4 /* doing "set controller characteristics" */ 684743Swnj #define S_RUN 5 /* running */ 694743Swnj 704743Swnj struct uda { 714743Swnj struct udaca uda_ca; /* communications area */ 724743Swnj struct mscp uda_rsp[NRSP]; /* response packets */ 734743Swnj struct mscp uda_cmd[NCMD]; /* command packets */ 744743Swnj } uda[NUDA]; 754743Swnj 764743Swnj /* THIS SHOULD BE READ OFF THE PACK, PER DRIVE */ 774743Swnj struct size { 784743Swnj daddr_t nblocks; 794743Swnj daddr_t blkoff; 804743Swnj } ra_sizes[8] ={ 814743Swnj 15884, 0, /* A=blk 0 thru 15883 */ 824743Swnj 33440, 15884, /* B=blk 15884 thru 49323 */ 834743Swnj -1, 0, /* C=blk 0 thru end */ 846964Ssam 15884, 340670, /* D=blk 340670 thru 356553 */ 856964Ssam 55936, 356554, /* E=blk 356554 thru 412489 */ 866964Ssam -1, 412490, /* F=blk 412490 thru end */ 874743Swnj 82080, 49324, /* G=blk 49324 thru 131403 */ 884743Swnj -1, 131404, /* H=blk 131404 thru end */ 894743Swnj }; 904743Swnj /* END OF STUFF WHICH SHOULD BE READ IN PER DISK */ 914743Swnj 924743Swnj daddr_t radsize[NRA]; /* disk size, from ONLINE end packet */ 934743Swnj 944743Swnj int udprobe(), udslave(), udattach(), udintr(); 954743Swnj struct mscp *udgetcp(); 964743Swnj struct uba_ctlr *udminfo[NUDA]; 974743Swnj struct uba_device *uddinfo[NRA]; 984743Swnj struct uba_device *udip[NUDA][8]; /* 8 == max number of drives */ 994743Swnj 1006964Ssam u_short udstd[] = { 0772150, 0 }; 1014743Swnj struct uba_driver udadriver = 1024743Swnj { udprobe, udslave, udattach, 0, udstd, "ra", uddinfo, "uda", udminfo, 0 }; 1034743Swnj struct buf rudbuf[NRA]; 1044743Swnj struct buf udutab[NRA]; 1054743Swnj struct buf udwtab[NUDA]; /* I/O wait queue, per controller */ 1064743Swnj 1074743Swnj #define b_qsize b_resid /* queue size per drive, in udutab */ 1084743Swnj #define b_ubinfo b_resid /* Unibus mapping info, per buffer */ 1094743Swnj 1104743Swnj udprobe(reg, ctlr) 1114743Swnj caddr_t reg; 1124743Swnj int ctlr; 1134743Swnj { 1144743Swnj register int br, cvec; 1154743Swnj register struct uda_softc *sc = &uda_softc[ctlr]; 1164743Swnj 1174743Swnj #ifdef lint 1186187Ssam br = 0; cvec = br; br = cvec; reg = reg; 119*7845Sroot udread(0, 0); udwrite(0, 0); udreset(0); udintr(0); 1204743Swnj #endif 1214743Swnj /* SHOULD CHECK THAT IT REALLY IS A UDA */ 1224743Swnj br = 0x15; 1234743Swnj cvec = sc->sc_ivec = (uba_hd[numuba].uh_lastiv -= 4); 1247410Skre return(sizeof (struct udadevice)); 1254743Swnj } 1264743Swnj 1274743Swnj udslave(ui, reg) 1284743Swnj struct uba_device *ui; 1294743Swnj caddr_t reg; 1304743Swnj { 1314743Swnj /* 1324743Swnj * TOO HARD TO FIND OUT IF DISK IS THERE UNTIL 1334743Swnj * INITIALIZED. WE'LL FIND OUT WHEN WE FIRST 1344743Swnj * TRY TO ACCESS IT. 1354743Swnj */ 1366187Ssam #ifdef lint 1376187Ssam ui = ui; reg = reg; 1386187Ssam #endif 1394743Swnj return(1); 1404743Swnj } 1414743Swnj 1424743Swnj udattach(ui) 1434743Swnj register struct uba_device *ui; 1444743Swnj { 1454743Swnj 1464743Swnj if (ui->ui_dk > 0) 1474743Swnj dk_mspw[ui->ui_dk] = 1.0 / (60 * 31 * 256); /* approx */ 1484743Swnj ui->ui_flags = 0; 1494743Swnj udip[ui->ui_ctlr][ui->ui_slave] = ui; 1504743Swnj radsize[ui->ui_unit] = (daddr_t)0xffffff; /* max possible size */ 1514743Swnj } 1524743Swnj 1534743Swnj /* 1544743Swnj * Open a UDA. Initialize the device and 1554743Swnj * set the unit online. 1564743Swnj */ 1574743Swnj udopen(dev, flag) 1584743Swnj dev_t dev; 1594743Swnj int flag; 1604743Swnj { 1614743Swnj register int unit; 1624743Swnj register struct uba_device *ui; 1634743Swnj register struct uda_softc *sc; 1645434Sroot int s; 1654743Swnj 1666187Ssam #ifdef lint 1676187Ssam flag = flag; 1686187Ssam #endif 1694743Swnj unit = minor(dev) >> 3; 1704743Swnj if (unit >= NRA || (ui = uddinfo[unit]) == 0 || ui->ui_alive == 0) { 1714743Swnj u.u_error = ENXIO; 1724743Swnj return; 1734743Swnj } 1744743Swnj sc = &uda_softc[ui->ui_ctlr]; 1755434Sroot s = spl5(); 1764743Swnj if (sc->sc_state != S_RUN) { 1774743Swnj if (sc->sc_state == S_IDLE) 1784743Swnj udinit(ui->ui_ctlr); 1796187Ssam /* wait for initialization to complete */ 1806187Ssam sleep((caddr_t)ui->ui_mi, 0); 1814743Swnj if (sc->sc_state != S_RUN) { 1824743Swnj u.u_error = EIO; 1834743Swnj return; 1844743Swnj } 1854743Swnj } 1865434Sroot splx(s); 1874743Swnj /* SHOULD PROBABLY FORCE AN ONLINE ATTEMPT 1884743Swnj TO SEE IF DISK IS REALLY THERE */ 1894743Swnj } 1904743Swnj 1914743Swnj /* 1924743Swnj * Initialize a UDA. Set up UBA mapping registers, 1934743Swnj * initialize data structures, and start hardware 1944743Swnj * initialization sequence. 1954743Swnj */ 1964743Swnj udinit(d) 1974743Swnj int d; 1984743Swnj { 1994743Swnj register struct uda_softc *sc; 2004743Swnj register struct uda *ud; 2014743Swnj struct udadevice *udaddr; 2024743Swnj struct uba_ctlr *um; 2034743Swnj 2044743Swnj sc = &uda_softc[d]; 2054743Swnj um = udminfo[d]; 2064743Swnj um->um_tab.b_active++; 2074743Swnj ud = &uda[d]; 2084743Swnj udaddr = (struct udadevice *)um->um_addr; 2094743Swnj if (sc->sc_mapped == 0) { 2104743Swnj /* 2114743Swnj * Map the communications area and command 2124743Swnj * and response packets into Unibus address 2134743Swnj * space. 2144743Swnj */ 2154743Swnj sc->sc_ubainfo = uballoc(um->um_ubanum, (caddr_t)ud, 2164743Swnj sizeof (struct uda), 0); 2174743Swnj sc->sc_uda = (struct uda *)(sc->sc_ubainfo & 0x3ffff); 2184743Swnj sc->sc_mapped = 1; 2194743Swnj } 2204743Swnj 2214743Swnj /* 2224743Swnj * Start the hardware initialization sequence. 2234743Swnj */ 2244743Swnj udaddr->udaip = 0; /* start initialization */ 2254743Swnj while ((udaddr->udasa & UDA_STEP1) == 0) 2264743Swnj ; 2274743Swnj udaddr->udasa = UDA_ERR|(NCMDL2<<11)|(NRSPL2<<8)|UDA_IE|(sc->sc_ivec/4); 2284743Swnj /* 2294743Swnj * Initialization continues in interrupt routine. 2304743Swnj */ 2314743Swnj sc->sc_state = S_STEP1; 2324743Swnj sc->sc_credits = 0; 2334743Swnj } 2344743Swnj 2354743Swnj udstrategy(bp) 2364743Swnj register struct buf *bp; 2374743Swnj { 2384743Swnj register struct uba_device *ui; 2394743Swnj register struct uba_ctlr *um; 2404743Swnj register struct buf *dp; 2414743Swnj register int unit; 2424743Swnj int xunit = minor(bp->b_dev) & 07; 2434743Swnj daddr_t sz, maxsz; 2445434Sroot int s; 2454743Swnj 2464743Swnj sz = (bp->b_bcount+511) >> 9; 2474743Swnj unit = dkunit(bp); 2484743Swnj if (unit >= NRA) 2494743Swnj goto bad; 2504743Swnj ui = uddinfo[unit]; 2514743Swnj um = ui->ui_mi; 2524743Swnj if (ui == 0 || ui->ui_alive == 0) 2534743Swnj goto bad; 2544743Swnj if ((maxsz = ra_sizes[xunit].nblocks) < 0) 2554743Swnj maxsz = radsize[unit] - ra_sizes[xunit].blkoff; 2564743Swnj if (bp->b_blkno < 0 || bp->b_blkno+sz > maxsz || 2574743Swnj ra_sizes[xunit].blkoff >= radsize[unit]) 2584743Swnj goto bad; 2595434Sroot s = spl5(); 2604743Swnj /* 2614743Swnj * Link the buffer onto the drive queue 2624743Swnj */ 2634743Swnj dp = &udutab[ui->ui_unit]; 2644743Swnj if (dp->b_actf == 0) 2654743Swnj dp->b_actf = bp; 2664743Swnj else 2674743Swnj dp->b_actl->av_forw = bp; 2684743Swnj dp->b_actl = bp; 2694743Swnj bp->av_forw = 0; 2704743Swnj /* 2714743Swnj * Link the drive onto the controller queue 2724743Swnj */ 2734743Swnj if (dp->b_active == 0) { 2744743Swnj dp->b_forw = NULL; 2754743Swnj if (um->um_tab.b_actf == NULL) 2764743Swnj um->um_tab.b_actf = dp; 2774743Swnj else 2784743Swnj um->um_tab.b_actl->b_forw = dp; 2794743Swnj um->um_tab.b_actl = dp; 2804743Swnj dp->b_active = 1; 2814743Swnj } 2824743Swnj if (um->um_tab.b_active == 0) { 2834743Swnj #if defined(VAX750) 2844743Swnj if (cpu == VAX_750) { 2854743Swnj if (um->um_ubinfo != 0) 2864743Swnj printf("uda: ubinfo %x\n",um->um_ubinfo); 2874743Swnj else 2884743Swnj um->um_ubinfo = 2896187Ssam uballoc(um->um_ubanum, (caddr_t)0, 0, 2906187Ssam UBA_NEEDBDP); 2914743Swnj } 2924743Swnj #endif 2934743Swnj (void) udstart(um); 2944743Swnj } 2955434Sroot splx(s); 2964743Swnj return; 2974743Swnj 2984743Swnj bad: 2994743Swnj bp->b_flags |= B_ERROR; 3004743Swnj iodone(bp); 3014743Swnj return; 3024743Swnj } 3034743Swnj 3044743Swnj udstart(um) 3054743Swnj register struct uba_ctlr *um; 3064743Swnj { 3074743Swnj register struct buf *bp, *dp; 3084743Swnj register struct mscp *mp; 3094743Swnj register struct uda_softc *sc; 3104743Swnj register struct uba_device *ui; 3114743Swnj struct udadevice *udaddr; 3124743Swnj int i; 3134743Swnj 3144743Swnj sc = &uda_softc[um->um_ctlr]; 3154743Swnj 3164743Swnj loop: 3174743Swnj if ((dp = um->um_tab.b_actf) == NULL) { 3184743Swnj /* 3194743Swnj * Release uneeded UBA resources and return 3204743Swnj */ 3214743Swnj um->um_tab.b_active = 0; 3224743Swnj #if defined(VAX750) 3234743Swnj if (cpu == VAX_750) { 3244743Swnj if (um->um_ubinfo == 0) 3254743Swnj printf("uda: um_ubinfo == 0\n"); 3264743Swnj else 3274743Swnj ubarelse(um->um_ubanum, &um->um_ubinfo); 3284743Swnj } 3294743Swnj #endif 3306187Ssam return (0); 3314743Swnj } 3324743Swnj if ((bp = dp->b_actf) == NULL) { 3334743Swnj /* 3344743Swnj * No more requests for this drive, remove 3354743Swnj * from controller queue and look at next drive. 3364743Swnj * We know we're at the head of the controller queue. 3374743Swnj */ 3384743Swnj dp->b_active = 0; 3394743Swnj um->um_tab.b_actf = dp->b_forw; 3404743Swnj goto loop; 3414743Swnj } 3424743Swnj um->um_tab.b_active++; 3434743Swnj udaddr = (struct udadevice *)um->um_addr; 3444743Swnj if ((udaddr->udasa&UDA_ERR) || sc->sc_state != S_RUN) { 3454743Swnj harderr(bp, "ra"); 3464743Swnj printf("udasa %o, state %d\n", udaddr->udasa&0xffff, sc->sc_state); 3474743Swnj udinit(um->um_ctlr); 3484743Swnj /* SHOULD REQUEUE OUTSTANDING REQUESTS, LIKE UDRESET */ 3496187Ssam return (0); 3504743Swnj } 3514743Swnj ui = uddinfo[dkunit(bp)]; 3524743Swnj /* 3534743Swnj * If no credits, can't issue any commands 3544743Swnj * until some outstanding commands complete. 3554743Swnj */ 3564743Swnj if (sc->sc_credits < 2) 3576187Ssam return (0); 3584743Swnj if ((mp = udgetcp(um)) == NULL) 3596187Ssam return (0); 3604743Swnj sc->sc_credits--; /* committed to issuing a command */ 3614743Swnj if (ui->ui_flags == 0) { /* not online */ 3624743Swnj mp->mscp_opcode = M_OP_ONLIN; 3634743Swnj mp->mscp_unit = ui->ui_slave; 3644743Swnj dp->b_active = 2; 3654743Swnj um->um_tab.b_actf = dp->b_forw; /* remove from controller q */ 3664743Swnj printd("uda: bring unit %d online\n", ui->ui_slave); 3674743Swnj *((long *)mp->mscp_dscptr) |= UDA_OWN|UDA_INT; 3684743Swnj i = udaddr->udaip; 3694743Swnj goto loop; 3704743Swnj } 3714743Swnj switch (cpu) { 3724743Swnj case VAX_780: 3734743Swnj i = UBA_NEEDBDP|UBA_CANTWAIT; 3744743Swnj break; 3754743Swnj 3764743Swnj case VAX_750: 3774743Swnj i = um->um_ubinfo|UBA_HAVEBDP|UBA_CANTWAIT; 3784743Swnj break; 3794743Swnj 3806949Ssam case VAX_730: 3814743Swnj i = UBA_CANTWAIT; 3824743Swnj break; 3834743Swnj } 3844743Swnj if ((i = ubasetup(um->um_ubanum, bp, i)) == 0) { 3854743Swnj mp->mscp_opcode = M_OP_GTUNT; 3864743Swnj mp->mscp_unit = ui->ui_slave; 3874743Swnj *((long *)mp->mscp_dscptr) |= UDA_OWN|UDA_INT; 3884743Swnj i = udaddr->udaip; /* initiate polling */ 3894743Swnj return(1); /* wait for interrupt */ 3904743Swnj } 3914743Swnj mp->mscp_cmdref = (long)bp; /* pointer to get back */ 3924743Swnj mp->mscp_opcode = bp->b_flags&B_READ ? M_OP_READ : M_OP_WRITE; 3934743Swnj mp->mscp_unit = ui->ui_slave; 3944743Swnj mp->mscp_lbn = bp->b_blkno + ra_sizes[minor(bp->b_dev)&7].blkoff; 3954743Swnj mp->mscp_bytecnt = bp->b_bcount; 3964743Swnj mp->mscp_buffer = (i & 0x3ffff) | (((i>>28)&0xf)<<24); 3974743Swnj #if defined(VAX750) 3984743Swnj if (cpu == VAX_750) 3994743Swnj i &= 0xfffffff; /* mask off bdp */ 4004743Swnj #endif 4014743Swnj bp->b_ubinfo = i; /* save mapping info */ 4024743Swnj *((long *)mp->mscp_dscptr) |= UDA_OWN|UDA_INT; 4034743Swnj i = udaddr->udaip; /* initiate polling */ 4044743Swnj if (ui->ui_dk >= 0) { 4054743Swnj dk_busy |= 1<<ui->ui_dk; 4064743Swnj dp->b_qsize++; 4074743Swnj dk_xfer[ui->ui_dk]++; 4084743Swnj dk_wds[ui->ui_dk] += bp->b_bcount>>6; 4094743Swnj } 4104743Swnj 4114743Swnj /* 4124743Swnj * Move drive to the end of the controller queue 4134743Swnj */ 4144743Swnj if (dp->b_forw != NULL) { 4154743Swnj um->um_tab.b_actf = dp->b_forw; 4164743Swnj um->um_tab.b_actl->b_forw = dp; 4174743Swnj um->um_tab.b_actl = dp; 4184743Swnj dp->b_forw = NULL; 4194743Swnj } 4204743Swnj /* 4214743Swnj * Move buffer to I/O wait queue 4224743Swnj */ 4234743Swnj dp->b_actf = bp->av_forw; 4244743Swnj dp = &udwtab[um->um_ctlr]; 4254743Swnj bp->av_forw = dp; 4264743Swnj bp->av_back = dp->av_back; 4274743Swnj dp->av_back->av_forw = bp; 4284743Swnj dp->av_back = bp; 4294743Swnj goto loop; 4304743Swnj } 4314743Swnj 4324743Swnj /* 4334743Swnj * UDA interrupt routine. 4344743Swnj */ 4354743Swnj udintr(d) 4364743Swnj int d; 4374743Swnj { 4384743Swnj register struct uba_ctlr *um = udminfo[d]; 4394743Swnj register struct udadevice *udaddr = (struct udadevice *)um->um_addr; 4404743Swnj struct buf *bp; 4414743Swnj register int i; 4424743Swnj register struct uda_softc *sc = &uda_softc[d]; 4434743Swnj register struct uda *ud = &uda[d]; 4444743Swnj struct uda *uud; 4454743Swnj struct mscp *mp; 4464743Swnj 4474743Swnj printd("udintr: state %d, udasa %o\n", sc->sc_state, udaddr->udasa); 4484743Swnj switch (sc->sc_state) { 4494743Swnj case S_IDLE: 4504743Swnj printf("uda%d: random interrupt ignored\n", d); 4514743Swnj return; 4524743Swnj 4534743Swnj case S_STEP1: 4546964Ssam #define STEP1MASK 0174377 4554743Swnj #define STEP1GOOD (UDA_STEP2|UDA_IE|(NCMDL2<<3)|NRSPL2) 4566964Ssam if ((udaddr->udasa&STEP1MASK) != STEP1GOOD) { 4574743Swnj sc->sc_state = S_IDLE; 4586187Ssam wakeup((caddr_t)um); 4594743Swnj return; 4604743Swnj } 4614743Swnj udaddr->udasa = ((int)&sc->sc_uda->uda_ca.ca_ringbase)| 4624743Swnj (cpu == VAX_780 ? UDA_PI : 0); 4634743Swnj sc->sc_state = S_STEP2; 4644743Swnj return; 4654743Swnj 4664743Swnj case S_STEP2: 4676964Ssam #define STEP2MASK 0174377 4684743Swnj #define STEP2GOOD (UDA_STEP3|UDA_IE|(sc->sc_ivec/4)) 4696964Ssam if ((udaddr->udasa&STEP2MASK) != STEP2GOOD) { 4704743Swnj sc->sc_state = S_IDLE; 4716187Ssam wakeup((caddr_t)um); 4724743Swnj return; 4734743Swnj } 4744743Swnj udaddr->udasa = ((int)&sc->sc_uda->uda_ca.ca_ringbase)>>16; 4754743Swnj sc->sc_state = S_STEP3; 4764743Swnj return; 4774743Swnj 4784743Swnj case S_STEP3: 4796964Ssam #define STEP3MASK 0174000 4804743Swnj #define STEP3GOOD UDA_STEP4 4816964Ssam if ((udaddr->udasa&STEP3MASK) != STEP3GOOD) { 4824743Swnj sc->sc_state = S_IDLE; 4836187Ssam wakeup((caddr_t)um); 4844743Swnj return; 4854743Swnj } 4864743Swnj udaddr->udasa = UDA_GO; 4874743Swnj sc->sc_state = S_SCHAR; 4884743Swnj 4894743Swnj /* 4904743Swnj * Initialize the data structures. 4914743Swnj */ 4924743Swnj uud = sc->sc_uda; 4934743Swnj for (i = 0; i < NRSP; i++) { 4944743Swnj ud->uda_ca.ca_rspdsc[i] = UDA_OWN|UDA_INT| 4954743Swnj (long)&uud->uda_rsp[i].mscp_cmdref; 4964743Swnj ud->uda_rsp[i].mscp_dscptr = &ud->uda_ca.ca_rspdsc[i]; 4974743Swnj ud->uda_rsp[i].mscp_header.uda_msglen = sizeof (struct mscp); 4984743Swnj } 4994743Swnj for (i = 0; i < NCMD; i++) { 5004743Swnj ud->uda_ca.ca_cmddsc[i] = UDA_INT| 5014743Swnj (long)&uud->uda_cmd[i].mscp_cmdref; 5024743Swnj ud->uda_cmd[i].mscp_dscptr = &ud->uda_ca.ca_cmddsc[i]; 5034743Swnj ud->uda_cmd[i].mscp_header.uda_msglen = sizeof (struct mscp); 5044743Swnj } 5054743Swnj bp = &udwtab[d]; 5064743Swnj bp->av_forw = bp->av_back = bp; 5074743Swnj sc->sc_lastcmd = 0; 5084743Swnj sc->sc_lastrsp = 0; 5094743Swnj if ((mp = udgetcp(um)) == NULL) { 5104743Swnj sc->sc_state = S_IDLE; 5116187Ssam wakeup((caddr_t)um); 5124743Swnj return; 5134743Swnj } 5144743Swnj mp->mscp_opcode = M_OP_STCON; 5154743Swnj mp->mscp_cntflgs = M_CF_ATTN|M_CF_MISC|M_CF_THIS; 5164743Swnj *((long *)mp->mscp_dscptr) |= UDA_OWN|UDA_INT; 5174743Swnj i = udaddr->udaip; /* initiate polling */ 5184743Swnj return; 5194743Swnj 5204743Swnj case S_SCHAR: 5214743Swnj case S_RUN: 5224743Swnj break; 5234743Swnj 5244743Swnj default: 5254743Swnj printf("uda%d: interrupt in unknown state %d ignored\n", 5264743Swnj d, sc->sc_state); 5274743Swnj return; 5284743Swnj } 5294743Swnj 5304743Swnj if (udaddr->udasa&UDA_ERR) { 5314743Swnj printf("uda%d: fatal error (%o)\n", d, udaddr->udasa&0xffff); 5324743Swnj udaddr->udaip = 0; 5336187Ssam wakeup((caddr_t)um); 5344743Swnj } 5354743Swnj 5364743Swnj /* 5374743Swnj * Check for a buffer purge request. 5384743Swnj */ 5394743Swnj if (ud->uda_ca.ca_bdp) { 5404743Swnj /* 5414743Swnj * THIS IS A KLUDGE. 5424743Swnj * Maybe we should change the entire 5434743Swnj * UBA interface structure. 5444743Swnj */ 5454743Swnj int s = spl7(); 5464743Swnj 5474743Swnj i = um->um_ubinfo; 5484743Swnj printd("uda: purge bdp %d\n", ud->uda_ca.ca_bdp); 5494743Swnj um->um_ubinfo = ud->uda_ca.ca_bdp<<28; 5504743Swnj ubapurge(um); 5514743Swnj um->um_ubinfo = i; 5524743Swnj (void) splx(s); 5534743Swnj ud->uda_ca.ca_bdp = 0; 5544743Swnj udaddr->udasa = 0; /* signal purge complete */ 5554743Swnj } 5564743Swnj 5574743Swnj /* 5584743Swnj * Check for response ring transition. 5594743Swnj */ 5604743Swnj if (ud->uda_ca.ca_rspint) { 5614743Swnj ud->uda_ca.ca_rspint = 0; 5624743Swnj for (i = sc->sc_lastrsp;; i++) { 5634743Swnj i %= NRSP; 5644743Swnj if (ud->uda_ca.ca_rspdsc[i]&UDA_OWN) 5654743Swnj break; 5664743Swnj udrsp(um, ud, sc, i); 5674743Swnj ud->uda_ca.ca_rspdsc[i] |= UDA_OWN; 5684743Swnj } 5694743Swnj sc->sc_lastrsp = i; 5704743Swnj } 5714743Swnj 5724743Swnj /* 5734743Swnj * Check for command ring transition. 5744743Swnj */ 5754743Swnj if (ud->uda_ca.ca_cmdint) { 5764743Swnj printd("uda: command ring transition\n"); 5774743Swnj ud->uda_ca.ca_cmdint = 0; 5784743Swnj } 5796187Ssam (void) udstart(um); 5804743Swnj } 5814743Swnj 5824743Swnj /* 5834743Swnj * Process a response packet 5844743Swnj */ 5854743Swnj udrsp(um, ud, sc, i) 5864743Swnj register struct uba_ctlr *um; 5874743Swnj register struct uda *ud; 5884743Swnj register struct uda_softc *sc; 5894743Swnj int i; 5904743Swnj { 5914743Swnj register struct mscp *mp; 5924743Swnj struct uba_device *ui; 5934743Swnj struct buf *dp, *bp; 5944743Swnj int st; 5954743Swnj 5964743Swnj mp = &ud->uda_rsp[i]; 5974743Swnj mp->mscp_header.uda_msglen = sizeof (struct mscp); 5984743Swnj sc->sc_credits += mp->mscp_header.uda_credits & 0xf; 5994743Swnj if ((mp->mscp_header.uda_credits & 0xf0) > 0x10) 6004743Swnj return; 6014743Swnj /* 6024743Swnj * If it's an error log message (datagram), 6034743Swnj * pass it on for more extensive processing. 6044743Swnj */ 6054743Swnj if ((mp->mscp_header.uda_credits & 0xf0) == 0x10) { 6064743Swnj uderror(um, (struct mslg *)mp); 6074743Swnj return; 6084743Swnj } 6094743Swnj if (mp->mscp_unit >= 8) 6104743Swnj return; 6114743Swnj if ((ui = udip[um->um_ctlr][mp->mscp_unit]) == 0) 6124743Swnj return; 6134743Swnj st = mp->mscp_status&M_ST_MASK; 6144743Swnj switch (mp->mscp_opcode) { 6154743Swnj case M_OP_STCON|M_OP_END: 6164743Swnj if (st == M_ST_SUCC) 6174743Swnj sc->sc_state = S_RUN; 6184743Swnj else 6194743Swnj sc->sc_state = S_IDLE; 6204743Swnj um->um_tab.b_active = 0; 6216187Ssam wakeup((caddr_t)um); 6224743Swnj break; 6234743Swnj 6244743Swnj case M_OP_ONLIN|M_OP_END: 6254743Swnj /* 6264743Swnj * Link the drive onto the controller queue 6274743Swnj */ 6284743Swnj dp = &udutab[ui->ui_unit]; 6294743Swnj dp->b_forw = NULL; 6304743Swnj if (um->um_tab.b_actf == NULL) 6314743Swnj um->um_tab.b_actf = dp; 6324743Swnj else 6334743Swnj um->um_tab.b_actl->b_forw = dp; 6344743Swnj um->um_tab.b_actl = dp; 6354743Swnj if (st == M_ST_SUCC) { 6364743Swnj ui->ui_flags = 1; /* mark it online */ 6374743Swnj radsize[ui->ui_unit] = (daddr_t)mp->mscp_untsize; 6384743Swnj printd("uda: unit %d online\n", mp->mscp_unit); 6394743Swnj } else { 6404743Swnj harderr(dp->b_actf, "ra"); 6414743Swnj printf("OFFLINE\n"); 6424743Swnj while (bp = dp->b_actf) { 6434743Swnj dp->b_actf = bp->av_forw; 6444743Swnj bp->b_flags |= B_ERROR; 6454743Swnj iodone(bp); 6464743Swnj } 6474743Swnj } 6484743Swnj dp->b_active = 1; 6494743Swnj break; 6504743Swnj 6514743Swnj case M_OP_AVATN: 6524743Swnj printd("uda: unit %d attention\n", mp->mscp_unit); 6534743Swnj ui->ui_flags = 0; /* it went offline and we didn't notice */ 6544743Swnj break; 6554743Swnj 6564743Swnj case M_OP_READ|M_OP_END: 6574743Swnj case M_OP_WRITE|M_OP_END: 6584743Swnj bp = (struct buf *)mp->mscp_cmdref; 6596964Ssam ubarelse(um->um_ubanum, (int *)&bp->b_ubinfo); 6604743Swnj /* 6614743Swnj * Unlink buffer from I/O wait queue. 6624743Swnj */ 6634743Swnj bp->av_back->av_forw = bp->av_forw; 6644743Swnj bp->av_forw->av_back = bp->av_back; 6654743Swnj dp = &udutab[ui->ui_unit]; 6664743Swnj if (ui->ui_dk >= 0) 6674743Swnj if (--dp->b_qsize == 0) 6684743Swnj dk_busy &= ~(1<<ui->ui_dk); 6694743Swnj if (st == M_ST_OFFLN || st == M_ST_AVLBL) { 6704743Swnj ui->ui_flags = 0; /* mark unit offline */ 6714743Swnj /* 6724743Swnj * Link the buffer onto the front of the drive queue 6734743Swnj */ 6744743Swnj if ((bp->av_forw = dp->b_actf) == 0) 6754743Swnj dp->b_actl = bp; 6764743Swnj dp->b_actf = bp; 6774743Swnj /* 6784743Swnj * Link the drive onto the controller queue 6794743Swnj */ 6804743Swnj if (dp->b_active == 0) { 6814743Swnj dp->b_forw = NULL; 6824743Swnj if (um->um_tab.b_actf == NULL) 6834743Swnj um->um_tab.b_actf = dp; 6844743Swnj else 6854743Swnj um->um_tab.b_actl->b_forw = dp; 6864743Swnj um->um_tab.b_actl = dp; 6874743Swnj dp->b_active = 1; 6884743Swnj } 6894743Swnj return; 6904743Swnj } 6914743Swnj if (st != M_ST_SUCC) { 6924743Swnj harderr(bp, "ra"); 6934743Swnj printf("status %o\n", mp->mscp_status); 6944743Swnj bp->b_flags |= B_ERROR; 6954743Swnj } 6964743Swnj bp->b_resid = bp->b_bcount - mp->mscp_bytecnt; 6974743Swnj iodone(bp); 6984743Swnj break; 6994743Swnj 7004743Swnj case M_OP_GTUNT|M_OP_END: 7014743Swnj break; 7024743Swnj 7034743Swnj default: 7044743Swnj printf("uda: unknown packet\n"); 7054743Swnj } 7064743Swnj } 7074743Swnj 7084743Swnj 7094743Swnj /* 7104743Swnj * Process an error log message 7114743Swnj * 7124743Swnj * For now, just log the error on the console. 7134743Swnj * Only minimal decoding is done, only "useful" 7144743Swnj * information is printed. Eventually should 7154743Swnj * send message to an error logger. 7164743Swnj */ 7174743Swnj uderror(um, mp) 7184743Swnj register struct uba_ctlr *um; 7194743Swnj register struct mslg *mp; 7204743Swnj { 7216964Ssam printf("uda%d: %s error, ", um->um_ctlr, 7224743Swnj mp->mslg_flags&M_LF_SUCC ? "soft" : "hard"); 7234743Swnj switch (mp->mslg_format) { 7244743Swnj case M_FM_CNTERR: 7254743Swnj printf("controller error, event 0%o\n", mp->mslg_event); 7264743Swnj break; 7274743Swnj 7284743Swnj case M_FM_BUSADDR: 7294743Swnj printf("host memory access error, event 0%o, addr 0%o\n", 7304743Swnj mp->mslg_event, *((long *)&mp->mslg_busaddr[0])); 7314743Swnj break; 7324743Swnj 7334743Swnj case M_FM_DISKTRN: 7346964Ssam printf("disk transfer error, unit %d\n", mp->mslg_unit); 7354743Swnj break; 7364743Swnj 7374743Swnj case M_FM_SDI: 7386964Ssam printf("SDI error, unit %d, event 0%o\n", mp->mslg_unit, 7396964Ssam mp->mslg_event); 7404743Swnj break; 7414743Swnj 7424743Swnj case M_FM_SMLDSK: 7434743Swnj printf("small disk error, unit %d, event 0%o, cyl %d\n", 7444743Swnj mp->mslg_unit, mp->mslg_event, mp->mslg_sdecyl); 7454743Swnj break; 7464743Swnj 7474743Swnj default: 7484743Swnj printf("unknown error, unit %d, format 0%o, event 0%o\n", 7494743Swnj mp->mslg_unit, mp->mslg_format, mp->mslg_event); 7504743Swnj } 7516964Ssam 7526964Ssam if (udaerror) { 7536964Ssam register long *p = (long *)mp; 7546964Ssam register int i; 7556964Ssam 7566964Ssam for (i = 0; i < mp->mslg_header.uda_msglen; i += sizeof(*p)) 7576964Ssam printf("%x ", *p++); 7586964Ssam printf("\n"); 7596964Ssam } 7604743Swnj } 7614743Swnj 7624743Swnj 7634743Swnj /* 7644743Swnj * Find an unused command packet 7654743Swnj */ 7664743Swnj struct mscp * 7674743Swnj udgetcp(um) 7684743Swnj struct uba_ctlr *um; 7694743Swnj { 7704743Swnj register struct mscp *mp; 7714743Swnj register struct udaca *cp; 7724743Swnj register struct uda_softc *sc; 7734743Swnj register int i; 7744743Swnj 7754743Swnj cp = &uda[um->um_ctlr].uda_ca; 7764743Swnj sc = &uda_softc[um->um_ctlr]; 7774743Swnj i = sc->sc_lastcmd; 7784743Swnj if ((cp->ca_cmddsc[i] & (UDA_OWN|UDA_INT)) == UDA_INT) { 7794743Swnj cp->ca_cmddsc[i] &= ~UDA_INT; 7804743Swnj mp = &uda[um->um_ctlr].uda_cmd[i]; 7814743Swnj mp->mscp_unit = mp->mscp_modifier = 0; 7824743Swnj mp->mscp_opcode = mp->mscp_flags = 0; 7834743Swnj mp->mscp_bytecnt = mp->mscp_buffer = 0; 7844743Swnj mp->mscp_errlgfl = mp->mscp_copyspd = 0; 7854743Swnj sc->sc_lastcmd = (i + 1) % NCMD; 7864743Swnj return(mp); 7874743Swnj } 7884743Swnj return(NULL); 7894743Swnj } 7904743Swnj 7917734Sroot udread(dev, uio) 7924743Swnj dev_t dev; 7937734Sroot struct uio *uio; 7944743Swnj { 7954743Swnj register int unit = minor(dev) >> 3; 7964743Swnj 7974743Swnj if (unit >= NRA) 7984743Swnj u.u_error = ENXIO; 7994743Swnj else 8007734Sroot physio(udstrategy, &rudbuf[unit], dev, B_READ, minphys, uio); 8014743Swnj } 8024743Swnj 803*7845Sroot udwrite(dev, uio) 8044743Swnj dev_t dev; 805*7845Sroot struct uio *uio; 8064743Swnj { 8074743Swnj register int unit = minor(dev) >> 3; 8084743Swnj 8094743Swnj if (unit >= NRA) 8104743Swnj u.u_error = ENXIO; 8114743Swnj else 812*7845Sroot physio(udstrategy, &rudbuf[unit], dev, B_WRITE, minphys, uio); 8134743Swnj } 8144743Swnj 8154743Swnj udreset(uban) 8164743Swnj int uban; 8174743Swnj { 8184743Swnj register struct uba_ctlr *um; 8194743Swnj register struct uba_device *ui; 8204743Swnj register struct buf *bp, *dp; 8214743Swnj register int unit; 8224743Swnj struct buf *nbp; 8234743Swnj int d; 8244743Swnj 8254743Swnj for (d = 0; d < NUDA; d++) { 8264743Swnj if ((um = udminfo[d]) == 0 || um->um_ubanum != uban || 8274743Swnj um->um_alive == 0) 8284743Swnj continue; 8294743Swnj printf(" uda%d", d); 8304743Swnj um->um_tab.b_active = 0; 8314743Swnj um->um_tab.b_actf = um->um_tab.b_actl = 0; 8324743Swnj uda_softc[d].sc_state = S_IDLE; 8334743Swnj for (unit = 0; unit < NRA; unit++) { 8344743Swnj if ((ui = uddinfo[unit]) == 0) 8354743Swnj continue; 8364743Swnj if (ui->ui_alive == 0 || ui->ui_mi != um) 8374743Swnj continue; 8384743Swnj udutab[unit].b_active = 0; 8394743Swnj udutab[unit].b_qsize = 0; 8404743Swnj } 8414743Swnj for (bp = udwtab[d].av_forw; bp != &udwtab[d]; bp = nbp) { 8424743Swnj nbp = bp->av_forw; 8436187Ssam ubarelse(uban, (int *)&bp->b_ubinfo); 8444743Swnj /* 8454743Swnj * Link the buffer onto the drive queue 8464743Swnj */ 8474743Swnj dp = &udutab[dkunit(bp)]; 8484743Swnj if (dp->b_actf == 0) 8494743Swnj dp->b_actf = bp; 8504743Swnj else 8514743Swnj dp->b_actl->av_forw = bp; 8524743Swnj dp->b_actl = bp; 8534743Swnj bp->av_forw = 0; 8544743Swnj /* 8554743Swnj * Link the drive onto the controller queue 8564743Swnj */ 8574743Swnj if (dp->b_active == 0) { 8584743Swnj dp->b_forw = NULL; 8594743Swnj if (um->um_tab.b_actf == NULL) 8604743Swnj um->um_tab.b_actf = dp; 8614743Swnj else 8624743Swnj um->um_tab.b_actl->b_forw = dp; 8634743Swnj um->um_tab.b_actl = dp; 8644743Swnj dp->b_active = 1; 8654743Swnj } 8664743Swnj } 8674743Swnj udinit(d); 8684743Swnj } 8694743Swnj } 8704743Swnj 8714743Swnj uddump() 8724743Swnj { 8734743Swnj return(ENXIO); 8744743Swnj } 875