123353Smckusick /* 2*27254Skridle * @(#)uda.c 6.21 (Berkeley) 04/22/86 323353Smckusick */ 423353Smckusick 517553Skarels /************************************************************************ 617553Skarels * * 717553Skarels * Copyright (c) 1983 by * 817553Skarels * Digital Equipment Corporation, Maynard, MA * 917553Skarels * All rights reserved. * 1017553Skarels * * 1117553Skarels ************************************************************************/ 1217553Skarels /* 1317553Skarels * uda.c - UDA50A Driver 1417553Skarels * 1525653Skarels * decvax!rich 1617553Skarels */ 1717553Skarels 1817553Skarels #define DEBUG 1917553Skarels #define UDADEVNUM (9) /* entry in bdevsw */ 204743Swnj #include "ra.h" 2117642Skarels #if NUDA > 0 224743Swnj /* 234743Swnj * UDA50/RAxx disk device driver 244743Swnj * 254743Swnj * Restrictions: 2617553Skarels * Unit numbers must be less than 8. 274743Swnj */ 289781Ssam #include "../machine/pte.h" 294743Swnj 3017553Skarels #include "param.h" 3117553Skarels #include "systm.h" 3217553Skarels #include "buf.h" 3317553Skarels #include "conf.h" 3417553Skarels #include "dir.h" 3517553Skarels #include "user.h" 3617553Skarels #include "map.h" 3717553Skarels #include "vm.h" 3817553Skarels #include "dk.h" 3917553Skarels #include "cmap.h" 4017553Skarels #include "uio.h" 414743Swnj 428482Sroot #include "../vax/cpu.h" 4317553Skarels #include "ubareg.h" 4417553Skarels #include "ubavar.h" 4517553Skarels #include "../vax/mtpr.h" 468613Sroot 4717553Skarels #define TENSEC (1000) 4817553Skarels 4917553Skarels #define NRSPL2 3 /* log2 number of response packets */ 5017553Skarels #define NCMDL2 3 /* log2 number of command packets */ 5117553Skarels #define NRSP (1<<NRSPL2) 5217553Skarels #define NCMD (1<<NCMDL2) 538613Sroot 548482Sroot #include "../vaxuba/udareg.h" 558482Sroot #include "../vax/mscp.h" 564743Swnj 5717553Skarels 584743Swnj struct uda_softc { 5917553Skarels short sc_state; /* state of controller */ 6017553Skarels short sc_mapped; /* Unibus map allocated for uda struct? */ 6117553Skarels int sc_ubainfo; /* Unibus mapping info */ 6217553Skarels struct uda *sc_uda; /* Unibus address of uda struct */ 6317553Skarels int sc_ivec; /* interrupt vector address */ 6417553Skarels short sc_credits; /* transfer credits */ 6517553Skarels short sc_lastcmd; /* pointer into command ring */ 6617553Skarels short sc_lastrsp; /* pointer into response ring */ 674743Swnj } uda_softc[NUDA]; 684743Swnj struct uda { 6917553Skarels struct udaca uda_ca; /* communications area */ 7017553Skarels struct mscp uda_rsp[NRSP]; /* response packets */ 7117553Skarels struct mscp uda_cmd[NCMD]; /* command packets */ 724743Swnj } uda[NUDA]; 734743Swnj 7424742Sbloom #define udunit(dev) (minor(dev) >> 3) 7524742Sbloom 764743Swnj /* THIS SHOULD BE READ OFF THE PACK, PER DRIVE */ 774743Swnj struct size { 7817553Skarels daddr_t nblocks; 7917553Skarels daddr_t blkoff; 8017553Skarels } ra25_sizes[8] = { 814743Swnj 15884, 0, /* A=blk 0 thru 15883 */ 8217553Skarels 10032, 15884, /* B=blk 15884 thru 49323 */ 8317553Skarels -1, 0, /* C=blk 0 thru end */ 8417553Skarels 0, 0, /* D=blk 340670 thru 356553 */ 8517553Skarels 0, 0, /* E=blk 356554 thru 412489 */ 8617553Skarels 0, 0, /* F=blk 412490 thru end */ 8717553Skarels -1, 25916, /* G=blk 49324 thru 131403 */ 8817553Skarels 0, 0, /* H=blk 131404 thru end */ 89*27254Skridle }, ra53_sizes[8] = { 90*27254Skridle 15884, 0, 91*27254Skridle 33440, 15884, 92*27254Skridle -1, 0, 93*27254Skridle 0, 0, 94*27254Skridle 33440, 0, 95*27254Skridle -1, 33440, 96*27254Skridle -1, 15884, 97*27254Skridle -1, 49324, 9817553Skarels }, ra60_sizes[8] = { 9925178Smckusick 15884, 0, /* A=sectors 0 thru 15883 */ 10025178Smckusick 33440, 15884, /* B=sectors 15884 thru 49323 */ 10125178Smckusick 400176, 0, /* C=sectors 0 thru 400175 */ 10225178Smckusick 82080, 49324, /* 4.2 G => D=sectors 49324 thru 131403 */ 10325178Smckusick 268772, 131404, /* 4.2 H => E=sectors 131404 thru 400175 */ 10425178Smckusick 350852, 49324, /* F=sectors 49324 thru 400175 */ 10525178Smckusick 157570, 242606, /* UCB G => G=sectors 242606 thru 400175 */ 10625178Smckusick 193282, 49324, /* UCB H => H=sectors 49324 thru 242605 */ 10717553Skarels }, ra80_sizes[8] = { 10825178Smckusick 15884, 0, /* A=sectors 0 thru 15883 */ 10925178Smckusick 33440, 15884, /* B=sectors 15884 thru 49323 */ 11025178Smckusick 242606, 0, /* C=sectors 0 thru 242605 */ 11117642Skarels 0, 0, /* D=unused */ 11225178Smckusick 193282, 49324, /* UCB H => E=sectors 49324 thru 242605 */ 11325178Smckusick 82080, 49324, /* 4.2 G => F=sectors 49324 thru 131403 */ 11425178Smckusick 192696, 49910, /* G=sectors 49910 thru 242605 */ 11525178Smckusick 111202, 131404, /* 4.2 H => H=sectors 131404 thru 242605 */ 11617553Skarels }, ra81_sizes[8] ={ 11725178Smckusick /* 11825178Smckusick * These are the new standard partition sizes for ra81's. 11925653Skarels * An RA_COMPAT system is compiled with D, E, and F corresponding 12025178Smckusick * to the 4.2 partitions for G, H, and F respectively. 12125178Smckusick */ 12225178Smckusick #ifndef UCBRA 12325178Smckusick 15884, 0, /* A=sectors 0 thru 15883 */ 12425178Smckusick 66880, 16422, /* B=sectors 16422 thru 83301 */ 12525178Smckusick 891072, 0, /* C=sectors 0 thru 891071 */ 12625653Skarels #ifdef RA_COMPAT 12725178Smckusick 82080, 49324, /* 4.2 G => D=sectors 49324 thru 131403 */ 12825178Smckusick 759668, 131404, /* 4.2 H => E=sectors 131404 thru 891071 */ 12925178Smckusick 478582, 412490, /* 4.2 F => F=sectors 412490 thru 891071 */ 13025178Smckusick #else 13125178Smckusick 15884, 375564, /* D=sectors 375564 thru 391447 */ 13225178Smckusick 307200, 391986, /* E=sectors 391986 thru 699185 */ 13325178Smckusick 191352, 699720, /* F=sectors 699720 thru 891071 */ 13425653Skarels #endif RA_COMPAT 13525178Smckusick 515508, 375564, /* G=sectors 375564 thru 891071 */ 13625178Smckusick 291346, 83538, /* H=sectors 83538 thru 374883 */ 13725178Smckusick 13825178Smckusick /* 13925178Smckusick * These partitions correspond to the sizes used by sites at Berkeley, 14025178Smckusick * and by those sites that have received copies of the Berkeley driver 14125178Smckusick * with deltas 6.2 or greater (11/15/83). 14225178Smckusick */ 14325178Smckusick #else UCBRA 14425178Smckusick 14525178Smckusick 15884, 0, /* A=sectors 0 thru 15883 */ 14625178Smckusick 33440, 15884, /* B=sectors 15884 thru 49323 */ 14725178Smckusick 891072, 0, /* C=sectors 0 thru 891071 */ 14825178Smckusick 15884, 242606, /* D=sectors 242606 thru 258489 */ 14925178Smckusick 307200, 258490, /* E=sectors 258490 thru 565689 */ 15025178Smckusick 325382, 565690, /* F=sectors 565690 thru 891071 */ 15125178Smckusick 648466, 242606, /* G=sectors 242606 thru 891071 */ 15225178Smckusick 193282, 49324, /* H=sectors 49324 thru 242605 */ 15325178Smckusick 15425178Smckusick #endif UCBRA 1554743Swnj }; 15617553Skarels 15717553Skarels struct ra_info { 15817553Skarels struct size *ra_sizes; /* Partion tables for drive */ 15917553Skarels daddr_t radsize; /* Max user size form online pkt */ 16017553Skarels unsigned ratype; /* Drive type int field */ 16117553Skarels unsigned rastatus; /* Command status from */ 16217553Skarels /* last onlin or GTUNT */ 16317553Skarels } ra_info[NRA]; 16417553Skarels 16517553Skarels 1664743Swnj /* END OF STUFF WHICH SHOULD BE READ IN PER DISK */ 16717553Skarels struct uba_ctlr *udminfo[NUDA]; 16817553Skarels struct uba_device *uddinfo[NRA]; 16917553Skarels struct uba_device *udip[NUDA][8]; /* 8 == max number of drives */ 17017553Skarels struct buf rudbuf[NRA]; 17117553Skarels struct buf udutab[NRA]; 17217553Skarels struct buf udwtab[NUDA]; /* I/O wait queue, per controller */ 1734743Swnj 17412421Ssam 17517553Skarels int udamicro[NUDA]; /* to store microcode level */ 17625901Skarels int udaburst[NUDA] = { 0 }; /* DMA burst size, 0 is default */ 1774743Swnj 1784743Swnj 17917553Skarels /* 18017553Skarels * Controller states 18117553Skarels */ 18217553Skarels #define S_IDLE 0 /* hasn't been initialized */ 18317553Skarels #define S_STEP1 1 /* doing step 1 init */ 18417553Skarels #define S_STEP2 2 /* doing step 2 init */ 18517553Skarels #define S_STEP3 3 /* doing step 3 init */ 18617553Skarels #define S_SCHAR 4 /* doing "set controller characteristics" */ 18717553Skarels #define S_RUN 5 /* running */ 18817553Skarels 18917553Skarels 19017553Skarels int udaerror = 0; /* causes hex dump of packets */ 19117553Skarels int udadebug = 0; 19217553Skarels int uda_cp_wait = 0; /* Something to wait on for command */ 19317553Skarels /* packets and or credits. */ 19417553Skarels int wakeup(); 19517553Skarels extern int hz; /* Should find the right include */ 19617553Skarels #ifdef DEBUG 19717553Skarels #define printd if (udadebug) printf 19817553Skarels #define printd10 if(udadebug >= 10) printf 19917553Skarels #endif 20017553Skarels #define mprintf printf /* temporary JG hack until Rich fixes*/ 20117553Skarels 20217553Skarels int udprobe(), udslave(), udattach(), udintr(); 20317553Skarels struct mscp *udgetcp(); 20417553Skarels 20517553Skarels u_short udstd[] = { 0772150, 0772550, 0777550, 0 }; 20617553Skarels struct uba_driver udadriver = 2074743Swnj { udprobe, udslave, udattach, 0, udstd, "ra", uddinfo, "uda", udminfo, 0 }; 2084743Swnj 20917553Skarels #define b_qsize b_resid /* queue size per drive, in udutab */ 21017553Skarels #define b_ubinfo b_resid /* Unibus mapping info, per buffer */ 2114743Swnj 2124743Swnj udprobe(reg, ctlr) 2134743Swnj caddr_t reg; 2144743Swnj int ctlr; 2154743Swnj { 2164743Swnj register int br, cvec; 2174743Swnj register struct uda_softc *sc = &uda_softc[ctlr]; 21817553Skarels struct udadevice *udaddr; 2194743Swnj 22017553Skarels int cur_time; 22117553Skarels 2224743Swnj #ifdef lint 22317553Skarels br = 0; cvec = br; br = cvec; 22412778Ssam udreset(0); udintr(0); 2254743Swnj #endif 22617553Skarels udaddr = (struct udadevice *) reg; 22717553Skarels 22817553Skarels sc->sc_ivec = (uba_hd[numuba].uh_lastiv -= 4); 229*27254Skridle #if VAX630 230*27254Skridle if (cpu == VAX_630) { 231*27254Skridle br = 0x15; 232*27254Skridle cvec = sc->sc_ivec; 233*27254Skridle return(sizeof (struct udadevice)); 234*27254Skridle } 235*27254Skridle #endif 23617553Skarels udaddr->udaip = 0; /* start initialization */ 23717553Skarels 23817553Skarels cur_time = mfpr(TODR); /* Time of day */ 23917553Skarels while(cur_time + TENSEC > mfpr(TODR)){ /* wait for at most 10 secs */ 24017553Skarels if((udaddr->udasa & UDA_STEP1) != 0) 24117553Skarels break; 24217553Skarels } 24317553Skarels if(cur_time + TENSEC <= mfpr(TODR)) 24417553Skarels return(0); /* Not a uda or it won't init as it */ 24517553Skarels /* should within ten seconds. */ 24617553Skarels udaddr->udasa=UDA_ERR|(NCMDL2<<11)|(NRSPL2<<8)|UDA_IE|(sc->sc_ivec/4); 24717553Skarels while((udaddr->udasa&UDA_STEP2)==0) 24817553Skarels DELAY(1000); /* intr should have */ 24917553Skarels /* have happened by now */ 25017553Skarels 2517410Skre return(sizeof (struct udadevice)); 2524743Swnj } 2534743Swnj 25426295Skarels /* ARGSUSED */ 2554743Swnj udslave(ui, reg) 2564743Swnj struct uba_device *ui; 2574743Swnj caddr_t reg; 2584743Swnj { 25917553Skarels register struct uba_ctlr *um = udminfo[ui->ui_ctlr]; 26017553Skarels register struct uda_softc *sc = &uda_softc[ui->ui_ctlr]; 26117553Skarels struct udadevice *udaddr; 26217553Skarels struct mscp *mp; 26317553Skarels int i; /* Something to write into to start */ 26417553Skarels /* the uda polling */ 26517553Skarels 26617553Skarels 26717553Skarels udaddr = (struct udadevice *)um->um_addr; 26817553Skarels if(sc->sc_state != S_RUN){ 26917553Skarels if(!udinit(ui->ui_ctlr)) 27017553Skarels return(0); 27117553Skarels } 27217553Skarels /* Here we will wait for the controller */ 27317553Skarels /* to come into the run state or go idle. If we go idle we are in */ 27417553Skarels /* touble and I don't yet know what to do so I will punt */ 27517553Skarels while(sc->sc_state != S_RUN && sc->sc_state != S_IDLE); /* spin */ 27617553Skarels if(sc->sc_state == S_IDLE){ /* The Uda failed to initialize */ 27717553Skarels printf("UDA failed to init\n"); 27817553Skarels return(0); 27917553Skarels } 28017553Skarels /* The controller is up so let see if the drive is there! */ 28117553Skarels if(0 == (mp = udgetcp(um))){ /* ditto */ 28217553Skarels printf("UDA can't get command packet\n"); 28317553Skarels return(0); 28417553Skarels } 28517553Skarels mp->mscp_opcode = M_OP_GTUNT; /* This should give us the drive type*/ 28617553Skarels mp->mscp_unit = ui->ui_slave; 28717553Skarels mp->mscp_cmdref = (long) ui->ui_slave; 28817553Skarels #ifdef DEBUG 28917553Skarels printd("uda%d Get unit status slave %d\n",ui->ui_ctlr,ui->ui_slave); 29017553Skarels #endif 29117553Skarels ra_info[ui->ui_unit].rastatus = 0; /* set to zero */ 29217553Skarels udip[ui->ui_ctlr][ui->ui_slave] = ui; 29317553Skarels *((long *) mp->mscp_dscptr ) |= UDA_OWN | UDA_INT;/* maybe we should poll*/ 29417553Skarels i = udaddr->udaip; 29526295Skarels #ifdef lint 29626295Skarels i = i; 29726295Skarels #endif 29817553Skarels while(!ra_info[ui->ui_unit].rastatus); /* Wait for some status */ 29917553Skarels udip[ui->ui_ctlr][ui->ui_slave] = 0; 30017553Skarels if(!ra_info[ui->ui_unit].ratype) /* packet from a GTUNT */ 30117553Skarels return(0); /* Failed No such drive */ 30217553Skarels else 30317553Skarels return(1); /* Got it and it is there */ 3044743Swnj } 3054743Swnj 3064743Swnj udattach(ui) 3074743Swnj register struct uba_device *ui; 3084743Swnj { 30917553Skarels register struct uba_ctlr *um = ui->ui_mi ; 31017553Skarels struct udadevice *udaddr = (struct udadevice *) um->um_addr; 31117553Skarels struct mscp *mp; 31217553Skarels int i; /* Something to write into to start */ 31317553Skarels /* the uda polling */ 31412443Ssam if (ui->ui_dk >= 0) 31517553Skarels dk_mspw[ui->ui_dk] = 1.0 / (60 * 31 * 256); /* approx */ 3164743Swnj ui->ui_flags = 0; 3174743Swnj udip[ui->ui_ctlr][ui->ui_slave] = ui; 31817553Skarels /* check to see if the drive is a available if it is bring it online */ 31917553Skarels /* if not then just return. open will try an online later */ 32017553Skarels if(ra_info[ui->ui_unit].rastatus != M_ST_AVLBL) 32117553Skarels return; /* status was set by a GTUNT */ 32217553Skarels if(0 == (mp = udgetcp(um))){ /* ditto */ 32317553Skarels printf("UDA can't get command packet\n"); 32417553Skarels return; 32517553Skarels } 32617553Skarels mp->mscp_opcode = M_OP_ONLIN; 32717553Skarels mp->mscp_unit = ui->ui_slave; 32817553Skarels mp->mscp_cmdref = (long) ui->ui_slave; 32917553Skarels #ifdef DEBUG 33017553Skarels printd("uda%d ONLIN slave %d\n",ui->ui_ctlr,ui->ui_slave); 33117553Skarels #endif 33217553Skarels *((long *) mp->mscp_dscptr ) |= UDA_OWN | UDA_INT; 33317553Skarels i = udaddr->udaip; 33426295Skarels #ifdef lint 33526295Skarels i = i; 33626295Skarels #endif 33717553Skarels while(ui->ui_flags == 0 && ra_info[ui->ui_unit].ratype != 0); 3384743Swnj } 3394743Swnj 3404743Swnj /* 3414743Swnj * Open a UDA. Initialize the device and 3424743Swnj * set the unit online. 3434743Swnj */ 34426295Skarels /* ARGSUSED */ 3454743Swnj udopen(dev, flag) 3464743Swnj dev_t dev; 3474743Swnj int flag; 3484743Swnj { 3494743Swnj register int unit; 3504743Swnj register struct uba_device *ui; 3514743Swnj register struct uda_softc *sc; 35217553Skarels register struct mscp *mp; 35317553Skarels register struct uba_ctlr *um; 35417553Skarels struct udadevice *udaddr; 35517553Skarels int s,i; 35617553Skarels 35724742Sbloom unit = udunit(dev); 35826372Skarels if (unit >= NRA || (ui = uddinfo[unit]) == 0 || ui->ui_alive == 0) 3598576Sroot return (ENXIO); 3604743Swnj sc = &uda_softc[ui->ui_ctlr]; 3615434Sroot s = spl5(); 3624743Swnj if (sc->sc_state != S_RUN) { 3634743Swnj if (sc->sc_state == S_IDLE) 36417553Skarels if(!udinit(ui->ui_ctlr)){ 36517553Skarels printf("uda: Controller failed to init\n"); 36625189Skarels (void) splx(s); 36717553Skarels return(ENXIO); 36817553Skarels } 3696187Ssam /* wait for initialization to complete */ 37017553Skarels timeout(wakeup,(caddr_t)ui->ui_mi,11*hz); /* to be sure*/ 3716187Ssam sleep((caddr_t)ui->ui_mi, 0); 3728576Sroot if (sc->sc_state != S_RUN) 37317553Skarels { 37417553Skarels (void) splx(s); /* added by Rich */ 3758576Sroot return (EIO); 37617553Skarels } 3774743Swnj } 37817553Skarels /* check to see if the device is really there. */ 37917553Skarels /* this code was taken from Fred Canters 11 driver */ 38017553Skarels um = ui->ui_mi; 38117553Skarels udaddr = (struct udadevice *) um->um_addr; 38217553Skarels (void) splx(s); 38317553Skarels if(ui->ui_flags == 0){ 38417553Skarels s = spl5(); 38517553Skarels while(0 ==(mp = udgetcp(um))){ 38617553Skarels uda_cp_wait++; 38726372Skarels sleep((caddr_t)&uda_cp_wait,PSWP+1); 38817553Skarels uda_cp_wait--; 38917553Skarels } 39017553Skarels mp->mscp_opcode = M_OP_ONLIN; 39117553Skarels mp->mscp_unit = ui->ui_slave; 39217553Skarels mp->mscp_cmdref = (long) & ra_info[ui->ui_unit].ratype; 39317553Skarels /* need to sleep on something */ 39417553Skarels #ifdef DEBUG 39517553Skarels printd("uda: bring unit %d online\n",ui->ui_unit); 39617553Skarels #endif 39717553Skarels *((long *) mp->mscp_dscptr ) |= UDA_OWN | UDA_INT ; 39817553Skarels i = udaddr->udaip; 39926295Skarels #ifdef lint 40026295Skarels i = i; 40126295Skarels #endif 40217553Skarels timeout(wakeup,(caddr_t) mp->mscp_cmdref,10 * hz); 40317553Skarels /* make sure we wake up */ 40417553Skarels sleep((caddr_t) mp->mscp_cmdref,PSWP+1); /*wakeup in udrsp() */ 40520851Skarels (void) splx(s); 40617553Skarels } 40717553Skarels if(ui->ui_flags == 0){ 40817553Skarels return(ENXIO); /* Didn't go online */ 40917553Skarels } 4108576Sroot return (0); 4114743Swnj } 4124743Swnj 4134743Swnj /* 4144743Swnj * Initialize a UDA. Set up UBA mapping registers, 4154743Swnj * initialize data structures, and start hardware 4164743Swnj * initialization sequence. 4174743Swnj */ 4184743Swnj udinit(d) 4194743Swnj int d; 4204743Swnj { 4214743Swnj register struct uda_softc *sc; 4224743Swnj register struct uda *ud; 4234743Swnj struct udadevice *udaddr; 4244743Swnj struct uba_ctlr *um; 4254743Swnj 4264743Swnj sc = &uda_softc[d]; 4274743Swnj um = udminfo[d]; 4284743Swnj um->um_tab.b_active++; 4294743Swnj ud = &uda[d]; 4304743Swnj udaddr = (struct udadevice *)um->um_addr; 4314743Swnj if (sc->sc_mapped == 0) { 4324743Swnj /* 4334743Swnj * Map the communications area and command 4344743Swnj * and response packets into Unibus address 4354743Swnj * space. 4364743Swnj */ 4374743Swnj sc->sc_ubainfo = uballoc(um->um_ubanum, (caddr_t)ud, 4384743Swnj sizeof (struct uda), 0); 4394743Swnj sc->sc_uda = (struct uda *)(sc->sc_ubainfo & 0x3ffff); 4404743Swnj sc->sc_mapped = 1; 4414743Swnj } 4424743Swnj 4434743Swnj /* 4444743Swnj * Start the hardware initialization sequence. 4454743Swnj */ 44617553Skarels 44717553Skarels udaddr->udaip = 0; /* start initialization */ 44817553Skarels 44917553Skarels while((udaddr->udasa & UDA_STEP1) == 0){ 45017553Skarels if(udaddr->udasa & UDA_ERR) 45117553Skarels return(0); /* CHECK */ 45217553Skarels } 45317553Skarels udaddr->udasa=UDA_ERR|(NCMDL2<<11)|(NRSPL2<<8)|UDA_IE|(sc->sc_ivec/4); 4544743Swnj /* 4554743Swnj * Initialization continues in interrupt routine. 4564743Swnj */ 4574743Swnj sc->sc_state = S_STEP1; 4584743Swnj sc->sc_credits = 0; 45917553Skarels return(1); 4604743Swnj } 4614743Swnj 4624743Swnj udstrategy(bp) 4634743Swnj register struct buf *bp; 4644743Swnj { 4654743Swnj register struct uba_device *ui; 4664743Swnj register struct uba_ctlr *um; 4674743Swnj register struct buf *dp; 4684743Swnj register int unit; 46917553Skarels register struct size *rasizes; 4704743Swnj int xunit = minor(bp->b_dev) & 07; 4714743Swnj daddr_t sz, maxsz; 4725434Sroot int s; 4734743Swnj 4744743Swnj sz = (bp->b_bcount+511) >> 9; 47524742Sbloom unit = udunit(bp->b_dev); 47626372Skarels if (unit >= NRA) { 47724742Sbloom bp->b_error = ENXIO; 4784743Swnj goto bad; 47924742Sbloom } 48017553Skarels rasizes = ra_info[unit].ra_sizes; 4814743Swnj ui = uddinfo[unit]; 4824743Swnj um = ui->ui_mi; 48324742Sbloom if (ui == 0 || ui->ui_alive == 0) { 48424742Sbloom bp->b_error = ENXIO; 4854743Swnj goto bad; 48624742Sbloom } 48717553Skarels if ((maxsz = rasizes[xunit].nblocks) < 0) 48817553Skarels maxsz = ra_info[unit].radsize - rasizes[xunit].blkoff; 4894743Swnj if (bp->b_blkno < 0 || bp->b_blkno+sz > maxsz || 49024742Sbloom rasizes[xunit].blkoff >= ra_info[unit].radsize) { 49124787Skarels if (bp->b_blkno == maxsz) { 49224787Skarels bp->b_resid = bp->b_bcount; 49324742Sbloom goto done; 49424787Skarels } 49524742Sbloom bp->b_error = EINVAL; 4964743Swnj goto bad; 49724742Sbloom } 4985434Sroot s = spl5(); 4994743Swnj /* 5004743Swnj * Link the buffer onto the drive queue 5014743Swnj */ 5024743Swnj dp = &udutab[ui->ui_unit]; 5034743Swnj if (dp->b_actf == 0) 5044743Swnj dp->b_actf = bp; 5054743Swnj else 5064743Swnj dp->b_actl->av_forw = bp; 5074743Swnj dp->b_actl = bp; 5084743Swnj bp->av_forw = 0; 5094743Swnj /* 5104743Swnj * Link the drive onto the controller queue 5114743Swnj */ 5124743Swnj if (dp->b_active == 0) { 5134743Swnj dp->b_forw = NULL; 5144743Swnj if (um->um_tab.b_actf == NULL) 5154743Swnj um->um_tab.b_actf = dp; 5164743Swnj else 5174743Swnj um->um_tab.b_actl->b_forw = dp; 5184743Swnj um->um_tab.b_actl = dp; 5194743Swnj dp->b_active = 1; 5204743Swnj } 5214743Swnj if (um->um_tab.b_active == 0) { 5224743Swnj #if defined(VAX750) 52312421Ssam if (cpu == VAX_750 52412421Ssam && udwtab[um->um_ctlr].av_forw == &udwtab[um->um_ctlr]) { 52517553Skarels if (um->um_ubinfo != 0) { 52617553Skarels printd("udastrat: ubinfo 0x%x\n",um->um_ubinfo); 52717553Skarels } else 5284743Swnj um->um_ubinfo = 52912421Ssam uballoc(um->um_ubanum, (caddr_t)0, 0, 5306187Ssam UBA_NEEDBDP); 5314743Swnj } 5324743Swnj #endif 5334743Swnj (void) udstart(um); 5344743Swnj } 5355434Sroot splx(s); 5364743Swnj return; 5374743Swnj 5384743Swnj bad: 5394743Swnj bp->b_flags |= B_ERROR; 54024742Sbloom done: 5414743Swnj iodone(bp); 5424743Swnj return; 5434743Swnj } 5444743Swnj 5454743Swnj udstart(um) 5464743Swnj register struct uba_ctlr *um; 5474743Swnj { 5484743Swnj register struct buf *bp, *dp; 5494743Swnj register struct mscp *mp; 5504743Swnj register struct uda_softc *sc; 5514743Swnj register struct uba_device *ui; 55217553Skarels struct size *rasizes; 5534743Swnj struct udadevice *udaddr; 55417553Skarels struct uda *ud = &uda[um->um_ctlr]; 5554743Swnj int i; 5564743Swnj 5574743Swnj sc = &uda_softc[um->um_ctlr]; 5584743Swnj 5594743Swnj loop: 5604743Swnj if ((dp = um->um_tab.b_actf) == NULL) { 5614743Swnj /* 5624743Swnj * Release uneeded UBA resources and return 5634743Swnj */ 5644743Swnj um->um_tab.b_active = 0; 56517553Skarels /* Check for response ring transitions lost in the 56617553Skarels * Race condition 56717553Skarels */ 56817553Skarels for (i = sc->sc_lastrsp;; i++) { 56917553Skarels i %= NRSP; 57017553Skarels if (ud->uda_ca.ca_rspdsc[i]&UDA_OWN) 57117553Skarels break; 57217553Skarels udrsp(um, ud, sc, i); 57317553Skarels ud->uda_ca.ca_rspdsc[i] |= UDA_OWN; 57417553Skarels } 57517553Skarels sc->sc_lastrsp = i; 5766187Ssam return (0); 5774743Swnj } 5784743Swnj if ((bp = dp->b_actf) == NULL) { 5794743Swnj /* 5804743Swnj * No more requests for this drive, remove 5814743Swnj * from controller queue and look at next drive. 5824743Swnj * We know we're at the head of the controller queue. 5834743Swnj */ 5844743Swnj dp->b_active = 0; 5854743Swnj um->um_tab.b_actf = dp->b_forw; 58617553Skarels goto loop; /* Need to check for loop */ 5874743Swnj } 5884743Swnj um->um_tab.b_active++; 5894743Swnj udaddr = (struct udadevice *)um->um_addr; 5904743Swnj if ((udaddr->udasa&UDA_ERR) || sc->sc_state != S_RUN) { 5914743Swnj harderr(bp, "ra"); 59217553Skarels mprintf("Uda%d udasa %o, state %d\n",um->um_ctlr , udaddr->udasa&0xffff, sc->sc_state); 59326372Skarels (void)udinit(um->um_ctlr); 5944743Swnj /* SHOULD REQUEUE OUTSTANDING REQUESTS, LIKE UDRESET */ 5956187Ssam return (0); 5964743Swnj } 59724742Sbloom ui = uddinfo[udunit(bp->b_dev)]; 59817553Skarels rasizes = ra_info[ui->ui_unit].ra_sizes; 59917553Skarels if (ui->ui_flags == 0) { /* not online */ 60017553Skarels if ((mp = udgetcp(um)) == NULL){ 60117553Skarels return (0); 60217553Skarels } 6034743Swnj mp->mscp_opcode = M_OP_ONLIN; 6044743Swnj mp->mscp_unit = ui->ui_slave; 6054743Swnj dp->b_active = 2; 60617553Skarels um->um_tab.b_actf = dp->b_forw; /* remove from controller q */ 60717553Skarels #ifdef DEBUG 6084743Swnj printd("uda: bring unit %d online\n", ui->ui_slave); 60917553Skarels #endif 6104743Swnj *((long *)mp->mscp_dscptr) |= UDA_OWN|UDA_INT; 61117553Skarels if (udaddr->udasa&UDA_ERR) 61217553Skarels printf("Uda (%d) Error (%x)\n",um->um_ctlr , udaddr->udasa&0xffff); 6134743Swnj i = udaddr->udaip; 6144743Swnj goto loop; 6154743Swnj } 6164743Swnj switch (cpu) { 61724186Sbloom case VAX_8600: 6184743Swnj case VAX_780: 6194743Swnj i = UBA_NEEDBDP|UBA_CANTWAIT; 6204743Swnj break; 6214743Swnj 6224743Swnj case VAX_750: 6234743Swnj i = um->um_ubinfo|UBA_HAVEBDP|UBA_CANTWAIT; 6244743Swnj break; 6254743Swnj 6266949Ssam case VAX_730: 627*27254Skridle case VAX_630: 6284743Swnj i = UBA_CANTWAIT; 6294743Swnj break; 6304743Swnj } 63124388Skarels if ((i = ubasetup(um->um_ubanum, bp, i)) == 0) 63224388Skarels return(1); 63317553Skarels if ((mp = udgetcp(um)) == NULL) { 63425653Skarels #if defined(VAX750) 63525653Skarels if (cpu == VAX_750) 63625653Skarels i &= 0xfffffff; /* mask off bdp */ 63725653Skarels #endif 63817553Skarels ubarelse(um->um_ubanum,&i); 63917553Skarels return(0); 64017553Skarels } 64117553Skarels mp->mscp_cmdref = (long)bp; /* pointer to get back */ 6424743Swnj mp->mscp_opcode = bp->b_flags&B_READ ? M_OP_READ : M_OP_WRITE; 6434743Swnj mp->mscp_unit = ui->ui_slave; 64417553Skarels mp->mscp_lbn = bp->b_blkno + rasizes[minor(bp->b_dev)&7].blkoff; 6454743Swnj mp->mscp_bytecnt = bp->b_bcount; 6464743Swnj mp->mscp_buffer = (i & 0x3ffff) | (((i>>28)&0xf)<<24); 6474743Swnj #if defined(VAX750) 6484743Swnj if (cpu == VAX_750) 64917553Skarels i &= 0xfffffff; /* mask off bdp */ 6504743Swnj #endif 65117553Skarels bp->b_ubinfo = i; /* save mapping info */ 6524743Swnj *((long *)mp->mscp_dscptr) |= UDA_OWN|UDA_INT; 65317553Skarels if (udaddr->udasa&UDA_ERR) 65417553Skarels printf("Uda(%d) udasa (%x)\n",um->um_ctlr , udaddr->udasa&0xffff); 65517553Skarels i = udaddr->udaip; /* initiate polling */ 65617553Skarels dp->b_qsize++; 6574743Swnj if (ui->ui_dk >= 0) { 6584743Swnj dk_busy |= 1<<ui->ui_dk; 6594743Swnj dk_xfer[ui->ui_dk]++; 6604743Swnj dk_wds[ui->ui_dk] += bp->b_bcount>>6; 6614743Swnj } 6624743Swnj 6634743Swnj /* 6644743Swnj * Move drive to the end of the controller queue 6654743Swnj */ 6664743Swnj if (dp->b_forw != NULL) { 6674743Swnj um->um_tab.b_actf = dp->b_forw; 6684743Swnj um->um_tab.b_actl->b_forw = dp; 6694743Swnj um->um_tab.b_actl = dp; 6704743Swnj dp->b_forw = NULL; 6714743Swnj } 6724743Swnj /* 6734743Swnj * Move buffer to I/O wait queue 6744743Swnj */ 6754743Swnj dp->b_actf = bp->av_forw; 6764743Swnj dp = &udwtab[um->um_ctlr]; 6774743Swnj bp->av_forw = dp; 6784743Swnj bp->av_back = dp->av_back; 6794743Swnj dp->av_back->av_forw = bp; 6804743Swnj dp->av_back = bp; 6814743Swnj goto loop; 6824743Swnj } 6834743Swnj 6844743Swnj /* 6854743Swnj * UDA interrupt routine. 6864743Swnj */ 6874743Swnj udintr(d) 6884743Swnj int d; 6894743Swnj { 6904743Swnj register struct uba_ctlr *um = udminfo[d]; 6914743Swnj register struct udadevice *udaddr = (struct udadevice *)um->um_addr; 6924743Swnj struct buf *bp; 6934743Swnj register int i; 6944743Swnj register struct uda_softc *sc = &uda_softc[d]; 6954743Swnj register struct uda *ud = &uda[d]; 6964743Swnj struct uda *uud; 6974743Swnj struct mscp *mp; 6984743Swnj 69917553Skarels #ifdef DEBUG 70017553Skarels printd10("udintr: state %d, udasa %o\n", sc->sc_state, udaddr->udasa); 70117553Skarels #endif 702*27254Skridle #ifdef VAX630 703*27254Skridle (void) spl5(); 704*27254Skridle #endif 7054743Swnj switch (sc->sc_state) { 7064743Swnj case S_IDLE: 7074743Swnj printf("uda%d: random interrupt ignored\n", d); 7084743Swnj return; 7094743Swnj 7104743Swnj case S_STEP1: 71117553Skarels #define STEP1MASK 0174377 71217553Skarels #define STEP1GOOD (UDA_STEP2|UDA_IE|(NCMDL2<<3)|NRSPL2) 7136964Ssam if ((udaddr->udasa&STEP1MASK) != STEP1GOOD) { 7144743Swnj sc->sc_state = S_IDLE; 7156187Ssam wakeup((caddr_t)um); 7164743Swnj return; 7174743Swnj } 7184743Swnj udaddr->udasa = ((int)&sc->sc_uda->uda_ca.ca_ringbase)| 71924186Sbloom ((cpu == VAX_780) || (cpu == VAX_8600) ? UDA_PI : 0); 7204743Swnj sc->sc_state = S_STEP2; 7214743Swnj return; 7224743Swnj 7234743Swnj case S_STEP2: 72417553Skarels #define STEP2MASK 0174377 72517553Skarels #define STEP2GOOD (UDA_STEP3|UDA_IE|(sc->sc_ivec/4)) 7266964Ssam if ((udaddr->udasa&STEP2MASK) != STEP2GOOD) { 7274743Swnj sc->sc_state = S_IDLE; 7286187Ssam wakeup((caddr_t)um); 7294743Swnj return; 7304743Swnj } 7314743Swnj udaddr->udasa = ((int)&sc->sc_uda->uda_ca.ca_ringbase)>>16; 7324743Swnj sc->sc_state = S_STEP3; 7334743Swnj return; 7344743Swnj 7354743Swnj case S_STEP3: 73617553Skarels #define STEP3MASK 0174000 73717553Skarels #define STEP3GOOD UDA_STEP4 7386964Ssam if ((udaddr->udasa&STEP3MASK) != STEP3GOOD) { 7394743Swnj sc->sc_state = S_IDLE; 7406187Ssam wakeup((caddr_t)um); 7414743Swnj return; 7424743Swnj } 74317553Skarels udamicro[d] = udaddr->udasa; 74417553Skarels #ifdef DEBUG 74517553Skarels printd("Uda%d Version %d model %d\n",d,udamicro[d]&0xF, 74617553Skarels (udamicro[d]>>4) & 0xF); 74725901Skarels #endif 74817553Skarels /* 74917553Skarels * Requesting the error status (|= 2) 75017553Skarels * may hang older controllers. 75117553Skarels */ 75226014Skarels i = UDA_GO | (udaerror? 2 : 0); 75326014Skarels if (udaburst[d]) 75426014Skarels i |= (udaburst[d] - 1) << 2; 75526014Skarels udaddr->udasa = i; 7564743Swnj udaddr->udasa = UDA_GO; 7574743Swnj sc->sc_state = S_SCHAR; 7584743Swnj 7594743Swnj /* 7604743Swnj * Initialize the data structures. 7614743Swnj */ 7624743Swnj uud = sc->sc_uda; 7634743Swnj for (i = 0; i < NRSP; i++) { 7644743Swnj ud->uda_ca.ca_rspdsc[i] = UDA_OWN|UDA_INT| 7654743Swnj (long)&uud->uda_rsp[i].mscp_cmdref; 7664743Swnj ud->uda_rsp[i].mscp_dscptr = &ud->uda_ca.ca_rspdsc[i]; 76717553Skarels ud->uda_rsp[i].mscp_header.uda_msglen = mscp_msglen; 7684743Swnj } 7694743Swnj for (i = 0; i < NCMD; i++) { 7704743Swnj ud->uda_ca.ca_cmddsc[i] = UDA_INT| 7714743Swnj (long)&uud->uda_cmd[i].mscp_cmdref; 7724743Swnj ud->uda_cmd[i].mscp_dscptr = &ud->uda_ca.ca_cmddsc[i]; 77317553Skarels ud->uda_cmd[i].mscp_header.uda_msglen = mscp_msglen; 7744743Swnj } 7754743Swnj bp = &udwtab[d]; 7764743Swnj bp->av_forw = bp->av_back = bp; 77717553Skarels sc->sc_lastcmd = 1; 7784743Swnj sc->sc_lastrsp = 0; 77917553Skarels mp = &uda[um->um_ctlr].uda_cmd[0]; 78017553Skarels mp->mscp_unit = mp->mscp_modifier = 0; 78117553Skarels mp->mscp_flags = 0; 78217553Skarels mp->mscp_bytecnt = mp->mscp_buffer = 0; 78317553Skarels mp->mscp_errlgfl = mp->mscp_copyspd = 0; 7844743Swnj mp->mscp_opcode = M_OP_STCON; 7854743Swnj mp->mscp_cntflgs = M_CF_ATTN|M_CF_MISC|M_CF_THIS; 7864743Swnj *((long *)mp->mscp_dscptr) |= UDA_OWN|UDA_INT; 78717553Skarels i = udaddr->udaip; /* initiate polling */ 7884743Swnj return; 7894743Swnj 7904743Swnj case S_SCHAR: 7914743Swnj case S_RUN: 7924743Swnj break; 7934743Swnj 7944743Swnj default: 7954743Swnj printf("uda%d: interrupt in unknown state %d ignored\n", 7964743Swnj d, sc->sc_state); 7974743Swnj return; 7984743Swnj } 7994743Swnj 8004743Swnj if (udaddr->udasa&UDA_ERR) { 80117553Skarels printf("uda(%d): fatal error (%o)\n", d, udaddr->udasa&0xffff); 8024743Swnj udaddr->udaip = 0; 8036187Ssam wakeup((caddr_t)um); 8044743Swnj } 8054743Swnj 8064743Swnj /* 8074743Swnj * Check for a buffer purge request. 8084743Swnj */ 8094743Swnj if (ud->uda_ca.ca_bdp) { 81017553Skarels #ifdef DEBUG 8114743Swnj printd("uda: purge bdp %d\n", ud->uda_ca.ca_bdp); 81217553Skarels #endif 81326372Skarels UBAPURGE(um->um_hd->uh_uba, ud->uda_ca.ca_bdp); 8144743Swnj ud->uda_ca.ca_bdp = 0; 81517553Skarels udaddr->udasa = 0; /* signal purge complete */ 8164743Swnj } 8174743Swnj 8184743Swnj /* 8194743Swnj * Check for response ring transition. 8204743Swnj */ 8214743Swnj if (ud->uda_ca.ca_rspint) { 8224743Swnj ud->uda_ca.ca_rspint = 0; 8234743Swnj for (i = sc->sc_lastrsp;; i++) { 8244743Swnj i %= NRSP; 8254743Swnj if (ud->uda_ca.ca_rspdsc[i]&UDA_OWN) 8264743Swnj break; 8274743Swnj udrsp(um, ud, sc, i); 8284743Swnj ud->uda_ca.ca_rspdsc[i] |= UDA_OWN; 8294743Swnj } 8304743Swnj sc->sc_lastrsp = i; 8314743Swnj } 8324743Swnj 8334743Swnj /* 8344743Swnj * Check for command ring transition. 8354743Swnj */ 8364743Swnj if (ud->uda_ca.ca_cmdint) { 83717553Skarels #ifdef DEBUG 8384743Swnj printd("uda: command ring transition\n"); 83917553Skarels #endif 8404743Swnj ud->uda_ca.ca_cmdint = 0; 8414743Swnj } 84217553Skarels if(uda_cp_wait) 84326372Skarels wakeup((caddr_t)&uda_cp_wait); 8446187Ssam (void) udstart(um); 8454743Swnj } 8464743Swnj 8474743Swnj /* 8484743Swnj * Process a response packet 8494743Swnj */ 8504743Swnj udrsp(um, ud, sc, i) 8514743Swnj register struct uba_ctlr *um; 8524743Swnj register struct uda *ud; 8534743Swnj register struct uda_softc *sc; 8544743Swnj int i; 8554743Swnj { 8564743Swnj register struct mscp *mp; 8574743Swnj struct uba_device *ui; 85817553Skarels struct buf *dp, *bp,nullbp; 8594743Swnj int st; 8604743Swnj 8614743Swnj mp = &ud->uda_rsp[i]; 86217553Skarels mp->mscp_header.uda_msglen = mscp_msglen; 86317553Skarels sc->sc_credits += mp->mscp_header.uda_credits & 0xf; /* just 4 bits?*/ 86417553Skarels if ((mp->mscp_header.uda_credits & 0xf0) > 0x10) /* Check */ 8654743Swnj return; 86617553Skarels #ifdef DEBUG 86717553Skarels printd10("udarsp, opcode 0x%x status 0x%x\n",mp->mscp_opcode,mp->mscp_status); 86817553Skarels #endif 8694743Swnj /* 8704743Swnj * If it's an error log message (datagram), 8714743Swnj * pass it on for more extensive processing. 8724743Swnj */ 87317553Skarels if ((mp->mscp_header.uda_credits & 0xf0) == 0x10) { /* check */ 8744743Swnj uderror(um, (struct mslg *)mp); 8754743Swnj return; 8764743Swnj } 8774743Swnj st = mp->mscp_status&M_ST_MASK; 87817553Skarels /* The controller interrupts as drive 0 */ 87917553Skarels /* this means that you must check for controller interrupts */ 88017553Skarels /* before you check to see if there is a drive 0 */ 88117553Skarels if((M_OP_STCON|M_OP_END) == mp->mscp_opcode){ 8824743Swnj if (st == M_ST_SUCC) 8834743Swnj sc->sc_state = S_RUN; 8844743Swnj else 8854743Swnj sc->sc_state = S_IDLE; 8864743Swnj um->um_tab.b_active = 0; 8876187Ssam wakeup((caddr_t)um); 88817553Skarels return; 88917553Skarels } 89017553Skarels if (mp->mscp_unit >= 8) 89117553Skarels return; 89217553Skarels if ((ui = udip[um->um_ctlr][mp->mscp_unit]) == 0) 89317553Skarels return; 89417553Skarels switch (mp->mscp_opcode) { 8954743Swnj 8964743Swnj case M_OP_ONLIN|M_OP_END: 89717553Skarels ra_info[ui->ui_unit].rastatus = st; 89817553Skarels ra_info[ui->ui_unit].ratype = mp->mscp_mediaid; 8994743Swnj dp = &udutab[ui->ui_unit]; 9004743Swnj if (st == M_ST_SUCC) { 90117553Skarels /* 90217553Skarels * Link the drive onto the controller queue 90317553Skarels */ 90417553Skarels dp->b_forw = NULL; 90517553Skarels if (um->um_tab.b_actf == NULL) 90617553Skarels um->um_tab.b_actf = dp; 90717553Skarels else 90817553Skarels um->um_tab.b_actl->b_forw = dp; 90917553Skarels um->um_tab.b_actl = dp; 91017553Skarels ui->ui_flags = 1; /* mark it online */ 91117553Skarels ra_info[ui->ui_unit].radsize=(daddr_t)mp->mscp_untsize; 91217553Skarels #ifdef DEBUG 9134743Swnj printd("uda: unit %d online\n", mp->mscp_unit); 91417553Skarels #endif 91517553Skarels #define F_to_C(x,i) ( ((x)->mscp_mediaid) >> (i*5+7) & 0x1f ? ( ( (((x)->mscp_mediaid) >>( i*5 + 7)) & 0x1f) + 'A' - 1): ' ') 91617553Skarels /* this mess decodes the Media type identifier */ 91717553Skarels #ifdef DEBUG 91817553Skarels printd("uda: unit %d online %x %c%c %c%c%c%d\n" 91917553Skarels ,mp->mscp_unit, mp->mscp_mediaid 92017553Skarels ,F_to_C(mp,4),F_to_C(mp,3),F_to_C(mp,2) 92117553Skarels ,F_to_C(mp,1),F_to_C(mp,0) 92217553Skarels ,mp->mscp_mediaid & 0x7f); 92317553Skarels #endif 92426295Skarels switch((int)(mp->mscp_mediaid & 0x7f)){ 92517553Skarels case 25: 92617553Skarels ra_info[ui->ui_unit].ra_sizes = ra25_sizes; 92717553Skarels break; 928*27254Skridle case 53: 929*27254Skridle ra_info[ui->ui_unit].ra_sizes = ra53_sizes; 930*27254Skridle break; 93117553Skarels case 60: 93217553Skarels ra_info[ui->ui_unit].ra_sizes = ra60_sizes; 93317553Skarels break; 93417553Skarels case 80: 93517553Skarels ra_info[ui->ui_unit].ra_sizes = ra80_sizes; 93617553Skarels break; 93717553Skarels case 81: 93817553Skarels ra_info[ui->ui_unit].ra_sizes = ra81_sizes; 93917553Skarels break; 94017553Skarels default: 94117553Skarels ui->ui_flags = 0; /* mark it offline */ 94217553Skarels ra_info[ui->ui_unit].ratype = 0; 94317553Skarels printf("Don't have a parition table for "); 94417553Skarels printf("a %c%c %c%c%c%d\n" 94517553Skarels ,F_to_C(mp,4),F_to_C(mp,3),F_to_C(mp,2) 94617553Skarels ,F_to_C(mp,1),F_to_C(mp,0) 94717553Skarels ,mp->mscp_mediaid & 0x7f); 94817553Skarels while (bp = dp->b_actf) { 94917553Skarels dp->b_actf = bp->av_forw; 95017553Skarels bp->b_flags |= B_ERROR; 95117553Skarels iodone(bp); 95217553Skarels } 95317553Skarels } 95417553Skarels dp->b_active = 1; 9554743Swnj } else { 95617553Skarels if(dp->b_actf){ 95717553Skarels harderr(dp->b_actf,"ra"); 95817553Skarels } else { 95917553Skarels nullbp.b_blkno = 0; 96017553Skarels nullbp.b_dev = makedev(UDADEVNUM,ui->ui_unit); 96117553Skarels harderr(&nullbp, "ra"); 96217553Skarels } 9634743Swnj printf("OFFLINE\n"); 9644743Swnj while (bp = dp->b_actf) { 9654743Swnj dp->b_actf = bp->av_forw; 9664743Swnj bp->b_flags |= B_ERROR; 9674743Swnj iodone(bp); 9684743Swnj } 9694743Swnj } 97017553Skarels if(mp->mscp_cmdref!=NULL){/* Seems to get lost sometimes */ 97126372Skarels wakeup((caddr_t)mp->mscp_cmdref); 97217553Skarels } 9734743Swnj break; 9744743Swnj 97517553Skarels /* 97617553Skarels * The AVAILABLE ATTENTION messages occurs when the 97717553Skarels * unit becomes available after spinup, 97817553Skarels * marking the unit offline will force an online command 97917553Skarels * prior to using the unit. 98017553Skarels */ 9814743Swnj case M_OP_AVATN: 98217553Skarels #ifdef DEBUG 9834743Swnj printd("uda: unit %d attention\n", mp->mscp_unit); 98417553Skarels #endif 98517553Skarels ui->ui_flags = 0; /* it went offline and we didn't notice */ 98617553Skarels ra_info[ui->ui_unit].ratype = mp->mscp_mediaid; 9874743Swnj break; 9884743Swnj 98917553Skarels case M_OP_END: 99017553Skarels /* 99117553Skarels * An endcode without an opcode (0200) is an invalid command. 99217553Skarels * The mscp specification states that this would be a protocol 99317553Skarels * type error, such as illegal opcodes. The mscp spec. also 99417553Skarels * states that parameter error type of invalid commands should 99517553Skarels * return the normal end message for the command. This does not appear 99617553Skarels * to be the case. An invalid logical block number returned an endcode 99717553Skarels * of 0200 instead of the 0241 (read) that was expected. 99817553Skarels */ 99917553Skarels 100017553Skarels printf("endcd=%o, stat=%o\n", mp->mscp_opcode, mp->mscp_status); 100117553Skarels break; 10024743Swnj case M_OP_READ|M_OP_END: 10034743Swnj case M_OP_WRITE|M_OP_END: 10044743Swnj bp = (struct buf *)mp->mscp_cmdref; 10056964Ssam ubarelse(um->um_ubanum, (int *)&bp->b_ubinfo); 10064743Swnj /* 10074743Swnj * Unlink buffer from I/O wait queue. 10084743Swnj */ 10094743Swnj bp->av_back->av_forw = bp->av_forw; 10104743Swnj bp->av_forw->av_back = bp->av_back; 101112421Ssam #if defined(VAX750) 101225653Skarels if (cpu == VAX_750 && um->um_tab.b_active == 0 101312421Ssam && udwtab[um->um_ctlr].av_forw == &udwtab[um->um_ctlr]) { 101412421Ssam if (um->um_ubinfo == 0) 101512421Ssam printf("udintr: um_ubinfo == 0\n"); 101612421Ssam else 101712421Ssam ubarelse(um->um_ubanum, &um->um_ubinfo); 101812421Ssam } 101912421Ssam #endif 10204743Swnj dp = &udutab[ui->ui_unit]; 102117553Skarels dp->b_qsize--; 10224743Swnj if (ui->ui_dk >= 0) 102317553Skarels if (dp->b_qsize == 0) 10244743Swnj dk_busy &= ~(1<<ui->ui_dk); 10254743Swnj if (st == M_ST_OFFLN || st == M_ST_AVLBL) { 102617553Skarels ui->ui_flags = 0; /* mark unit offline */ 10274743Swnj /* 10284743Swnj * Link the buffer onto the front of the drive queue 10294743Swnj */ 10304743Swnj if ((bp->av_forw = dp->b_actf) == 0) 10314743Swnj dp->b_actl = bp; 10324743Swnj dp->b_actf = bp; 10334743Swnj /* 10344743Swnj * Link the drive onto the controller queue 10354743Swnj */ 10364743Swnj if (dp->b_active == 0) { 10374743Swnj dp->b_forw = NULL; 10384743Swnj if (um->um_tab.b_actf == NULL) 10394743Swnj um->um_tab.b_actf = dp; 10404743Swnj else 10414743Swnj um->um_tab.b_actl->b_forw = dp; 10424743Swnj um->um_tab.b_actl = dp; 10434743Swnj dp->b_active = 1; 10444743Swnj } 104512421Ssam #if defined(VAX750) 104612421Ssam if (cpu == VAX750 && um->um_ubinfo == 0) 104712421Ssam um->um_ubinfo = 104812421Ssam uballoc(um->um_ubanum, (caddr_t)0, 0, 104912421Ssam UBA_NEEDBDP); 105012421Ssam #endif 10514743Swnj return; 10524743Swnj } 10534743Swnj if (st != M_ST_SUCC) { 10544743Swnj harderr(bp, "ra"); 105517553Skarels #ifdef DEBUG 105617553Skarels printd("status %o\n", mp->mscp_status); 105717553Skarels #endif 10584743Swnj bp->b_flags |= B_ERROR; 10594743Swnj } 10604743Swnj bp->b_resid = bp->b_bcount - mp->mscp_bytecnt; 10614743Swnj iodone(bp); 10624743Swnj break; 10634743Swnj 10644743Swnj case M_OP_GTUNT|M_OP_END: 106517553Skarels #ifdef DEBUG 106617553Skarels printd("GTUNT end packet status = 0x%x media id 0x%x\n" 106717553Skarels ,st,mp->mscp_mediaid); 106817553Skarels #endif 106917553Skarels ra_info[ui->ui_unit].rastatus = st; 107017553Skarels ra_info[ui->ui_unit].ratype = mp->mscp_mediaid; 10714743Swnj break; 10724743Swnj 10734743Swnj default: 10744743Swnj printf("uda: unknown packet\n"); 107517553Skarels uderror(um, (struct mslg *)mp); 10764743Swnj } 10774743Swnj } 10784743Swnj 10794743Swnj 10804743Swnj /* 10814743Swnj * Process an error log message 10824743Swnj * 10834743Swnj * For now, just log the error on the console. 10844743Swnj * Only minimal decoding is done, only "useful" 10854743Swnj * information is printed. Eventually should 10864743Swnj * send message to an error logger. 10874743Swnj */ 10884743Swnj uderror(um, mp) 10894743Swnj register struct uba_ctlr *um; 10904743Swnj register struct mslg *mp; 10914743Swnj { 109217553Skarels register i; 109317553Skarels 109417553Skarels 109517553Skarels if(!(mp->mslg_flags & (M_LF_SUCC | M_LF_CONT))) 109617553Skarels printf("uda%d: hard error\n"); 109717553Skarels 109817553Skarels mprintf("uda%d: %s error, ", um->um_ctlr, 109917553Skarels mp->mslg_flags & ( M_LF_SUCC | M_LF_CONT ) ? "soft" : "hard"); 11004743Swnj switch (mp->mslg_format) { 11014743Swnj case M_FM_CNTERR: 110217553Skarels mprintf("controller error, event 0%o\n", mp->mslg_event); 11034743Swnj break; 11044743Swnj 11054743Swnj case M_FM_BUSADDR: 110617553Skarels mprintf("host memory access error, event 0%o, addr 0%o\n", 11079174Ssam mp->mslg_event, mp->mslg_busaddr); 11084743Swnj break; 11094743Swnj 11104743Swnj case M_FM_DISKTRN: 111117553Skarels mprintf("disk transfer error, unit %d, grp 0x%x, hdr 0x%x, event 0%o\n", 111217553Skarels mp->mslg_unit, mp->mslg_group, mp->mslg_hdr, 111317553Skarels mp->mslg_event); 11144743Swnj break; 11154743Swnj 11164743Swnj case M_FM_SDI: 111717553Skarels mprintf("SDI error, unit %d, event 0%o, hdr 0x%x\n", 111812421Ssam mp->mslg_unit, mp->mslg_event, mp->mslg_hdr); 111917553Skarels for(i = 0; i < 12;i++) 112017553Skarels mprintf("\t0x%x",mp->mslg_sdistat[i] & 0xff); 112117553Skarels mprintf("\n"); 11224743Swnj break; 11234743Swnj 11244743Swnj case M_FM_SMLDSK: 112517553Skarels mprintf("small disk error, unit %d, event 0%o, cyl %d\n", 11264743Swnj mp->mslg_unit, mp->mslg_event, mp->mslg_sdecyl); 11274743Swnj break; 11284743Swnj 11294743Swnj default: 113017553Skarels mprintf("unknown error, unit %d, format 0%o, event 0%o\n", 11314743Swnj mp->mslg_unit, mp->mslg_format, mp->mslg_event); 11324743Swnj } 11336964Ssam 11346964Ssam if (udaerror) { 11356964Ssam register long *p = (long *)mp; 11366964Ssam 11376964Ssam for (i = 0; i < mp->mslg_header.uda_msglen; i += sizeof(*p)) 11386964Ssam printf("%x ", *p++); 11396964Ssam printf("\n"); 11406964Ssam } 11414743Swnj } 11424743Swnj 11434743Swnj 11444743Swnj /* 11454743Swnj * Find an unused command packet 11464743Swnj */ 11474743Swnj struct mscp * 11484743Swnj udgetcp(um) 11494743Swnj struct uba_ctlr *um; 11504743Swnj { 11514743Swnj register struct mscp *mp; 11524743Swnj register struct udaca *cp; 11534743Swnj register struct uda_softc *sc; 11544743Swnj register int i; 115517553Skarels int s; 11564743Swnj 115717553Skarels s = spl5(); 11584743Swnj cp = &uda[um->um_ctlr].uda_ca; 11594743Swnj sc = &uda_softc[um->um_ctlr]; 116017553Skarels /* 116117553Skarels * If no credits, can't issue any commands 116217553Skarels * until some outstanding commands complete. 116317553Skarels */ 11644743Swnj i = sc->sc_lastcmd; 116517553Skarels if(((cp->ca_cmddsc[i]&(UDA_OWN|UDA_INT))==UDA_INT)&& 116617553Skarels (sc->sc_credits >= 2)) { 116717553Skarels sc->sc_credits--; /* committed to issuing a command */ 11684743Swnj cp->ca_cmddsc[i] &= ~UDA_INT; 11694743Swnj mp = &uda[um->um_ctlr].uda_cmd[i]; 11704743Swnj mp->mscp_unit = mp->mscp_modifier = 0; 11714743Swnj mp->mscp_opcode = mp->mscp_flags = 0; 11724743Swnj mp->mscp_bytecnt = mp->mscp_buffer = 0; 11734743Swnj mp->mscp_errlgfl = mp->mscp_copyspd = 0; 11744743Swnj sc->sc_lastcmd = (i + 1) % NCMD; 117517553Skarels (void) splx(s); 11764743Swnj return(mp); 11774743Swnj } 117817553Skarels (void) splx(s); 11794743Swnj return(NULL); 11804743Swnj } 11814743Swnj 11827734Sroot udread(dev, uio) 11834743Swnj dev_t dev; 11847734Sroot struct uio *uio; 11854743Swnj { 118624742Sbloom register int unit = udunit(dev); 11874743Swnj 118826372Skarels if (unit >= NRA) 11898165Sroot return (ENXIO); 11908165Sroot return (physio(udstrategy, &rudbuf[unit], dev, B_READ, minphys, uio)); 11914743Swnj } 11924743Swnj 11937845Sroot udwrite(dev, uio) 11944743Swnj dev_t dev; 11957845Sroot struct uio *uio; 11964743Swnj { 119724742Sbloom register int unit = udunit(dev); 11984743Swnj 119926372Skarels if (unit >= NRA) 12008165Sroot return (ENXIO); 12018165Sroot return (physio(udstrategy, &rudbuf[unit], dev, B_WRITE, minphys, uio)); 12024743Swnj } 12034743Swnj 12044743Swnj udreset(uban) 12054743Swnj int uban; 12064743Swnj { 12074743Swnj register struct uba_ctlr *um; 12084743Swnj register struct uba_device *ui; 12094743Swnj register struct buf *bp, *dp; 12104743Swnj register int unit; 12114743Swnj struct buf *nbp; 12124743Swnj int d; 12134743Swnj 12144743Swnj for (d = 0; d < NUDA; d++) { 12154743Swnj if ((um = udminfo[d]) == 0 || um->um_ubanum != uban || 12164743Swnj um->um_alive == 0) 12174743Swnj continue; 12184743Swnj printf(" uda%d", d); 12194743Swnj um->um_tab.b_active = 0; 12204743Swnj um->um_tab.b_actf = um->um_tab.b_actl = 0; 12214743Swnj uda_softc[d].sc_state = S_IDLE; 122217553Skarels uda_softc[d].sc_mapped = 0; /* Rich */ 122326372Skarels for (unit = 0; unit < NRA; unit++) { 12244743Swnj if ((ui = uddinfo[unit]) == 0) 12254743Swnj continue; 12264743Swnj if (ui->ui_alive == 0 || ui->ui_mi != um) 12274743Swnj continue; 12284743Swnj udutab[unit].b_active = 0; 12294743Swnj udutab[unit].b_qsize = 0; 12304743Swnj } 12314743Swnj for (bp = udwtab[d].av_forw; bp != &udwtab[d]; bp = nbp) { 12324743Swnj nbp = bp->av_forw; 12338576Sroot bp->b_ubinfo = 0; 12344743Swnj /* 12354743Swnj * Link the buffer onto the drive queue 12364743Swnj */ 123724742Sbloom dp = &udutab[udunit(bp->b_dev)]; 12384743Swnj if (dp->b_actf == 0) 12394743Swnj dp->b_actf = bp; 12404743Swnj else 12414743Swnj dp->b_actl->av_forw = bp; 12424743Swnj dp->b_actl = bp; 12434743Swnj bp->av_forw = 0; 12444743Swnj /* 12454743Swnj * Link the drive onto the controller queue 12464743Swnj */ 12474743Swnj if (dp->b_active == 0) { 12484743Swnj dp->b_forw = NULL; 12494743Swnj if (um->um_tab.b_actf == NULL) 12504743Swnj um->um_tab.b_actf = dp; 12514743Swnj else 12524743Swnj um->um_tab.b_actl->b_forw = dp; 12534743Swnj um->um_tab.b_actl = dp; 12544743Swnj dp->b_active = 1; 12554743Swnj } 12564743Swnj } 125726372Skarels (void)udinit(d); 12584743Swnj } 12594743Swnj } 12604743Swnj 126117553Skarels #define DBSIZE 32 126217553Skarels 126317553Skarels #define ca_Rspdsc ca_rspdsc[0] 126417553Skarels #define ca_Cmddsc ca_rspdsc[1] 126517553Skarels #define uda_Rsp uda_rsp[0] 126617553Skarels #define uda_Cmd uda_cmd[0] 126717553Skarels 126817553Skarels struct uda udad[NUDA]; 126917553Skarels 127017553Skarels uddump(dev) 127117553Skarels dev_t dev; 12724743Swnj { 127317553Skarels struct udadevice *udaddr; 127417553Skarels struct uda *ud_ubaddr; 127517553Skarels char *start; 127617553Skarels int num, blk, unit; 127717553Skarels int maxsz; 127817553Skarels int blkoff; 127917553Skarels register struct uba_regs *uba; 128017553Skarels register struct uba_device *ui; 128117553Skarels register struct uda *udp; 128217553Skarels register struct pte *io; 128317553Skarels register int i; 128417553Skarels struct size *rasizes; 128524742Sbloom unit = udunit(dev); 128626372Skarels if (unit >= NRA) 128717553Skarels return (ENXIO); 128817553Skarels #define phys(cast, addr) ((cast)((int)addr & 0x7fffffff)) 128917553Skarels ui = phys(struct uba_device *, uddinfo[unit]); 129017553Skarels if (ui->ui_alive == 0) 129117553Skarels return (ENXIO); 129217553Skarels uba = phys(struct uba_hd *, ui->ui_hd)->uh_physuba; 129317553Skarels ubainit(uba); 129417553Skarels udaddr = (struct udadevice *)ui->ui_physaddr; 129517553Skarels DELAY(2000000); 129617553Skarels udp = phys(struct uda *, &udad[ui->ui_ctlr]); 129717553Skarels 129817553Skarels num = btoc(sizeof(struct uda)) + 1; 129917553Skarels io = &uba->uba_map[NUBMREG-num]; 130017553Skarels for(i = 0; i<num; i++) 130117553Skarels *(int *)io++ = UBAMR_MRV|(btop(udp)+i); 130217553Skarels ud_ubaddr = (struct uda *)(((int)udp & PGOFSET)|((NUBMREG-num)<<9)); 130317553Skarels 130417553Skarels udaddr->udaip = 0; 130517553Skarels while ((udaddr->udasa & UDA_STEP1) == 0) 130617553Skarels if(udaddr->udasa & UDA_ERR) return(EFAULT); 130717553Skarels udaddr->udasa = UDA_ERR; 130817553Skarels while ((udaddr->udasa & UDA_STEP2) == 0) 130917553Skarels if(udaddr->udasa & UDA_ERR) return(EFAULT); 131017553Skarels udaddr->udasa = (short)&ud_ubaddr->uda_ca.ca_ringbase; 131117553Skarels while ((udaddr->udasa & UDA_STEP3) == 0) 131217553Skarels if(udaddr->udasa & UDA_ERR) return(EFAULT); 131317553Skarels udaddr->udasa = (short)(((int)&ud_ubaddr->uda_ca.ca_ringbase) >> 16); 131417553Skarels while ((udaddr->udasa & UDA_STEP4) == 0) 131517553Skarels if(udaddr->udasa & UDA_ERR) return(EFAULT); 131617553Skarels udaddr->udasa = UDA_GO; 131717553Skarels udp->uda_ca.ca_Rspdsc = (long)&ud_ubaddr->uda_Rsp.mscp_cmdref; 131817553Skarels udp->uda_ca.ca_Cmddsc = (long)&ud_ubaddr->uda_Cmd.mscp_cmdref; 131917553Skarels udp->uda_Cmd.mscp_cntflgs = 0; 132017553Skarels udp->uda_Cmd.mscp_version = 0; 132117553Skarels if (udcmd(M_OP_STCON, udp, udaddr) == 0) { 132217553Skarels return(EFAULT); 132317553Skarels } 132417553Skarels udp->uda_Cmd.mscp_unit = ui->ui_slave; 132517553Skarels if (udcmd(M_OP_ONLIN, udp, udaddr) == 0) { 132617553Skarels return(EFAULT); 132717553Skarels } 132817553Skarels 132917553Skarels num = maxfree; 133017553Skarels start = 0; 133117553Skarels rasizes = ra_info[ui->ui_unit].ra_sizes; 133217553Skarels maxsz = rasizes[minor(dev)&07].nblocks; 133317553Skarels blkoff = rasizes[minor(dev)&07].blkoff; 133417553Skarels if(maxsz < 0) 133517553Skarels maxsz = ra_info[unit].radsize-blkoff; 133624212Sbloom if (dumplo < 0) 133717553Skarels return (EINVAL); 133824212Sbloom if (dumplo + num >= maxsz) 133924212Sbloom num = maxsz - dumplo; 134017553Skarels blkoff += dumplo; 134117553Skarels while (num > 0) { 134217553Skarels blk = num > DBSIZE ? DBSIZE : num; 134317553Skarels io = uba->uba_map; 134417553Skarels for (i = 0; i < blk; i++) 134517553Skarels *(int *)io++ = (btop(start)+i) | UBAMR_MRV; 134617553Skarels *(int *)io = 0; 134717553Skarels udp->uda_Cmd.mscp_lbn = btop(start) + blkoff; 134817553Skarels udp->uda_Cmd.mscp_unit = ui->ui_slave; 134917553Skarels udp->uda_Cmd.mscp_bytecnt = blk*NBPG; 135017553Skarels udp->uda_Cmd.mscp_buffer = 0; 135117553Skarels if (udcmd(M_OP_WRITE, udp, udaddr) == 0) { 135217553Skarels return(EIO); 135317553Skarels } 135417553Skarels start += blk*NBPG; 135517553Skarels num -= blk; 135617553Skarels } 135717553Skarels return (0); 13584743Swnj } 135917553Skarels 136017553Skarels 136117553Skarels udcmd(op, udp, udaddr) 136217553Skarels int op; 136317553Skarels register struct uda *udp; 136417553Skarels struct udadevice *udaddr; 136517553Skarels { 136617553Skarels int i; 136717553Skarels 136817553Skarels udp->uda_Cmd.mscp_opcode = op; 136917553Skarels udp->uda_Rsp.mscp_header.uda_msglen = mscp_msglen; 137017553Skarels udp->uda_Cmd.mscp_header.uda_msglen = mscp_msglen; 137117553Skarels udp->uda_ca.ca_Rspdsc |= UDA_OWN|UDA_INT; 137217553Skarels udp->uda_ca.ca_Cmddsc |= UDA_OWN|UDA_INT; 137317553Skarels if (udaddr->udasa&UDA_ERR) 137417553Skarels printf("Udaerror udasa (%x)\n", udaddr->udasa&0xffff); 137517553Skarels i = udaddr->udaip; 137626295Skarels #ifdef lint 137726295Skarels i = i; 137826295Skarels #endif 137917553Skarels for (;;) { 138017553Skarels if (udp->uda_ca.ca_cmdint) 138117553Skarels udp->uda_ca.ca_cmdint = 0; 138217553Skarels if (udp->uda_ca.ca_rspint) 138317553Skarels break; 138417553Skarels } 138517553Skarels udp->uda_ca.ca_rspint = 0; 138617553Skarels if (udp->uda_Rsp.mscp_opcode != (op|M_OP_END) || 138717553Skarels (udp->uda_Rsp.mscp_status&M_ST_MASK) != M_ST_SUCC) { 138817553Skarels printf("error: com %d opc 0x%x stat 0x%x\ndump ", 138917553Skarels op, 139017553Skarels udp->uda_Rsp.mscp_opcode, 139117553Skarels udp->uda_Rsp.mscp_status); 139217553Skarels return(0); 139317553Skarels } 139417553Skarels return(1); 139517553Skarels } 139617553Skarels 139712511Ssam udsize(dev) 139812511Ssam dev_t dev; 139912511Ssam { 140024742Sbloom int unit = udunit(dev); 140112511Ssam struct uba_device *ui; 140217553Skarels struct size *rasizes; 140312511Ssam 140426372Skarels if (unit >= NRA || (ui = uddinfo[unit]) == 0 || ui->ui_alive == 0 140517553Skarels || ui->ui_flags == 0) 140612511Ssam return (-1); 140717553Skarels rasizes = ra_info[ui->ui_unit].ra_sizes; 140817553Skarels return (rasizes[minor(dev) & 07].nblocks); 140912511Ssam } 141017553Skarels 141112511Ssam #endif 1412