1*2612Swnj /* tmreg.h 4.3 81/02/21 */ 22562Swnj 3*2612Swnj /* 4*2612Swnj * TM11 controller registers 5*2612Swnj */ 62557Swnj struct device { 7*2612Swnj u_short tmer; /* error register, per drive */ 8*2612Swnj u_short tmcs; /* control-status register */ 9*2612Swnj short tmbc; /* byte/frame count */ 10*2612Swnj u_short tmba; /* address */ 11*2612Swnj short tmdb; /* data buffer */ 12*2612Swnj short tmrd; /* read lines */ 13*2612Swnj short tmmr; /* maintenance register */ 142557Swnj }; 152557Swnj 162557Swnj #define b_repcnt b_bcount 172557Swnj #define b_command b_resid 182557Swnj 192557Swnj /* bits in tmcs */ 20*2612Swnj #define TM_GO 0000001 21*2612Swnj #define TM_OFFL 0000000 /* offline */ 22*2612Swnj #define TM_RCOM 0000002 /* read */ 23*2612Swnj #define TM_WCOM 0000004 /* write */ 24*2612Swnj #define TM_WEOF 0000006 /* write-eof */ 25*2612Swnj #define TM_SFORW 0000010 /* space forward */ 26*2612Swnj #define TM_SREV 0000012 /* space backwards */ 27*2612Swnj #define TM_WIRG 0000014 /* write with xtra interrecord gap */ 28*2612Swnj #define TM_REW 0000016 /* rewind */ 29*2612Swnj #define TM_SENSE TM_IE /* sense (internal to driver) */ 30*2612Swnj /* TM_SNS is a pseudo-op used to get tape status */ 31*2612Swnj #define TM_IE 0000100 /* interrupt enable */ 32*2612Swnj #define TM_CUR 0000200 /* control unit is ready */ 33*2612Swnj #define TM_DCLR 0010000 /* drive clear */ 34*2612Swnj #define TM_D800 0060000 /* select 800 bpi density */ 35*2612Swnj #define TM_ERR 0100000 /* drive error summary */ 362557Swnj 372557Swnj /* bits in tmer */ 38*2612Swnj #define TM_TUR 0000001 /* tape unit ready */ 39*2612Swnj #define TM_RWS 0000002 /* tape unit rewinding */ 40*2612Swnj #define TM_WRL 0000004 /* tape unit write protected */ 41*2612Swnj #define TM_SDWN 0000010 /* gap settling down */ 42*2612Swnj #define TM_BOT 0000040 /* at beginning of tape */ 43*2612Swnj #define TM_SELR 0000100 /* tape unit properly selected */ 44*2612Swnj #define TM_NXM 0000200 /* non-existant memory */ 45*2612Swnj #define TM_BTE 0000400 /* bad tape error */ 46*2612Swnj #define TM_RLE 0001000 /* record length error */ 47*2612Swnj #define TM_EOT 0002000 /* at end of tape */ 48*2612Swnj #define TM_BGL 0004000 /* bus grant late */ 49*2612Swnj #define TM_PAE 0010000 /* parity error */ 50*2612Swnj #define TM_CRE 0020000 /* cyclic redundancy error */ 51*2612Swnj #define TM_EOF 0040000 /* end of file */ 52*2612Swnj #define TM_ILC 0100000 /* illegal command */ 532557Swnj 54*2612Swnj #define TM_HARD (TM_ILC|TM_EOT) 55*2612Swnj #define TM_SOFT (TM_CRE|TM_PAE|TM_BGL|TM_RLE|TM_BTE|TM_NXM) 56