1*5437Sroot /* tm.c 4.45 82/01/17 */ 21919Swnj 32709Swnj #include "te.h" 43519Sroot #include "ts.h" 52630Swnj #if NTM > 0 61919Swnj /* 72630Swnj * TM11/TE10 tape driver 82471Swnj * 93095Swnj * TODO: 103095Swnj * test driver with more than one slave 113095Swnj * test driver with more than one controller 123095Swnj * test reset code 133095Swnj * what happens if you offline tape during rewind? 143095Swnj * test using file system on tape 151919Swnj */ 161919Swnj #include "../h/param.h" 173141Swnj #include "../h/systm.h" 181919Swnj #include "../h/buf.h" 191919Swnj #include "../h/dir.h" 201919Swnj #include "../h/conf.h" 211919Swnj #include "../h/user.h" 221919Swnj #include "../h/file.h" 231919Swnj #include "../h/map.h" 241919Swnj #include "../h/pte.h" 252574Swnj #include "../h/vm.h" 262982Swnj #include "../h/ubareg.h" 272982Swnj #include "../h/ubavar.h" 281919Swnj #include "../h/mtio.h" 291919Swnj #include "../h/ioctl.h" 302363Swnj #include "../h/cmap.h" 312396Swnj #include "../h/cpu.h" 321919Swnj 332396Swnj #include "../h/tmreg.h" 341919Swnj 353095Swnj /* 363095Swnj * There is a ctmbuf per tape controller. 373095Swnj * It is used as the token to pass to the internal routines 383095Swnj * to execute tape ioctls, and also acts as a lock on the slaves 393095Swnj * on the controller, since there is only one per controller. 403095Swnj * In particular, when the tape is rewinding on close we release 413095Swnj * the user process but any further attempts to use the tape drive 423095Swnj * before the rewind completes will hang waiting for ctmbuf. 433095Swnj */ 443095Swnj struct buf ctmbuf[NTM]; 451919Swnj 463095Swnj /* 473095Swnj * Raw tape operations use rtmbuf. The driver 483095Swnj * notices when rtmbuf is being used and allows the user 493095Swnj * program to continue after errors and read records 503095Swnj * not of the standard length (BSIZE). 513095Swnj */ 523095Swnj struct buf rtmbuf[NTM]; 533095Swnj 543095Swnj /* 553095Swnj * Driver unibus interface routines and variables. 563095Swnj */ 572608Swnj int tmprobe(), tmslave(), tmattach(), tmdgo(), tmintr(); 582982Swnj struct uba_ctlr *tmminfo[NTM]; 593095Swnj struct uba_device *tedinfo[NTE]; 603095Swnj struct buf teutab[NTE]; 613095Swnj short tetotm[NTE]; 622458Swnj u_short tmstd[] = { 0772520, 0 }; 632396Swnj struct uba_driver tmdriver = 643095Swnj { tmprobe, tmslave, tmattach, tmdgo, tmstd, "te", tedinfo, "tm", tmminfo, 0 }; 651919Swnj 661919Swnj /* bits in minor device */ 673095Swnj #define TEUNIT(dev) (minor(dev)&03) 683095Swnj #define TMUNIT(dev) (tetotm[TEUNIT(dev)]) 691919Swnj #define T_NOREWIND 04 701919Swnj #define T_1600BPI 08 711919Swnj 721919Swnj #define INF (daddr_t)1000000L 731919Swnj 742608Swnj /* 752608Swnj * Software state per tape transport. 763095Swnj * 773095Swnj * 1. A tape drive is a unique-open device; we refuse opens when it is already. 783095Swnj * 2. We keep track of the current position on a block tape and seek 793095Swnj * before operations by forward/back spacing if necessary. 803095Swnj * 3. We remember if the last operation was a write on a tape, so if a tape 813095Swnj * is open read write and the last thing done is a write we can 823095Swnj * write a standard end of tape mark (two eofs). 833095Swnj * 4. We remember the status registers after the last command, using 843095Swnj * then internally and returning them to the SENSE ioctl. 853095Swnj * 5. We remember the last density the tape was used at. If it is 863095Swnj * not a BOT when we start using it and we are writing, we don't 873095Swnj * let the density be changed. 882608Swnj */ 893095Swnj struct te_softc { 902608Swnj char sc_openf; /* lock against multiple opens */ 912608Swnj char sc_lastiow; /* last op was a write */ 922608Swnj daddr_t sc_blkno; /* block number, for block device tape */ 933095Swnj daddr_t sc_nxrec; /* position of end of tape, if known */ 942608Swnj u_short sc_erreg; /* copy of last erreg */ 952608Swnj u_short sc_dsreg; /* copy of last dsreg */ 962608Swnj short sc_resid; /* copy of last bc */ 973105Swnj #ifdef unneeded 982670Swnj short sc_lastcmd; /* last command to handle direction changes */ 992928Swnj #endif 1003095Swnj u_short sc_dens; /* prototype command with density info */ 1013495Sroot daddr_t sc_timo; /* time until timeout expires */ 1023495Sroot short sc_tact; /* timeout is active */ 1033095Swnj } te_softc[NTM]; 1043105Swnj #ifdef unneeded 1053105Swnj int tmgapsdcnt; /* DEBUG */ 1063105Swnj #endif 1071919Swnj 1082608Swnj /* 1093095Swnj * States for um->um_tab.b_active, the per controller state flag. 1103095Swnj * This is used to sequence control in the driver. 1112608Swnj */ 1121919Swnj #define SSEEK 1 /* seeking */ 1131919Swnj #define SIO 2 /* doing seq i/o */ 1141919Swnj #define SCOM 3 /* sending control command */ 1152608Swnj #define SREW 4 /* sending a drive rewind */ 1161919Swnj 1173519Sroot #if NTS > 0 1182426Skre /* 1193519Sroot * Kludge to get around fact that we don't really 1203519Sroot * check if a ts is there... if there are both tm's and ts's 1213519Sroot * declared in the system, then this driver sets havetm to 1 1223519Sroot * if it finds a tm, and ts just pretends there isn't a ts. 1233519Sroot */ 1243519Sroot int havetm = 0; 1253519Sroot #endif 1263519Sroot /* 1272426Skre * Determine if there is a controller for 1282426Skre * a tm at address reg. Our goal is to make the 1292426Skre * device interrupt. 1302426Skre */ 1312608Swnj tmprobe(reg) 1322396Swnj caddr_t reg; 1332396Swnj { 1343095Swnj register int br, cvec; /* must be r11,r10; value-result */ 1352426Skre 1362608Swnj #ifdef lint 1373105Swnj br = 0; cvec = br; br = cvec; 1384936Swnj tmintr(0); 1392608Swnj #endif 1402608Swnj ((struct device *)reg)->tmcs = TM_IE; 1412396Swnj /* 1422630Swnj * If this is a tm11, it ought to have interrupted 1432396Swnj * by now, if it isn't (ie: it is a ts04) then we just 1442458Swnj * hope that it didn't interrupt, so autoconf will ignore it. 1452458Swnj * Just in case, we will reference one 1462396Swnj * of the more distant registers, and hope for a machine 1472458Swnj * check, or similar disaster if this is a ts. 1482471Swnj * 1492471Swnj * Note: on an 11/780, badaddr will just generate 1502471Swnj * a uba error for a ts; but our caller will notice that 1512471Swnj * so we won't check for it. 1522396Swnj */ 1533105Swnj if (badaddr((caddr_t)&((struct device *)reg)->tmrd, 2)) 1542458Swnj return (0); 1552458Swnj return (1); 1562396Swnj } 1572396Swnj 1582608Swnj /* 1592608Swnj * Due to a design flaw, we cannot ascertain if the tape 1602608Swnj * exists or not unless it is on line - ie: unless a tape is 1612608Swnj * mounted. This is too servere a restriction to bear, 1622608Swnj * so all units are assumed to exist. 1632608Swnj */ 1642608Swnj /*ARGSUSED*/ 1652574Swnj tmslave(ui, reg) 1662982Swnj struct uba_device *ui; 1672396Swnj caddr_t reg; 1682396Swnj { 1692458Swnj 1702458Swnj return (1); 1712396Swnj } 1722396Swnj 1732608Swnj /* 1743095Swnj * Record attachment of the unit to the controller. 1752608Swnj */ 1762608Swnj /*ARGSUSED*/ 1772608Swnj tmattach(ui) 1782982Swnj struct uba_device *ui; 1792608Swnj { 1802608Swnj 1813519Sroot #if NTS > 0 1823519Sroot havetm = 1; 1833519Sroot #endif 1843095Swnj /* 1853095Swnj * Tetotm is used in TMUNIT to index the ctmbuf and rtmbuf 1863095Swnj * arrays given a te unit number. 1873095Swnj */ 1883095Swnj tetotm[ui->ui_unit] = ui->ui_mi->um_ctlr; 1892608Swnj } 1902608Swnj 1913495Sroot int tmtimer(); 1922608Swnj /* 1932608Swnj * Open the device. Tapes are unique open 1942608Swnj * devices, so we refuse if it is already open. 1952608Swnj * We also check that a tape is available, and 1963095Swnj * don't block waiting here; if you want to wait 1973095Swnj * for a tape you should timeout in user code. 1982608Swnj */ 1991919Swnj tmopen(dev, flag) 2001919Swnj dev_t dev; 2011919Swnj int flag; 2021919Swnj { 2033095Swnj register int teunit; 2042982Swnj register struct uba_device *ui; 2053095Swnj register struct te_softc *sc; 2063209Swnj int olddens, dens; 207*5437Sroot int s; 2081919Swnj 2093095Swnj teunit = TEUNIT(dev); 2103095Swnj if (teunit>=NTE || (sc = &te_softc[teunit])->sc_openf || 2113095Swnj (ui = tedinfo[teunit]) == 0 || ui->ui_alive == 0) { 2122608Swnj u.u_error = ENXIO; 2131919Swnj return; 2141919Swnj } 2153209Swnj olddens = sc->sc_dens; 2163209Swnj dens = TM_IE | TM_GO | (ui->ui_slave << 8); 2173209Swnj if ((minor(dev) & T_1600BPI) == 0) 2183209Swnj dens |= TM_D800; 2193209Swnj sc->sc_dens = dens; 2203141Swnj get: 2212608Swnj tmcommand(dev, TM_SENSE, 1); 2223141Swnj if (sc->sc_erreg&TMER_SDWN) { 2233141Swnj sleep((caddr_t)&lbolt, PZERO+1); 2243141Swnj goto get; 2253141Swnj } 2263209Swnj sc->sc_dens = olddens; 2273710Sroot if ((sc->sc_erreg&(TMER_SELR|TMER_TUR)) != (TMER_SELR|TMER_TUR)) { 2283710Sroot uprintf("te%d: not online\n", teunit); 2292471Swnj u.u_error = EIO; 2302608Swnj return; 2311919Swnj } 2323710Sroot if ((flag&FWRITE) && (sc->sc_erreg&TMER_WRL)) { 2333710Sroot uprintf("te%d: no write ring\n", teunit); 2343710Sroot u.u_error = EIO; 2353710Sroot return; 2363710Sroot } 2373710Sroot if ((sc->sc_erreg&TMER_BOT) == 0 && (flag&FWRITE) && 2383710Sroot dens != sc->sc_dens) { 2393710Sroot uprintf("te%d: can't change density in mid-tape\n", teunit); 2403710Sroot u.u_error = EIO; 2413710Sroot return; 2423710Sroot } 2432608Swnj sc->sc_openf = 1; 2442471Swnj sc->sc_blkno = (daddr_t)0; 2452471Swnj sc->sc_nxrec = INF; 2462608Swnj sc->sc_lastiow = 0; 2473095Swnj sc->sc_dens = dens; 248*5437Sroot s = spl6(); 2493495Sroot if (sc->sc_tact == 0) { 2503495Sroot sc->sc_timo = INF; 2513495Sroot sc->sc_tact = 1; 2523629Sroot timeout(tmtimer, (caddr_t)dev, 5*hz); 2533495Sroot } 254*5437Sroot splx(s); 2551919Swnj } 2561919Swnj 2572608Swnj /* 2582608Swnj * Close tape device. 2592608Swnj * 2602608Swnj * If tape was open for writing or last operation was 2612608Swnj * a write, then write two EOF's and backspace over the last one. 2622608Swnj * Unless this is a non-rewinding special file, rewind the tape. 2632608Swnj * Make the tape available to others. 2642608Swnj */ 2651919Swnj tmclose(dev, flag) 2661919Swnj register dev_t dev; 2671919Swnj register flag; 2681919Swnj { 2693095Swnj register struct te_softc *sc = &te_softc[TEUNIT(dev)]; 2701919Swnj 2712608Swnj if (flag == FWRITE || (flag&FWRITE) && sc->sc_lastiow) { 2722608Swnj tmcommand(dev, TM_WEOF, 1); 2732608Swnj tmcommand(dev, TM_WEOF, 1); 2742608Swnj tmcommand(dev, TM_SREV, 1); 2751919Swnj } 2761919Swnj if ((minor(dev)&T_NOREWIND) == 0) 2773095Swnj /* 2783095Swnj * 0 count means don't hang waiting for rewind complete 2793095Swnj * rather ctmbuf stays busy until the operation completes 2803095Swnj * preventing further opens from completing by 2813095Swnj * preventing a TM_SENSE from completing. 2823095Swnj */ 2833095Swnj tmcommand(dev, TM_REW, 0); 2842471Swnj sc->sc_openf = 0; 2851919Swnj } 2861919Swnj 2872608Swnj /* 2882608Swnj * Execute a command on the tape drive 2892608Swnj * a specified number of times. 2902608Swnj */ 2912574Swnj tmcommand(dev, com, count) 2921919Swnj dev_t dev; 2931919Swnj int com, count; 2941919Swnj { 2951919Swnj register struct buf *bp; 296*5437Sroot register int s; 2971919Swnj 2982608Swnj bp = &ctmbuf[TMUNIT(dev)]; 299*5437Sroot s = spl5(); 3001919Swnj while (bp->b_flags&B_BUSY) { 3013095Swnj /* 3023095Swnj * This special check is because B_BUSY never 3033095Swnj * gets cleared in the non-waiting rewind case. 3043095Swnj */ 3053141Swnj if (bp->b_repcnt == 0 && (bp->b_flags&B_DONE)) 3063095Swnj break; 3071919Swnj bp->b_flags |= B_WANTED; 3081919Swnj sleep((caddr_t)bp, PRIBIO); 3091919Swnj } 3101919Swnj bp->b_flags = B_BUSY|B_READ; 311*5437Sroot splx(s); 3121919Swnj bp->b_dev = dev; 3131919Swnj bp->b_repcnt = -count; 3141919Swnj bp->b_command = com; 3151919Swnj bp->b_blkno = 0; 3161919Swnj tmstrategy(bp); 3173095Swnj /* 3183095Swnj * In case of rewind from close, don't wait. 3193095Swnj * This is the only case where count can be 0. 3203095Swnj */ 3213095Swnj if (count == 0) 3223095Swnj return; 3231919Swnj iowait(bp); 3241919Swnj if (bp->b_flags&B_WANTED) 3251919Swnj wakeup((caddr_t)bp); 3261919Swnj bp->b_flags &= B_ERROR; 3271919Swnj } 3281919Swnj 3292608Swnj /* 3303095Swnj * Queue a tape operation. 3312608Swnj */ 3321919Swnj tmstrategy(bp) 3331919Swnj register struct buf *bp; 3341919Swnj { 3353095Swnj int teunit = TEUNIT(bp->b_dev); 3362982Swnj register struct uba_ctlr *um; 3372608Swnj register struct buf *dp; 338*5437Sroot int s; 3391919Swnj 3402608Swnj /* 3412608Swnj * Put transfer at end of unit queue 3422608Swnj */ 3433095Swnj dp = &teutab[teunit]; 3441919Swnj bp->av_forw = NULL; 345*5437Sroot s = spl5(); 3463939Sbugs um = tedinfo[teunit]->ui_mi; 3472608Swnj if (dp->b_actf == NULL) { 3482608Swnj dp->b_actf = bp; 3492608Swnj /* 3502608Swnj * Transport not already active... 3512608Swnj * put at end of controller queue. 3522608Swnj */ 3532608Swnj dp->b_forw = NULL; 3542608Swnj if (um->um_tab.b_actf == NULL) 3552608Swnj um->um_tab.b_actf = dp; 3562608Swnj else 3572608Swnj um->um_tab.b_actl->b_forw = dp; 3582608Swnj um->um_tab.b_actl = dp; 3592608Swnj } else 3602608Swnj dp->b_actl->av_forw = bp; 3612608Swnj dp->b_actl = bp; 3622608Swnj /* 3632608Swnj * If the controller is not busy, get 3642608Swnj * it going. 3652608Swnj */ 3662608Swnj if (um->um_tab.b_active == 0) 3672608Swnj tmstart(um); 368*5437Sroot splx(s); 3691919Swnj } 3701919Swnj 3712608Swnj /* 3722608Swnj * Start activity on a tm controller. 3732608Swnj */ 3742608Swnj tmstart(um) 3752982Swnj register struct uba_ctlr *um; 3761919Swnj { 3772608Swnj register struct buf *bp, *dp; 3782608Swnj register struct device *addr = (struct device *)um->um_addr; 3793095Swnj register struct te_softc *sc; 3802982Swnj register struct uba_device *ui; 3813095Swnj int teunit, cmd; 3822471Swnj daddr_t blkno; 3831919Swnj 3842608Swnj /* 3852608Swnj * Look for an idle transport on the controller. 3862608Swnj */ 3871919Swnj loop: 3882608Swnj if ((dp = um->um_tab.b_actf) == NULL) 3891919Swnj return; 3902608Swnj if ((bp = dp->b_actf) == NULL) { 3912608Swnj um->um_tab.b_actf = dp->b_forw; 3922608Swnj goto loop; 3932608Swnj } 3943095Swnj teunit = TEUNIT(bp->b_dev); 3953095Swnj ui = tedinfo[teunit]; 3962608Swnj /* 3972608Swnj * Record pre-transfer status (e.g. for TM_SENSE) 3982608Swnj */ 3993095Swnj sc = &te_softc[teunit]; 4002608Swnj addr = (struct device *)um->um_addr; 4012608Swnj addr->tmcs = (ui->ui_slave << 8); 4022471Swnj sc->sc_dsreg = addr->tmcs; 4032471Swnj sc->sc_erreg = addr->tmer; 4042471Swnj sc->sc_resid = addr->tmbc; 4052608Swnj /* 4062608Swnj * Default is that last command was NOT a write command; 4072608Swnj * if we do a write command we will notice this in tmintr(). 4082608Swnj */ 4093493Sroot sc->sc_lastiow = 0; 4102608Swnj if (sc->sc_openf < 0 || (addr->tmcs&TM_CUR) == 0) { 4112608Swnj /* 4123095Swnj * Have had a hard error on a non-raw tape 4133095Swnj * or the tape unit is now unavailable 4143095Swnj * (e.g. taken off line). 4152608Swnj */ 4162608Swnj bp->b_flags |= B_ERROR; 4171919Swnj goto next; 4181919Swnj } 4193095Swnj if (bp == &ctmbuf[TMUNIT(bp->b_dev)]) { 4203095Swnj /* 4213095Swnj * Execute control operation with the specified count. 4223095Swnj */ 4232608Swnj if (bp->b_command == TM_SENSE) 4242608Swnj goto next; 4253495Sroot /* 4263495Sroot * Set next state; give 5 minutes to complete 4273495Sroot * rewind, or 10 seconds per iteration (minimum 60 4283629Sroot * seconds and max 5 minutes) to complete other ops. 4293495Sroot */ 4303495Sroot if (bp->b_command == TM_REW) { 4313495Sroot um->um_tab.b_active = SREW; 4323495Sroot sc->sc_timo = 5 * 60; 4333495Sroot } else { 4343495Sroot um->um_tab.b_active = SCOM; 4354266Swnj sc->sc_timo = 4364266Swnj imin(imax(10*(int)-bp->b_repcnt,60),5*60); 4373495Sroot } 4382608Swnj if (bp->b_command == TM_SFORW || bp->b_command == TM_SREV) 4392608Swnj addr->tmbc = bp->b_repcnt; 4402670Swnj goto dobpcmd; 4412608Swnj } 4422608Swnj /* 4433095Swnj * The following checks handle boundary cases for operation 4443095Swnj * on non-raw tapes. On raw tapes the initialization of 4453095Swnj * sc->sc_nxrec by tmphys causes them to be skipped normally 4463095Swnj * (except in the case of retries). 4473095Swnj */ 4483095Swnj if (dbtofsb(bp->b_blkno) > sc->sc_nxrec) { 4493095Swnj /* 4503095Swnj * Can't read past known end-of-file. 4513095Swnj */ 4523095Swnj bp->b_flags |= B_ERROR; 4533095Swnj bp->b_error = ENXIO; 4543095Swnj goto next; 4553095Swnj } 4563095Swnj if (dbtofsb(bp->b_blkno) == sc->sc_nxrec && 4573095Swnj bp->b_flags&B_READ) { 4583095Swnj /* 4593095Swnj * Reading at end of file returns 0 bytes. 4603095Swnj */ 4613095Swnj bp->b_resid = bp->b_bcount; 4623095Swnj clrbuf(bp); 4633095Swnj goto next; 4643095Swnj } 4653095Swnj if ((bp->b_flags&B_READ) == 0) 4663095Swnj /* 4673095Swnj * Writing sets EOF 4683095Swnj */ 4693095Swnj sc->sc_nxrec = dbtofsb(bp->b_blkno) + 1; 4703095Swnj /* 4712608Swnj * If the data transfer command is in the correct place, 4722608Swnj * set up all the registers except the csr, and give 4732608Swnj * control over to the UNIBUS adapter routines, to 4742608Swnj * wait for resources to start the i/o. 4752608Swnj */ 4762471Swnj if ((blkno = sc->sc_blkno) == dbtofsb(bp->b_blkno)) { 4772396Swnj addr->tmbc = -bp->b_bcount; 4781919Swnj if ((bp->b_flags&B_READ) == 0) { 4792471Swnj if (um->um_tab.b_errcnt) 4803095Swnj cmd = TM_WIRG; 4811919Swnj else 4823095Swnj cmd = TM_WCOM; 4831919Swnj } else 4843095Swnj cmd = TM_RCOM; 4852471Swnj um->um_tab.b_active = SIO; 4863095Swnj um->um_cmd = sc->sc_dens|cmd; 4872928Swnj #ifdef notdef 4882670Swnj if (tmreverseop(sc->sc_lastcmd)) 4893095Swnj while (addr->tmer & TMER_SDWN) 4902670Swnj tmgapsdcnt++; 4912670Swnj sc->sc_lastcmd = TM_RCOM; /* will serve */ 4922928Swnj #endif 4933495Sroot sc->sc_timo = 60; /* premature, but should serve */ 4943105Swnj (void) ubago(ui); 4951919Swnj return; 4961919Swnj } 4972608Swnj /* 4983095Swnj * Tape positioned incorrectly; 4993095Swnj * set to seek forwards or backwards to the correct spot. 5003095Swnj * This happens for raw tapes only on error retries. 5012608Swnj */ 5022471Swnj um->um_tab.b_active = SSEEK; 5031919Swnj if (blkno < dbtofsb(bp->b_blkno)) { 5042670Swnj bp->b_command = TM_SFORW; 5052396Swnj addr->tmbc = blkno - dbtofsb(bp->b_blkno); 5061919Swnj } else { 5072670Swnj bp->b_command = TM_SREV; 5082396Swnj addr->tmbc = dbtofsb(bp->b_blkno) - blkno; 5091919Swnj } 5103629Sroot sc->sc_timo = imin(imax(10 * -addr->tmbc, 60), 5 * 60); 5112670Swnj dobpcmd: 5122928Swnj #ifdef notdef 5133095Swnj /* 5143095Swnj * It is strictly necessary to wait for the tape 5153095Swnj * to stop before changing directions, but the TC11 5163095Swnj * handles this for us. 5173095Swnj */ 5182670Swnj if (tmreverseop(sc->sc_lastcmd) != tmreverseop(bp->b_command)) 5192670Swnj while (addr->tmer & TM_SDWN) 5202670Swnj tmgapsdcnt++; 5212670Swnj sc->sc_lastcmd = bp->b_command; 5222928Swnj #endif 5233095Swnj /* 5243095Swnj * Do the command in bp. 5253095Swnj */ 5263095Swnj addr->tmcs = (sc->sc_dens | bp->b_command); 5271919Swnj return; 5281919Swnj 5291919Swnj next: 5302608Swnj /* 5312608Swnj * Done with this operation due to error or 5322608Swnj * the fact that it doesn't do anything. 5332608Swnj * Release UBA resources (if any), dequeue 5342608Swnj * the transfer and continue processing this slave. 5352608Swnj */ 5362608Swnj if (um->um_ubinfo) 5372617Swnj ubadone(um); 5382608Swnj um->um_tab.b_errcnt = 0; 5392608Swnj dp->b_actf = bp->av_forw; 5401919Swnj iodone(bp); 5411919Swnj goto loop; 5421919Swnj } 5431919Swnj 5442608Swnj /* 5452608Swnj * The UNIBUS resources we needed have been 5462608Swnj * allocated to us; start the device. 5472608Swnj */ 5482574Swnj tmdgo(um) 5492982Swnj register struct uba_ctlr *um; 5501919Swnj { 5512574Swnj register struct device *addr = (struct device *)um->um_addr; 5522471Swnj 5532574Swnj addr->tmba = um->um_ubinfo; 5542574Swnj addr->tmcs = um->um_cmd | ((um->um_ubinfo >> 12) & 0x30); 5552396Swnj } 5562396Swnj 5572608Swnj /* 5582608Swnj * Tm interrupt routine. 5592608Swnj */ 5602471Swnj /*ARGSUSED*/ 5612630Swnj tmintr(tm11) 5622630Swnj int tm11; 5632396Swnj { 5642608Swnj struct buf *dp; 5651919Swnj register struct buf *bp; 5662982Swnj register struct uba_ctlr *um = tmminfo[tm11]; 5673095Swnj register struct device *addr; 5683095Swnj register struct te_softc *sc; 5693095Swnj int teunit; 5701919Swnj register state; 5711919Swnj 5723095Swnj if ((dp = um->um_tab.b_actf) == NULL) 5733095Swnj return; 5743095Swnj bp = dp->b_actf; 5753095Swnj teunit = TEUNIT(bp->b_dev); 5763095Swnj addr = (struct device *)tedinfo[teunit]->ui_addr; 5773524Swnj sc = &te_softc[teunit]; 5782608Swnj /* 5792608Swnj * If last command was a rewind, and tape is still 5802608Swnj * rewinding, wait for the rewind complete interrupt. 5812608Swnj */ 5822608Swnj if (um->um_tab.b_active == SREW) { 5832608Swnj um->um_tab.b_active = SCOM; 5843524Swnj if (addr->tmer&TMER_RWS) { 5853524Swnj sc->sc_timo = 5*60; /* 5 minutes */ 5862608Swnj return; 5873524Swnj } 5881919Swnj } 5892608Swnj /* 5902608Swnj * An operation completed... record status 5912608Swnj */ 5923495Sroot sc->sc_timo = INF; 5932471Swnj sc->sc_dsreg = addr->tmcs; 5942471Swnj sc->sc_erreg = addr->tmer; 5952471Swnj sc->sc_resid = addr->tmbc; 5961919Swnj if ((bp->b_flags & B_READ) == 0) 5972608Swnj sc->sc_lastiow = 1; 5982471Swnj state = um->um_tab.b_active; 5992471Swnj um->um_tab.b_active = 0; 6002608Swnj /* 6012608Swnj * Check for errors. 6022608Swnj */ 6032608Swnj if (addr->tmcs&TM_ERR) { 6043095Swnj while (addr->tmer & TMER_SDWN) 6051919Swnj ; /* await settle down */ 6062608Swnj /* 6073095Swnj * If we hit the end of the tape file, update our position. 6082608Swnj */ 6093095Swnj if (addr->tmer&TMER_EOF) { 6102608Swnj tmseteof(bp); /* set blkno and nxrec */ 6112608Swnj state = SCOM; /* force completion */ 6122608Swnj /* 6132608Swnj * Stuff bc so it will be unstuffed correctly 6142608Swnj * later to get resid. 6152608Swnj */ 6162396Swnj addr->tmbc = -bp->b_bcount; 6172608Swnj goto opdone; 6181919Swnj } 6192608Swnj /* 6203095Swnj * If we were reading raw tape and the only error was that the 6213095Swnj * record was too long, then we don't consider this an error. 6222608Swnj */ 6233095Swnj if (bp == &rtmbuf[TMUNIT(bp->b_dev)] && (bp->b_flags&B_READ) && 6243095Swnj (addr->tmer&(TMER_HARD|TMER_SOFT)) == TMER_RLE) 6252608Swnj goto ignoreerr; 6262608Swnj /* 6272608Swnj * If error is not hard, and this was an i/o operation 6282608Swnj * retry up to 8 times. 6292608Swnj */ 6303095Swnj if ((addr->tmer&TMER_HARD)==0 && state==SIO) { 6312471Swnj if (++um->um_tab.b_errcnt < 7) { 6322471Swnj sc->sc_blkno++; 6332617Swnj ubadone(um); 6342608Swnj goto opcont; 6351919Swnj } 6362608Swnj } else 6372608Swnj /* 6382608Swnj * Hard or non-i/o errors on non-raw tape 6392608Swnj * cause it to close. 6402608Swnj */ 6413095Swnj if (sc->sc_openf>0 && bp != &rtmbuf[TMUNIT(bp->b_dev)]) 6422608Swnj sc->sc_openf = -1; 6432608Swnj /* 6442608Swnj * Couldn't recover error 6452608Swnj */ 6462928Swnj printf("te%d: hard error bn%d er=%b\n", minor(bp->b_dev)&03, 6473095Swnj bp->b_blkno, sc->sc_erreg, TMER_BITS); 6481919Swnj bp->b_flags |= B_ERROR; 6492608Swnj goto opdone; 6501919Swnj } 6512608Swnj /* 6522608Swnj * Advance tape control FSM. 6532608Swnj */ 6542608Swnj ignoreerr: 6551919Swnj switch (state) { 6561919Swnj 6571919Swnj case SIO: 6582608Swnj /* 6592608Swnj * Read/write increments tape block number 6602608Swnj */ 6612471Swnj sc->sc_blkno++; 6622608Swnj goto opdone; 6631919Swnj 6641919Swnj case SCOM: 6652608Swnj /* 6663095Swnj * For forward/backward space record update current position. 6672608Swnj */ 6683095Swnj if (bp == &ctmbuf[TMUNIT(bp->b_dev)]) 6692608Swnj switch (bp->b_command) { 6701919Swnj 6712608Swnj case TM_SFORW: 6722608Swnj sc->sc_blkno -= bp->b_repcnt; 6733095Swnj break; 6741919Swnj 6752608Swnj case TM_SREV: 6762608Swnj sc->sc_blkno += bp->b_repcnt; 6773095Swnj break; 6781919Swnj } 6793095Swnj goto opdone; 6801919Swnj 6811919Swnj case SSEEK: 6822471Swnj sc->sc_blkno = dbtofsb(bp->b_blkno); 6832608Swnj goto opcont; 6841919Swnj 6851919Swnj default: 6862608Swnj panic("tmintr"); 6872608Swnj } 6882608Swnj opdone: 6892608Swnj /* 6902608Swnj * Reset error count and remove 6912608Swnj * from device queue. 6922608Swnj */ 6932608Swnj um->um_tab.b_errcnt = 0; 6942608Swnj dp->b_actf = bp->av_forw; 6952608Swnj bp->b_resid = -addr->tmbc; 6962617Swnj ubadone(um); 6972608Swnj iodone(bp); 6982608Swnj /* 6992608Swnj * Circulate slave to end of controller 7002608Swnj * queue to give other slaves a chance. 7012608Swnj */ 7022608Swnj um->um_tab.b_actf = dp->b_forw; 7032608Swnj if (dp->b_actf) { 7042608Swnj dp->b_forw = NULL; 7052608Swnj if (um->um_tab.b_actf == NULL) 7062608Swnj um->um_tab.b_actf = dp; 7072608Swnj else 7082608Swnj um->um_tab.b_actl->b_forw = dp; 7092608Swnj um->um_tab.b_actl = dp; 7102608Swnj } 7112608Swnj if (um->um_tab.b_actf == 0) 7121919Swnj return; 7132608Swnj opcont: 7142608Swnj tmstart(um); 7151919Swnj } 7161919Swnj 7173495Sroot tmtimer(dev) 7183495Sroot int dev; 7193495Sroot { 7203495Sroot register struct te_softc *sc = &te_softc[TEUNIT(dev)]; 7214847Sroot register short x; 7223495Sroot 7233495Sroot if (sc->sc_timo != INF && (sc->sc_timo -= 5) < 0) { 7244278Sroot printf("te%d: lost interrupt\n", TEUNIT(dev)); 7253495Sroot sc->sc_timo = INF; 7264847Sroot x = spl5(); 7273495Sroot tmintr(TMUNIT(dev)); 7284847Sroot (void) splx(x); 7293495Sroot } 7303629Sroot timeout(tmtimer, (caddr_t)dev, 5*hz); 7313495Sroot } 7323495Sroot 7331919Swnj tmseteof(bp) 7341919Swnj register struct buf *bp; 7351919Swnj { 7363095Swnj register int teunit = TEUNIT(bp->b_dev); 7372396Swnj register struct device *addr = 7383095Swnj (struct device *)tedinfo[teunit]->ui_addr; 7393095Swnj register struct te_softc *sc = &te_softc[teunit]; 7401919Swnj 7413095Swnj if (bp == &ctmbuf[TMUNIT(bp->b_dev)]) { 7422471Swnj if (sc->sc_blkno > dbtofsb(bp->b_blkno)) { 7431919Swnj /* reversing */ 7442471Swnj sc->sc_nxrec = dbtofsb(bp->b_blkno) - addr->tmbc; 7452471Swnj sc->sc_blkno = sc->sc_nxrec; 7461919Swnj } else { 7471919Swnj /* spacing forward */ 7482471Swnj sc->sc_blkno = dbtofsb(bp->b_blkno) + addr->tmbc; 7492471Swnj sc->sc_nxrec = sc->sc_blkno - 1; 7501919Swnj } 7511919Swnj return; 7521919Swnj } 7531919Swnj /* eof on read */ 7542471Swnj sc->sc_nxrec = dbtofsb(bp->b_blkno); 7551919Swnj } 7561919Swnj 7571919Swnj tmread(dev) 7582608Swnj dev_t dev; 7591919Swnj { 7601919Swnj 7611919Swnj tmphys(dev); 7622982Swnj if (u.u_error) 7632982Swnj return; 7642608Swnj physio(tmstrategy, &rtmbuf[TMUNIT(dev)], dev, B_READ, minphys); 7651919Swnj } 7661919Swnj 7671919Swnj tmwrite(dev) 7682608Swnj dev_t dev; 7691919Swnj { 7701919Swnj 7711919Swnj tmphys(dev); 7722982Swnj if (u.u_error) 7732982Swnj return; 7742608Swnj physio(tmstrategy, &rtmbuf[TMUNIT(dev)], dev, B_WRITE, minphys); 7751919Swnj } 7761919Swnj 7773095Swnj /* 7783095Swnj * Check that a raw device exists. 7793095Swnj * If it does, set up sc_blkno and sc_nxrec 7803095Swnj * so that the tape will appear positioned correctly. 7813095Swnj */ 7821919Swnj tmphys(dev) 7832608Swnj dev_t dev; 7841919Swnj { 7853095Swnj register int teunit = TEUNIT(dev); 7861919Swnj register daddr_t a; 7873095Swnj register struct te_softc *sc; 7883095Swnj register struct uba_device *ui; 7891919Swnj 7903095Swnj if (teunit >= NTE || (ui=tedinfo[teunit]) == 0 || ui->ui_alive == 0) { 7912982Swnj u.u_error = ENXIO; 7922982Swnj return; 7932982Swnj } 7943095Swnj sc = &te_softc[teunit]; 7951919Swnj a = dbtofsb(u.u_offset >> 9); 7962471Swnj sc->sc_blkno = a; 7972471Swnj sc->sc_nxrec = a + 1; 7981919Swnj } 7991919Swnj 8002608Swnj tmreset(uban) 8012608Swnj int uban; 8022608Swnj { 8032982Swnj register struct uba_ctlr *um; 8043095Swnj register tm11, teunit; 8052982Swnj register struct uba_device *ui; 8062608Swnj register struct buf *dp; 8072608Swnj 8082630Swnj for (tm11 = 0; tm11 < NTM; tm11++) { 8092630Swnj if ((um = tmminfo[tm11]) == 0 || um->um_alive == 0 || 8102608Swnj um->um_ubanum != uban) 8112608Swnj continue; 8122928Swnj printf(" tm%d", tm11); 8132608Swnj um->um_tab.b_active = 0; 8142608Swnj um->um_tab.b_actf = um->um_tab.b_actl = 0; 8152608Swnj if (um->um_ubinfo) { 8162608Swnj printf("<%d>", (um->um_ubinfo>>28)&0xf); 8172617Swnj ubadone(um); 8182608Swnj } 8192608Swnj ((struct device *)(um->um_addr))->tmcs = TM_DCLR; 8203095Swnj for (teunit = 0; teunit < NTE; teunit++) { 8213095Swnj if ((ui = tedinfo[teunit]) == 0 || ui->ui_mi != um || 8223095Swnj ui->ui_alive == 0) 8232608Swnj continue; 8243095Swnj dp = &teutab[teunit]; 8252608Swnj dp->b_active = 0; 8262608Swnj dp->b_forw = 0; 8272608Swnj if (um->um_tab.b_actf == NULL) 8282608Swnj um->um_tab.b_actf = dp; 8292608Swnj else 8302608Swnj um->um_tab.b_actl->b_forw = dp; 8312608Swnj um->um_tab.b_actl = dp; 8323495Sroot if (te_softc[teunit].sc_openf > 0) 8333495Sroot te_softc[teunit].sc_openf = -1; 8342608Swnj } 8352608Swnj tmstart(um); 8362608Swnj } 8372608Swnj } 8382608Swnj 8391919Swnj /*ARGSUSED*/ 8401919Swnj tmioctl(dev, cmd, addr, flag) 8411919Swnj caddr_t addr; 8421919Swnj dev_t dev; 8431919Swnj { 8443095Swnj int teunit = TEUNIT(dev); 8453095Swnj register struct te_softc *sc = &te_softc[teunit]; 8463095Swnj register struct buf *bp = &ctmbuf[TMUNIT(dev)]; 8471919Swnj register callcount; 8481919Swnj int fcount; 8491919Swnj struct mtop mtop; 8501919Swnj struct mtget mtget; 8511919Swnj /* we depend of the values and order of the MT codes here */ 8522608Swnj static tmops[] = 8532608Swnj {TM_WEOF,TM_SFORW,TM_SREV,TM_SFORW,TM_SREV,TM_REW,TM_OFFL,TM_SENSE}; 8541919Swnj 8552608Swnj switch (cmd) { 8561919Swnj case MTIOCTOP: /* tape operation */ 8571919Swnj if (copyin((caddr_t)addr, (caddr_t)&mtop, sizeof(mtop))) { 8581919Swnj u.u_error = EFAULT; 8591919Swnj return; 8601919Swnj } 8611919Swnj switch(mtop.mt_op) { 8622608Swnj case MTWEOF: 8631919Swnj callcount = mtop.mt_count; 8642608Swnj fcount = 1; 8652608Swnj break; 8662608Swnj case MTFSF: case MTBSF: 8672608Swnj callcount = mtop.mt_count; 8681919Swnj fcount = INF; 8691919Swnj break; 8701919Swnj case MTFSR: case MTBSR: 8711919Swnj callcount = 1; 8721919Swnj fcount = mtop.mt_count; 8731919Swnj break; 8742324Skre case MTREW: case MTOFFL: case MTNOP: 8751919Swnj callcount = 1; 8761919Swnj fcount = 1; 8771919Swnj break; 8781919Swnj default: 8791919Swnj u.u_error = ENXIO; 8801919Swnj return; 8811919Swnj } 8822608Swnj if (callcount <= 0 || fcount <= 0) { 8831919Swnj u.u_error = ENXIO; 8842608Swnj return; 8852608Swnj } 8862608Swnj while (--callcount >= 0) { 8872574Swnj tmcommand(dev, tmops[mtop.mt_op], fcount); 8881919Swnj if ((mtop.mt_op == MTFSR || mtop.mt_op == MTBSR) && 8892608Swnj bp->b_resid) { 8901919Swnj u.u_error = EIO; 8911919Swnj break; 8921919Swnj } 8933095Swnj if ((bp->b_flags&B_ERROR) || sc->sc_erreg&TMER_BOT) 8941919Swnj break; 8951919Swnj } 8962608Swnj geterror(bp); 8971919Swnj return; 8981919Swnj case MTIOCGET: 8992471Swnj mtget.mt_dsreg = sc->sc_dsreg; 9002471Swnj mtget.mt_erreg = sc->sc_erreg; 9012471Swnj mtget.mt_resid = sc->sc_resid; 9023482Sroot mtget.mt_type = MT_ISTM; 9031919Swnj if (copyout((caddr_t)&mtget, addr, sizeof(mtget))) 9041919Swnj u.u_error = EFAULT; 9051919Swnj return; 9061919Swnj default: 9071919Swnj u.u_error = ENXIO; 9081919Swnj } 9091919Swnj } 9101919Swnj 9111919Swnj #define DBSIZE 20 9121919Swnj 9132363Swnj tmdump() 9142363Swnj { 9152982Swnj register struct uba_device *ui; 9162396Swnj register struct uba_regs *up; 9172396Swnj register struct device *addr; 9182426Skre int blk, num; 9192426Skre int start; 9201919Swnj 9212426Skre start = 0; 9222426Skre num = maxfree; 9232426Skre #define phys(a,b) ((b)((int)(a)&0x7fffffff)) 9243095Swnj if (tedinfo[0] == 0) 9252887Swnj return (ENXIO); 9263095Swnj ui = phys(tedinfo[0], struct uba_device *); 9272396Swnj up = phys(ui->ui_hd, struct uba_hd *)->uh_physuba; 9283331Swnj ubainit(up); 9292324Skre DELAY(1000000); 9302396Swnj addr = (struct device *)ui->ui_physaddr; 9312396Swnj tmwait(addr); 9322608Swnj addr->tmcs = TM_DCLR | TM_GO; 9331919Swnj while (num > 0) { 9341919Swnj blk = num > DBSIZE ? DBSIZE : num; 9352396Swnj tmdwrite(start, blk, addr, up); 9361919Swnj start += blk; 9371919Swnj num -= blk; 9381919Swnj } 9392426Skre tmeof(addr); 9402426Skre tmeof(addr); 9412426Skre tmwait(addr); 9422887Swnj if (addr->tmcs&TM_ERR) 9432887Swnj return (EIO); 9442608Swnj addr->tmcs = TM_REW | TM_GO; 9452471Swnj tmwait(addr); 9462363Swnj return (0); 9471919Swnj } 9481919Swnj 9492608Swnj tmdwrite(dbuf, num, addr, up) 9502608Swnj register dbuf, num; 9512396Swnj register struct device *addr; 9522396Swnj struct uba_regs *up; 9531919Swnj { 9542396Swnj register struct pte *io; 9552396Swnj register int npf; 9561928Swnj 9572396Swnj tmwait(addr); 9582396Swnj io = up->uba_map; 9591919Swnj npf = num+1; 9601928Swnj while (--npf != 0) 9612982Swnj *(int *)io++ = (dbuf++ | (1<<UBAMR_DPSHIFT) | UBAMR_MRV); 9622396Swnj *(int *)io = 0; 9632396Swnj addr->tmbc = -(num*NBPG); 9642396Swnj addr->tmba = 0; 9652608Swnj addr->tmcs = TM_WCOM | TM_GO; 9661919Swnj } 9671919Swnj 9682396Swnj tmwait(addr) 9692396Swnj register struct device *addr; 9701919Swnj { 9711928Swnj register s; 9721919Swnj 9731919Swnj do 9742396Swnj s = addr->tmcs; 9752608Swnj while ((s & TM_CUR) == 0); 9761919Swnj } 9771919Swnj 9782396Swnj tmeof(addr) 9792396Swnj struct device *addr; 9801919Swnj { 9811919Swnj 9822396Swnj tmwait(addr); 9832608Swnj addr->tmcs = TM_WEOF | TM_GO; 9841919Swnj } 9851919Swnj #endif 986