1*4936Swnj /* tm.c 4.44 81/11/18 */ 21919Swnj 32709Swnj #include "te.h" 43519Sroot #include "ts.h" 52630Swnj #if NTM > 0 61919Swnj /* 72630Swnj * TM11/TE10 tape driver 82471Swnj * 93095Swnj * TODO: 103095Swnj * test driver with more than one slave 113095Swnj * test driver with more than one controller 123095Swnj * test reset code 133095Swnj * what happens if you offline tape during rewind? 143095Swnj * test using file system on tape 151919Swnj */ 161919Swnj #include "../h/param.h" 173141Swnj #include "../h/systm.h" 181919Swnj #include "../h/buf.h" 191919Swnj #include "../h/dir.h" 201919Swnj #include "../h/conf.h" 211919Swnj #include "../h/user.h" 221919Swnj #include "../h/file.h" 231919Swnj #include "../h/map.h" 241919Swnj #include "../h/pte.h" 252574Swnj #include "../h/vm.h" 262982Swnj #include "../h/ubareg.h" 272982Swnj #include "../h/ubavar.h" 281919Swnj #include "../h/mtio.h" 291919Swnj #include "../h/ioctl.h" 302363Swnj #include "../h/cmap.h" 312396Swnj #include "../h/cpu.h" 321919Swnj 332396Swnj #include "../h/tmreg.h" 341919Swnj 353095Swnj /* 363095Swnj * There is a ctmbuf per tape controller. 373095Swnj * It is used as the token to pass to the internal routines 383095Swnj * to execute tape ioctls, and also acts as a lock on the slaves 393095Swnj * on the controller, since there is only one per controller. 403095Swnj * In particular, when the tape is rewinding on close we release 413095Swnj * the user process but any further attempts to use the tape drive 423095Swnj * before the rewind completes will hang waiting for ctmbuf. 433095Swnj */ 443095Swnj struct buf ctmbuf[NTM]; 451919Swnj 463095Swnj /* 473095Swnj * Raw tape operations use rtmbuf. The driver 483095Swnj * notices when rtmbuf is being used and allows the user 493095Swnj * program to continue after errors and read records 503095Swnj * not of the standard length (BSIZE). 513095Swnj */ 523095Swnj struct buf rtmbuf[NTM]; 533095Swnj 543095Swnj /* 553095Swnj * Driver unibus interface routines and variables. 563095Swnj */ 572608Swnj int tmprobe(), tmslave(), tmattach(), tmdgo(), tmintr(); 582982Swnj struct uba_ctlr *tmminfo[NTM]; 593095Swnj struct uba_device *tedinfo[NTE]; 603095Swnj struct buf teutab[NTE]; 613095Swnj short tetotm[NTE]; 622458Swnj u_short tmstd[] = { 0772520, 0 }; 632396Swnj struct uba_driver tmdriver = 643095Swnj { tmprobe, tmslave, tmattach, tmdgo, tmstd, "te", tedinfo, "tm", tmminfo, 0 }; 651919Swnj 661919Swnj /* bits in minor device */ 673095Swnj #define TEUNIT(dev) (minor(dev)&03) 683095Swnj #define TMUNIT(dev) (tetotm[TEUNIT(dev)]) 691919Swnj #define T_NOREWIND 04 701919Swnj #define T_1600BPI 08 711919Swnj 721919Swnj #define INF (daddr_t)1000000L 731919Swnj 742608Swnj /* 752608Swnj * Software state per tape transport. 763095Swnj * 773095Swnj * 1. A tape drive is a unique-open device; we refuse opens when it is already. 783095Swnj * 2. We keep track of the current position on a block tape and seek 793095Swnj * before operations by forward/back spacing if necessary. 803095Swnj * 3. We remember if the last operation was a write on a tape, so if a tape 813095Swnj * is open read write and the last thing done is a write we can 823095Swnj * write a standard end of tape mark (two eofs). 833095Swnj * 4. We remember the status registers after the last command, using 843095Swnj * then internally and returning them to the SENSE ioctl. 853095Swnj * 5. We remember the last density the tape was used at. If it is 863095Swnj * not a BOT when we start using it and we are writing, we don't 873095Swnj * let the density be changed. 882608Swnj */ 893095Swnj struct te_softc { 902608Swnj char sc_openf; /* lock against multiple opens */ 912608Swnj char sc_lastiow; /* last op was a write */ 922608Swnj daddr_t sc_blkno; /* block number, for block device tape */ 933095Swnj daddr_t sc_nxrec; /* position of end of tape, if known */ 942608Swnj u_short sc_erreg; /* copy of last erreg */ 952608Swnj u_short sc_dsreg; /* copy of last dsreg */ 962608Swnj short sc_resid; /* copy of last bc */ 973105Swnj #ifdef unneeded 982670Swnj short sc_lastcmd; /* last command to handle direction changes */ 992928Swnj #endif 1003095Swnj u_short sc_dens; /* prototype command with density info */ 1013495Sroot daddr_t sc_timo; /* time until timeout expires */ 1023495Sroot short sc_tact; /* timeout is active */ 1033095Swnj } te_softc[NTM]; 1043105Swnj #ifdef unneeded 1053105Swnj int tmgapsdcnt; /* DEBUG */ 1063105Swnj #endif 1071919Swnj 1082608Swnj /* 1093095Swnj * States for um->um_tab.b_active, the per controller state flag. 1103095Swnj * This is used to sequence control in the driver. 1112608Swnj */ 1121919Swnj #define SSEEK 1 /* seeking */ 1131919Swnj #define SIO 2 /* doing seq i/o */ 1141919Swnj #define SCOM 3 /* sending control command */ 1152608Swnj #define SREW 4 /* sending a drive rewind */ 1161919Swnj 1173519Sroot #if NTS > 0 1182426Skre /* 1193519Sroot * Kludge to get around fact that we don't really 1203519Sroot * check if a ts is there... if there are both tm's and ts's 1213519Sroot * declared in the system, then this driver sets havetm to 1 1223519Sroot * if it finds a tm, and ts just pretends there isn't a ts. 1233519Sroot */ 1243519Sroot int havetm = 0; 1253519Sroot #endif 1263519Sroot /* 1272426Skre * Determine if there is a controller for 1282426Skre * a tm at address reg. Our goal is to make the 1292426Skre * device interrupt. 1302426Skre */ 1312608Swnj tmprobe(reg) 1322396Swnj caddr_t reg; 1332396Swnj { 1343095Swnj register int br, cvec; /* must be r11,r10; value-result */ 1352426Skre 1362608Swnj #ifdef lint 1373105Swnj br = 0; cvec = br; br = cvec; 138*4936Swnj tmintr(0); 1392608Swnj #endif 1402608Swnj ((struct device *)reg)->tmcs = TM_IE; 1412396Swnj /* 1422630Swnj * If this is a tm11, it ought to have interrupted 1432396Swnj * by now, if it isn't (ie: it is a ts04) then we just 1442458Swnj * hope that it didn't interrupt, so autoconf will ignore it. 1452458Swnj * Just in case, we will reference one 1462396Swnj * of the more distant registers, and hope for a machine 1472458Swnj * check, or similar disaster if this is a ts. 1482471Swnj * 1492471Swnj * Note: on an 11/780, badaddr will just generate 1502471Swnj * a uba error for a ts; but our caller will notice that 1512471Swnj * so we won't check for it. 1522396Swnj */ 1533105Swnj if (badaddr((caddr_t)&((struct device *)reg)->tmrd, 2)) 1542458Swnj return (0); 1552458Swnj return (1); 1562396Swnj } 1572396Swnj 1582608Swnj /* 1592608Swnj * Due to a design flaw, we cannot ascertain if the tape 1602608Swnj * exists or not unless it is on line - ie: unless a tape is 1612608Swnj * mounted. This is too servere a restriction to bear, 1622608Swnj * so all units are assumed to exist. 1632608Swnj */ 1642608Swnj /*ARGSUSED*/ 1652574Swnj tmslave(ui, reg) 1662982Swnj struct uba_device *ui; 1672396Swnj caddr_t reg; 1682396Swnj { 1692458Swnj 1702458Swnj return (1); 1712396Swnj } 1722396Swnj 1732608Swnj /* 1743095Swnj * Record attachment of the unit to the controller. 1752608Swnj */ 1762608Swnj /*ARGSUSED*/ 1772608Swnj tmattach(ui) 1782982Swnj struct uba_device *ui; 1792608Swnj { 1802608Swnj 1813519Sroot #if NTS > 0 1823519Sroot havetm = 1; 1833519Sroot #endif 1843095Swnj /* 1853095Swnj * Tetotm is used in TMUNIT to index the ctmbuf and rtmbuf 1863095Swnj * arrays given a te unit number. 1873095Swnj */ 1883095Swnj tetotm[ui->ui_unit] = ui->ui_mi->um_ctlr; 1892608Swnj } 1902608Swnj 1913495Sroot int tmtimer(); 1922608Swnj /* 1932608Swnj * Open the device. Tapes are unique open 1942608Swnj * devices, so we refuse if it is already open. 1952608Swnj * We also check that a tape is available, and 1963095Swnj * don't block waiting here; if you want to wait 1973095Swnj * for a tape you should timeout in user code. 1982608Swnj */ 1991919Swnj tmopen(dev, flag) 2001919Swnj dev_t dev; 2011919Swnj int flag; 2021919Swnj { 2033095Swnj register int teunit; 2042982Swnj register struct uba_device *ui; 2053095Swnj register struct te_softc *sc; 2063209Swnj int olddens, dens; 2071919Swnj 2083095Swnj teunit = TEUNIT(dev); 2093095Swnj if (teunit>=NTE || (sc = &te_softc[teunit])->sc_openf || 2103095Swnj (ui = tedinfo[teunit]) == 0 || ui->ui_alive == 0) { 2112608Swnj u.u_error = ENXIO; 2121919Swnj return; 2131919Swnj } 2143209Swnj olddens = sc->sc_dens; 2153209Swnj dens = TM_IE | TM_GO | (ui->ui_slave << 8); 2163209Swnj if ((minor(dev) & T_1600BPI) == 0) 2173209Swnj dens |= TM_D800; 2183209Swnj sc->sc_dens = dens; 2193141Swnj get: 2202608Swnj tmcommand(dev, TM_SENSE, 1); 2213141Swnj if (sc->sc_erreg&TMER_SDWN) { 2223141Swnj sleep((caddr_t)&lbolt, PZERO+1); 2233141Swnj goto get; 2243141Swnj } 2253209Swnj sc->sc_dens = olddens; 2263710Sroot if ((sc->sc_erreg&(TMER_SELR|TMER_TUR)) != (TMER_SELR|TMER_TUR)) { 2273710Sroot uprintf("te%d: not online\n", teunit); 2282471Swnj u.u_error = EIO; 2292608Swnj return; 2301919Swnj } 2313710Sroot if ((flag&FWRITE) && (sc->sc_erreg&TMER_WRL)) { 2323710Sroot uprintf("te%d: no write ring\n", teunit); 2333710Sroot u.u_error = EIO; 2343710Sroot return; 2353710Sroot } 2363710Sroot if ((sc->sc_erreg&TMER_BOT) == 0 && (flag&FWRITE) && 2373710Sroot dens != sc->sc_dens) { 2383710Sroot uprintf("te%d: can't change density in mid-tape\n", teunit); 2393710Sroot u.u_error = EIO; 2403710Sroot return; 2413710Sroot } 2422608Swnj sc->sc_openf = 1; 2432471Swnj sc->sc_blkno = (daddr_t)0; 2442471Swnj sc->sc_nxrec = INF; 2452608Swnj sc->sc_lastiow = 0; 2463095Swnj sc->sc_dens = dens; 2473495Sroot (void) spl6(); 2483495Sroot if (sc->sc_tact == 0) { 2493495Sroot sc->sc_timo = INF; 2503495Sroot sc->sc_tact = 1; 2513629Sroot timeout(tmtimer, (caddr_t)dev, 5*hz); 2523495Sroot } 2533495Sroot (void) spl0(); 2541919Swnj } 2551919Swnj 2562608Swnj /* 2572608Swnj * Close tape device. 2582608Swnj * 2592608Swnj * If tape was open for writing or last operation was 2602608Swnj * a write, then write two EOF's and backspace over the last one. 2612608Swnj * Unless this is a non-rewinding special file, rewind the tape. 2622608Swnj * Make the tape available to others. 2632608Swnj */ 2641919Swnj tmclose(dev, flag) 2651919Swnj register dev_t dev; 2661919Swnj register flag; 2671919Swnj { 2683095Swnj register struct te_softc *sc = &te_softc[TEUNIT(dev)]; 2691919Swnj 2702608Swnj if (flag == FWRITE || (flag&FWRITE) && sc->sc_lastiow) { 2712608Swnj tmcommand(dev, TM_WEOF, 1); 2722608Swnj tmcommand(dev, TM_WEOF, 1); 2732608Swnj tmcommand(dev, TM_SREV, 1); 2741919Swnj } 2751919Swnj if ((minor(dev)&T_NOREWIND) == 0) 2763095Swnj /* 2773095Swnj * 0 count means don't hang waiting for rewind complete 2783095Swnj * rather ctmbuf stays busy until the operation completes 2793095Swnj * preventing further opens from completing by 2803095Swnj * preventing a TM_SENSE from completing. 2813095Swnj */ 2823095Swnj tmcommand(dev, TM_REW, 0); 2832471Swnj sc->sc_openf = 0; 2841919Swnj } 2851919Swnj 2862608Swnj /* 2872608Swnj * Execute a command on the tape drive 2882608Swnj * a specified number of times. 2892608Swnj */ 2902574Swnj tmcommand(dev, com, count) 2911919Swnj dev_t dev; 2921919Swnj int com, count; 2931919Swnj { 2941919Swnj register struct buf *bp; 2951919Swnj 2962608Swnj bp = &ctmbuf[TMUNIT(dev)]; 2971919Swnj (void) spl5(); 2981919Swnj while (bp->b_flags&B_BUSY) { 2993095Swnj /* 3003095Swnj * This special check is because B_BUSY never 3013095Swnj * gets cleared in the non-waiting rewind case. 3023095Swnj */ 3033141Swnj if (bp->b_repcnt == 0 && (bp->b_flags&B_DONE)) 3043095Swnj break; 3051919Swnj bp->b_flags |= B_WANTED; 3061919Swnj sleep((caddr_t)bp, PRIBIO); 3071919Swnj } 3081919Swnj bp->b_flags = B_BUSY|B_READ; 3091919Swnj (void) spl0(); 3101919Swnj bp->b_dev = dev; 3111919Swnj bp->b_repcnt = -count; 3121919Swnj bp->b_command = com; 3131919Swnj bp->b_blkno = 0; 3141919Swnj tmstrategy(bp); 3153095Swnj /* 3163095Swnj * In case of rewind from close, don't wait. 3173095Swnj * This is the only case where count can be 0. 3183095Swnj */ 3193095Swnj if (count == 0) 3203095Swnj return; 3211919Swnj iowait(bp); 3221919Swnj if (bp->b_flags&B_WANTED) 3231919Swnj wakeup((caddr_t)bp); 3241919Swnj bp->b_flags &= B_ERROR; 3251919Swnj } 3261919Swnj 3272608Swnj /* 3283095Swnj * Queue a tape operation. 3292608Swnj */ 3301919Swnj tmstrategy(bp) 3311919Swnj register struct buf *bp; 3321919Swnj { 3333095Swnj int teunit = TEUNIT(bp->b_dev); 3342982Swnj register struct uba_ctlr *um; 3352608Swnj register struct buf *dp; 3361919Swnj 3372608Swnj /* 3382608Swnj * Put transfer at end of unit queue 3392608Swnj */ 3403095Swnj dp = &teutab[teunit]; 3411919Swnj bp->av_forw = NULL; 3421919Swnj (void) spl5(); 3433939Sbugs um = tedinfo[teunit]->ui_mi; 3442608Swnj if (dp->b_actf == NULL) { 3452608Swnj dp->b_actf = bp; 3462608Swnj /* 3472608Swnj * Transport not already active... 3482608Swnj * put at end of controller queue. 3492608Swnj */ 3502608Swnj dp->b_forw = NULL; 3512608Swnj if (um->um_tab.b_actf == NULL) 3522608Swnj um->um_tab.b_actf = dp; 3532608Swnj else 3542608Swnj um->um_tab.b_actl->b_forw = dp; 3552608Swnj um->um_tab.b_actl = dp; 3562608Swnj } else 3572608Swnj dp->b_actl->av_forw = bp; 3582608Swnj dp->b_actl = bp; 3592608Swnj /* 3602608Swnj * If the controller is not busy, get 3612608Swnj * it going. 3622608Swnj */ 3632608Swnj if (um->um_tab.b_active == 0) 3642608Swnj tmstart(um); 3651919Swnj (void) spl0(); 3661919Swnj } 3671919Swnj 3682608Swnj /* 3692608Swnj * Start activity on a tm controller. 3702608Swnj */ 3712608Swnj tmstart(um) 3722982Swnj register struct uba_ctlr *um; 3731919Swnj { 3742608Swnj register struct buf *bp, *dp; 3752608Swnj register struct device *addr = (struct device *)um->um_addr; 3763095Swnj register struct te_softc *sc; 3772982Swnj register struct uba_device *ui; 3783095Swnj int teunit, cmd; 3792471Swnj daddr_t blkno; 3801919Swnj 3812608Swnj /* 3822608Swnj * Look for an idle transport on the controller. 3832608Swnj */ 3841919Swnj loop: 3852608Swnj if ((dp = um->um_tab.b_actf) == NULL) 3861919Swnj return; 3872608Swnj if ((bp = dp->b_actf) == NULL) { 3882608Swnj um->um_tab.b_actf = dp->b_forw; 3892608Swnj goto loop; 3902608Swnj } 3913095Swnj teunit = TEUNIT(bp->b_dev); 3923095Swnj ui = tedinfo[teunit]; 3932608Swnj /* 3942608Swnj * Record pre-transfer status (e.g. for TM_SENSE) 3952608Swnj */ 3963095Swnj sc = &te_softc[teunit]; 3972608Swnj addr = (struct device *)um->um_addr; 3982608Swnj addr->tmcs = (ui->ui_slave << 8); 3992471Swnj sc->sc_dsreg = addr->tmcs; 4002471Swnj sc->sc_erreg = addr->tmer; 4012471Swnj sc->sc_resid = addr->tmbc; 4022608Swnj /* 4032608Swnj * Default is that last command was NOT a write command; 4042608Swnj * if we do a write command we will notice this in tmintr(). 4052608Swnj */ 4063493Sroot sc->sc_lastiow = 0; 4072608Swnj if (sc->sc_openf < 0 || (addr->tmcs&TM_CUR) == 0) { 4082608Swnj /* 4093095Swnj * Have had a hard error on a non-raw tape 4103095Swnj * or the tape unit is now unavailable 4113095Swnj * (e.g. taken off line). 4122608Swnj */ 4132608Swnj bp->b_flags |= B_ERROR; 4141919Swnj goto next; 4151919Swnj } 4163095Swnj if (bp == &ctmbuf[TMUNIT(bp->b_dev)]) { 4173095Swnj /* 4183095Swnj * Execute control operation with the specified count. 4193095Swnj */ 4202608Swnj if (bp->b_command == TM_SENSE) 4212608Swnj goto next; 4223495Sroot /* 4233495Sroot * Set next state; give 5 minutes to complete 4243495Sroot * rewind, or 10 seconds per iteration (minimum 60 4253629Sroot * seconds and max 5 minutes) to complete other ops. 4263495Sroot */ 4273495Sroot if (bp->b_command == TM_REW) { 4283495Sroot um->um_tab.b_active = SREW; 4293495Sroot sc->sc_timo = 5 * 60; 4303495Sroot } else { 4313495Sroot um->um_tab.b_active = SCOM; 4324266Swnj sc->sc_timo = 4334266Swnj imin(imax(10*(int)-bp->b_repcnt,60),5*60); 4343495Sroot } 4352608Swnj if (bp->b_command == TM_SFORW || bp->b_command == TM_SREV) 4362608Swnj addr->tmbc = bp->b_repcnt; 4372670Swnj goto dobpcmd; 4382608Swnj } 4392608Swnj /* 4403095Swnj * The following checks handle boundary cases for operation 4413095Swnj * on non-raw tapes. On raw tapes the initialization of 4423095Swnj * sc->sc_nxrec by tmphys causes them to be skipped normally 4433095Swnj * (except in the case of retries). 4443095Swnj */ 4453095Swnj if (dbtofsb(bp->b_blkno) > sc->sc_nxrec) { 4463095Swnj /* 4473095Swnj * Can't read past known end-of-file. 4483095Swnj */ 4493095Swnj bp->b_flags |= B_ERROR; 4503095Swnj bp->b_error = ENXIO; 4513095Swnj goto next; 4523095Swnj } 4533095Swnj if (dbtofsb(bp->b_blkno) == sc->sc_nxrec && 4543095Swnj bp->b_flags&B_READ) { 4553095Swnj /* 4563095Swnj * Reading at end of file returns 0 bytes. 4573095Swnj */ 4583095Swnj bp->b_resid = bp->b_bcount; 4593095Swnj clrbuf(bp); 4603095Swnj goto next; 4613095Swnj } 4623095Swnj if ((bp->b_flags&B_READ) == 0) 4633095Swnj /* 4643095Swnj * Writing sets EOF 4653095Swnj */ 4663095Swnj sc->sc_nxrec = dbtofsb(bp->b_blkno) + 1; 4673095Swnj /* 4682608Swnj * If the data transfer command is in the correct place, 4692608Swnj * set up all the registers except the csr, and give 4702608Swnj * control over to the UNIBUS adapter routines, to 4712608Swnj * wait for resources to start the i/o. 4722608Swnj */ 4732471Swnj if ((blkno = sc->sc_blkno) == dbtofsb(bp->b_blkno)) { 4742396Swnj addr->tmbc = -bp->b_bcount; 4751919Swnj if ((bp->b_flags&B_READ) == 0) { 4762471Swnj if (um->um_tab.b_errcnt) 4773095Swnj cmd = TM_WIRG; 4781919Swnj else 4793095Swnj cmd = TM_WCOM; 4801919Swnj } else 4813095Swnj cmd = TM_RCOM; 4822471Swnj um->um_tab.b_active = SIO; 4833095Swnj um->um_cmd = sc->sc_dens|cmd; 4842928Swnj #ifdef notdef 4852670Swnj if (tmreverseop(sc->sc_lastcmd)) 4863095Swnj while (addr->tmer & TMER_SDWN) 4872670Swnj tmgapsdcnt++; 4882670Swnj sc->sc_lastcmd = TM_RCOM; /* will serve */ 4892928Swnj #endif 4903495Sroot sc->sc_timo = 60; /* premature, but should serve */ 4913105Swnj (void) ubago(ui); 4921919Swnj return; 4931919Swnj } 4942608Swnj /* 4953095Swnj * Tape positioned incorrectly; 4963095Swnj * set to seek forwards or backwards to the correct spot. 4973095Swnj * This happens for raw tapes only on error retries. 4982608Swnj */ 4992471Swnj um->um_tab.b_active = SSEEK; 5001919Swnj if (blkno < dbtofsb(bp->b_blkno)) { 5012670Swnj bp->b_command = TM_SFORW; 5022396Swnj addr->tmbc = blkno - dbtofsb(bp->b_blkno); 5031919Swnj } else { 5042670Swnj bp->b_command = TM_SREV; 5052396Swnj addr->tmbc = dbtofsb(bp->b_blkno) - blkno; 5061919Swnj } 5073629Sroot sc->sc_timo = imin(imax(10 * -addr->tmbc, 60), 5 * 60); 5082670Swnj dobpcmd: 5092928Swnj #ifdef notdef 5103095Swnj /* 5113095Swnj * It is strictly necessary to wait for the tape 5123095Swnj * to stop before changing directions, but the TC11 5133095Swnj * handles this for us. 5143095Swnj */ 5152670Swnj if (tmreverseop(sc->sc_lastcmd) != tmreverseop(bp->b_command)) 5162670Swnj while (addr->tmer & TM_SDWN) 5172670Swnj tmgapsdcnt++; 5182670Swnj sc->sc_lastcmd = bp->b_command; 5192928Swnj #endif 5203095Swnj /* 5213095Swnj * Do the command in bp. 5223095Swnj */ 5233095Swnj addr->tmcs = (sc->sc_dens | bp->b_command); 5241919Swnj return; 5251919Swnj 5261919Swnj next: 5272608Swnj /* 5282608Swnj * Done with this operation due to error or 5292608Swnj * the fact that it doesn't do anything. 5302608Swnj * Release UBA resources (if any), dequeue 5312608Swnj * the transfer and continue processing this slave. 5322608Swnj */ 5332608Swnj if (um->um_ubinfo) 5342617Swnj ubadone(um); 5352608Swnj um->um_tab.b_errcnt = 0; 5362608Swnj dp->b_actf = bp->av_forw; 5371919Swnj iodone(bp); 5381919Swnj goto loop; 5391919Swnj } 5401919Swnj 5412608Swnj /* 5422608Swnj * The UNIBUS resources we needed have been 5432608Swnj * allocated to us; start the device. 5442608Swnj */ 5452574Swnj tmdgo(um) 5462982Swnj register struct uba_ctlr *um; 5471919Swnj { 5482574Swnj register struct device *addr = (struct device *)um->um_addr; 5492471Swnj 5502574Swnj addr->tmba = um->um_ubinfo; 5512574Swnj addr->tmcs = um->um_cmd | ((um->um_ubinfo >> 12) & 0x30); 5522396Swnj } 5532396Swnj 5542608Swnj /* 5552608Swnj * Tm interrupt routine. 5562608Swnj */ 5572471Swnj /*ARGSUSED*/ 5582630Swnj tmintr(tm11) 5592630Swnj int tm11; 5602396Swnj { 5612608Swnj struct buf *dp; 5621919Swnj register struct buf *bp; 5632982Swnj register struct uba_ctlr *um = tmminfo[tm11]; 5643095Swnj register struct device *addr; 5653095Swnj register struct te_softc *sc; 5663095Swnj int teunit; 5671919Swnj register state; 5681919Swnj 5693095Swnj if ((dp = um->um_tab.b_actf) == NULL) 5703095Swnj return; 5713095Swnj bp = dp->b_actf; 5723095Swnj teunit = TEUNIT(bp->b_dev); 5733095Swnj addr = (struct device *)tedinfo[teunit]->ui_addr; 5743524Swnj sc = &te_softc[teunit]; 5752608Swnj /* 5762608Swnj * If last command was a rewind, and tape is still 5772608Swnj * rewinding, wait for the rewind complete interrupt. 5782608Swnj */ 5792608Swnj if (um->um_tab.b_active == SREW) { 5802608Swnj um->um_tab.b_active = SCOM; 5813524Swnj if (addr->tmer&TMER_RWS) { 5823524Swnj sc->sc_timo = 5*60; /* 5 minutes */ 5832608Swnj return; 5843524Swnj } 5851919Swnj } 5862608Swnj /* 5872608Swnj * An operation completed... record status 5882608Swnj */ 5893495Sroot sc->sc_timo = INF; 5902471Swnj sc->sc_dsreg = addr->tmcs; 5912471Swnj sc->sc_erreg = addr->tmer; 5922471Swnj sc->sc_resid = addr->tmbc; 5931919Swnj if ((bp->b_flags & B_READ) == 0) 5942608Swnj sc->sc_lastiow = 1; 5952471Swnj state = um->um_tab.b_active; 5962471Swnj um->um_tab.b_active = 0; 5972608Swnj /* 5982608Swnj * Check for errors. 5992608Swnj */ 6002608Swnj if (addr->tmcs&TM_ERR) { 6013095Swnj while (addr->tmer & TMER_SDWN) 6021919Swnj ; /* await settle down */ 6032608Swnj /* 6043095Swnj * If we hit the end of the tape file, update our position. 6052608Swnj */ 6063095Swnj if (addr->tmer&TMER_EOF) { 6072608Swnj tmseteof(bp); /* set blkno and nxrec */ 6082608Swnj state = SCOM; /* force completion */ 6092608Swnj /* 6102608Swnj * Stuff bc so it will be unstuffed correctly 6112608Swnj * later to get resid. 6122608Swnj */ 6132396Swnj addr->tmbc = -bp->b_bcount; 6142608Swnj goto opdone; 6151919Swnj } 6162608Swnj /* 6173095Swnj * If we were reading raw tape and the only error was that the 6183095Swnj * record was too long, then we don't consider this an error. 6192608Swnj */ 6203095Swnj if (bp == &rtmbuf[TMUNIT(bp->b_dev)] && (bp->b_flags&B_READ) && 6213095Swnj (addr->tmer&(TMER_HARD|TMER_SOFT)) == TMER_RLE) 6222608Swnj goto ignoreerr; 6232608Swnj /* 6242608Swnj * If error is not hard, and this was an i/o operation 6252608Swnj * retry up to 8 times. 6262608Swnj */ 6273095Swnj if ((addr->tmer&TMER_HARD)==0 && state==SIO) { 6282471Swnj if (++um->um_tab.b_errcnt < 7) { 6292471Swnj sc->sc_blkno++; 6302617Swnj ubadone(um); 6312608Swnj goto opcont; 6321919Swnj } 6332608Swnj } else 6342608Swnj /* 6352608Swnj * Hard or non-i/o errors on non-raw tape 6362608Swnj * cause it to close. 6372608Swnj */ 6383095Swnj if (sc->sc_openf>0 && bp != &rtmbuf[TMUNIT(bp->b_dev)]) 6392608Swnj sc->sc_openf = -1; 6402608Swnj /* 6412608Swnj * Couldn't recover error 6422608Swnj */ 6432928Swnj printf("te%d: hard error bn%d er=%b\n", minor(bp->b_dev)&03, 6443095Swnj bp->b_blkno, sc->sc_erreg, TMER_BITS); 6451919Swnj bp->b_flags |= B_ERROR; 6462608Swnj goto opdone; 6471919Swnj } 6482608Swnj /* 6492608Swnj * Advance tape control FSM. 6502608Swnj */ 6512608Swnj ignoreerr: 6521919Swnj switch (state) { 6531919Swnj 6541919Swnj case SIO: 6552608Swnj /* 6562608Swnj * Read/write increments tape block number 6572608Swnj */ 6582471Swnj sc->sc_blkno++; 6592608Swnj goto opdone; 6601919Swnj 6611919Swnj case SCOM: 6622608Swnj /* 6633095Swnj * For forward/backward space record update current position. 6642608Swnj */ 6653095Swnj if (bp == &ctmbuf[TMUNIT(bp->b_dev)]) 6662608Swnj switch (bp->b_command) { 6671919Swnj 6682608Swnj case TM_SFORW: 6692608Swnj sc->sc_blkno -= bp->b_repcnt; 6703095Swnj break; 6711919Swnj 6722608Swnj case TM_SREV: 6732608Swnj sc->sc_blkno += bp->b_repcnt; 6743095Swnj break; 6751919Swnj } 6763095Swnj goto opdone; 6771919Swnj 6781919Swnj case SSEEK: 6792471Swnj sc->sc_blkno = dbtofsb(bp->b_blkno); 6802608Swnj goto opcont; 6811919Swnj 6821919Swnj default: 6832608Swnj panic("tmintr"); 6842608Swnj } 6852608Swnj opdone: 6862608Swnj /* 6872608Swnj * Reset error count and remove 6882608Swnj * from device queue. 6892608Swnj */ 6902608Swnj um->um_tab.b_errcnt = 0; 6912608Swnj dp->b_actf = bp->av_forw; 6922608Swnj bp->b_resid = -addr->tmbc; 6932617Swnj ubadone(um); 6942608Swnj iodone(bp); 6952608Swnj /* 6962608Swnj * Circulate slave to end of controller 6972608Swnj * queue to give other slaves a chance. 6982608Swnj */ 6992608Swnj um->um_tab.b_actf = dp->b_forw; 7002608Swnj if (dp->b_actf) { 7012608Swnj dp->b_forw = NULL; 7022608Swnj if (um->um_tab.b_actf == NULL) 7032608Swnj um->um_tab.b_actf = dp; 7042608Swnj else 7052608Swnj um->um_tab.b_actl->b_forw = dp; 7062608Swnj um->um_tab.b_actl = dp; 7072608Swnj } 7082608Swnj if (um->um_tab.b_actf == 0) 7091919Swnj return; 7102608Swnj opcont: 7112608Swnj tmstart(um); 7121919Swnj } 7131919Swnj 7143495Sroot tmtimer(dev) 7153495Sroot int dev; 7163495Sroot { 7173495Sroot register struct te_softc *sc = &te_softc[TEUNIT(dev)]; 7184847Sroot register short x; 7193495Sroot 7203495Sroot if (sc->sc_timo != INF && (sc->sc_timo -= 5) < 0) { 7214278Sroot printf("te%d: lost interrupt\n", TEUNIT(dev)); 7223495Sroot sc->sc_timo = INF; 7234847Sroot x = spl5(); 7243495Sroot tmintr(TMUNIT(dev)); 7254847Sroot (void) splx(x); 7263495Sroot } 7273629Sroot timeout(tmtimer, (caddr_t)dev, 5*hz); 7283495Sroot } 7293495Sroot 7301919Swnj tmseteof(bp) 7311919Swnj register struct buf *bp; 7321919Swnj { 7333095Swnj register int teunit = TEUNIT(bp->b_dev); 7342396Swnj register struct device *addr = 7353095Swnj (struct device *)tedinfo[teunit]->ui_addr; 7363095Swnj register struct te_softc *sc = &te_softc[teunit]; 7371919Swnj 7383095Swnj if (bp == &ctmbuf[TMUNIT(bp->b_dev)]) { 7392471Swnj if (sc->sc_blkno > dbtofsb(bp->b_blkno)) { 7401919Swnj /* reversing */ 7412471Swnj sc->sc_nxrec = dbtofsb(bp->b_blkno) - addr->tmbc; 7422471Swnj sc->sc_blkno = sc->sc_nxrec; 7431919Swnj } else { 7441919Swnj /* spacing forward */ 7452471Swnj sc->sc_blkno = dbtofsb(bp->b_blkno) + addr->tmbc; 7462471Swnj sc->sc_nxrec = sc->sc_blkno - 1; 7471919Swnj } 7481919Swnj return; 7491919Swnj } 7501919Swnj /* eof on read */ 7512471Swnj sc->sc_nxrec = dbtofsb(bp->b_blkno); 7521919Swnj } 7531919Swnj 7541919Swnj tmread(dev) 7552608Swnj dev_t dev; 7561919Swnj { 7571919Swnj 7581919Swnj tmphys(dev); 7592982Swnj if (u.u_error) 7602982Swnj return; 7612608Swnj physio(tmstrategy, &rtmbuf[TMUNIT(dev)], dev, B_READ, minphys); 7621919Swnj } 7631919Swnj 7641919Swnj tmwrite(dev) 7652608Swnj dev_t dev; 7661919Swnj { 7671919Swnj 7681919Swnj tmphys(dev); 7692982Swnj if (u.u_error) 7702982Swnj return; 7712608Swnj physio(tmstrategy, &rtmbuf[TMUNIT(dev)], dev, B_WRITE, minphys); 7721919Swnj } 7731919Swnj 7743095Swnj /* 7753095Swnj * Check that a raw device exists. 7763095Swnj * If it does, set up sc_blkno and sc_nxrec 7773095Swnj * so that the tape will appear positioned correctly. 7783095Swnj */ 7791919Swnj tmphys(dev) 7802608Swnj dev_t dev; 7811919Swnj { 7823095Swnj register int teunit = TEUNIT(dev); 7831919Swnj register daddr_t a; 7843095Swnj register struct te_softc *sc; 7853095Swnj register struct uba_device *ui; 7861919Swnj 7873095Swnj if (teunit >= NTE || (ui=tedinfo[teunit]) == 0 || ui->ui_alive == 0) { 7882982Swnj u.u_error = ENXIO; 7892982Swnj return; 7902982Swnj } 7913095Swnj sc = &te_softc[teunit]; 7921919Swnj a = dbtofsb(u.u_offset >> 9); 7932471Swnj sc->sc_blkno = a; 7942471Swnj sc->sc_nxrec = a + 1; 7951919Swnj } 7961919Swnj 7972608Swnj tmreset(uban) 7982608Swnj int uban; 7992608Swnj { 8002982Swnj register struct uba_ctlr *um; 8013095Swnj register tm11, teunit; 8022982Swnj register struct uba_device *ui; 8032608Swnj register struct buf *dp; 8042608Swnj 8052630Swnj for (tm11 = 0; tm11 < NTM; tm11++) { 8062630Swnj if ((um = tmminfo[tm11]) == 0 || um->um_alive == 0 || 8072608Swnj um->um_ubanum != uban) 8082608Swnj continue; 8092928Swnj printf(" tm%d", tm11); 8102608Swnj um->um_tab.b_active = 0; 8112608Swnj um->um_tab.b_actf = um->um_tab.b_actl = 0; 8122608Swnj if (um->um_ubinfo) { 8132608Swnj printf("<%d>", (um->um_ubinfo>>28)&0xf); 8142617Swnj ubadone(um); 8152608Swnj } 8162608Swnj ((struct device *)(um->um_addr))->tmcs = TM_DCLR; 8173095Swnj for (teunit = 0; teunit < NTE; teunit++) { 8183095Swnj if ((ui = tedinfo[teunit]) == 0 || ui->ui_mi != um || 8193095Swnj ui->ui_alive == 0) 8202608Swnj continue; 8213095Swnj dp = &teutab[teunit]; 8222608Swnj dp->b_active = 0; 8232608Swnj dp->b_forw = 0; 8242608Swnj if (um->um_tab.b_actf == NULL) 8252608Swnj um->um_tab.b_actf = dp; 8262608Swnj else 8272608Swnj um->um_tab.b_actl->b_forw = dp; 8282608Swnj um->um_tab.b_actl = dp; 8293495Sroot if (te_softc[teunit].sc_openf > 0) 8303495Sroot te_softc[teunit].sc_openf = -1; 8312608Swnj } 8322608Swnj tmstart(um); 8332608Swnj } 8342608Swnj } 8352608Swnj 8361919Swnj /*ARGSUSED*/ 8371919Swnj tmioctl(dev, cmd, addr, flag) 8381919Swnj caddr_t addr; 8391919Swnj dev_t dev; 8401919Swnj { 8413095Swnj int teunit = TEUNIT(dev); 8423095Swnj register struct te_softc *sc = &te_softc[teunit]; 8433095Swnj register struct buf *bp = &ctmbuf[TMUNIT(dev)]; 8441919Swnj register callcount; 8451919Swnj int fcount; 8461919Swnj struct mtop mtop; 8471919Swnj struct mtget mtget; 8481919Swnj /* we depend of the values and order of the MT codes here */ 8492608Swnj static tmops[] = 8502608Swnj {TM_WEOF,TM_SFORW,TM_SREV,TM_SFORW,TM_SREV,TM_REW,TM_OFFL,TM_SENSE}; 8511919Swnj 8522608Swnj switch (cmd) { 8531919Swnj case MTIOCTOP: /* tape operation */ 8541919Swnj if (copyin((caddr_t)addr, (caddr_t)&mtop, sizeof(mtop))) { 8551919Swnj u.u_error = EFAULT; 8561919Swnj return; 8571919Swnj } 8581919Swnj switch(mtop.mt_op) { 8592608Swnj case MTWEOF: 8601919Swnj callcount = mtop.mt_count; 8612608Swnj fcount = 1; 8622608Swnj break; 8632608Swnj case MTFSF: case MTBSF: 8642608Swnj callcount = mtop.mt_count; 8651919Swnj fcount = INF; 8661919Swnj break; 8671919Swnj case MTFSR: case MTBSR: 8681919Swnj callcount = 1; 8691919Swnj fcount = mtop.mt_count; 8701919Swnj break; 8712324Skre case MTREW: case MTOFFL: case MTNOP: 8721919Swnj callcount = 1; 8731919Swnj fcount = 1; 8741919Swnj break; 8751919Swnj default: 8761919Swnj u.u_error = ENXIO; 8771919Swnj return; 8781919Swnj } 8792608Swnj if (callcount <= 0 || fcount <= 0) { 8801919Swnj u.u_error = ENXIO; 8812608Swnj return; 8822608Swnj } 8832608Swnj while (--callcount >= 0) { 8842574Swnj tmcommand(dev, tmops[mtop.mt_op], fcount); 8851919Swnj if ((mtop.mt_op == MTFSR || mtop.mt_op == MTBSR) && 8862608Swnj bp->b_resid) { 8871919Swnj u.u_error = EIO; 8881919Swnj break; 8891919Swnj } 8903095Swnj if ((bp->b_flags&B_ERROR) || sc->sc_erreg&TMER_BOT) 8911919Swnj break; 8921919Swnj } 8932608Swnj geterror(bp); 8941919Swnj return; 8951919Swnj case MTIOCGET: 8962471Swnj mtget.mt_dsreg = sc->sc_dsreg; 8972471Swnj mtget.mt_erreg = sc->sc_erreg; 8982471Swnj mtget.mt_resid = sc->sc_resid; 8993482Sroot mtget.mt_type = MT_ISTM; 9001919Swnj if (copyout((caddr_t)&mtget, addr, sizeof(mtget))) 9011919Swnj u.u_error = EFAULT; 9021919Swnj return; 9031919Swnj default: 9041919Swnj u.u_error = ENXIO; 9051919Swnj } 9061919Swnj } 9071919Swnj 9081919Swnj #define DBSIZE 20 9091919Swnj 9102363Swnj tmdump() 9112363Swnj { 9122982Swnj register struct uba_device *ui; 9132396Swnj register struct uba_regs *up; 9142396Swnj register struct device *addr; 9152426Skre int blk, num; 9162426Skre int start; 9171919Swnj 9182426Skre start = 0; 9192426Skre num = maxfree; 9202426Skre #define phys(a,b) ((b)((int)(a)&0x7fffffff)) 9213095Swnj if (tedinfo[0] == 0) 9222887Swnj return (ENXIO); 9233095Swnj ui = phys(tedinfo[0], struct uba_device *); 9242396Swnj up = phys(ui->ui_hd, struct uba_hd *)->uh_physuba; 9253331Swnj ubainit(up); 9262324Skre DELAY(1000000); 9272396Swnj addr = (struct device *)ui->ui_physaddr; 9282396Swnj tmwait(addr); 9292608Swnj addr->tmcs = TM_DCLR | TM_GO; 9301919Swnj while (num > 0) { 9311919Swnj blk = num > DBSIZE ? DBSIZE : num; 9322396Swnj tmdwrite(start, blk, addr, up); 9331919Swnj start += blk; 9341919Swnj num -= blk; 9351919Swnj } 9362426Skre tmeof(addr); 9372426Skre tmeof(addr); 9382426Skre tmwait(addr); 9392887Swnj if (addr->tmcs&TM_ERR) 9402887Swnj return (EIO); 9412608Swnj addr->tmcs = TM_REW | TM_GO; 9422471Swnj tmwait(addr); 9432363Swnj return (0); 9441919Swnj } 9451919Swnj 9462608Swnj tmdwrite(dbuf, num, addr, up) 9472608Swnj register dbuf, num; 9482396Swnj register struct device *addr; 9492396Swnj struct uba_regs *up; 9501919Swnj { 9512396Swnj register struct pte *io; 9522396Swnj register int npf; 9531928Swnj 9542396Swnj tmwait(addr); 9552396Swnj io = up->uba_map; 9561919Swnj npf = num+1; 9571928Swnj while (--npf != 0) 9582982Swnj *(int *)io++ = (dbuf++ | (1<<UBAMR_DPSHIFT) | UBAMR_MRV); 9592396Swnj *(int *)io = 0; 9602396Swnj addr->tmbc = -(num*NBPG); 9612396Swnj addr->tmba = 0; 9622608Swnj addr->tmcs = TM_WCOM | TM_GO; 9631919Swnj } 9641919Swnj 9652396Swnj tmwait(addr) 9662396Swnj register struct device *addr; 9671919Swnj { 9681928Swnj register s; 9691919Swnj 9701919Swnj do 9712396Swnj s = addr->tmcs; 9722608Swnj while ((s & TM_CUR) == 0); 9731919Swnj } 9741919Swnj 9752396Swnj tmeof(addr) 9762396Swnj struct device *addr; 9771919Swnj { 9781919Swnj 9792396Swnj tmwait(addr); 9802608Swnj addr->tmcs = TM_WEOF | TM_GO; 9811919Swnj } 9821919Swnj #endif 983