1*4847Sroot /* tm.c 4.43 81/11/10 */ 21919Swnj 32709Swnj #include "te.h" 43519Sroot #include "ts.h" 52630Swnj #if NTM > 0 61919Swnj /* 72630Swnj * TM11/TE10 tape driver 82471Swnj * 93095Swnj * TODO: 103095Swnj * test driver with more than one slave 113095Swnj * test driver with more than one controller 123095Swnj * test reset code 133095Swnj * what happens if you offline tape during rewind? 143095Swnj * test using file system on tape 151919Swnj */ 161919Swnj #include "../h/param.h" 173141Swnj #include "../h/systm.h" 181919Swnj #include "../h/buf.h" 191919Swnj #include "../h/dir.h" 201919Swnj #include "../h/conf.h" 211919Swnj #include "../h/user.h" 221919Swnj #include "../h/file.h" 231919Swnj #include "../h/map.h" 241919Swnj #include "../h/pte.h" 252574Swnj #include "../h/vm.h" 262982Swnj #include "../h/ubareg.h" 272982Swnj #include "../h/ubavar.h" 281919Swnj #include "../h/mtio.h" 291919Swnj #include "../h/ioctl.h" 302363Swnj #include "../h/cmap.h" 312396Swnj #include "../h/cpu.h" 321919Swnj 332396Swnj #include "../h/tmreg.h" 341919Swnj 353095Swnj /* 363095Swnj * There is a ctmbuf per tape controller. 373095Swnj * It is used as the token to pass to the internal routines 383095Swnj * to execute tape ioctls, and also acts as a lock on the slaves 393095Swnj * on the controller, since there is only one per controller. 403095Swnj * In particular, when the tape is rewinding on close we release 413095Swnj * the user process but any further attempts to use the tape drive 423095Swnj * before the rewind completes will hang waiting for ctmbuf. 433095Swnj */ 443095Swnj struct buf ctmbuf[NTM]; 451919Swnj 463095Swnj /* 473095Swnj * Raw tape operations use rtmbuf. The driver 483095Swnj * notices when rtmbuf is being used and allows the user 493095Swnj * program to continue after errors and read records 503095Swnj * not of the standard length (BSIZE). 513095Swnj */ 523095Swnj struct buf rtmbuf[NTM]; 533095Swnj 543095Swnj /* 553095Swnj * Driver unibus interface routines and variables. 563095Swnj */ 572608Swnj int tmprobe(), tmslave(), tmattach(), tmdgo(), tmintr(); 582982Swnj struct uba_ctlr *tmminfo[NTM]; 593095Swnj struct uba_device *tedinfo[NTE]; 603095Swnj struct buf teutab[NTE]; 613095Swnj short tetotm[NTE]; 622458Swnj u_short tmstd[] = { 0772520, 0 }; 632396Swnj struct uba_driver tmdriver = 643095Swnj { tmprobe, tmslave, tmattach, tmdgo, tmstd, "te", tedinfo, "tm", tmminfo, 0 }; 651919Swnj 661919Swnj /* bits in minor device */ 673095Swnj #define TEUNIT(dev) (minor(dev)&03) 683095Swnj #define TMUNIT(dev) (tetotm[TEUNIT(dev)]) 691919Swnj #define T_NOREWIND 04 701919Swnj #define T_1600BPI 08 711919Swnj 721919Swnj #define INF (daddr_t)1000000L 731919Swnj 742608Swnj /* 752608Swnj * Software state per tape transport. 763095Swnj * 773095Swnj * 1. A tape drive is a unique-open device; we refuse opens when it is already. 783095Swnj * 2. We keep track of the current position on a block tape and seek 793095Swnj * before operations by forward/back spacing if necessary. 803095Swnj * 3. We remember if the last operation was a write on a tape, so if a tape 813095Swnj * is open read write and the last thing done is a write we can 823095Swnj * write a standard end of tape mark (two eofs). 833095Swnj * 4. We remember the status registers after the last command, using 843095Swnj * then internally and returning them to the SENSE ioctl. 853095Swnj * 5. We remember the last density the tape was used at. If it is 863095Swnj * not a BOT when we start using it and we are writing, we don't 873095Swnj * let the density be changed. 882608Swnj */ 893095Swnj struct te_softc { 902608Swnj char sc_openf; /* lock against multiple opens */ 912608Swnj char sc_lastiow; /* last op was a write */ 922608Swnj daddr_t sc_blkno; /* block number, for block device tape */ 933095Swnj daddr_t sc_nxrec; /* position of end of tape, if known */ 942608Swnj u_short sc_erreg; /* copy of last erreg */ 952608Swnj u_short sc_dsreg; /* copy of last dsreg */ 962608Swnj short sc_resid; /* copy of last bc */ 973105Swnj #ifdef unneeded 982670Swnj short sc_lastcmd; /* last command to handle direction changes */ 992928Swnj #endif 1003095Swnj u_short sc_dens; /* prototype command with density info */ 1013495Sroot daddr_t sc_timo; /* time until timeout expires */ 1023495Sroot short sc_tact; /* timeout is active */ 1033095Swnj } te_softc[NTM]; 1043105Swnj #ifdef unneeded 1053105Swnj int tmgapsdcnt; /* DEBUG */ 1063105Swnj #endif 1071919Swnj 1082608Swnj /* 1093095Swnj * States for um->um_tab.b_active, the per controller state flag. 1103095Swnj * This is used to sequence control in the driver. 1112608Swnj */ 1121919Swnj #define SSEEK 1 /* seeking */ 1131919Swnj #define SIO 2 /* doing seq i/o */ 1141919Swnj #define SCOM 3 /* sending control command */ 1152608Swnj #define SREW 4 /* sending a drive rewind */ 1161919Swnj 1173519Sroot #if NTS > 0 1182426Skre /* 1193519Sroot * Kludge to get around fact that we don't really 1203519Sroot * check if a ts is there... if there are both tm's and ts's 1213519Sroot * declared in the system, then this driver sets havetm to 1 1223519Sroot * if it finds a tm, and ts just pretends there isn't a ts. 1233519Sroot */ 1243519Sroot int havetm = 0; 1253519Sroot #endif 1263519Sroot /* 1272426Skre * Determine if there is a controller for 1282426Skre * a tm at address reg. Our goal is to make the 1292426Skre * device interrupt. 1302426Skre */ 1312608Swnj tmprobe(reg) 1322396Swnj caddr_t reg; 1332396Swnj { 1343095Swnj register int br, cvec; /* must be r11,r10; value-result */ 1352426Skre 1362608Swnj #ifdef lint 1373105Swnj br = 0; cvec = br; br = cvec; 1382608Swnj #endif 1392608Swnj ((struct device *)reg)->tmcs = TM_IE; 1402396Swnj /* 1412630Swnj * If this is a tm11, it ought to have interrupted 1422396Swnj * by now, if it isn't (ie: it is a ts04) then we just 1432458Swnj * hope that it didn't interrupt, so autoconf will ignore it. 1442458Swnj * Just in case, we will reference one 1452396Swnj * of the more distant registers, and hope for a machine 1462458Swnj * check, or similar disaster if this is a ts. 1472471Swnj * 1482471Swnj * Note: on an 11/780, badaddr will just generate 1492471Swnj * a uba error for a ts; but our caller will notice that 1502471Swnj * so we won't check for it. 1512396Swnj */ 1523105Swnj if (badaddr((caddr_t)&((struct device *)reg)->tmrd, 2)) 1532458Swnj return (0); 1542458Swnj return (1); 1552396Swnj } 1562396Swnj 1572608Swnj /* 1582608Swnj * Due to a design flaw, we cannot ascertain if the tape 1592608Swnj * exists or not unless it is on line - ie: unless a tape is 1602608Swnj * mounted. This is too servere a restriction to bear, 1612608Swnj * so all units are assumed to exist. 1622608Swnj */ 1632608Swnj /*ARGSUSED*/ 1642574Swnj tmslave(ui, reg) 1652982Swnj struct uba_device *ui; 1662396Swnj caddr_t reg; 1672396Swnj { 1682458Swnj 1692458Swnj return (1); 1702396Swnj } 1712396Swnj 1722608Swnj /* 1733095Swnj * Record attachment of the unit to the controller. 1742608Swnj */ 1752608Swnj /*ARGSUSED*/ 1762608Swnj tmattach(ui) 1772982Swnj struct uba_device *ui; 1782608Swnj { 1792608Swnj 1803519Sroot #if NTS > 0 1813519Sroot havetm = 1; 1823519Sroot #endif 1833095Swnj /* 1843095Swnj * Tetotm is used in TMUNIT to index the ctmbuf and rtmbuf 1853095Swnj * arrays given a te unit number. 1863095Swnj */ 1873095Swnj tetotm[ui->ui_unit] = ui->ui_mi->um_ctlr; 1882608Swnj } 1892608Swnj 1903495Sroot int tmtimer(); 1912608Swnj /* 1922608Swnj * Open the device. Tapes are unique open 1932608Swnj * devices, so we refuse if it is already open. 1942608Swnj * We also check that a tape is available, and 1953095Swnj * don't block waiting here; if you want to wait 1963095Swnj * for a tape you should timeout in user code. 1972608Swnj */ 1981919Swnj tmopen(dev, flag) 1991919Swnj dev_t dev; 2001919Swnj int flag; 2011919Swnj { 2023095Swnj register int teunit; 2032982Swnj register struct uba_device *ui; 2043095Swnj register struct te_softc *sc; 2053209Swnj int olddens, dens; 2061919Swnj 2073095Swnj teunit = TEUNIT(dev); 2083095Swnj if (teunit>=NTE || (sc = &te_softc[teunit])->sc_openf || 2093095Swnj (ui = tedinfo[teunit]) == 0 || ui->ui_alive == 0) { 2102608Swnj u.u_error = ENXIO; 2111919Swnj return; 2121919Swnj } 2133209Swnj olddens = sc->sc_dens; 2143209Swnj dens = TM_IE | TM_GO | (ui->ui_slave << 8); 2153209Swnj if ((minor(dev) & T_1600BPI) == 0) 2163209Swnj dens |= TM_D800; 2173209Swnj sc->sc_dens = dens; 2183141Swnj get: 2192608Swnj tmcommand(dev, TM_SENSE, 1); 2203141Swnj if (sc->sc_erreg&TMER_SDWN) { 2213141Swnj sleep((caddr_t)&lbolt, PZERO+1); 2223141Swnj goto get; 2233141Swnj } 2243209Swnj sc->sc_dens = olddens; 2253710Sroot if ((sc->sc_erreg&(TMER_SELR|TMER_TUR)) != (TMER_SELR|TMER_TUR)) { 2263710Sroot uprintf("te%d: not online\n", teunit); 2272471Swnj u.u_error = EIO; 2282608Swnj return; 2291919Swnj } 2303710Sroot if ((flag&FWRITE) && (sc->sc_erreg&TMER_WRL)) { 2313710Sroot uprintf("te%d: no write ring\n", teunit); 2323710Sroot u.u_error = EIO; 2333710Sroot return; 2343710Sroot } 2353710Sroot if ((sc->sc_erreg&TMER_BOT) == 0 && (flag&FWRITE) && 2363710Sroot dens != sc->sc_dens) { 2373710Sroot uprintf("te%d: can't change density in mid-tape\n", teunit); 2383710Sroot u.u_error = EIO; 2393710Sroot return; 2403710Sroot } 2412608Swnj sc->sc_openf = 1; 2422471Swnj sc->sc_blkno = (daddr_t)0; 2432471Swnj sc->sc_nxrec = INF; 2442608Swnj sc->sc_lastiow = 0; 2453095Swnj sc->sc_dens = dens; 2463495Sroot (void) spl6(); 2473495Sroot if (sc->sc_tact == 0) { 2483495Sroot sc->sc_timo = INF; 2493495Sroot sc->sc_tact = 1; 2503629Sroot timeout(tmtimer, (caddr_t)dev, 5*hz); 2513495Sroot } 2523495Sroot (void) spl0(); 2531919Swnj } 2541919Swnj 2552608Swnj /* 2562608Swnj * Close tape device. 2572608Swnj * 2582608Swnj * If tape was open for writing or last operation was 2592608Swnj * a write, then write two EOF's and backspace over the last one. 2602608Swnj * Unless this is a non-rewinding special file, rewind the tape. 2612608Swnj * Make the tape available to others. 2622608Swnj */ 2631919Swnj tmclose(dev, flag) 2641919Swnj register dev_t dev; 2651919Swnj register flag; 2661919Swnj { 2673095Swnj register struct te_softc *sc = &te_softc[TEUNIT(dev)]; 2681919Swnj 2692608Swnj if (flag == FWRITE || (flag&FWRITE) && sc->sc_lastiow) { 2702608Swnj tmcommand(dev, TM_WEOF, 1); 2712608Swnj tmcommand(dev, TM_WEOF, 1); 2722608Swnj tmcommand(dev, TM_SREV, 1); 2731919Swnj } 2741919Swnj if ((minor(dev)&T_NOREWIND) == 0) 2753095Swnj /* 2763095Swnj * 0 count means don't hang waiting for rewind complete 2773095Swnj * rather ctmbuf stays busy until the operation completes 2783095Swnj * preventing further opens from completing by 2793095Swnj * preventing a TM_SENSE from completing. 2803095Swnj */ 2813095Swnj tmcommand(dev, TM_REW, 0); 2822471Swnj sc->sc_openf = 0; 2831919Swnj } 2841919Swnj 2852608Swnj /* 2862608Swnj * Execute a command on the tape drive 2872608Swnj * a specified number of times. 2882608Swnj */ 2892574Swnj tmcommand(dev, com, count) 2901919Swnj dev_t dev; 2911919Swnj int com, count; 2921919Swnj { 2931919Swnj register struct buf *bp; 2941919Swnj 2952608Swnj bp = &ctmbuf[TMUNIT(dev)]; 2961919Swnj (void) spl5(); 2971919Swnj while (bp->b_flags&B_BUSY) { 2983095Swnj /* 2993095Swnj * This special check is because B_BUSY never 3003095Swnj * gets cleared in the non-waiting rewind case. 3013095Swnj */ 3023141Swnj if (bp->b_repcnt == 0 && (bp->b_flags&B_DONE)) 3033095Swnj break; 3041919Swnj bp->b_flags |= B_WANTED; 3051919Swnj sleep((caddr_t)bp, PRIBIO); 3061919Swnj } 3071919Swnj bp->b_flags = B_BUSY|B_READ; 3081919Swnj (void) spl0(); 3091919Swnj bp->b_dev = dev; 3101919Swnj bp->b_repcnt = -count; 3111919Swnj bp->b_command = com; 3121919Swnj bp->b_blkno = 0; 3131919Swnj tmstrategy(bp); 3143095Swnj /* 3153095Swnj * In case of rewind from close, don't wait. 3163095Swnj * This is the only case where count can be 0. 3173095Swnj */ 3183095Swnj if (count == 0) 3193095Swnj return; 3201919Swnj iowait(bp); 3211919Swnj if (bp->b_flags&B_WANTED) 3221919Swnj wakeup((caddr_t)bp); 3231919Swnj bp->b_flags &= B_ERROR; 3241919Swnj } 3251919Swnj 3262608Swnj /* 3273095Swnj * Queue a tape operation. 3282608Swnj */ 3291919Swnj tmstrategy(bp) 3301919Swnj register struct buf *bp; 3311919Swnj { 3323095Swnj int teunit = TEUNIT(bp->b_dev); 3332982Swnj register struct uba_ctlr *um; 3342608Swnj register struct buf *dp; 3351919Swnj 3362608Swnj /* 3372608Swnj * Put transfer at end of unit queue 3382608Swnj */ 3393095Swnj dp = &teutab[teunit]; 3401919Swnj bp->av_forw = NULL; 3411919Swnj (void) spl5(); 3423939Sbugs um = tedinfo[teunit]->ui_mi; 3432608Swnj if (dp->b_actf == NULL) { 3442608Swnj dp->b_actf = bp; 3452608Swnj /* 3462608Swnj * Transport not already active... 3472608Swnj * put at end of controller queue. 3482608Swnj */ 3492608Swnj dp->b_forw = NULL; 3502608Swnj if (um->um_tab.b_actf == NULL) 3512608Swnj um->um_tab.b_actf = dp; 3522608Swnj else 3532608Swnj um->um_tab.b_actl->b_forw = dp; 3542608Swnj um->um_tab.b_actl = dp; 3552608Swnj } else 3562608Swnj dp->b_actl->av_forw = bp; 3572608Swnj dp->b_actl = bp; 3582608Swnj /* 3592608Swnj * If the controller is not busy, get 3602608Swnj * it going. 3612608Swnj */ 3622608Swnj if (um->um_tab.b_active == 0) 3632608Swnj tmstart(um); 3641919Swnj (void) spl0(); 3651919Swnj } 3661919Swnj 3672608Swnj /* 3682608Swnj * Start activity on a tm controller. 3692608Swnj */ 3702608Swnj tmstart(um) 3712982Swnj register struct uba_ctlr *um; 3721919Swnj { 3732608Swnj register struct buf *bp, *dp; 3742608Swnj register struct device *addr = (struct device *)um->um_addr; 3753095Swnj register struct te_softc *sc; 3762982Swnj register struct uba_device *ui; 3773095Swnj int teunit, cmd; 3782471Swnj daddr_t blkno; 3791919Swnj 3802608Swnj /* 3812608Swnj * Look for an idle transport on the controller. 3822608Swnj */ 3831919Swnj loop: 3842608Swnj if ((dp = um->um_tab.b_actf) == NULL) 3851919Swnj return; 3862608Swnj if ((bp = dp->b_actf) == NULL) { 3872608Swnj um->um_tab.b_actf = dp->b_forw; 3882608Swnj goto loop; 3892608Swnj } 3903095Swnj teunit = TEUNIT(bp->b_dev); 3913095Swnj ui = tedinfo[teunit]; 3922608Swnj /* 3932608Swnj * Record pre-transfer status (e.g. for TM_SENSE) 3942608Swnj */ 3953095Swnj sc = &te_softc[teunit]; 3962608Swnj addr = (struct device *)um->um_addr; 3972608Swnj addr->tmcs = (ui->ui_slave << 8); 3982471Swnj sc->sc_dsreg = addr->tmcs; 3992471Swnj sc->sc_erreg = addr->tmer; 4002471Swnj sc->sc_resid = addr->tmbc; 4012608Swnj /* 4022608Swnj * Default is that last command was NOT a write command; 4032608Swnj * if we do a write command we will notice this in tmintr(). 4042608Swnj */ 4053493Sroot sc->sc_lastiow = 0; 4062608Swnj if (sc->sc_openf < 0 || (addr->tmcs&TM_CUR) == 0) { 4072608Swnj /* 4083095Swnj * Have had a hard error on a non-raw tape 4093095Swnj * or the tape unit is now unavailable 4103095Swnj * (e.g. taken off line). 4112608Swnj */ 4122608Swnj bp->b_flags |= B_ERROR; 4131919Swnj goto next; 4141919Swnj } 4153095Swnj if (bp == &ctmbuf[TMUNIT(bp->b_dev)]) { 4163095Swnj /* 4173095Swnj * Execute control operation with the specified count. 4183095Swnj */ 4192608Swnj if (bp->b_command == TM_SENSE) 4202608Swnj goto next; 4213495Sroot /* 4223495Sroot * Set next state; give 5 minutes to complete 4233495Sroot * rewind, or 10 seconds per iteration (minimum 60 4243629Sroot * seconds and max 5 minutes) to complete other ops. 4253495Sroot */ 4263495Sroot if (bp->b_command == TM_REW) { 4273495Sroot um->um_tab.b_active = SREW; 4283495Sroot sc->sc_timo = 5 * 60; 4293495Sroot } else { 4303495Sroot um->um_tab.b_active = SCOM; 4314266Swnj sc->sc_timo = 4324266Swnj imin(imax(10*(int)-bp->b_repcnt,60),5*60); 4333495Sroot } 4342608Swnj if (bp->b_command == TM_SFORW || bp->b_command == TM_SREV) 4352608Swnj addr->tmbc = bp->b_repcnt; 4362670Swnj goto dobpcmd; 4372608Swnj } 4382608Swnj /* 4393095Swnj * The following checks handle boundary cases for operation 4403095Swnj * on non-raw tapes. On raw tapes the initialization of 4413095Swnj * sc->sc_nxrec by tmphys causes them to be skipped normally 4423095Swnj * (except in the case of retries). 4433095Swnj */ 4443095Swnj if (dbtofsb(bp->b_blkno) > sc->sc_nxrec) { 4453095Swnj /* 4463095Swnj * Can't read past known end-of-file. 4473095Swnj */ 4483095Swnj bp->b_flags |= B_ERROR; 4493095Swnj bp->b_error = ENXIO; 4503095Swnj goto next; 4513095Swnj } 4523095Swnj if (dbtofsb(bp->b_blkno) == sc->sc_nxrec && 4533095Swnj bp->b_flags&B_READ) { 4543095Swnj /* 4553095Swnj * Reading at end of file returns 0 bytes. 4563095Swnj */ 4573095Swnj bp->b_resid = bp->b_bcount; 4583095Swnj clrbuf(bp); 4593095Swnj goto next; 4603095Swnj } 4613095Swnj if ((bp->b_flags&B_READ) == 0) 4623095Swnj /* 4633095Swnj * Writing sets EOF 4643095Swnj */ 4653095Swnj sc->sc_nxrec = dbtofsb(bp->b_blkno) + 1; 4663095Swnj /* 4672608Swnj * If the data transfer command is in the correct place, 4682608Swnj * set up all the registers except the csr, and give 4692608Swnj * control over to the UNIBUS adapter routines, to 4702608Swnj * wait for resources to start the i/o. 4712608Swnj */ 4722471Swnj if ((blkno = sc->sc_blkno) == dbtofsb(bp->b_blkno)) { 4732396Swnj addr->tmbc = -bp->b_bcount; 4741919Swnj if ((bp->b_flags&B_READ) == 0) { 4752471Swnj if (um->um_tab.b_errcnt) 4763095Swnj cmd = TM_WIRG; 4771919Swnj else 4783095Swnj cmd = TM_WCOM; 4791919Swnj } else 4803095Swnj cmd = TM_RCOM; 4812471Swnj um->um_tab.b_active = SIO; 4823095Swnj um->um_cmd = sc->sc_dens|cmd; 4832928Swnj #ifdef notdef 4842670Swnj if (tmreverseop(sc->sc_lastcmd)) 4853095Swnj while (addr->tmer & TMER_SDWN) 4862670Swnj tmgapsdcnt++; 4872670Swnj sc->sc_lastcmd = TM_RCOM; /* will serve */ 4882928Swnj #endif 4893495Sroot sc->sc_timo = 60; /* premature, but should serve */ 4903105Swnj (void) ubago(ui); 4911919Swnj return; 4921919Swnj } 4932608Swnj /* 4943095Swnj * Tape positioned incorrectly; 4953095Swnj * set to seek forwards or backwards to the correct spot. 4963095Swnj * This happens for raw tapes only on error retries. 4972608Swnj */ 4982471Swnj um->um_tab.b_active = SSEEK; 4991919Swnj if (blkno < dbtofsb(bp->b_blkno)) { 5002670Swnj bp->b_command = TM_SFORW; 5012396Swnj addr->tmbc = blkno - dbtofsb(bp->b_blkno); 5021919Swnj } else { 5032670Swnj bp->b_command = TM_SREV; 5042396Swnj addr->tmbc = dbtofsb(bp->b_blkno) - blkno; 5051919Swnj } 5063629Sroot sc->sc_timo = imin(imax(10 * -addr->tmbc, 60), 5 * 60); 5072670Swnj dobpcmd: 5082928Swnj #ifdef notdef 5093095Swnj /* 5103095Swnj * It is strictly necessary to wait for the tape 5113095Swnj * to stop before changing directions, but the TC11 5123095Swnj * handles this for us. 5133095Swnj */ 5142670Swnj if (tmreverseop(sc->sc_lastcmd) != tmreverseop(bp->b_command)) 5152670Swnj while (addr->tmer & TM_SDWN) 5162670Swnj tmgapsdcnt++; 5172670Swnj sc->sc_lastcmd = bp->b_command; 5182928Swnj #endif 5193095Swnj /* 5203095Swnj * Do the command in bp. 5213095Swnj */ 5223095Swnj addr->tmcs = (sc->sc_dens | bp->b_command); 5231919Swnj return; 5241919Swnj 5251919Swnj next: 5262608Swnj /* 5272608Swnj * Done with this operation due to error or 5282608Swnj * the fact that it doesn't do anything. 5292608Swnj * Release UBA resources (if any), dequeue 5302608Swnj * the transfer and continue processing this slave. 5312608Swnj */ 5322608Swnj if (um->um_ubinfo) 5332617Swnj ubadone(um); 5342608Swnj um->um_tab.b_errcnt = 0; 5352608Swnj dp->b_actf = bp->av_forw; 5361919Swnj iodone(bp); 5371919Swnj goto loop; 5381919Swnj } 5391919Swnj 5402608Swnj /* 5412608Swnj * The UNIBUS resources we needed have been 5422608Swnj * allocated to us; start the device. 5432608Swnj */ 5442574Swnj tmdgo(um) 5452982Swnj register struct uba_ctlr *um; 5461919Swnj { 5472574Swnj register struct device *addr = (struct device *)um->um_addr; 5482471Swnj 5492574Swnj addr->tmba = um->um_ubinfo; 5502574Swnj addr->tmcs = um->um_cmd | ((um->um_ubinfo >> 12) & 0x30); 5512396Swnj } 5522396Swnj 5532608Swnj /* 5542608Swnj * Tm interrupt routine. 5552608Swnj */ 5562471Swnj /*ARGSUSED*/ 5572630Swnj tmintr(tm11) 5582630Swnj int tm11; 5592396Swnj { 5602608Swnj struct buf *dp; 5611919Swnj register struct buf *bp; 5622982Swnj register struct uba_ctlr *um = tmminfo[tm11]; 5633095Swnj register struct device *addr; 5643095Swnj register struct te_softc *sc; 5653095Swnj int teunit; 5661919Swnj register state; 5671919Swnj 5683095Swnj if ((dp = um->um_tab.b_actf) == NULL) 5693095Swnj return; 5703095Swnj bp = dp->b_actf; 5713095Swnj teunit = TEUNIT(bp->b_dev); 5723095Swnj addr = (struct device *)tedinfo[teunit]->ui_addr; 5733524Swnj sc = &te_softc[teunit]; 5742608Swnj /* 5752608Swnj * If last command was a rewind, and tape is still 5762608Swnj * rewinding, wait for the rewind complete interrupt. 5772608Swnj */ 5782608Swnj if (um->um_tab.b_active == SREW) { 5792608Swnj um->um_tab.b_active = SCOM; 5803524Swnj if (addr->tmer&TMER_RWS) { 5813524Swnj sc->sc_timo = 5*60; /* 5 minutes */ 5822608Swnj return; 5833524Swnj } 5841919Swnj } 5852608Swnj /* 5862608Swnj * An operation completed... record status 5872608Swnj */ 5883495Sroot sc->sc_timo = INF; 5892471Swnj sc->sc_dsreg = addr->tmcs; 5902471Swnj sc->sc_erreg = addr->tmer; 5912471Swnj sc->sc_resid = addr->tmbc; 5921919Swnj if ((bp->b_flags & B_READ) == 0) 5932608Swnj sc->sc_lastiow = 1; 5942471Swnj state = um->um_tab.b_active; 5952471Swnj um->um_tab.b_active = 0; 5962608Swnj /* 5972608Swnj * Check for errors. 5982608Swnj */ 5992608Swnj if (addr->tmcs&TM_ERR) { 6003095Swnj while (addr->tmer & TMER_SDWN) 6011919Swnj ; /* await settle down */ 6022608Swnj /* 6033095Swnj * If we hit the end of the tape file, update our position. 6042608Swnj */ 6053095Swnj if (addr->tmer&TMER_EOF) { 6062608Swnj tmseteof(bp); /* set blkno and nxrec */ 6072608Swnj state = SCOM; /* force completion */ 6082608Swnj /* 6092608Swnj * Stuff bc so it will be unstuffed correctly 6102608Swnj * later to get resid. 6112608Swnj */ 6122396Swnj addr->tmbc = -bp->b_bcount; 6132608Swnj goto opdone; 6141919Swnj } 6152608Swnj /* 6163095Swnj * If we were reading raw tape and the only error was that the 6173095Swnj * record was too long, then we don't consider this an error. 6182608Swnj */ 6193095Swnj if (bp == &rtmbuf[TMUNIT(bp->b_dev)] && (bp->b_flags&B_READ) && 6203095Swnj (addr->tmer&(TMER_HARD|TMER_SOFT)) == TMER_RLE) 6212608Swnj goto ignoreerr; 6222608Swnj /* 6232608Swnj * If error is not hard, and this was an i/o operation 6242608Swnj * retry up to 8 times. 6252608Swnj */ 6263095Swnj if ((addr->tmer&TMER_HARD)==0 && state==SIO) { 6272471Swnj if (++um->um_tab.b_errcnt < 7) { 6282471Swnj sc->sc_blkno++; 6292617Swnj ubadone(um); 6302608Swnj goto opcont; 6311919Swnj } 6322608Swnj } else 6332608Swnj /* 6342608Swnj * Hard or non-i/o errors on non-raw tape 6352608Swnj * cause it to close. 6362608Swnj */ 6373095Swnj if (sc->sc_openf>0 && bp != &rtmbuf[TMUNIT(bp->b_dev)]) 6382608Swnj sc->sc_openf = -1; 6392608Swnj /* 6402608Swnj * Couldn't recover error 6412608Swnj */ 6422928Swnj printf("te%d: hard error bn%d er=%b\n", minor(bp->b_dev)&03, 6433095Swnj bp->b_blkno, sc->sc_erreg, TMER_BITS); 6441919Swnj bp->b_flags |= B_ERROR; 6452608Swnj goto opdone; 6461919Swnj } 6472608Swnj /* 6482608Swnj * Advance tape control FSM. 6492608Swnj */ 6502608Swnj ignoreerr: 6511919Swnj switch (state) { 6521919Swnj 6531919Swnj case SIO: 6542608Swnj /* 6552608Swnj * Read/write increments tape block number 6562608Swnj */ 6572471Swnj sc->sc_blkno++; 6582608Swnj goto opdone; 6591919Swnj 6601919Swnj case SCOM: 6612608Swnj /* 6623095Swnj * For forward/backward space record update current position. 6632608Swnj */ 6643095Swnj if (bp == &ctmbuf[TMUNIT(bp->b_dev)]) 6652608Swnj switch (bp->b_command) { 6661919Swnj 6672608Swnj case TM_SFORW: 6682608Swnj sc->sc_blkno -= bp->b_repcnt; 6693095Swnj break; 6701919Swnj 6712608Swnj case TM_SREV: 6722608Swnj sc->sc_blkno += bp->b_repcnt; 6733095Swnj break; 6741919Swnj } 6753095Swnj goto opdone; 6761919Swnj 6771919Swnj case SSEEK: 6782471Swnj sc->sc_blkno = dbtofsb(bp->b_blkno); 6792608Swnj goto opcont; 6801919Swnj 6811919Swnj default: 6822608Swnj panic("tmintr"); 6832608Swnj } 6842608Swnj opdone: 6852608Swnj /* 6862608Swnj * Reset error count and remove 6872608Swnj * from device queue. 6882608Swnj */ 6892608Swnj um->um_tab.b_errcnt = 0; 6902608Swnj dp->b_actf = bp->av_forw; 6912608Swnj bp->b_resid = -addr->tmbc; 6922617Swnj ubadone(um); 6932608Swnj iodone(bp); 6942608Swnj /* 6952608Swnj * Circulate slave to end of controller 6962608Swnj * queue to give other slaves a chance. 6972608Swnj */ 6982608Swnj um->um_tab.b_actf = dp->b_forw; 6992608Swnj if (dp->b_actf) { 7002608Swnj dp->b_forw = NULL; 7012608Swnj if (um->um_tab.b_actf == NULL) 7022608Swnj um->um_tab.b_actf = dp; 7032608Swnj else 7042608Swnj um->um_tab.b_actl->b_forw = dp; 7052608Swnj um->um_tab.b_actl = dp; 7062608Swnj } 7072608Swnj if (um->um_tab.b_actf == 0) 7081919Swnj return; 7092608Swnj opcont: 7102608Swnj tmstart(um); 7111919Swnj } 7121919Swnj 7133495Sroot tmtimer(dev) 7143495Sroot int dev; 7153495Sroot { 7163495Sroot register struct te_softc *sc = &te_softc[TEUNIT(dev)]; 717*4847Sroot register short x; 7183495Sroot 7193495Sroot if (sc->sc_timo != INF && (sc->sc_timo -= 5) < 0) { 7204278Sroot printf("te%d: lost interrupt\n", TEUNIT(dev)); 7213495Sroot sc->sc_timo = INF; 722*4847Sroot x = spl5(); 7233495Sroot tmintr(TMUNIT(dev)); 724*4847Sroot (void) splx(x); 7253495Sroot } 7263629Sroot timeout(tmtimer, (caddr_t)dev, 5*hz); 7273495Sroot } 7283495Sroot 7291919Swnj tmseteof(bp) 7301919Swnj register struct buf *bp; 7311919Swnj { 7323095Swnj register int teunit = TEUNIT(bp->b_dev); 7332396Swnj register struct device *addr = 7343095Swnj (struct device *)tedinfo[teunit]->ui_addr; 7353095Swnj register struct te_softc *sc = &te_softc[teunit]; 7361919Swnj 7373095Swnj if (bp == &ctmbuf[TMUNIT(bp->b_dev)]) { 7382471Swnj if (sc->sc_blkno > dbtofsb(bp->b_blkno)) { 7391919Swnj /* reversing */ 7402471Swnj sc->sc_nxrec = dbtofsb(bp->b_blkno) - addr->tmbc; 7412471Swnj sc->sc_blkno = sc->sc_nxrec; 7421919Swnj } else { 7431919Swnj /* spacing forward */ 7442471Swnj sc->sc_blkno = dbtofsb(bp->b_blkno) + addr->tmbc; 7452471Swnj sc->sc_nxrec = sc->sc_blkno - 1; 7461919Swnj } 7471919Swnj return; 7481919Swnj } 7491919Swnj /* eof on read */ 7502471Swnj sc->sc_nxrec = dbtofsb(bp->b_blkno); 7511919Swnj } 7521919Swnj 7531919Swnj tmread(dev) 7542608Swnj dev_t dev; 7551919Swnj { 7561919Swnj 7571919Swnj tmphys(dev); 7582982Swnj if (u.u_error) 7592982Swnj return; 7602608Swnj physio(tmstrategy, &rtmbuf[TMUNIT(dev)], dev, B_READ, minphys); 7611919Swnj } 7621919Swnj 7631919Swnj tmwrite(dev) 7642608Swnj dev_t dev; 7651919Swnj { 7661919Swnj 7671919Swnj tmphys(dev); 7682982Swnj if (u.u_error) 7692982Swnj return; 7702608Swnj physio(tmstrategy, &rtmbuf[TMUNIT(dev)], dev, B_WRITE, minphys); 7711919Swnj } 7721919Swnj 7733095Swnj /* 7743095Swnj * Check that a raw device exists. 7753095Swnj * If it does, set up sc_blkno and sc_nxrec 7763095Swnj * so that the tape will appear positioned correctly. 7773095Swnj */ 7781919Swnj tmphys(dev) 7792608Swnj dev_t dev; 7801919Swnj { 7813095Swnj register int teunit = TEUNIT(dev); 7821919Swnj register daddr_t a; 7833095Swnj register struct te_softc *sc; 7843095Swnj register struct uba_device *ui; 7851919Swnj 7863095Swnj if (teunit >= NTE || (ui=tedinfo[teunit]) == 0 || ui->ui_alive == 0) { 7872982Swnj u.u_error = ENXIO; 7882982Swnj return; 7892982Swnj } 7903095Swnj sc = &te_softc[teunit]; 7911919Swnj a = dbtofsb(u.u_offset >> 9); 7922471Swnj sc->sc_blkno = a; 7932471Swnj sc->sc_nxrec = a + 1; 7941919Swnj } 7951919Swnj 7962608Swnj tmreset(uban) 7972608Swnj int uban; 7982608Swnj { 7992982Swnj register struct uba_ctlr *um; 8003095Swnj register tm11, teunit; 8012982Swnj register struct uba_device *ui; 8022608Swnj register struct buf *dp; 8032608Swnj 8042630Swnj for (tm11 = 0; tm11 < NTM; tm11++) { 8052630Swnj if ((um = tmminfo[tm11]) == 0 || um->um_alive == 0 || 8062608Swnj um->um_ubanum != uban) 8072608Swnj continue; 8082928Swnj printf(" tm%d", tm11); 8092608Swnj um->um_tab.b_active = 0; 8102608Swnj um->um_tab.b_actf = um->um_tab.b_actl = 0; 8112608Swnj if (um->um_ubinfo) { 8122608Swnj printf("<%d>", (um->um_ubinfo>>28)&0xf); 8132617Swnj ubadone(um); 8142608Swnj } 8152608Swnj ((struct device *)(um->um_addr))->tmcs = TM_DCLR; 8163095Swnj for (teunit = 0; teunit < NTE; teunit++) { 8173095Swnj if ((ui = tedinfo[teunit]) == 0 || ui->ui_mi != um || 8183095Swnj ui->ui_alive == 0) 8192608Swnj continue; 8203095Swnj dp = &teutab[teunit]; 8212608Swnj dp->b_active = 0; 8222608Swnj dp->b_forw = 0; 8232608Swnj if (um->um_tab.b_actf == NULL) 8242608Swnj um->um_tab.b_actf = dp; 8252608Swnj else 8262608Swnj um->um_tab.b_actl->b_forw = dp; 8272608Swnj um->um_tab.b_actl = dp; 8283495Sroot if (te_softc[teunit].sc_openf > 0) 8293495Sroot te_softc[teunit].sc_openf = -1; 8302608Swnj } 8312608Swnj tmstart(um); 8322608Swnj } 8332608Swnj } 8342608Swnj 8351919Swnj /*ARGSUSED*/ 8361919Swnj tmioctl(dev, cmd, addr, flag) 8371919Swnj caddr_t addr; 8381919Swnj dev_t dev; 8391919Swnj { 8403095Swnj int teunit = TEUNIT(dev); 8413095Swnj register struct te_softc *sc = &te_softc[teunit]; 8423095Swnj register struct buf *bp = &ctmbuf[TMUNIT(dev)]; 8431919Swnj register callcount; 8441919Swnj int fcount; 8451919Swnj struct mtop mtop; 8461919Swnj struct mtget mtget; 8471919Swnj /* we depend of the values and order of the MT codes here */ 8482608Swnj static tmops[] = 8492608Swnj {TM_WEOF,TM_SFORW,TM_SREV,TM_SFORW,TM_SREV,TM_REW,TM_OFFL,TM_SENSE}; 8501919Swnj 8512608Swnj switch (cmd) { 8521919Swnj case MTIOCTOP: /* tape operation */ 8531919Swnj if (copyin((caddr_t)addr, (caddr_t)&mtop, sizeof(mtop))) { 8541919Swnj u.u_error = EFAULT; 8551919Swnj return; 8561919Swnj } 8571919Swnj switch(mtop.mt_op) { 8582608Swnj case MTWEOF: 8591919Swnj callcount = mtop.mt_count; 8602608Swnj fcount = 1; 8612608Swnj break; 8622608Swnj case MTFSF: case MTBSF: 8632608Swnj callcount = mtop.mt_count; 8641919Swnj fcount = INF; 8651919Swnj break; 8661919Swnj case MTFSR: case MTBSR: 8671919Swnj callcount = 1; 8681919Swnj fcount = mtop.mt_count; 8691919Swnj break; 8702324Skre case MTREW: case MTOFFL: case MTNOP: 8711919Swnj callcount = 1; 8721919Swnj fcount = 1; 8731919Swnj break; 8741919Swnj default: 8751919Swnj u.u_error = ENXIO; 8761919Swnj return; 8771919Swnj } 8782608Swnj if (callcount <= 0 || fcount <= 0) { 8791919Swnj u.u_error = ENXIO; 8802608Swnj return; 8812608Swnj } 8822608Swnj while (--callcount >= 0) { 8832574Swnj tmcommand(dev, tmops[mtop.mt_op], fcount); 8841919Swnj if ((mtop.mt_op == MTFSR || mtop.mt_op == MTBSR) && 8852608Swnj bp->b_resid) { 8861919Swnj u.u_error = EIO; 8871919Swnj break; 8881919Swnj } 8893095Swnj if ((bp->b_flags&B_ERROR) || sc->sc_erreg&TMER_BOT) 8901919Swnj break; 8911919Swnj } 8922608Swnj geterror(bp); 8931919Swnj return; 8941919Swnj case MTIOCGET: 8952471Swnj mtget.mt_dsreg = sc->sc_dsreg; 8962471Swnj mtget.mt_erreg = sc->sc_erreg; 8972471Swnj mtget.mt_resid = sc->sc_resid; 8983482Sroot mtget.mt_type = MT_ISTM; 8991919Swnj if (copyout((caddr_t)&mtget, addr, sizeof(mtget))) 9001919Swnj u.u_error = EFAULT; 9011919Swnj return; 9021919Swnj default: 9031919Swnj u.u_error = ENXIO; 9041919Swnj } 9051919Swnj } 9061919Swnj 9071919Swnj #define DBSIZE 20 9081919Swnj 9092363Swnj tmdump() 9102363Swnj { 9112982Swnj register struct uba_device *ui; 9122396Swnj register struct uba_regs *up; 9132396Swnj register struct device *addr; 9142426Skre int blk, num; 9152426Skre int start; 9161919Swnj 9172426Skre start = 0; 9182426Skre num = maxfree; 9192426Skre #define phys(a,b) ((b)((int)(a)&0x7fffffff)) 9203095Swnj if (tedinfo[0] == 0) 9212887Swnj return (ENXIO); 9223095Swnj ui = phys(tedinfo[0], struct uba_device *); 9232396Swnj up = phys(ui->ui_hd, struct uba_hd *)->uh_physuba; 9243331Swnj ubainit(up); 9252324Skre DELAY(1000000); 9262396Swnj addr = (struct device *)ui->ui_physaddr; 9272396Swnj tmwait(addr); 9282608Swnj addr->tmcs = TM_DCLR | TM_GO; 9291919Swnj while (num > 0) { 9301919Swnj blk = num > DBSIZE ? DBSIZE : num; 9312396Swnj tmdwrite(start, blk, addr, up); 9321919Swnj start += blk; 9331919Swnj num -= blk; 9341919Swnj } 9352426Skre tmeof(addr); 9362426Skre tmeof(addr); 9372426Skre tmwait(addr); 9382887Swnj if (addr->tmcs&TM_ERR) 9392887Swnj return (EIO); 9402608Swnj addr->tmcs = TM_REW | TM_GO; 9412471Swnj tmwait(addr); 9422363Swnj return (0); 9431919Swnj } 9441919Swnj 9452608Swnj tmdwrite(dbuf, num, addr, up) 9462608Swnj register dbuf, num; 9472396Swnj register struct device *addr; 9482396Swnj struct uba_regs *up; 9491919Swnj { 9502396Swnj register struct pte *io; 9512396Swnj register int npf; 9521928Swnj 9532396Swnj tmwait(addr); 9542396Swnj io = up->uba_map; 9551919Swnj npf = num+1; 9561928Swnj while (--npf != 0) 9572982Swnj *(int *)io++ = (dbuf++ | (1<<UBAMR_DPSHIFT) | UBAMR_MRV); 9582396Swnj *(int *)io = 0; 9592396Swnj addr->tmbc = -(num*NBPG); 9602396Swnj addr->tmba = 0; 9612608Swnj addr->tmcs = TM_WCOM | TM_GO; 9621919Swnj } 9631919Swnj 9642396Swnj tmwait(addr) 9652396Swnj register struct device *addr; 9661919Swnj { 9671928Swnj register s; 9681919Swnj 9691919Swnj do 9702396Swnj s = addr->tmcs; 9712608Swnj while ((s & TM_CUR) == 0); 9721919Swnj } 9731919Swnj 9742396Swnj tmeof(addr) 9752396Swnj struct device *addr; 9761919Swnj { 9771919Swnj 9782396Swnj tmwait(addr); 9792608Swnj addr->tmcs = TM_WEOF | TM_GO; 9801919Swnj } 9811919Swnj #endif 982