xref: /csrg-svn/sys/vax/uba/tm.c (revision 3495)
1*3495Sroot /*	tm.c	4.34	81/04/09	*/
21919Swnj 
32709Swnj #include "te.h"
42630Swnj #if NTM > 0
51919Swnj /*
62630Swnj  * TM11/TE10 tape driver
72471Swnj  *
83095Swnj  * TODO:
93095Swnj  *	test driver with more than one slave
103095Swnj  *	test driver with more than one controller
113095Swnj  *	test reset code
123095Swnj  *	what happens if you offline tape during rewind?
133095Swnj  *	test using file system on tape
141919Swnj  */
151919Swnj #include "../h/param.h"
163141Swnj #include "../h/systm.h"
171919Swnj #include "../h/buf.h"
181919Swnj #include "../h/dir.h"
191919Swnj #include "../h/conf.h"
201919Swnj #include "../h/user.h"
211919Swnj #include "../h/file.h"
221919Swnj #include "../h/map.h"
231919Swnj #include "../h/pte.h"
242574Swnj #include "../h/vm.h"
252982Swnj #include "../h/ubareg.h"
262982Swnj #include "../h/ubavar.h"
271919Swnj #include "../h/mtio.h"
281919Swnj #include "../h/ioctl.h"
292363Swnj #include "../h/cmap.h"
302396Swnj #include "../h/cpu.h"
311919Swnj 
322396Swnj #include "../h/tmreg.h"
331919Swnj 
343095Swnj /*
353095Swnj  * There is a ctmbuf per tape controller.
363095Swnj  * It is used as the token to pass to the internal routines
373095Swnj  * to execute tape ioctls, and also acts as a lock on the slaves
383095Swnj  * on the controller, since there is only one per controller.
393095Swnj  * In particular, when the tape is rewinding on close we release
403095Swnj  * the user process but any further attempts to use the tape drive
413095Swnj  * before the rewind completes will hang waiting for ctmbuf.
423095Swnj  */
433095Swnj struct	buf	ctmbuf[NTM];
441919Swnj 
453095Swnj /*
463095Swnj  * Raw tape operations use rtmbuf.  The driver
473095Swnj  * notices when rtmbuf is being used and allows the user
483095Swnj  * program to continue after errors and read records
493095Swnj  * not of the standard length (BSIZE).
503095Swnj  */
513095Swnj struct	buf	rtmbuf[NTM];
523095Swnj 
533095Swnj /*
543095Swnj  * Driver unibus interface routines and variables.
553095Swnj  */
562608Swnj int	tmprobe(), tmslave(), tmattach(), tmdgo(), tmintr();
572982Swnj struct	uba_ctlr *tmminfo[NTM];
583095Swnj struct	uba_device *tedinfo[NTE];
593095Swnj struct	buf teutab[NTE];
603095Swnj short	tetotm[NTE];
612458Swnj u_short	tmstd[] = { 0772520, 0 };
622396Swnj struct	uba_driver tmdriver =
633095Swnj  { tmprobe, tmslave, tmattach, tmdgo, tmstd, "te", tedinfo, "tm", tmminfo, 0 };
641919Swnj 
651919Swnj /* bits in minor device */
663095Swnj #define	TEUNIT(dev)	(minor(dev)&03)
673095Swnj #define	TMUNIT(dev)	(tetotm[TEUNIT(dev)])
681919Swnj #define	T_NOREWIND	04
691919Swnj #define	T_1600BPI	08
701919Swnj 
711919Swnj #define	INF	(daddr_t)1000000L
721919Swnj 
732608Swnj /*
742608Swnj  * Software state per tape transport.
753095Swnj  *
763095Swnj  * 1. A tape drive is a unique-open device; we refuse opens when it is already.
773095Swnj  * 2. We keep track of the current position on a block tape and seek
783095Swnj  *    before operations by forward/back spacing if necessary.
793095Swnj  * 3. We remember if the last operation was a write on a tape, so if a tape
803095Swnj  *    is open read write and the last thing done is a write we can
813095Swnj  *    write a standard end of tape mark (two eofs).
823095Swnj  * 4. We remember the status registers after the last command, using
833095Swnj  *    then internally and returning them to the SENSE ioctl.
843095Swnj  * 5. We remember the last density the tape was used at.  If it is
853095Swnj  *    not a BOT when we start using it and we are writing, we don't
863095Swnj  *    let the density be changed.
872608Swnj  */
883095Swnj struct	te_softc {
892608Swnj 	char	sc_openf;	/* lock against multiple opens */
902608Swnj 	char	sc_lastiow;	/* last op was a write */
912608Swnj 	daddr_t	sc_blkno;	/* block number, for block device tape */
923095Swnj 	daddr_t	sc_nxrec;	/* position of end of tape, if known */
932608Swnj 	u_short	sc_erreg;	/* copy of last erreg */
942608Swnj 	u_short	sc_dsreg;	/* copy of last dsreg */
952608Swnj 	short	sc_resid;	/* copy of last bc */
963105Swnj #ifdef unneeded
972670Swnj 	short	sc_lastcmd;	/* last command to handle direction changes */
982928Swnj #endif
993095Swnj 	u_short	sc_dens;	/* prototype command with density info */
100*3495Sroot 	daddr_t	sc_timo;	/* time until timeout expires */
101*3495Sroot 	short	sc_tact;	/* timeout is active */
1023095Swnj } te_softc[NTM];
1033105Swnj #ifdef unneeded
1043105Swnj int	tmgapsdcnt;		/* DEBUG */
1053105Swnj #endif
1061919Swnj 
1072608Swnj /*
1083095Swnj  * States for um->um_tab.b_active, the per controller state flag.
1093095Swnj  * This is used to sequence control in the driver.
1102608Swnj  */
1111919Swnj #define	SSEEK	1		/* seeking */
1121919Swnj #define	SIO	2		/* doing seq i/o */
1131919Swnj #define	SCOM	3		/* sending control command */
1142608Swnj #define	SREW	4		/* sending a drive rewind */
1151919Swnj 
1162426Skre /*
1172426Skre  * Determine if there is a controller for
1182426Skre  * a tm at address reg.  Our goal is to make the
1192426Skre  * device interrupt.
1202426Skre  */
1212608Swnj tmprobe(reg)
1222396Swnj 	caddr_t reg;
1232396Swnj {
1243095Swnj 	register int br, cvec;		/* must be r11,r10; value-result */
1252426Skre 
1262608Swnj #ifdef lint
1273105Swnj 	br = 0; cvec = br; br = cvec;
1282608Swnj #endif
1292608Swnj 	((struct device *)reg)->tmcs = TM_IE;
1302396Swnj 	/*
1312630Swnj 	 * If this is a tm11, it ought to have interrupted
1322396Swnj 	 * by now, if it isn't (ie: it is a ts04) then we just
1332458Swnj 	 * hope that it didn't interrupt, so autoconf will ignore it.
1342458Swnj 	 * Just in case, we will reference one
1352396Swnj 	 * of the more distant registers, and hope for a machine
1362458Swnj 	 * check, or similar disaster if this is a ts.
1372471Swnj 	 *
1382471Swnj 	 * Note: on an 11/780, badaddr will just generate
1392471Swnj 	 * a uba error for a ts; but our caller will notice that
1402471Swnj 	 * so we won't check for it.
1412396Swnj 	 */
1423105Swnj 	if (badaddr((caddr_t)&((struct device *)reg)->tmrd, 2))
1432458Swnj 		return (0);
1442458Swnj 	return (1);
1452396Swnj }
1462396Swnj 
1472608Swnj /*
1482608Swnj  * Due to a design flaw, we cannot ascertain if the tape
1492608Swnj  * exists or not unless it is on line - ie: unless a tape is
1502608Swnj  * mounted. This is too servere a restriction to bear,
1512608Swnj  * so all units are assumed to exist.
1522608Swnj  */
1532608Swnj /*ARGSUSED*/
1542574Swnj tmslave(ui, reg)
1552982Swnj 	struct uba_device *ui;
1562396Swnj 	caddr_t reg;
1572396Swnj {
1582458Swnj 
1592458Swnj 	return (1);
1602396Swnj }
1612396Swnj 
1622608Swnj /*
1633095Swnj  * Record attachment of the unit to the controller.
1642608Swnj  */
1652608Swnj /*ARGSUSED*/
1662608Swnj tmattach(ui)
1672982Swnj 	struct uba_device *ui;
1682608Swnj {
1692608Swnj 
1703095Swnj 	/*
1713095Swnj 	 * Tetotm is used in TMUNIT to index the ctmbuf and rtmbuf
1723095Swnj 	 * arrays given a te unit number.
1733095Swnj 	 */
1743095Swnj 	tetotm[ui->ui_unit] = ui->ui_mi->um_ctlr;
1752608Swnj }
1762608Swnj 
177*3495Sroot int	tmtimer();
1782608Swnj /*
1792608Swnj  * Open the device.  Tapes are unique open
1802608Swnj  * devices, so we refuse if it is already open.
1812608Swnj  * We also check that a tape is available, and
1823095Swnj  * don't block waiting here; if you want to wait
1833095Swnj  * for a tape you should timeout in user code.
1842608Swnj  */
1851919Swnj tmopen(dev, flag)
1861919Swnj 	dev_t dev;
1871919Swnj 	int flag;
1881919Swnj {
1893095Swnj 	register int teunit;
1902982Swnj 	register struct uba_device *ui;
1913095Swnj 	register struct te_softc *sc;
1923209Swnj 	int olddens, dens;
1931919Swnj 
1943095Swnj 	teunit = TEUNIT(dev);
1953095Swnj 	if (teunit>=NTE || (sc = &te_softc[teunit])->sc_openf ||
1963095Swnj 	    (ui = tedinfo[teunit]) == 0 || ui->ui_alive == 0) {
1972608Swnj 		u.u_error = ENXIO;
1981919Swnj 		return;
1991919Swnj 	}
2003209Swnj 	olddens = sc->sc_dens;
2013209Swnj 	dens = TM_IE | TM_GO | (ui->ui_slave << 8);
2023209Swnj 	if ((minor(dev) & T_1600BPI) == 0)
2033209Swnj 		dens |= TM_D800;
2043209Swnj 	sc->sc_dens = dens;
2053141Swnj get:
2062608Swnj 	tmcommand(dev, TM_SENSE, 1);
2073141Swnj 	if (sc->sc_erreg&TMER_SDWN) {
2083141Swnj 		sleep((caddr_t)&lbolt, PZERO+1);
2093141Swnj 		goto get;
2103141Swnj 	}
2113209Swnj 	sc->sc_dens = olddens;
2123095Swnj 	if ((sc->sc_erreg&(TMER_SELR|TMER_TUR)) != (TMER_SELR|TMER_TUR) ||
2133174Swnj 	    (flag&FWRITE) && (sc->sc_erreg&TMER_WRL) ||
2143095Swnj 	    (sc->sc_erreg&TMER_BOT) == 0 && (flag&FWRITE) &&
2153174Swnj 		dens != sc->sc_dens) {
2163095Swnj 		/*
2173095Swnj 		 * Not online or density switch in mid-tape or write locked.
2183095Swnj 		 */
2192471Swnj 		u.u_error = EIO;
2202608Swnj 		return;
2211919Swnj 	}
2222608Swnj 	sc->sc_openf = 1;
2232471Swnj 	sc->sc_blkno = (daddr_t)0;
2242471Swnj 	sc->sc_nxrec = INF;
2252608Swnj 	sc->sc_lastiow = 0;
2263095Swnj 	sc->sc_dens = dens;
227*3495Sroot 	(void) spl6();
228*3495Sroot 	if (sc->sc_tact == 0) {
229*3495Sroot 		sc->sc_timo = INF;
230*3495Sroot 		sc->sc_tact = 1;
231*3495Sroot 		timeout(tmtimer, dev, 5*hz);
232*3495Sroot 	}
233*3495Sroot 	(void) spl0();
2341919Swnj }
2351919Swnj 
2362608Swnj /*
2372608Swnj  * Close tape device.
2382608Swnj  *
2392608Swnj  * If tape was open for writing or last operation was
2402608Swnj  * a write, then write two EOF's and backspace over the last one.
2412608Swnj  * Unless this is a non-rewinding special file, rewind the tape.
2422608Swnj  * Make the tape available to others.
2432608Swnj  */
2441919Swnj tmclose(dev, flag)
2451919Swnj 	register dev_t dev;
2461919Swnj 	register flag;
2471919Swnj {
2483095Swnj 	register struct te_softc *sc = &te_softc[TEUNIT(dev)];
2491919Swnj 
2502608Swnj 	if (flag == FWRITE || (flag&FWRITE) && sc->sc_lastiow) {
2512608Swnj 		tmcommand(dev, TM_WEOF, 1);
2522608Swnj 		tmcommand(dev, TM_WEOF, 1);
2532608Swnj 		tmcommand(dev, TM_SREV, 1);
2541919Swnj 	}
2551919Swnj 	if ((minor(dev)&T_NOREWIND) == 0)
2563095Swnj 		/*
2573095Swnj 		 * 0 count means don't hang waiting for rewind complete
2583095Swnj 		 * rather ctmbuf stays busy until the operation completes
2593095Swnj 		 * preventing further opens from completing by
2603095Swnj 		 * preventing a TM_SENSE from completing.
2613095Swnj 		 */
2623095Swnj 		tmcommand(dev, TM_REW, 0);
2632471Swnj 	sc->sc_openf = 0;
2641919Swnj }
2651919Swnj 
2662608Swnj /*
2672608Swnj  * Execute a command on the tape drive
2682608Swnj  * a specified number of times.
2692608Swnj  */
2702574Swnj tmcommand(dev, com, count)
2711919Swnj 	dev_t dev;
2721919Swnj 	int com, count;
2731919Swnj {
2741919Swnj 	register struct buf *bp;
2751919Swnj 
2762608Swnj 	bp = &ctmbuf[TMUNIT(dev)];
2771919Swnj 	(void) spl5();
2781919Swnj 	while (bp->b_flags&B_BUSY) {
2793095Swnj 		/*
2803095Swnj 		 * This special check is because B_BUSY never
2813095Swnj 		 * gets cleared in the non-waiting rewind case.
2823095Swnj 		 */
2833141Swnj 		if (bp->b_repcnt == 0 && (bp->b_flags&B_DONE))
2843095Swnj 			break;
2851919Swnj 		bp->b_flags |= B_WANTED;
2861919Swnj 		sleep((caddr_t)bp, PRIBIO);
2871919Swnj 	}
2881919Swnj 	bp->b_flags = B_BUSY|B_READ;
2891919Swnj 	(void) spl0();
2901919Swnj 	bp->b_dev = dev;
2911919Swnj 	bp->b_repcnt = -count;
2921919Swnj 	bp->b_command = com;
2931919Swnj 	bp->b_blkno = 0;
2941919Swnj 	tmstrategy(bp);
2953095Swnj 	/*
2963095Swnj 	 * In case of rewind from close, don't wait.
2973095Swnj 	 * This is the only case where count can be 0.
2983095Swnj 	 */
2993095Swnj 	if (count == 0)
3003095Swnj 		return;
3011919Swnj 	iowait(bp);
3021919Swnj 	if (bp->b_flags&B_WANTED)
3031919Swnj 		wakeup((caddr_t)bp);
3041919Swnj 	bp->b_flags &= B_ERROR;
3051919Swnj }
3061919Swnj 
3072608Swnj /*
3083095Swnj  * Queue a tape operation.
3092608Swnj  */
3101919Swnj tmstrategy(bp)
3111919Swnj 	register struct buf *bp;
3121919Swnj {
3133095Swnj 	int teunit = TEUNIT(bp->b_dev);
3142982Swnj 	register struct uba_ctlr *um;
3152608Swnj 	register struct buf *dp;
3161919Swnj 
3172608Swnj 	/*
3182608Swnj 	 * Put transfer at end of unit queue
3192608Swnj 	 */
3203095Swnj 	dp = &teutab[teunit];
3211919Swnj 	bp->av_forw = NULL;
3221919Swnj 	(void) spl5();
3232608Swnj 	if (dp->b_actf == NULL) {
3242608Swnj 		dp->b_actf = bp;
3252608Swnj 		/*
3262608Swnj 		 * Transport not already active...
3272608Swnj 		 * put at end of controller queue.
3282608Swnj 		 */
3292608Swnj 		dp->b_forw = NULL;
3303095Swnj 		um = tedinfo[teunit]->ui_mi;
3312608Swnj 		if (um->um_tab.b_actf == NULL)
3322608Swnj 			um->um_tab.b_actf = dp;
3332608Swnj 		else
3342608Swnj 			um->um_tab.b_actl->b_forw = dp;
3352608Swnj 		um->um_tab.b_actl = dp;
3362608Swnj 	} else
3372608Swnj 		dp->b_actl->av_forw = bp;
3382608Swnj 	dp->b_actl = bp;
3392608Swnj 	/*
3402608Swnj 	 * If the controller is not busy, get
3412608Swnj 	 * it going.
3422608Swnj 	 */
3432608Swnj 	if (um->um_tab.b_active == 0)
3442608Swnj 		tmstart(um);
3451919Swnj 	(void) spl0();
3461919Swnj }
3471919Swnj 
3482608Swnj /*
3492608Swnj  * Start activity on a tm controller.
3502608Swnj  */
3512608Swnj tmstart(um)
3522982Swnj 	register struct uba_ctlr *um;
3531919Swnj {
3542608Swnj 	register struct buf *bp, *dp;
3552608Swnj 	register struct device *addr = (struct device *)um->um_addr;
3563095Swnj 	register struct te_softc *sc;
3572982Swnj 	register struct uba_device *ui;
3583095Swnj 	int teunit, cmd;
3592471Swnj 	daddr_t blkno;
3601919Swnj 
3612608Swnj 	/*
3622608Swnj 	 * Look for an idle transport on the controller.
3632608Swnj 	 */
3641919Swnj loop:
3652608Swnj 	if ((dp = um->um_tab.b_actf) == NULL)
3661919Swnj 		return;
3672608Swnj 	if ((bp = dp->b_actf) == NULL) {
3682608Swnj 		um->um_tab.b_actf = dp->b_forw;
3692608Swnj 		goto loop;
3702608Swnj 	}
3713095Swnj 	teunit = TEUNIT(bp->b_dev);
3723095Swnj 	ui = tedinfo[teunit];
3732608Swnj 	/*
3742608Swnj 	 * Record pre-transfer status (e.g. for TM_SENSE)
3752608Swnj 	 */
3763095Swnj 	sc = &te_softc[teunit];
3772608Swnj 	addr = (struct device *)um->um_addr;
3782608Swnj 	addr->tmcs = (ui->ui_slave << 8);
3792471Swnj 	sc->sc_dsreg = addr->tmcs;
3802471Swnj 	sc->sc_erreg = addr->tmer;
3812471Swnj 	sc->sc_resid = addr->tmbc;
3822608Swnj 	/*
3832608Swnj 	 * Default is that last command was NOT a write command;
3842608Swnj 	 * if we do a write command we will notice this in tmintr().
3852608Swnj 	 */
3863493Sroot 	sc->sc_lastiow = 0;
3872608Swnj 	if (sc->sc_openf < 0 || (addr->tmcs&TM_CUR) == 0) {
3882608Swnj 		/*
3893095Swnj 		 * Have had a hard error on a non-raw tape
3903095Swnj 		 * or the tape unit is now unavailable
3913095Swnj 		 * (e.g. taken off line).
3922608Swnj 		 */
3932608Swnj 		bp->b_flags |= B_ERROR;
3941919Swnj 		goto next;
3951919Swnj 	}
3963095Swnj 	if (bp == &ctmbuf[TMUNIT(bp->b_dev)]) {
3973095Swnj 		/*
3983095Swnj 		 * Execute control operation with the specified count.
3993095Swnj 		 */
4002608Swnj 		if (bp->b_command == TM_SENSE)
4012608Swnj 			goto next;
402*3495Sroot 		/*
403*3495Sroot 		 * Set next state; give 5 minutes to complete
404*3495Sroot 		 * rewind, or 10 seconds per iteration (minimum 60
405*3495Sroot 		 * seconds and max 5 minute) to complete other ops.
406*3495Sroot 		 */
407*3495Sroot 		if (bp->b_command == TM_REW) {
408*3495Sroot 			um->um_tab.b_active = SREW;
409*3495Sroot 			sc->sc_timo = 5 * 60;
410*3495Sroot 		} else {
411*3495Sroot 			um->um_tab.b_active = SCOM;
412*3495Sroot 			sc->sc_timo = min(max(10 * bp->b_repcnt, 60), 5 * 60);
413*3495Sroot 		}
4142608Swnj 		if (bp->b_command == TM_SFORW || bp->b_command == TM_SREV)
4152608Swnj 			addr->tmbc = bp->b_repcnt;
4162670Swnj 		goto dobpcmd;
4172608Swnj 	}
4182608Swnj 	/*
4193095Swnj 	 * The following checks handle boundary cases for operation
4203095Swnj 	 * on non-raw tapes.  On raw tapes the initialization of
4213095Swnj 	 * sc->sc_nxrec by tmphys causes them to be skipped normally
4223095Swnj 	 * (except in the case of retries).
4233095Swnj 	 */
4243095Swnj 	if (dbtofsb(bp->b_blkno) > sc->sc_nxrec) {
4253095Swnj 		/*
4263095Swnj 		 * Can't read past known end-of-file.
4273095Swnj 		 */
4283095Swnj 		bp->b_flags |= B_ERROR;
4293095Swnj 		bp->b_error = ENXIO;
4303095Swnj 		goto next;
4313095Swnj 	}
4323095Swnj 	if (dbtofsb(bp->b_blkno) == sc->sc_nxrec &&
4333095Swnj 	    bp->b_flags&B_READ) {
4343095Swnj 		/*
4353095Swnj 		 * Reading at end of file returns 0 bytes.
4363095Swnj 		 */
4373095Swnj 		bp->b_resid = bp->b_bcount;
4383095Swnj 		clrbuf(bp);
4393095Swnj 		goto next;
4403095Swnj 	}
4413095Swnj 	if ((bp->b_flags&B_READ) == 0)
4423095Swnj 		/*
4433095Swnj 		 * Writing sets EOF
4443095Swnj 		 */
4453095Swnj 		sc->sc_nxrec = dbtofsb(bp->b_blkno) + 1;
4463095Swnj 	/*
4472608Swnj 	 * If the data transfer command is in the correct place,
4482608Swnj 	 * set up all the registers except the csr, and give
4492608Swnj 	 * control over to the UNIBUS adapter routines, to
4502608Swnj 	 * wait for resources to start the i/o.
4512608Swnj 	 */
4522471Swnj 	if ((blkno = sc->sc_blkno) == dbtofsb(bp->b_blkno)) {
4532396Swnj 		addr->tmbc = -bp->b_bcount;
4541919Swnj 		if ((bp->b_flags&B_READ) == 0) {
4552471Swnj 			if (um->um_tab.b_errcnt)
4563095Swnj 				cmd = TM_WIRG;
4571919Swnj 			else
4583095Swnj 				cmd = TM_WCOM;
4591919Swnj 		} else
4603095Swnj 			cmd = TM_RCOM;
4612471Swnj 		um->um_tab.b_active = SIO;
4623095Swnj 		um->um_cmd = sc->sc_dens|cmd;
4632928Swnj #ifdef notdef
4642670Swnj 		if (tmreverseop(sc->sc_lastcmd))
4653095Swnj 			while (addr->tmer & TMER_SDWN)
4662670Swnj 				tmgapsdcnt++;
4672670Swnj 		sc->sc_lastcmd = TM_RCOM;		/* will serve */
4682928Swnj #endif
469*3495Sroot 		sc->sc_timo = 60;	/* premature, but should serve */
4703105Swnj 		(void) ubago(ui);
4711919Swnj 		return;
4721919Swnj 	}
4732608Swnj 	/*
4743095Swnj 	 * Tape positioned incorrectly;
4753095Swnj 	 * set to seek forwards or backwards to the correct spot.
4763095Swnj 	 * This happens for raw tapes only on error retries.
4772608Swnj 	 */
4782471Swnj 	um->um_tab.b_active = SSEEK;
4791919Swnj 	if (blkno < dbtofsb(bp->b_blkno)) {
4802670Swnj 		bp->b_command = TM_SFORW;
4812396Swnj 		addr->tmbc = blkno - dbtofsb(bp->b_blkno);
4821919Swnj 	} else {
4832670Swnj 		bp->b_command = TM_SREV;
4842396Swnj 		addr->tmbc = dbtofsb(bp->b_blkno) - blkno;
4851919Swnj 	}
486*3495Sroot 	sc->sc_timo = min(max(10 * -addr->tmbc, 60), 5 * 60);
4872670Swnj dobpcmd:
4882928Swnj #ifdef notdef
4893095Swnj 	/*
4903095Swnj 	 * It is strictly necessary to wait for the tape
4913095Swnj 	 * to stop before changing directions, but the TC11
4923095Swnj 	 * handles this for us.
4933095Swnj 	 */
4942670Swnj 	if (tmreverseop(sc->sc_lastcmd) != tmreverseop(bp->b_command))
4952670Swnj 		while (addr->tmer & TM_SDWN)
4962670Swnj 			tmgapsdcnt++;
4972670Swnj 	sc->sc_lastcmd = bp->b_command;
4982928Swnj #endif
4993095Swnj 	/*
5003095Swnj 	 * Do the command in bp.
5013095Swnj 	 */
5023095Swnj 	addr->tmcs = (sc->sc_dens | bp->b_command);
5031919Swnj 	return;
5041919Swnj 
5051919Swnj next:
5062608Swnj 	/*
5072608Swnj 	 * Done with this operation due to error or
5082608Swnj 	 * the fact that it doesn't do anything.
5092608Swnj 	 * Release UBA resources (if any), dequeue
5102608Swnj 	 * the transfer and continue processing this slave.
5112608Swnj 	 */
5122608Swnj 	if (um->um_ubinfo)
5132617Swnj 		ubadone(um);
5142608Swnj 	um->um_tab.b_errcnt = 0;
5152608Swnj 	dp->b_actf = bp->av_forw;
5161919Swnj 	iodone(bp);
5171919Swnj 	goto loop;
5181919Swnj }
5191919Swnj 
5202608Swnj /*
5212608Swnj  * The UNIBUS resources we needed have been
5222608Swnj  * allocated to us; start the device.
5232608Swnj  */
5242574Swnj tmdgo(um)
5252982Swnj 	register struct uba_ctlr *um;
5261919Swnj {
5272574Swnj 	register struct device *addr = (struct device *)um->um_addr;
5282471Swnj 
5292574Swnj 	addr->tmba = um->um_ubinfo;
5302574Swnj 	addr->tmcs = um->um_cmd | ((um->um_ubinfo >> 12) & 0x30);
5312396Swnj }
5322396Swnj 
5332608Swnj /*
5342608Swnj  * Tm interrupt routine.
5352608Swnj  */
5362471Swnj /*ARGSUSED*/
5372630Swnj tmintr(tm11)
5382630Swnj 	int tm11;
5392396Swnj {
5402608Swnj 	struct buf *dp;
5411919Swnj 	register struct buf *bp;
5422982Swnj 	register struct uba_ctlr *um = tmminfo[tm11];
5433095Swnj 	register struct device *addr;
5443095Swnj 	register struct te_softc *sc;
5453095Swnj 	int teunit;
5461919Swnj 	register state;
5471919Swnj 
5483095Swnj 	if ((dp = um->um_tab.b_actf) == NULL)
5493095Swnj 		return;
5503095Swnj 	bp = dp->b_actf;
5513095Swnj 	teunit = TEUNIT(bp->b_dev);
5523095Swnj 	addr = (struct device *)tedinfo[teunit]->ui_addr;
5532608Swnj 	/*
5542608Swnj 	 * If last command was a rewind, and tape is still
5552608Swnj 	 * rewinding, wait for the rewind complete interrupt.
5562608Swnj 	 */
5572608Swnj 	if (um->um_tab.b_active == SREW) {
5582608Swnj 		um->um_tab.b_active = SCOM;
5593095Swnj 		if (addr->tmer&TMER_RWS)
5602608Swnj 			return;
5611919Swnj 	}
5622608Swnj 	/*
5632608Swnj 	 * An operation completed... record status
5642608Swnj 	 */
5653095Swnj 	sc = &te_softc[teunit];
566*3495Sroot 	sc->sc_timo = INF;
5672471Swnj 	sc->sc_dsreg = addr->tmcs;
5682471Swnj 	sc->sc_erreg = addr->tmer;
5692471Swnj 	sc->sc_resid = addr->tmbc;
5701919Swnj 	if ((bp->b_flags & B_READ) == 0)
5712608Swnj 		sc->sc_lastiow = 1;
5722471Swnj 	state = um->um_tab.b_active;
5732471Swnj 	um->um_tab.b_active = 0;
5742608Swnj 	/*
5752608Swnj 	 * Check for errors.
5762608Swnj 	 */
5772608Swnj 	if (addr->tmcs&TM_ERR) {
5783095Swnj 		while (addr->tmer & TMER_SDWN)
5791919Swnj 			;			/* await settle down */
5802608Swnj 		/*
5813095Swnj 		 * If we hit the end of the tape file, update our position.
5822608Swnj 		 */
5833095Swnj 		if (addr->tmer&TMER_EOF) {
5842608Swnj 			tmseteof(bp);		/* set blkno and nxrec */
5852608Swnj 			state = SCOM;		/* force completion */
5862608Swnj 			/*
5872608Swnj 			 * Stuff bc so it will be unstuffed correctly
5882608Swnj 			 * later to get resid.
5892608Swnj 			 */
5902396Swnj 			addr->tmbc = -bp->b_bcount;
5912608Swnj 			goto opdone;
5921919Swnj 		}
5932608Swnj 		/*
5943095Swnj 		 * If we were reading raw tape and the only error was that the
5953095Swnj 		 * record was too long, then we don't consider this an error.
5962608Swnj 		 */
5973095Swnj 		if (bp == &rtmbuf[TMUNIT(bp->b_dev)] && (bp->b_flags&B_READ) &&
5983095Swnj 		    (addr->tmer&(TMER_HARD|TMER_SOFT)) == TMER_RLE)
5992608Swnj 			goto ignoreerr;
6002608Swnj 		/*
6012608Swnj 		 * If error is not hard, and this was an i/o operation
6022608Swnj 		 * retry up to 8 times.
6032608Swnj 		 */
6043095Swnj 		if ((addr->tmer&TMER_HARD)==0 && state==SIO) {
6052471Swnj 			if (++um->um_tab.b_errcnt < 7) {
6062471Swnj 				sc->sc_blkno++;
6072617Swnj 				ubadone(um);
6082608Swnj 				goto opcont;
6091919Swnj 			}
6102608Swnj 		} else
6112608Swnj 			/*
6122608Swnj 			 * Hard or non-i/o errors on non-raw tape
6132608Swnj 			 * cause it to close.
6142608Swnj 			 */
6153095Swnj 			if (sc->sc_openf>0 && bp != &rtmbuf[TMUNIT(bp->b_dev)])
6162608Swnj 				sc->sc_openf = -1;
6172608Swnj 		/*
6182608Swnj 		 * Couldn't recover error
6192608Swnj 		 */
6202928Swnj 		printf("te%d: hard error bn%d er=%b\n", minor(bp->b_dev)&03,
6213095Swnj 		    bp->b_blkno, sc->sc_erreg, TMER_BITS);
6221919Swnj 		bp->b_flags |= B_ERROR;
6232608Swnj 		goto opdone;
6241919Swnj 	}
6252608Swnj 	/*
6262608Swnj 	 * Advance tape control FSM.
6272608Swnj 	 */
6282608Swnj ignoreerr:
6291919Swnj 	switch (state) {
6301919Swnj 
6311919Swnj 	case SIO:
6322608Swnj 		/*
6332608Swnj 		 * Read/write increments tape block number
6342608Swnj 		 */
6352471Swnj 		sc->sc_blkno++;
6362608Swnj 		goto opdone;
6371919Swnj 
6381919Swnj 	case SCOM:
6392608Swnj 		/*
6403095Swnj 		 * For forward/backward space record update current position.
6412608Swnj 		 */
6423095Swnj 		if (bp == &ctmbuf[TMUNIT(bp->b_dev)])
6432608Swnj 		switch (bp->b_command) {
6441919Swnj 
6452608Swnj 		case TM_SFORW:
6462608Swnj 			sc->sc_blkno -= bp->b_repcnt;
6473095Swnj 			break;
6481919Swnj 
6492608Swnj 		case TM_SREV:
6502608Swnj 			sc->sc_blkno += bp->b_repcnt;
6513095Swnj 			break;
6521919Swnj 		}
6533095Swnj 		goto opdone;
6541919Swnj 
6551919Swnj 	case SSEEK:
6562471Swnj 		sc->sc_blkno = dbtofsb(bp->b_blkno);
6572608Swnj 		goto opcont;
6581919Swnj 
6591919Swnj 	default:
6602608Swnj 		panic("tmintr");
6612608Swnj 	}
6622608Swnj opdone:
6632608Swnj 	/*
6642608Swnj 	 * Reset error count and remove
6652608Swnj 	 * from device queue.
6662608Swnj 	 */
6672608Swnj 	um->um_tab.b_errcnt = 0;
6682608Swnj 	dp->b_actf = bp->av_forw;
6692608Swnj 	bp->b_resid = -addr->tmbc;
6702617Swnj 	ubadone(um);
6712608Swnj 	iodone(bp);
6722608Swnj 	/*
6732608Swnj 	 * Circulate slave to end of controller
6742608Swnj 	 * queue to give other slaves a chance.
6752608Swnj 	 */
6762608Swnj 	um->um_tab.b_actf = dp->b_forw;
6772608Swnj 	if (dp->b_actf) {
6782608Swnj 		dp->b_forw = NULL;
6792608Swnj 		if (um->um_tab.b_actf == NULL)
6802608Swnj 			um->um_tab.b_actf = dp;
6812608Swnj 		else
6822608Swnj 			um->um_tab.b_actl->b_forw = dp;
6832608Swnj 		um->um_tab.b_actl = dp;
6842608Swnj 	}
6852608Swnj 	if (um->um_tab.b_actf == 0)
6861919Swnj 		return;
6872608Swnj opcont:
6882608Swnj 	tmstart(um);
6891919Swnj }
6901919Swnj 
691*3495Sroot tmtimer(dev)
692*3495Sroot 	int dev;
693*3495Sroot {
694*3495Sroot 	register struct te_softc *sc = &te_softc[TEUNIT(dev)];
695*3495Sroot 
696*3495Sroot 	if (sc->sc_timo != INF && (sc->sc_timo -= 5) < 0) {
697*3495Sroot 		printf("te%d: lost interrupt\n");
698*3495Sroot 		sc->sc_timo = INF;
699*3495Sroot 		(void) spl5();
700*3495Sroot 		tmintr(TMUNIT(dev));
701*3495Sroot 		(void) spl0();
702*3495Sroot 	}
703*3495Sroot 	timeout(tmtimer, dev, 5*hz);
704*3495Sroot }
705*3495Sroot 
7061919Swnj tmseteof(bp)
7071919Swnj 	register struct buf *bp;
7081919Swnj {
7093095Swnj 	register int teunit = TEUNIT(bp->b_dev);
7102396Swnj 	register struct device *addr =
7113095Swnj 	    (struct device *)tedinfo[teunit]->ui_addr;
7123095Swnj 	register struct te_softc *sc = &te_softc[teunit];
7131919Swnj 
7143095Swnj 	if (bp == &ctmbuf[TMUNIT(bp->b_dev)]) {
7152471Swnj 		if (sc->sc_blkno > dbtofsb(bp->b_blkno)) {
7161919Swnj 			/* reversing */
7172471Swnj 			sc->sc_nxrec = dbtofsb(bp->b_blkno) - addr->tmbc;
7182471Swnj 			sc->sc_blkno = sc->sc_nxrec;
7191919Swnj 		} else {
7201919Swnj 			/* spacing forward */
7212471Swnj 			sc->sc_blkno = dbtofsb(bp->b_blkno) + addr->tmbc;
7222471Swnj 			sc->sc_nxrec = sc->sc_blkno - 1;
7231919Swnj 		}
7241919Swnj 		return;
7251919Swnj 	}
7261919Swnj 	/* eof on read */
7272471Swnj 	sc->sc_nxrec = dbtofsb(bp->b_blkno);
7281919Swnj }
7291919Swnj 
7301919Swnj tmread(dev)
7312608Swnj 	dev_t dev;
7321919Swnj {
7331919Swnj 
7341919Swnj 	tmphys(dev);
7352982Swnj 	if (u.u_error)
7362982Swnj 		return;
7372608Swnj 	physio(tmstrategy, &rtmbuf[TMUNIT(dev)], dev, B_READ, minphys);
7381919Swnj }
7391919Swnj 
7401919Swnj tmwrite(dev)
7412608Swnj 	dev_t dev;
7421919Swnj {
7431919Swnj 
7441919Swnj 	tmphys(dev);
7452982Swnj 	if (u.u_error)
7462982Swnj 		return;
7472608Swnj 	physio(tmstrategy, &rtmbuf[TMUNIT(dev)], dev, B_WRITE, minphys);
7481919Swnj }
7491919Swnj 
7503095Swnj /*
7513095Swnj  * Check that a raw device exists.
7523095Swnj  * If it does, set up sc_blkno and sc_nxrec
7533095Swnj  * so that the tape will appear positioned correctly.
7543095Swnj  */
7551919Swnj tmphys(dev)
7562608Swnj 	dev_t dev;
7571919Swnj {
7583095Swnj 	register int teunit = TEUNIT(dev);
7591919Swnj 	register daddr_t a;
7603095Swnj 	register struct te_softc *sc;
7613095Swnj 	register struct uba_device *ui;
7621919Swnj 
7633095Swnj 	if (teunit >= NTE || (ui=tedinfo[teunit]) == 0 || ui->ui_alive == 0) {
7642982Swnj 		u.u_error = ENXIO;
7652982Swnj 		return;
7662982Swnj 	}
7673095Swnj 	sc = &te_softc[teunit];
7681919Swnj 	a = dbtofsb(u.u_offset >> 9);
7692471Swnj 	sc->sc_blkno = a;
7702471Swnj 	sc->sc_nxrec = a + 1;
7711919Swnj }
7721919Swnj 
7732608Swnj tmreset(uban)
7742608Swnj 	int uban;
7752608Swnj {
7762982Swnj 	register struct uba_ctlr *um;
7773095Swnj 	register tm11, teunit;
7782982Swnj 	register struct uba_device *ui;
7792608Swnj 	register struct buf *dp;
7802608Swnj 
7812630Swnj 	for (tm11 = 0; tm11 < NTM; tm11++) {
7822630Swnj 		if ((um = tmminfo[tm11]) == 0 || um->um_alive == 0 ||
7832608Swnj 		   um->um_ubanum != uban)
7842608Swnj 			continue;
7852928Swnj 		printf(" tm%d", tm11);
7862608Swnj 		um->um_tab.b_active = 0;
7872608Swnj 		um->um_tab.b_actf = um->um_tab.b_actl = 0;
7882608Swnj 		if (um->um_ubinfo) {
7892608Swnj 			printf("<%d>", (um->um_ubinfo>>28)&0xf);
7902617Swnj 			ubadone(um);
7912608Swnj 		}
7922608Swnj 		((struct device *)(um->um_addr))->tmcs = TM_DCLR;
7933095Swnj 		for (teunit = 0; teunit < NTE; teunit++) {
7943095Swnj 			if ((ui = tedinfo[teunit]) == 0 || ui->ui_mi != um ||
7953095Swnj 			    ui->ui_alive == 0)
7962608Swnj 				continue;
7973095Swnj 			dp = &teutab[teunit];
7982608Swnj 			dp->b_active = 0;
7992608Swnj 			dp->b_forw = 0;
8002608Swnj 			if (um->um_tab.b_actf == NULL)
8012608Swnj 				um->um_tab.b_actf = dp;
8022608Swnj 			else
8032608Swnj 				um->um_tab.b_actl->b_forw = dp;
8042608Swnj 			um->um_tab.b_actl = dp;
805*3495Sroot 			if (te_softc[teunit].sc_openf > 0)
806*3495Sroot 				te_softc[teunit].sc_openf = -1;
8072608Swnj 		}
8082608Swnj 		tmstart(um);
8092608Swnj 	}
8102608Swnj }
8112608Swnj 
8121919Swnj /*ARGSUSED*/
8131919Swnj tmioctl(dev, cmd, addr, flag)
8141919Swnj 	caddr_t addr;
8151919Swnj 	dev_t dev;
8161919Swnj {
8173095Swnj 	int teunit = TEUNIT(dev);
8183095Swnj 	register struct te_softc *sc = &te_softc[teunit];
8193095Swnj 	register struct buf *bp = &ctmbuf[TMUNIT(dev)];
8201919Swnj 	register callcount;
8211919Swnj 	int fcount;
8221919Swnj 	struct mtop mtop;
8231919Swnj 	struct mtget mtget;
8241919Swnj 	/* we depend of the values and order of the MT codes here */
8252608Swnj 	static tmops[] =
8262608Swnj 	   {TM_WEOF,TM_SFORW,TM_SREV,TM_SFORW,TM_SREV,TM_REW,TM_OFFL,TM_SENSE};
8271919Swnj 
8282608Swnj 	switch (cmd) {
8291919Swnj 		case MTIOCTOP:	/* tape operation */
8301919Swnj 		if (copyin((caddr_t)addr, (caddr_t)&mtop, sizeof(mtop))) {
8311919Swnj 			u.u_error = EFAULT;
8321919Swnj 			return;
8331919Swnj 		}
8341919Swnj 		switch(mtop.mt_op) {
8352608Swnj 		case MTWEOF:
8361919Swnj 			callcount = mtop.mt_count;
8372608Swnj 			fcount = 1;
8382608Swnj 			break;
8392608Swnj 		case MTFSF: case MTBSF:
8402608Swnj 			callcount = mtop.mt_count;
8411919Swnj 			fcount = INF;
8421919Swnj 			break;
8431919Swnj 		case MTFSR: case MTBSR:
8441919Swnj 			callcount = 1;
8451919Swnj 			fcount = mtop.mt_count;
8461919Swnj 			break;
8472324Skre 		case MTREW: case MTOFFL: case MTNOP:
8481919Swnj 			callcount = 1;
8491919Swnj 			fcount = 1;
8501919Swnj 			break;
8511919Swnj 		default:
8521919Swnj 			u.u_error = ENXIO;
8531919Swnj 			return;
8541919Swnj 		}
8552608Swnj 		if (callcount <= 0 || fcount <= 0) {
8561919Swnj 			u.u_error = ENXIO;
8572608Swnj 			return;
8582608Swnj 		}
8592608Swnj 		while (--callcount >= 0) {
8602574Swnj 			tmcommand(dev, tmops[mtop.mt_op], fcount);
8611919Swnj 			if ((mtop.mt_op == MTFSR || mtop.mt_op == MTBSR) &&
8622608Swnj 			    bp->b_resid) {
8631919Swnj 				u.u_error = EIO;
8641919Swnj 				break;
8651919Swnj 			}
8663095Swnj 			if ((bp->b_flags&B_ERROR) || sc->sc_erreg&TMER_BOT)
8671919Swnj 				break;
8681919Swnj 		}
8692608Swnj 		geterror(bp);
8701919Swnj 		return;
8711919Swnj 	case MTIOCGET:
8722471Swnj 		mtget.mt_dsreg = sc->sc_dsreg;
8732471Swnj 		mtget.mt_erreg = sc->sc_erreg;
8742471Swnj 		mtget.mt_resid = sc->sc_resid;
8753482Sroot 		mtget.mt_type = MT_ISTM;
8761919Swnj 		if (copyout((caddr_t)&mtget, addr, sizeof(mtget)))
8771919Swnj 			u.u_error = EFAULT;
8781919Swnj 		return;
8791919Swnj 	default:
8801919Swnj 		u.u_error = ENXIO;
8811919Swnj 	}
8821919Swnj }
8831919Swnj 
8841919Swnj #define	DBSIZE	20
8851919Swnj 
8862363Swnj tmdump()
8872363Swnj {
8882982Swnj 	register struct uba_device *ui;
8892396Swnj 	register struct uba_regs *up;
8902396Swnj 	register struct device *addr;
8912426Skre 	int blk, num;
8922426Skre 	int start;
8931919Swnj 
8942426Skre 	start = 0;
8952426Skre 	num = maxfree;
8962426Skre #define	phys(a,b)	((b)((int)(a)&0x7fffffff))
8973095Swnj 	if (tedinfo[0] == 0)
8982887Swnj 		return (ENXIO);
8993095Swnj 	ui = phys(tedinfo[0], struct uba_device *);
9002396Swnj 	up = phys(ui->ui_hd, struct uba_hd *)->uh_physuba;
9013331Swnj 	ubainit(up);
9022324Skre 	DELAY(1000000);
9032396Swnj 	addr = (struct device *)ui->ui_physaddr;
9042396Swnj 	tmwait(addr);
9052608Swnj 	addr->tmcs = TM_DCLR | TM_GO;
9061919Swnj 	while (num > 0) {
9071919Swnj 		blk = num > DBSIZE ? DBSIZE : num;
9082396Swnj 		tmdwrite(start, blk, addr, up);
9091919Swnj 		start += blk;
9101919Swnj 		num -= blk;
9111919Swnj 	}
9122426Skre 	tmeof(addr);
9132426Skre 	tmeof(addr);
9142426Skre 	tmwait(addr);
9152887Swnj 	if (addr->tmcs&TM_ERR)
9162887Swnj 		return (EIO);
9172608Swnj 	addr->tmcs = TM_REW | TM_GO;
9182471Swnj 	tmwait(addr);
9192363Swnj 	return (0);
9201919Swnj }
9211919Swnj 
9222608Swnj tmdwrite(dbuf, num, addr, up)
9232608Swnj 	register dbuf, num;
9242396Swnj 	register struct device *addr;
9252396Swnj 	struct uba_regs *up;
9261919Swnj {
9272396Swnj 	register struct pte *io;
9282396Swnj 	register int npf;
9291928Swnj 
9302396Swnj 	tmwait(addr);
9312396Swnj 	io = up->uba_map;
9321919Swnj 	npf = num+1;
9331928Swnj 	while (--npf != 0)
9342982Swnj 		 *(int *)io++ = (dbuf++ | (1<<UBAMR_DPSHIFT) | UBAMR_MRV);
9352396Swnj 	*(int *)io = 0;
9362396Swnj 	addr->tmbc = -(num*NBPG);
9372396Swnj 	addr->tmba = 0;
9382608Swnj 	addr->tmcs = TM_WCOM | TM_GO;
9391919Swnj }
9401919Swnj 
9412396Swnj tmwait(addr)
9422396Swnj 	register struct device *addr;
9431919Swnj {
9441928Swnj 	register s;
9451919Swnj 
9461919Swnj 	do
9472396Swnj 		s = addr->tmcs;
9482608Swnj 	while ((s & TM_CUR) == 0);
9491919Swnj }
9501919Swnj 
9512396Swnj tmeof(addr)
9522396Swnj 	struct device *addr;
9531919Swnj {
9541919Swnj 
9552396Swnj 	tmwait(addr);
9562608Swnj 	addr->tmcs = TM_WEOF | TM_GO;
9571919Swnj }
9581919Swnj #endif
959