1*3174Swnj /* tm.c 4.28 81/03/10 */ 21919Swnj 32709Swnj #include "te.h" 42630Swnj #if NTM > 0 51919Swnj /* 62630Swnj * TM11/TE10 tape driver 72471Swnj * 83095Swnj * TODO: 93095Swnj * test driver with more than one slave 103095Swnj * test driver with more than one controller 113095Swnj * test reset code 123095Swnj * test rewinds without hanging in driver 133095Swnj * what happens if you offline tape during rewind? 143095Swnj * test using file system on tape 151919Swnj */ 161919Swnj #include "../h/param.h" 173141Swnj #include "../h/systm.h" 181919Swnj #include "../h/buf.h" 191919Swnj #include "../h/dir.h" 201919Swnj #include "../h/conf.h" 211919Swnj #include "../h/user.h" 221919Swnj #include "../h/file.h" 231919Swnj #include "../h/map.h" 241919Swnj #include "../h/pte.h" 252574Swnj #include "../h/vm.h" 262982Swnj #include "../h/ubareg.h" 272982Swnj #include "../h/ubavar.h" 281919Swnj #include "../h/mtio.h" 291919Swnj #include "../h/ioctl.h" 302363Swnj #include "../h/cmap.h" 312396Swnj #include "../h/cpu.h" 321919Swnj 332396Swnj #include "../h/tmreg.h" 341919Swnj 353095Swnj /* 363095Swnj * There is a ctmbuf per tape controller. 373095Swnj * It is used as the token to pass to the internal routines 383095Swnj * to execute tape ioctls, and also acts as a lock on the slaves 393095Swnj * on the controller, since there is only one per controller. 403095Swnj * In particular, when the tape is rewinding on close we release 413095Swnj * the user process but any further attempts to use the tape drive 423095Swnj * before the rewind completes will hang waiting for ctmbuf. 433095Swnj */ 443095Swnj struct buf ctmbuf[NTM]; 451919Swnj 463095Swnj /* 473095Swnj * Raw tape operations use rtmbuf. The driver 483095Swnj * notices when rtmbuf is being used and allows the user 493095Swnj * program to continue after errors and read records 503095Swnj * not of the standard length (BSIZE). 513095Swnj */ 523095Swnj struct buf rtmbuf[NTM]; 533095Swnj 543095Swnj /* 553095Swnj * Driver unibus interface routines and variables. 563095Swnj */ 572608Swnj int tmprobe(), tmslave(), tmattach(), tmdgo(), tmintr(); 582982Swnj struct uba_ctlr *tmminfo[NTM]; 593095Swnj struct uba_device *tedinfo[NTE]; 603095Swnj struct buf teutab[NTE]; 613095Swnj short tetotm[NTE]; 622458Swnj u_short tmstd[] = { 0772520, 0 }; 632396Swnj struct uba_driver tmdriver = 643095Swnj { tmprobe, tmslave, tmattach, tmdgo, tmstd, "te", tedinfo, "tm", tmminfo, 0 }; 651919Swnj 661919Swnj /* bits in minor device */ 673095Swnj #define TEUNIT(dev) (minor(dev)&03) 683095Swnj #define TMUNIT(dev) (tetotm[TEUNIT(dev)]) 691919Swnj #define T_NOREWIND 04 701919Swnj #define T_1600BPI 08 711919Swnj 721919Swnj #define INF (daddr_t)1000000L 731919Swnj 742608Swnj /* 752608Swnj * Software state per tape transport. 763095Swnj * 773095Swnj * 1. A tape drive is a unique-open device; we refuse opens when it is already. 783095Swnj * 2. We keep track of the current position on a block tape and seek 793095Swnj * before operations by forward/back spacing if necessary. 803095Swnj * 3. We remember if the last operation was a write on a tape, so if a tape 813095Swnj * is open read write and the last thing done is a write we can 823095Swnj * write a standard end of tape mark (two eofs). 833095Swnj * 4. We remember the status registers after the last command, using 843095Swnj * then internally and returning them to the SENSE ioctl. 853095Swnj * 5. We remember the last density the tape was used at. If it is 863095Swnj * not a BOT when we start using it and we are writing, we don't 873095Swnj * let the density be changed. 882608Swnj */ 893095Swnj struct te_softc { 902608Swnj char sc_openf; /* lock against multiple opens */ 912608Swnj char sc_lastiow; /* last op was a write */ 922608Swnj daddr_t sc_blkno; /* block number, for block device tape */ 933095Swnj daddr_t sc_nxrec; /* position of end of tape, if known */ 942608Swnj u_short sc_erreg; /* copy of last erreg */ 952608Swnj u_short sc_dsreg; /* copy of last dsreg */ 962608Swnj short sc_resid; /* copy of last bc */ 973105Swnj #ifdef unneeded 982670Swnj short sc_lastcmd; /* last command to handle direction changes */ 992928Swnj #endif 1003095Swnj u_short sc_dens; /* prototype command with density info */ 1013095Swnj } te_softc[NTM]; 1023105Swnj #ifdef unneeded 1033105Swnj int tmgapsdcnt; /* DEBUG */ 1043105Swnj #endif 1051919Swnj 1062608Swnj /* 1073095Swnj * States for um->um_tab.b_active, the per controller state flag. 1083095Swnj * This is used to sequence control in the driver. 1092608Swnj */ 1101919Swnj #define SSEEK 1 /* seeking */ 1111919Swnj #define SIO 2 /* doing seq i/o */ 1121919Swnj #define SCOM 3 /* sending control command */ 1132608Swnj #define SREW 4 /* sending a drive rewind */ 1141919Swnj 1152426Skre /* 1162426Skre * Determine if there is a controller for 1172426Skre * a tm at address reg. Our goal is to make the 1182426Skre * device interrupt. 1192426Skre */ 1202608Swnj tmprobe(reg) 1212396Swnj caddr_t reg; 1222396Swnj { 1233095Swnj register int br, cvec; /* must be r11,r10; value-result */ 1242426Skre 1252608Swnj #ifdef lint 1263105Swnj br = 0; cvec = br; br = cvec; 1272608Swnj #endif 1282608Swnj ((struct device *)reg)->tmcs = TM_IE; 1292396Swnj /* 1302630Swnj * If this is a tm11, it ought to have interrupted 1312396Swnj * by now, if it isn't (ie: it is a ts04) then we just 1322458Swnj * hope that it didn't interrupt, so autoconf will ignore it. 1332458Swnj * Just in case, we will reference one 1342396Swnj * of the more distant registers, and hope for a machine 1352458Swnj * check, or similar disaster if this is a ts. 1362471Swnj * 1372471Swnj * Note: on an 11/780, badaddr will just generate 1382471Swnj * a uba error for a ts; but our caller will notice that 1392471Swnj * so we won't check for it. 1402396Swnj */ 1413105Swnj if (badaddr((caddr_t)&((struct device *)reg)->tmrd, 2)) 1422458Swnj return (0); 1432458Swnj return (1); 1442396Swnj } 1452396Swnj 1462608Swnj /* 1472608Swnj * Due to a design flaw, we cannot ascertain if the tape 1482608Swnj * exists or not unless it is on line - ie: unless a tape is 1492608Swnj * mounted. This is too servere a restriction to bear, 1502608Swnj * so all units are assumed to exist. 1512608Swnj */ 1522608Swnj /*ARGSUSED*/ 1532574Swnj tmslave(ui, reg) 1542982Swnj struct uba_device *ui; 1552396Swnj caddr_t reg; 1562396Swnj { 1572458Swnj 1582458Swnj return (1); 1592396Swnj } 1602396Swnj 1612608Swnj /* 1623095Swnj * Record attachment of the unit to the controller. 1632608Swnj */ 1642608Swnj /*ARGSUSED*/ 1652608Swnj tmattach(ui) 1662982Swnj struct uba_device *ui; 1672608Swnj { 1682608Swnj 1693095Swnj /* 1703095Swnj * Tetotm is used in TMUNIT to index the ctmbuf and rtmbuf 1713095Swnj * arrays given a te unit number. 1723095Swnj */ 1733095Swnj tetotm[ui->ui_unit] = ui->ui_mi->um_ctlr; 1742608Swnj } 1752608Swnj 1762608Swnj /* 1772608Swnj * Open the device. Tapes are unique open 1782608Swnj * devices, so we refuse if it is already open. 1792608Swnj * We also check that a tape is available, and 1803095Swnj * don't block waiting here; if you want to wait 1813095Swnj * for a tape you should timeout in user code. 1822608Swnj */ 1831919Swnj tmopen(dev, flag) 1841919Swnj dev_t dev; 1851919Swnj int flag; 1861919Swnj { 1873095Swnj register int teunit; 1882982Swnj register struct uba_device *ui; 1893095Swnj register struct te_softc *sc; 1903095Swnj int dens; 1911919Swnj 1923095Swnj teunit = TEUNIT(dev); 1933095Swnj if (teunit>=NTE || (sc = &te_softc[teunit])->sc_openf || 1943095Swnj (ui = tedinfo[teunit]) == 0 || ui->ui_alive == 0) { 1952608Swnj u.u_error = ENXIO; 1961919Swnj return; 1971919Swnj } 1983141Swnj get: 1992608Swnj tmcommand(dev, TM_SENSE, 1); 2003141Swnj if (sc->sc_erreg&TMER_SDWN) { 2013141Swnj sleep((caddr_t)&lbolt, PZERO+1); 2023141Swnj goto get; 2033141Swnj } 2043095Swnj dens = TM_IE | TM_GO | (ui->ui_slave << 8); 2053095Swnj if ((minor(dev) & T_1600BPI) == 0) 2063095Swnj dens |= TM_D800; 2073095Swnj if ((sc->sc_erreg&(TMER_SELR|TMER_TUR)) != (TMER_SELR|TMER_TUR) || 208*3174Swnj (flag&FWRITE) && (sc->sc_erreg&TMER_WRL) || 2093095Swnj (sc->sc_erreg&TMER_BOT) == 0 && (flag&FWRITE) && 210*3174Swnj dens != sc->sc_dens) { 2113095Swnj /* 2123095Swnj * Not online or density switch in mid-tape or write locked. 2133095Swnj */ 2142471Swnj u.u_error = EIO; 2152608Swnj return; 2161919Swnj } 2172608Swnj sc->sc_openf = 1; 2182471Swnj sc->sc_blkno = (daddr_t)0; 2192471Swnj sc->sc_nxrec = INF; 2202608Swnj sc->sc_lastiow = 0; 2213095Swnj sc->sc_dens = dens; 2221919Swnj } 2231919Swnj 2242608Swnj /* 2252608Swnj * Close tape device. 2262608Swnj * 2272608Swnj * If tape was open for writing or last operation was 2282608Swnj * a write, then write two EOF's and backspace over the last one. 2292608Swnj * Unless this is a non-rewinding special file, rewind the tape. 2302608Swnj * Make the tape available to others. 2312608Swnj */ 2321919Swnj tmclose(dev, flag) 2331919Swnj register dev_t dev; 2341919Swnj register flag; 2351919Swnj { 2363095Swnj register struct te_softc *sc = &te_softc[TEUNIT(dev)]; 2371919Swnj 2382608Swnj if (flag == FWRITE || (flag&FWRITE) && sc->sc_lastiow) { 2392608Swnj tmcommand(dev, TM_WEOF, 1); 2402608Swnj tmcommand(dev, TM_WEOF, 1); 2412608Swnj tmcommand(dev, TM_SREV, 1); 2421919Swnj } 2431919Swnj if ((minor(dev)&T_NOREWIND) == 0) 2443095Swnj /* 2453095Swnj * 0 count means don't hang waiting for rewind complete 2463095Swnj * rather ctmbuf stays busy until the operation completes 2473095Swnj * preventing further opens from completing by 2483095Swnj * preventing a TM_SENSE from completing. 2493095Swnj */ 2503095Swnj tmcommand(dev, TM_REW, 0); 2512471Swnj sc->sc_openf = 0; 2521919Swnj } 2531919Swnj 2542608Swnj /* 2552608Swnj * Execute a command on the tape drive 2562608Swnj * a specified number of times. 2572608Swnj */ 2582574Swnj tmcommand(dev, com, count) 2591919Swnj dev_t dev; 2601919Swnj int com, count; 2611919Swnj { 2621919Swnj register struct buf *bp; 2631919Swnj 2642608Swnj bp = &ctmbuf[TMUNIT(dev)]; 2651919Swnj (void) spl5(); 2661919Swnj while (bp->b_flags&B_BUSY) { 2673095Swnj /* 2683095Swnj * This special check is because B_BUSY never 2693095Swnj * gets cleared in the non-waiting rewind case. 2703095Swnj */ 2713141Swnj if (bp->b_repcnt == 0 && (bp->b_flags&B_DONE)) 2723095Swnj break; 2731919Swnj bp->b_flags |= B_WANTED; 2741919Swnj sleep((caddr_t)bp, PRIBIO); 2751919Swnj } 2761919Swnj bp->b_flags = B_BUSY|B_READ; 2771919Swnj (void) spl0(); 2781919Swnj bp->b_dev = dev; 2791919Swnj bp->b_repcnt = -count; 2801919Swnj bp->b_command = com; 2811919Swnj bp->b_blkno = 0; 2821919Swnj tmstrategy(bp); 2833095Swnj /* 2843095Swnj * In case of rewind from close, don't wait. 2853095Swnj * This is the only case where count can be 0. 2863095Swnj */ 2873095Swnj if (count == 0) 2883095Swnj return; 2891919Swnj iowait(bp); 2901919Swnj if (bp->b_flags&B_WANTED) 2911919Swnj wakeup((caddr_t)bp); 2921919Swnj bp->b_flags &= B_ERROR; 2931919Swnj } 2941919Swnj 2952608Swnj /* 2963095Swnj * Queue a tape operation. 2972608Swnj */ 2981919Swnj tmstrategy(bp) 2991919Swnj register struct buf *bp; 3001919Swnj { 3013095Swnj int teunit = TEUNIT(bp->b_dev); 3022982Swnj register struct uba_ctlr *um; 3032608Swnj register struct buf *dp; 3041919Swnj 3052608Swnj /* 3062608Swnj * Put transfer at end of unit queue 3072608Swnj */ 3083095Swnj dp = &teutab[teunit]; 3091919Swnj bp->av_forw = NULL; 3101919Swnj (void) spl5(); 3112608Swnj if (dp->b_actf == NULL) { 3122608Swnj dp->b_actf = bp; 3132608Swnj /* 3142608Swnj * Transport not already active... 3152608Swnj * put at end of controller queue. 3162608Swnj */ 3172608Swnj dp->b_forw = NULL; 3183095Swnj um = tedinfo[teunit]->ui_mi; 3192608Swnj if (um->um_tab.b_actf == NULL) 3202608Swnj um->um_tab.b_actf = dp; 3212608Swnj else 3222608Swnj um->um_tab.b_actl->b_forw = dp; 3232608Swnj um->um_tab.b_actl = dp; 3242608Swnj } else 3252608Swnj dp->b_actl->av_forw = bp; 3262608Swnj dp->b_actl = bp; 3272608Swnj /* 3282608Swnj * If the controller is not busy, get 3292608Swnj * it going. 3302608Swnj */ 3312608Swnj if (um->um_tab.b_active == 0) 3322608Swnj tmstart(um); 3331919Swnj (void) spl0(); 3341919Swnj } 3351919Swnj 3362608Swnj /* 3372608Swnj * Start activity on a tm controller. 3382608Swnj */ 3392608Swnj tmstart(um) 3402982Swnj register struct uba_ctlr *um; 3411919Swnj { 3422608Swnj register struct buf *bp, *dp; 3432608Swnj register struct device *addr = (struct device *)um->um_addr; 3443095Swnj register struct te_softc *sc; 3452982Swnj register struct uba_device *ui; 3463095Swnj int teunit, cmd; 3472471Swnj daddr_t blkno; 3481919Swnj 3492608Swnj /* 3502608Swnj * Look for an idle transport on the controller. 3512608Swnj */ 3521919Swnj loop: 3532608Swnj if ((dp = um->um_tab.b_actf) == NULL) 3541919Swnj return; 3552608Swnj if ((bp = dp->b_actf) == NULL) { 3562608Swnj um->um_tab.b_actf = dp->b_forw; 3572608Swnj goto loop; 3582608Swnj } 3593095Swnj teunit = TEUNIT(bp->b_dev); 3603095Swnj ui = tedinfo[teunit]; 3612608Swnj /* 3622608Swnj * Record pre-transfer status (e.g. for TM_SENSE) 3632608Swnj */ 3643095Swnj sc = &te_softc[teunit]; 3652608Swnj addr = (struct device *)um->um_addr; 3662608Swnj addr->tmcs = (ui->ui_slave << 8); 3672471Swnj sc->sc_dsreg = addr->tmcs; 3682471Swnj sc->sc_erreg = addr->tmer; 3692471Swnj sc->sc_resid = addr->tmbc; 3702608Swnj /* 3712608Swnj * Default is that last command was NOT a write command; 3722608Swnj * if we do a write command we will notice this in tmintr(). 3732608Swnj */ 3742608Swnj sc->sc_lastiow = 1; 3752608Swnj if (sc->sc_openf < 0 || (addr->tmcs&TM_CUR) == 0) { 3762608Swnj /* 3773095Swnj * Have had a hard error on a non-raw tape 3783095Swnj * or the tape unit is now unavailable 3793095Swnj * (e.g. taken off line). 3802608Swnj */ 3812608Swnj bp->b_flags |= B_ERROR; 3821919Swnj goto next; 3831919Swnj } 3843095Swnj if (bp == &ctmbuf[TMUNIT(bp->b_dev)]) { 3853095Swnj /* 3863095Swnj * Execute control operation with the specified count. 3873095Swnj */ 3882608Swnj if (bp->b_command == TM_SENSE) 3892608Swnj goto next; 3902608Swnj um->um_tab.b_active = 3912608Swnj bp->b_command == TM_REW ? SREW : SCOM; 3922608Swnj if (bp->b_command == TM_SFORW || bp->b_command == TM_SREV) 3932608Swnj addr->tmbc = bp->b_repcnt; 3942670Swnj goto dobpcmd; 3952608Swnj } 3962608Swnj /* 3973095Swnj * The following checks handle boundary cases for operation 3983095Swnj * on non-raw tapes. On raw tapes the initialization of 3993095Swnj * sc->sc_nxrec by tmphys causes them to be skipped normally 4003095Swnj * (except in the case of retries). 4013095Swnj */ 4023095Swnj if (dbtofsb(bp->b_blkno) > sc->sc_nxrec) { 4033095Swnj /* 4043095Swnj * Can't read past known end-of-file. 4053095Swnj */ 4063095Swnj bp->b_flags |= B_ERROR; 4073095Swnj bp->b_error = ENXIO; 4083095Swnj goto next; 4093095Swnj } 4103095Swnj if (dbtofsb(bp->b_blkno) == sc->sc_nxrec && 4113095Swnj bp->b_flags&B_READ) { 4123095Swnj /* 4133095Swnj * Reading at end of file returns 0 bytes. 4143095Swnj */ 4153095Swnj bp->b_resid = bp->b_bcount; 4163095Swnj clrbuf(bp); 4173095Swnj goto next; 4183095Swnj } 4193095Swnj if ((bp->b_flags&B_READ) == 0) 4203095Swnj /* 4213095Swnj * Writing sets EOF 4223095Swnj */ 4233095Swnj sc->sc_nxrec = dbtofsb(bp->b_blkno) + 1; 4243095Swnj /* 4252608Swnj * If the data transfer command is in the correct place, 4262608Swnj * set up all the registers except the csr, and give 4272608Swnj * control over to the UNIBUS adapter routines, to 4282608Swnj * wait for resources to start the i/o. 4292608Swnj */ 4302471Swnj if ((blkno = sc->sc_blkno) == dbtofsb(bp->b_blkno)) { 4312396Swnj addr->tmbc = -bp->b_bcount; 4321919Swnj if ((bp->b_flags&B_READ) == 0) { 4332471Swnj if (um->um_tab.b_errcnt) 4343095Swnj cmd = TM_WIRG; 4351919Swnj else 4363095Swnj cmd = TM_WCOM; 4371919Swnj } else 4383095Swnj cmd = TM_RCOM; 4392471Swnj um->um_tab.b_active = SIO; 4403095Swnj um->um_cmd = sc->sc_dens|cmd; 4412928Swnj #ifdef notdef 4422670Swnj if (tmreverseop(sc->sc_lastcmd)) 4433095Swnj while (addr->tmer & TMER_SDWN) 4442670Swnj tmgapsdcnt++; 4452670Swnj sc->sc_lastcmd = TM_RCOM; /* will serve */ 4462928Swnj #endif 4473105Swnj (void) ubago(ui); 4481919Swnj return; 4491919Swnj } 4502608Swnj /* 4513095Swnj * Tape positioned incorrectly; 4523095Swnj * set to seek forwards or backwards to the correct spot. 4533095Swnj * This happens for raw tapes only on error retries. 4542608Swnj */ 4552471Swnj um->um_tab.b_active = SSEEK; 4561919Swnj if (blkno < dbtofsb(bp->b_blkno)) { 4572670Swnj bp->b_command = TM_SFORW; 4582396Swnj addr->tmbc = blkno - dbtofsb(bp->b_blkno); 4591919Swnj } else { 4602670Swnj bp->b_command = TM_SREV; 4612396Swnj addr->tmbc = dbtofsb(bp->b_blkno) - blkno; 4621919Swnj } 4632670Swnj dobpcmd: 4642928Swnj #ifdef notdef 4653095Swnj /* 4663095Swnj * It is strictly necessary to wait for the tape 4673095Swnj * to stop before changing directions, but the TC11 4683095Swnj * handles this for us. 4693095Swnj */ 4702670Swnj if (tmreverseop(sc->sc_lastcmd) != tmreverseop(bp->b_command)) 4712670Swnj while (addr->tmer & TM_SDWN) 4722670Swnj tmgapsdcnt++; 4732670Swnj sc->sc_lastcmd = bp->b_command; 4742928Swnj #endif 4753095Swnj /* 4763095Swnj * Do the command in bp. 4773095Swnj */ 4783095Swnj addr->tmcs = (sc->sc_dens | bp->b_command); 4791919Swnj return; 4801919Swnj 4811919Swnj next: 4822608Swnj /* 4832608Swnj * Done with this operation due to error or 4842608Swnj * the fact that it doesn't do anything. 4852608Swnj * Release UBA resources (if any), dequeue 4862608Swnj * the transfer and continue processing this slave. 4872608Swnj */ 4882608Swnj if (um->um_ubinfo) 4892617Swnj ubadone(um); 4902608Swnj um->um_tab.b_errcnt = 0; 4912608Swnj dp->b_actf = bp->av_forw; 4921919Swnj iodone(bp); 4931919Swnj goto loop; 4941919Swnj } 4951919Swnj 4962608Swnj /* 4972608Swnj * The UNIBUS resources we needed have been 4982608Swnj * allocated to us; start the device. 4992608Swnj */ 5002574Swnj tmdgo(um) 5012982Swnj register struct uba_ctlr *um; 5021919Swnj { 5032574Swnj register struct device *addr = (struct device *)um->um_addr; 5042471Swnj 5052574Swnj addr->tmba = um->um_ubinfo; 5062574Swnj addr->tmcs = um->um_cmd | ((um->um_ubinfo >> 12) & 0x30); 5072396Swnj } 5082396Swnj 5092608Swnj /* 5102608Swnj * Tm interrupt routine. 5112608Swnj */ 5122471Swnj /*ARGSUSED*/ 5132630Swnj tmintr(tm11) 5142630Swnj int tm11; 5152396Swnj { 5162608Swnj struct buf *dp; 5171919Swnj register struct buf *bp; 5182982Swnj register struct uba_ctlr *um = tmminfo[tm11]; 5193095Swnj register struct device *addr; 5203095Swnj register struct te_softc *sc; 5213095Swnj int teunit; 5221919Swnj register state; 5231919Swnj 5243095Swnj if ((dp = um->um_tab.b_actf) == NULL) 5253095Swnj return; 5263095Swnj bp = dp->b_actf; 5273095Swnj teunit = TEUNIT(bp->b_dev); 5283095Swnj addr = (struct device *)tedinfo[teunit]->ui_addr; 5292608Swnj /* 5302608Swnj * If last command was a rewind, and tape is still 5312608Swnj * rewinding, wait for the rewind complete interrupt. 5322608Swnj */ 5332608Swnj if (um->um_tab.b_active == SREW) { 5342608Swnj um->um_tab.b_active = SCOM; 5353095Swnj if (addr->tmer&TMER_RWS) 5362608Swnj return; 5371919Swnj } 5382608Swnj /* 5392608Swnj * An operation completed... record status 5402608Swnj */ 5413095Swnj sc = &te_softc[teunit]; 5422471Swnj sc->sc_dsreg = addr->tmcs; 5432471Swnj sc->sc_erreg = addr->tmer; 5442471Swnj sc->sc_resid = addr->tmbc; 5451919Swnj if ((bp->b_flags & B_READ) == 0) 5462608Swnj sc->sc_lastiow = 1; 5472471Swnj state = um->um_tab.b_active; 5482471Swnj um->um_tab.b_active = 0; 5492608Swnj /* 5502608Swnj * Check for errors. 5512608Swnj */ 5522608Swnj if (addr->tmcs&TM_ERR) { 5533095Swnj while (addr->tmer & TMER_SDWN) 5541919Swnj ; /* await settle down */ 5552608Swnj /* 5563095Swnj * If we hit the end of the tape file, update our position. 5572608Swnj */ 5583095Swnj if (addr->tmer&TMER_EOF) { 5592608Swnj tmseteof(bp); /* set blkno and nxrec */ 5602608Swnj state = SCOM; /* force completion */ 5612608Swnj /* 5622608Swnj * Stuff bc so it will be unstuffed correctly 5632608Swnj * later to get resid. 5642608Swnj */ 5652396Swnj addr->tmbc = -bp->b_bcount; 5662608Swnj goto opdone; 5671919Swnj } 5682608Swnj /* 5693095Swnj * If we were reading raw tape and the only error was that the 5703095Swnj * record was too long, then we don't consider this an error. 5712608Swnj */ 5723095Swnj if (bp == &rtmbuf[TMUNIT(bp->b_dev)] && (bp->b_flags&B_READ) && 5733095Swnj (addr->tmer&(TMER_HARD|TMER_SOFT)) == TMER_RLE) 5742608Swnj goto ignoreerr; 5752608Swnj /* 5762608Swnj * If error is not hard, and this was an i/o operation 5772608Swnj * retry up to 8 times. 5782608Swnj */ 5793095Swnj if ((addr->tmer&TMER_HARD)==0 && state==SIO) { 5802471Swnj if (++um->um_tab.b_errcnt < 7) { 5812471Swnj sc->sc_blkno++; 5822617Swnj ubadone(um); 5832608Swnj goto opcont; 5841919Swnj } 5852608Swnj } else 5862608Swnj /* 5872608Swnj * Hard or non-i/o errors on non-raw tape 5882608Swnj * cause it to close. 5892608Swnj */ 5903095Swnj if (sc->sc_openf>0 && bp != &rtmbuf[TMUNIT(bp->b_dev)]) 5912608Swnj sc->sc_openf = -1; 5922608Swnj /* 5932608Swnj * Couldn't recover error 5942608Swnj */ 5952928Swnj printf("te%d: hard error bn%d er=%b\n", minor(bp->b_dev)&03, 5963095Swnj bp->b_blkno, sc->sc_erreg, TMER_BITS); 5971919Swnj bp->b_flags |= B_ERROR; 5982608Swnj goto opdone; 5991919Swnj } 6002608Swnj /* 6012608Swnj * Advance tape control FSM. 6022608Swnj */ 6032608Swnj ignoreerr: 6041919Swnj switch (state) { 6051919Swnj 6061919Swnj case SIO: 6072608Swnj /* 6082608Swnj * Read/write increments tape block number 6092608Swnj */ 6102471Swnj sc->sc_blkno++; 6112608Swnj goto opdone; 6121919Swnj 6131919Swnj case SCOM: 6142608Swnj /* 6153095Swnj * For forward/backward space record update current position. 6162608Swnj */ 6173095Swnj if (bp == &ctmbuf[TMUNIT(bp->b_dev)]) 6182608Swnj switch (bp->b_command) { 6191919Swnj 6202608Swnj case TM_SFORW: 6212608Swnj sc->sc_blkno -= bp->b_repcnt; 6223095Swnj break; 6231919Swnj 6242608Swnj case TM_SREV: 6252608Swnj sc->sc_blkno += bp->b_repcnt; 6263095Swnj break; 6271919Swnj } 6283095Swnj goto opdone; 6291919Swnj 6301919Swnj case SSEEK: 6312471Swnj sc->sc_blkno = dbtofsb(bp->b_blkno); 6322608Swnj goto opcont; 6331919Swnj 6341919Swnj default: 6352608Swnj panic("tmintr"); 6362608Swnj } 6372608Swnj opdone: 6382608Swnj /* 6392608Swnj * Reset error count and remove 6402608Swnj * from device queue. 6412608Swnj */ 6422608Swnj um->um_tab.b_errcnt = 0; 6432608Swnj dp->b_actf = bp->av_forw; 6442608Swnj bp->b_resid = -addr->tmbc; 6452617Swnj ubadone(um); 6462608Swnj iodone(bp); 6472608Swnj /* 6482608Swnj * Circulate slave to end of controller 6492608Swnj * queue to give other slaves a chance. 6502608Swnj */ 6512608Swnj um->um_tab.b_actf = dp->b_forw; 6522608Swnj if (dp->b_actf) { 6532608Swnj dp->b_forw = NULL; 6542608Swnj if (um->um_tab.b_actf == NULL) 6552608Swnj um->um_tab.b_actf = dp; 6562608Swnj else 6572608Swnj um->um_tab.b_actl->b_forw = dp; 6582608Swnj um->um_tab.b_actl = dp; 6592608Swnj } 6602608Swnj if (um->um_tab.b_actf == 0) 6611919Swnj return; 6622608Swnj opcont: 6632608Swnj tmstart(um); 6641919Swnj } 6651919Swnj 6661919Swnj tmseteof(bp) 6671919Swnj register struct buf *bp; 6681919Swnj { 6693095Swnj register int teunit = TEUNIT(bp->b_dev); 6702396Swnj register struct device *addr = 6713095Swnj (struct device *)tedinfo[teunit]->ui_addr; 6723095Swnj register struct te_softc *sc = &te_softc[teunit]; 6731919Swnj 6743095Swnj if (bp == &ctmbuf[TMUNIT(bp->b_dev)]) { 6752471Swnj if (sc->sc_blkno > dbtofsb(bp->b_blkno)) { 6761919Swnj /* reversing */ 6772471Swnj sc->sc_nxrec = dbtofsb(bp->b_blkno) - addr->tmbc; 6782471Swnj sc->sc_blkno = sc->sc_nxrec; 6791919Swnj } else { 6801919Swnj /* spacing forward */ 6812471Swnj sc->sc_blkno = dbtofsb(bp->b_blkno) + addr->tmbc; 6822471Swnj sc->sc_nxrec = sc->sc_blkno - 1; 6831919Swnj } 6841919Swnj return; 6851919Swnj } 6861919Swnj /* eof on read */ 6872471Swnj sc->sc_nxrec = dbtofsb(bp->b_blkno); 6881919Swnj } 6891919Swnj 6901919Swnj tmread(dev) 6912608Swnj dev_t dev; 6921919Swnj { 6931919Swnj 6941919Swnj tmphys(dev); 6952982Swnj if (u.u_error) 6962982Swnj return; 6972608Swnj physio(tmstrategy, &rtmbuf[TMUNIT(dev)], dev, B_READ, minphys); 6981919Swnj } 6991919Swnj 7001919Swnj tmwrite(dev) 7012608Swnj dev_t dev; 7021919Swnj { 7031919Swnj 7041919Swnj tmphys(dev); 7052982Swnj if (u.u_error) 7062982Swnj return; 7072608Swnj physio(tmstrategy, &rtmbuf[TMUNIT(dev)], dev, B_WRITE, minphys); 7081919Swnj } 7091919Swnj 7103095Swnj /* 7113095Swnj * Check that a raw device exists. 7123095Swnj * If it does, set up sc_blkno and sc_nxrec 7133095Swnj * so that the tape will appear positioned correctly. 7143095Swnj */ 7151919Swnj tmphys(dev) 7162608Swnj dev_t dev; 7171919Swnj { 7183095Swnj register int teunit = TEUNIT(dev); 7191919Swnj register daddr_t a; 7203095Swnj register struct te_softc *sc; 7213095Swnj register struct uba_device *ui; 7221919Swnj 7233095Swnj if (teunit >= NTE || (ui=tedinfo[teunit]) == 0 || ui->ui_alive == 0) { 7242982Swnj u.u_error = ENXIO; 7252982Swnj return; 7262982Swnj } 7273095Swnj sc = &te_softc[teunit]; 7281919Swnj a = dbtofsb(u.u_offset >> 9); 7292471Swnj sc->sc_blkno = a; 7302471Swnj sc->sc_nxrec = a + 1; 7311919Swnj } 7321919Swnj 7332608Swnj tmreset(uban) 7342608Swnj int uban; 7352608Swnj { 7362982Swnj register struct uba_ctlr *um; 7373095Swnj register tm11, teunit; 7382982Swnj register struct uba_device *ui; 7392608Swnj register struct buf *dp; 7402608Swnj 7412630Swnj for (tm11 = 0; tm11 < NTM; tm11++) { 7422630Swnj if ((um = tmminfo[tm11]) == 0 || um->um_alive == 0 || 7432608Swnj um->um_ubanum != uban) 7442608Swnj continue; 7452928Swnj printf(" tm%d", tm11); 7462608Swnj um->um_tab.b_active = 0; 7472608Swnj um->um_tab.b_actf = um->um_tab.b_actl = 0; 7482608Swnj if (um->um_ubinfo) { 7492608Swnj printf("<%d>", (um->um_ubinfo>>28)&0xf); 7502617Swnj ubadone(um); 7512608Swnj } 7522608Swnj ((struct device *)(um->um_addr))->tmcs = TM_DCLR; 7533095Swnj for (teunit = 0; teunit < NTE; teunit++) { 7543095Swnj if ((ui = tedinfo[teunit]) == 0 || ui->ui_mi != um || 7553095Swnj ui->ui_alive == 0) 7562608Swnj continue; 7573095Swnj dp = &teutab[teunit]; 7582608Swnj dp->b_active = 0; 7592608Swnj dp->b_forw = 0; 7602608Swnj if (um->um_tab.b_actf == NULL) 7612608Swnj um->um_tab.b_actf = dp; 7622608Swnj else 7632608Swnj um->um_tab.b_actl->b_forw = dp; 7642608Swnj um->um_tab.b_actl = dp; 7653095Swnj te_softc[teunit].sc_openf = -1; 7662608Swnj } 7672608Swnj tmstart(um); 7682608Swnj } 7692608Swnj } 7702608Swnj 7711919Swnj /*ARGSUSED*/ 7721919Swnj tmioctl(dev, cmd, addr, flag) 7731919Swnj caddr_t addr; 7741919Swnj dev_t dev; 7751919Swnj { 7763095Swnj int teunit = TEUNIT(dev); 7773095Swnj register struct te_softc *sc = &te_softc[teunit]; 7783095Swnj register struct buf *bp = &ctmbuf[TMUNIT(dev)]; 7791919Swnj register callcount; 7801919Swnj int fcount; 7811919Swnj struct mtop mtop; 7821919Swnj struct mtget mtget; 7831919Swnj /* we depend of the values and order of the MT codes here */ 7842608Swnj static tmops[] = 7852608Swnj {TM_WEOF,TM_SFORW,TM_SREV,TM_SFORW,TM_SREV,TM_REW,TM_OFFL,TM_SENSE}; 7861919Swnj 7872608Swnj switch (cmd) { 7881919Swnj case MTIOCTOP: /* tape operation */ 7891919Swnj if (copyin((caddr_t)addr, (caddr_t)&mtop, sizeof(mtop))) { 7901919Swnj u.u_error = EFAULT; 7911919Swnj return; 7921919Swnj } 7931919Swnj switch(mtop.mt_op) { 7942608Swnj case MTWEOF: 7951919Swnj callcount = mtop.mt_count; 7962608Swnj fcount = 1; 7972608Swnj break; 7982608Swnj case MTFSF: case MTBSF: 7992608Swnj callcount = mtop.mt_count; 8001919Swnj fcount = INF; 8011919Swnj break; 8021919Swnj case MTFSR: case MTBSR: 8031919Swnj callcount = 1; 8041919Swnj fcount = mtop.mt_count; 8051919Swnj break; 8062324Skre case MTREW: case MTOFFL: case MTNOP: 8071919Swnj callcount = 1; 8081919Swnj fcount = 1; 8091919Swnj break; 8101919Swnj default: 8111919Swnj u.u_error = ENXIO; 8121919Swnj return; 8131919Swnj } 8142608Swnj if (callcount <= 0 || fcount <= 0) { 8151919Swnj u.u_error = ENXIO; 8162608Swnj return; 8172608Swnj } 8182608Swnj while (--callcount >= 0) { 8192574Swnj tmcommand(dev, tmops[mtop.mt_op], fcount); 8201919Swnj if ((mtop.mt_op == MTFSR || mtop.mt_op == MTBSR) && 8212608Swnj bp->b_resid) { 8221919Swnj u.u_error = EIO; 8231919Swnj break; 8241919Swnj } 8253095Swnj if ((bp->b_flags&B_ERROR) || sc->sc_erreg&TMER_BOT) 8261919Swnj break; 8271919Swnj } 8282608Swnj geterror(bp); 8291919Swnj return; 8301919Swnj case MTIOCGET: 8312471Swnj mtget.mt_dsreg = sc->sc_dsreg; 8322471Swnj mtget.mt_erreg = sc->sc_erreg; 8332471Swnj mtget.mt_resid = sc->sc_resid; 8341919Swnj if (copyout((caddr_t)&mtget, addr, sizeof(mtget))) 8351919Swnj u.u_error = EFAULT; 8361919Swnj return; 8371919Swnj default: 8381919Swnj u.u_error = ENXIO; 8391919Swnj } 8401919Swnj } 8411919Swnj 8421919Swnj #define DBSIZE 20 8431919Swnj 8442363Swnj tmdump() 8452363Swnj { 8462982Swnj register struct uba_device *ui; 8472396Swnj register struct uba_regs *up; 8482396Swnj register struct device *addr; 8492426Skre int blk, num; 8502426Skre int start; 8511919Swnj 8522426Skre start = 0; 8532426Skre num = maxfree; 8542426Skre #define phys(a,b) ((b)((int)(a)&0x7fffffff)) 8553095Swnj if (tedinfo[0] == 0) 8562887Swnj return (ENXIO); 8573095Swnj ui = phys(tedinfo[0], struct uba_device *); 8582396Swnj up = phys(ui->ui_hd, struct uba_hd *)->uh_physuba; 8592396Swnj #if VAX780 8602396Swnj if (cpu == VAX_780) 8612396Swnj ubainit(up); 8621919Swnj #endif 8632324Skre DELAY(1000000); 8642396Swnj addr = (struct device *)ui->ui_physaddr; 8652396Swnj tmwait(addr); 8662608Swnj addr->tmcs = TM_DCLR | TM_GO; 8671919Swnj while (num > 0) { 8681919Swnj blk = num > DBSIZE ? DBSIZE : num; 8692396Swnj tmdwrite(start, blk, addr, up); 8701919Swnj start += blk; 8711919Swnj num -= blk; 8721919Swnj } 8732426Skre tmeof(addr); 8742426Skre tmeof(addr); 8752426Skre tmwait(addr); 8762887Swnj if (addr->tmcs&TM_ERR) 8772887Swnj return (EIO); 8782608Swnj addr->tmcs = TM_REW | TM_GO; 8792471Swnj tmwait(addr); 8802363Swnj return (0); 8811919Swnj } 8821919Swnj 8832608Swnj tmdwrite(dbuf, num, addr, up) 8842608Swnj register dbuf, num; 8852396Swnj register struct device *addr; 8862396Swnj struct uba_regs *up; 8871919Swnj { 8882396Swnj register struct pte *io; 8892396Swnj register int npf; 8901928Swnj 8912396Swnj tmwait(addr); 8922396Swnj io = up->uba_map; 8931919Swnj npf = num+1; 8941928Swnj while (--npf != 0) 8952982Swnj *(int *)io++ = (dbuf++ | (1<<UBAMR_DPSHIFT) | UBAMR_MRV); 8962396Swnj *(int *)io = 0; 8972396Swnj addr->tmbc = -(num*NBPG); 8982396Swnj addr->tmba = 0; 8992608Swnj addr->tmcs = TM_WCOM | TM_GO; 9001919Swnj } 9011919Swnj 9022396Swnj tmwait(addr) 9032396Swnj register struct device *addr; 9041919Swnj { 9051928Swnj register s; 9061919Swnj 9071919Swnj do 9082396Swnj s = addr->tmcs; 9092608Swnj while ((s & TM_CUR) == 0); 9101919Swnj } 9111919Swnj 9122396Swnj tmeof(addr) 9132396Swnj struct device *addr; 9141919Swnj { 9151919Swnj 9162396Swnj tmwait(addr); 9172608Swnj addr->tmcs = TM_WEOF | TM_GO; 9181919Swnj } 9191919Swnj #endif 920