1*3141Swnj /* tm.c 4.27 81/03/09 */ 21919Swnj 32709Swnj #include "te.h" 42630Swnj #if NTM > 0 51919Swnj /* 62630Swnj * TM11/TE10 tape driver 72471Swnj * 83095Swnj * TODO: 93095Swnj * test driver with more than one slave 103095Swnj * test driver with more than one controller 113095Swnj * test reset code 123095Swnj * test rewinds without hanging in driver 133095Swnj * what happens if you offline tape during rewind? 143095Swnj * test using file system on tape 151919Swnj */ 161919Swnj #include "../h/param.h" 17*3141Swnj #include "../h/systm.h" 181919Swnj #include "../h/buf.h" 191919Swnj #include "../h/dir.h" 201919Swnj #include "../h/conf.h" 211919Swnj #include "../h/user.h" 221919Swnj #include "../h/file.h" 231919Swnj #include "../h/map.h" 241919Swnj #include "../h/pte.h" 252574Swnj #include "../h/vm.h" 262982Swnj #include "../h/ubareg.h" 272982Swnj #include "../h/ubavar.h" 281919Swnj #include "../h/mtio.h" 291919Swnj #include "../h/ioctl.h" 302363Swnj #include "../h/cmap.h" 312396Swnj #include "../h/cpu.h" 321919Swnj 332396Swnj #include "../h/tmreg.h" 341919Swnj 353095Swnj /* 363095Swnj * There is a ctmbuf per tape controller. 373095Swnj * It is used as the token to pass to the internal routines 383095Swnj * to execute tape ioctls, and also acts as a lock on the slaves 393095Swnj * on the controller, since there is only one per controller. 403095Swnj * In particular, when the tape is rewinding on close we release 413095Swnj * the user process but any further attempts to use the tape drive 423095Swnj * before the rewind completes will hang waiting for ctmbuf. 433095Swnj */ 443095Swnj struct buf ctmbuf[NTM]; 451919Swnj 463095Swnj /* 473095Swnj * Raw tape operations use rtmbuf. The driver 483095Swnj * notices when rtmbuf is being used and allows the user 493095Swnj * program to continue after errors and read records 503095Swnj * not of the standard length (BSIZE). 513095Swnj */ 523095Swnj struct buf rtmbuf[NTM]; 533095Swnj 543095Swnj /* 553095Swnj * Driver unibus interface routines and variables. 563095Swnj */ 572608Swnj int tmprobe(), tmslave(), tmattach(), tmdgo(), tmintr(); 582982Swnj struct uba_ctlr *tmminfo[NTM]; 593095Swnj struct uba_device *tedinfo[NTE]; 603095Swnj struct buf teutab[NTE]; 613095Swnj short tetotm[NTE]; 622458Swnj u_short tmstd[] = { 0772520, 0 }; 632396Swnj struct uba_driver tmdriver = 643095Swnj { tmprobe, tmslave, tmattach, tmdgo, tmstd, "te", tedinfo, "tm", tmminfo, 0 }; 651919Swnj 661919Swnj /* bits in minor device */ 673095Swnj #define TEUNIT(dev) (minor(dev)&03) 683095Swnj #define TMUNIT(dev) (tetotm[TEUNIT(dev)]) 691919Swnj #define T_NOREWIND 04 701919Swnj #define T_1600BPI 08 711919Swnj 721919Swnj #define INF (daddr_t)1000000L 731919Swnj 742608Swnj /* 752608Swnj * Software state per tape transport. 763095Swnj * 773095Swnj * 1. A tape drive is a unique-open device; we refuse opens when it is already. 783095Swnj * 2. We keep track of the current position on a block tape and seek 793095Swnj * before operations by forward/back spacing if necessary. 803095Swnj * 3. We remember if the last operation was a write on a tape, so if a tape 813095Swnj * is open read write and the last thing done is a write we can 823095Swnj * write a standard end of tape mark (two eofs). 833095Swnj * 4. We remember the status registers after the last command, using 843095Swnj * then internally and returning them to the SENSE ioctl. 853095Swnj * 5. We remember the last density the tape was used at. If it is 863095Swnj * not a BOT when we start using it and we are writing, we don't 873095Swnj * let the density be changed. 882608Swnj */ 893095Swnj struct te_softc { 902608Swnj char sc_openf; /* lock against multiple opens */ 912608Swnj char sc_lastiow; /* last op was a write */ 922608Swnj daddr_t sc_blkno; /* block number, for block device tape */ 933095Swnj daddr_t sc_nxrec; /* position of end of tape, if known */ 942608Swnj u_short sc_erreg; /* copy of last erreg */ 952608Swnj u_short sc_dsreg; /* copy of last dsreg */ 962608Swnj short sc_resid; /* copy of last bc */ 973105Swnj #ifdef unneeded 982670Swnj short sc_lastcmd; /* last command to handle direction changes */ 992928Swnj #endif 1003095Swnj u_short sc_dens; /* prototype command with density info */ 1013095Swnj } te_softc[NTM]; 1023105Swnj #ifdef unneeded 1033105Swnj int tmgapsdcnt; /* DEBUG */ 1043105Swnj #endif 1051919Swnj 1062608Swnj /* 1073095Swnj * States for um->um_tab.b_active, the per controller state flag. 1083095Swnj * This is used to sequence control in the driver. 1092608Swnj */ 1101919Swnj #define SSEEK 1 /* seeking */ 1111919Swnj #define SIO 2 /* doing seq i/o */ 1121919Swnj #define SCOM 3 /* sending control command */ 1132608Swnj #define SREW 4 /* sending a drive rewind */ 1141919Swnj 1152426Skre /* 1162426Skre * Determine if there is a controller for 1172426Skre * a tm at address reg. Our goal is to make the 1182426Skre * device interrupt. 1192426Skre */ 1202608Swnj tmprobe(reg) 1212396Swnj caddr_t reg; 1222396Swnj { 1233095Swnj register int br, cvec; /* must be r11,r10; value-result */ 1242426Skre 1252608Swnj #ifdef lint 1263105Swnj br = 0; cvec = br; br = cvec; 1272608Swnj #endif 1282608Swnj ((struct device *)reg)->tmcs = TM_IE; 1292396Swnj /* 1302630Swnj * If this is a tm11, it ought to have interrupted 1312396Swnj * by now, if it isn't (ie: it is a ts04) then we just 1322458Swnj * hope that it didn't interrupt, so autoconf will ignore it. 1332458Swnj * Just in case, we will reference one 1342396Swnj * of the more distant registers, and hope for a machine 1352458Swnj * check, or similar disaster if this is a ts. 1362471Swnj * 1372471Swnj * Note: on an 11/780, badaddr will just generate 1382471Swnj * a uba error for a ts; but our caller will notice that 1392471Swnj * so we won't check for it. 1402396Swnj */ 1413105Swnj if (badaddr((caddr_t)&((struct device *)reg)->tmrd, 2)) 1422458Swnj return (0); 1432458Swnj return (1); 1442396Swnj } 1452396Swnj 1462608Swnj /* 1472608Swnj * Due to a design flaw, we cannot ascertain if the tape 1482608Swnj * exists or not unless it is on line - ie: unless a tape is 1492608Swnj * mounted. This is too servere a restriction to bear, 1502608Swnj * so all units are assumed to exist. 1512608Swnj */ 1522608Swnj /*ARGSUSED*/ 1532574Swnj tmslave(ui, reg) 1542982Swnj struct uba_device *ui; 1552396Swnj caddr_t reg; 1562396Swnj { 1572458Swnj 1582458Swnj return (1); 1592396Swnj } 1602396Swnj 1612608Swnj /* 1623095Swnj * Record attachment of the unit to the controller. 1632608Swnj */ 1642608Swnj /*ARGSUSED*/ 1652608Swnj tmattach(ui) 1662982Swnj struct uba_device *ui; 1672608Swnj { 1682608Swnj 1693095Swnj /* 1703095Swnj * Tetotm is used in TMUNIT to index the ctmbuf and rtmbuf 1713095Swnj * arrays given a te unit number. 1723095Swnj */ 1733095Swnj tetotm[ui->ui_unit] = ui->ui_mi->um_ctlr; 1742608Swnj } 1752608Swnj 1762608Swnj /* 1772608Swnj * Open the device. Tapes are unique open 1782608Swnj * devices, so we refuse if it is already open. 1792608Swnj * We also check that a tape is available, and 1803095Swnj * don't block waiting here; if you want to wait 1813095Swnj * for a tape you should timeout in user code. 1822608Swnj */ 1831919Swnj tmopen(dev, flag) 1841919Swnj dev_t dev; 1851919Swnj int flag; 1861919Swnj { 1873095Swnj register int teunit; 1882982Swnj register struct uba_device *ui; 1893095Swnj register struct te_softc *sc; 1903095Swnj int dens; 1911919Swnj 1923095Swnj teunit = TEUNIT(dev); 1933095Swnj if (teunit>=NTE || (sc = &te_softc[teunit])->sc_openf || 1943095Swnj (ui = tedinfo[teunit]) == 0 || ui->ui_alive == 0) { 1952608Swnj u.u_error = ENXIO; 1961919Swnj return; 1971919Swnj } 198*3141Swnj get: 1992608Swnj tmcommand(dev, TM_SENSE, 1); 200*3141Swnj if (sc->sc_erreg&TMER_SDWN) { 201*3141Swnj sleep((caddr_t)&lbolt, PZERO+1); 202*3141Swnj goto get; 203*3141Swnj } 2043095Swnj dens = TM_IE | TM_GO | (ui->ui_slave << 8); 2053095Swnj if ((minor(dev) & T_1600BPI) == 0) 2063095Swnj dens |= TM_D800; 2073095Swnj if ((sc->sc_erreg&(TMER_SELR|TMER_TUR)) != (TMER_SELR|TMER_TUR) || 2083095Swnj (sc->sc_erreg&TMER_BOT) == 0 && (flag&FWRITE) && 2093095Swnj dens != sc->sc_dens || 2103095Swnj (flag&(FREAD|FWRITE)) == FWRITE && sc->sc_erreg&TMER_WRL) { 211*3141Swnj printf("er %o dens %o sc->sc_dens %o flag %o\n", sc->sc_erreg, dens, sc->sc_dens, flag); 2123095Swnj /* 2133095Swnj * Not online or density switch in mid-tape or write locked. 2143095Swnj */ 2152471Swnj u.u_error = EIO; 2162608Swnj return; 2171919Swnj } 2182608Swnj sc->sc_openf = 1; 2192471Swnj sc->sc_blkno = (daddr_t)0; 2202471Swnj sc->sc_nxrec = INF; 2212608Swnj sc->sc_lastiow = 0; 2223095Swnj sc->sc_dens = dens; 2231919Swnj } 2241919Swnj 2252608Swnj /* 2262608Swnj * Close tape device. 2272608Swnj * 2282608Swnj * If tape was open for writing or last operation was 2292608Swnj * a write, then write two EOF's and backspace over the last one. 2302608Swnj * Unless this is a non-rewinding special file, rewind the tape. 2312608Swnj * Make the tape available to others. 2322608Swnj */ 2331919Swnj tmclose(dev, flag) 2341919Swnj register dev_t dev; 2351919Swnj register flag; 2361919Swnj { 2373095Swnj register struct te_softc *sc = &te_softc[TEUNIT(dev)]; 2381919Swnj 2392608Swnj if (flag == FWRITE || (flag&FWRITE) && sc->sc_lastiow) { 2402608Swnj tmcommand(dev, TM_WEOF, 1); 2412608Swnj tmcommand(dev, TM_WEOF, 1); 2422608Swnj tmcommand(dev, TM_SREV, 1); 2431919Swnj } 2441919Swnj if ((minor(dev)&T_NOREWIND) == 0) 2453095Swnj /* 2463095Swnj * 0 count means don't hang waiting for rewind complete 2473095Swnj * rather ctmbuf stays busy until the operation completes 2483095Swnj * preventing further opens from completing by 2493095Swnj * preventing a TM_SENSE from completing. 2503095Swnj */ 2513095Swnj tmcommand(dev, TM_REW, 0); 2522471Swnj sc->sc_openf = 0; 2531919Swnj } 2541919Swnj 2552608Swnj /* 2562608Swnj * Execute a command on the tape drive 2572608Swnj * a specified number of times. 2582608Swnj */ 2592574Swnj tmcommand(dev, com, count) 2601919Swnj dev_t dev; 2611919Swnj int com, count; 2621919Swnj { 2631919Swnj register struct buf *bp; 2641919Swnj 2652608Swnj bp = &ctmbuf[TMUNIT(dev)]; 2661919Swnj (void) spl5(); 2671919Swnj while (bp->b_flags&B_BUSY) { 2683095Swnj /* 2693095Swnj * This special check is because B_BUSY never 2703095Swnj * gets cleared in the non-waiting rewind case. 2713095Swnj */ 272*3141Swnj if (bp->b_repcnt == 0 && (bp->b_flags&B_DONE)) 2733095Swnj break; 2741919Swnj bp->b_flags |= B_WANTED; 2751919Swnj sleep((caddr_t)bp, PRIBIO); 2761919Swnj } 2771919Swnj bp->b_flags = B_BUSY|B_READ; 2781919Swnj (void) spl0(); 2791919Swnj bp->b_dev = dev; 2801919Swnj bp->b_repcnt = -count; 2811919Swnj bp->b_command = com; 2821919Swnj bp->b_blkno = 0; 2831919Swnj tmstrategy(bp); 2843095Swnj /* 2853095Swnj * In case of rewind from close, don't wait. 2863095Swnj * This is the only case where count can be 0. 2873095Swnj */ 2883095Swnj if (count == 0) 2893095Swnj return; 2901919Swnj iowait(bp); 2911919Swnj if (bp->b_flags&B_WANTED) 2921919Swnj wakeup((caddr_t)bp); 2931919Swnj bp->b_flags &= B_ERROR; 2941919Swnj } 2951919Swnj 2962608Swnj /* 2973095Swnj * Queue a tape operation. 2982608Swnj */ 2991919Swnj tmstrategy(bp) 3001919Swnj register struct buf *bp; 3011919Swnj { 3023095Swnj int teunit = TEUNIT(bp->b_dev); 3032982Swnj register struct uba_ctlr *um; 3042608Swnj register struct buf *dp; 3051919Swnj 3062608Swnj /* 3072608Swnj * Put transfer at end of unit queue 3082608Swnj */ 3093095Swnj dp = &teutab[teunit]; 3101919Swnj bp->av_forw = NULL; 3111919Swnj (void) spl5(); 3122608Swnj if (dp->b_actf == NULL) { 3132608Swnj dp->b_actf = bp; 3142608Swnj /* 3152608Swnj * Transport not already active... 3162608Swnj * put at end of controller queue. 3172608Swnj */ 3182608Swnj dp->b_forw = NULL; 3193095Swnj um = tedinfo[teunit]->ui_mi; 3202608Swnj if (um->um_tab.b_actf == NULL) 3212608Swnj um->um_tab.b_actf = dp; 3222608Swnj else 3232608Swnj um->um_tab.b_actl->b_forw = dp; 3242608Swnj um->um_tab.b_actl = dp; 3252608Swnj } else 3262608Swnj dp->b_actl->av_forw = bp; 3272608Swnj dp->b_actl = bp; 3282608Swnj /* 3292608Swnj * If the controller is not busy, get 3302608Swnj * it going. 3312608Swnj */ 3322608Swnj if (um->um_tab.b_active == 0) 3332608Swnj tmstart(um); 3341919Swnj (void) spl0(); 3351919Swnj } 3361919Swnj 3372608Swnj /* 3382608Swnj * Start activity on a tm controller. 3392608Swnj */ 3402608Swnj tmstart(um) 3412982Swnj register struct uba_ctlr *um; 3421919Swnj { 3432608Swnj register struct buf *bp, *dp; 3442608Swnj register struct device *addr = (struct device *)um->um_addr; 3453095Swnj register struct te_softc *sc; 3462982Swnj register struct uba_device *ui; 3473095Swnj int teunit, cmd; 3482471Swnj daddr_t blkno; 3491919Swnj 3502608Swnj /* 3512608Swnj * Look for an idle transport on the controller. 3522608Swnj */ 3531919Swnj loop: 3542608Swnj if ((dp = um->um_tab.b_actf) == NULL) 3551919Swnj return; 3562608Swnj if ((bp = dp->b_actf) == NULL) { 3572608Swnj um->um_tab.b_actf = dp->b_forw; 3582608Swnj goto loop; 3592608Swnj } 3603095Swnj teunit = TEUNIT(bp->b_dev); 3613095Swnj ui = tedinfo[teunit]; 3622608Swnj /* 3632608Swnj * Record pre-transfer status (e.g. for TM_SENSE) 3642608Swnj */ 3653095Swnj sc = &te_softc[teunit]; 3662608Swnj addr = (struct device *)um->um_addr; 3672608Swnj addr->tmcs = (ui->ui_slave << 8); 3682471Swnj sc->sc_dsreg = addr->tmcs; 3692471Swnj sc->sc_erreg = addr->tmer; 3702471Swnj sc->sc_resid = addr->tmbc; 3712608Swnj /* 3722608Swnj * Default is that last command was NOT a write command; 3732608Swnj * if we do a write command we will notice this in tmintr(). 3742608Swnj */ 3752608Swnj sc->sc_lastiow = 1; 3762608Swnj if (sc->sc_openf < 0 || (addr->tmcs&TM_CUR) == 0) { 3772608Swnj /* 3783095Swnj * Have had a hard error on a non-raw tape 3793095Swnj * or the tape unit is now unavailable 3803095Swnj * (e.g. taken off line). 3812608Swnj */ 3822608Swnj bp->b_flags |= B_ERROR; 3831919Swnj goto next; 3841919Swnj } 3853095Swnj if (bp == &ctmbuf[TMUNIT(bp->b_dev)]) { 3863095Swnj /* 3873095Swnj * Execute control operation with the specified count. 3883095Swnj */ 3892608Swnj if (bp->b_command == TM_SENSE) 3902608Swnj goto next; 3912608Swnj um->um_tab.b_active = 3922608Swnj bp->b_command == TM_REW ? SREW : SCOM; 3932608Swnj if (bp->b_command == TM_SFORW || bp->b_command == TM_SREV) 3942608Swnj addr->tmbc = bp->b_repcnt; 3952670Swnj goto dobpcmd; 3962608Swnj } 3972608Swnj /* 3983095Swnj * The following checks handle boundary cases for operation 3993095Swnj * on non-raw tapes. On raw tapes the initialization of 4003095Swnj * sc->sc_nxrec by tmphys causes them to be skipped normally 4013095Swnj * (except in the case of retries). 4023095Swnj */ 4033095Swnj if (dbtofsb(bp->b_blkno) > sc->sc_nxrec) { 4043095Swnj /* 4053095Swnj * Can't read past known end-of-file. 4063095Swnj */ 4073095Swnj bp->b_flags |= B_ERROR; 4083095Swnj bp->b_error = ENXIO; 4093095Swnj goto next; 4103095Swnj } 4113095Swnj if (dbtofsb(bp->b_blkno) == sc->sc_nxrec && 4123095Swnj bp->b_flags&B_READ) { 4133095Swnj /* 4143095Swnj * Reading at end of file returns 0 bytes. 4153095Swnj */ 4163095Swnj bp->b_resid = bp->b_bcount; 4173095Swnj clrbuf(bp); 4183095Swnj goto next; 4193095Swnj } 4203095Swnj if ((bp->b_flags&B_READ) == 0) 4213095Swnj /* 4223095Swnj * Writing sets EOF 4233095Swnj */ 4243095Swnj sc->sc_nxrec = dbtofsb(bp->b_blkno) + 1; 4253095Swnj /* 4262608Swnj * If the data transfer command is in the correct place, 4272608Swnj * set up all the registers except the csr, and give 4282608Swnj * control over to the UNIBUS adapter routines, to 4292608Swnj * wait for resources to start the i/o. 4302608Swnj */ 4312471Swnj if ((blkno = sc->sc_blkno) == dbtofsb(bp->b_blkno)) { 4322396Swnj addr->tmbc = -bp->b_bcount; 4331919Swnj if ((bp->b_flags&B_READ) == 0) { 4342471Swnj if (um->um_tab.b_errcnt) 4353095Swnj cmd = TM_WIRG; 4361919Swnj else 4373095Swnj cmd = TM_WCOM; 4381919Swnj } else 4393095Swnj cmd = TM_RCOM; 4402471Swnj um->um_tab.b_active = SIO; 4413095Swnj um->um_cmd = sc->sc_dens|cmd; 4422928Swnj #ifdef notdef 4432670Swnj if (tmreverseop(sc->sc_lastcmd)) 4443095Swnj while (addr->tmer & TMER_SDWN) 4452670Swnj tmgapsdcnt++; 4462670Swnj sc->sc_lastcmd = TM_RCOM; /* will serve */ 4472928Swnj #endif 4483105Swnj (void) ubago(ui); 4491919Swnj return; 4501919Swnj } 4512608Swnj /* 4523095Swnj * Tape positioned incorrectly; 4533095Swnj * set to seek forwards or backwards to the correct spot. 4543095Swnj * This happens for raw tapes only on error retries. 4552608Swnj */ 4562471Swnj um->um_tab.b_active = SSEEK; 4571919Swnj if (blkno < dbtofsb(bp->b_blkno)) { 4582670Swnj bp->b_command = TM_SFORW; 4592396Swnj addr->tmbc = blkno - dbtofsb(bp->b_blkno); 4601919Swnj } else { 4612670Swnj bp->b_command = TM_SREV; 4622396Swnj addr->tmbc = dbtofsb(bp->b_blkno) - blkno; 4631919Swnj } 4642670Swnj dobpcmd: 4652928Swnj #ifdef notdef 4663095Swnj /* 4673095Swnj * It is strictly necessary to wait for the tape 4683095Swnj * to stop before changing directions, but the TC11 4693095Swnj * handles this for us. 4703095Swnj */ 4712670Swnj if (tmreverseop(sc->sc_lastcmd) != tmreverseop(bp->b_command)) 4722670Swnj while (addr->tmer & TM_SDWN) 4732670Swnj tmgapsdcnt++; 4742670Swnj sc->sc_lastcmd = bp->b_command; 4752928Swnj #endif 4763095Swnj /* 4773095Swnj * Do the command in bp. 4783095Swnj */ 4793095Swnj addr->tmcs = (sc->sc_dens | bp->b_command); 4801919Swnj return; 4811919Swnj 4821919Swnj next: 4832608Swnj /* 4842608Swnj * Done with this operation due to error or 4852608Swnj * the fact that it doesn't do anything. 4862608Swnj * Release UBA resources (if any), dequeue 4872608Swnj * the transfer and continue processing this slave. 4882608Swnj */ 4892608Swnj if (um->um_ubinfo) 4902617Swnj ubadone(um); 4912608Swnj um->um_tab.b_errcnt = 0; 4922608Swnj dp->b_actf = bp->av_forw; 4931919Swnj iodone(bp); 4941919Swnj goto loop; 4951919Swnj } 4961919Swnj 4972608Swnj /* 4982608Swnj * The UNIBUS resources we needed have been 4992608Swnj * allocated to us; start the device. 5002608Swnj */ 5012574Swnj tmdgo(um) 5022982Swnj register struct uba_ctlr *um; 5031919Swnj { 5042574Swnj register struct device *addr = (struct device *)um->um_addr; 5052471Swnj 5062574Swnj addr->tmba = um->um_ubinfo; 5072574Swnj addr->tmcs = um->um_cmd | ((um->um_ubinfo >> 12) & 0x30); 5082396Swnj } 5092396Swnj 5102608Swnj /* 5112608Swnj * Tm interrupt routine. 5122608Swnj */ 5132471Swnj /*ARGSUSED*/ 5142630Swnj tmintr(tm11) 5152630Swnj int tm11; 5162396Swnj { 5172608Swnj struct buf *dp; 5181919Swnj register struct buf *bp; 5192982Swnj register struct uba_ctlr *um = tmminfo[tm11]; 5203095Swnj register struct device *addr; 5213095Swnj register struct te_softc *sc; 5223095Swnj int teunit; 5231919Swnj register state; 5241919Swnj 5253095Swnj if ((dp = um->um_tab.b_actf) == NULL) 5263095Swnj return; 5273095Swnj bp = dp->b_actf; 5283095Swnj teunit = TEUNIT(bp->b_dev); 5293095Swnj addr = (struct device *)tedinfo[teunit]->ui_addr; 5302608Swnj /* 5312608Swnj * If last command was a rewind, and tape is still 5322608Swnj * rewinding, wait for the rewind complete interrupt. 5332608Swnj */ 5342608Swnj if (um->um_tab.b_active == SREW) { 5352608Swnj um->um_tab.b_active = SCOM; 5363095Swnj if (addr->tmer&TMER_RWS) 5372608Swnj return; 5381919Swnj } 5392608Swnj /* 5402608Swnj * An operation completed... record status 5412608Swnj */ 5423095Swnj sc = &te_softc[teunit]; 5432471Swnj sc->sc_dsreg = addr->tmcs; 5442471Swnj sc->sc_erreg = addr->tmer; 5452471Swnj sc->sc_resid = addr->tmbc; 5461919Swnj if ((bp->b_flags & B_READ) == 0) 5472608Swnj sc->sc_lastiow = 1; 5482471Swnj state = um->um_tab.b_active; 5492471Swnj um->um_tab.b_active = 0; 5502608Swnj /* 5512608Swnj * Check for errors. 5522608Swnj */ 5532608Swnj if (addr->tmcs&TM_ERR) { 5543095Swnj while (addr->tmer & TMER_SDWN) 5551919Swnj ; /* await settle down */ 5562608Swnj /* 5573095Swnj * If we hit the end of the tape file, update our position. 5582608Swnj */ 5593095Swnj if (addr->tmer&TMER_EOF) { 5602608Swnj tmseteof(bp); /* set blkno and nxrec */ 5612608Swnj state = SCOM; /* force completion */ 5622608Swnj /* 5632608Swnj * Stuff bc so it will be unstuffed correctly 5642608Swnj * later to get resid. 5652608Swnj */ 5662396Swnj addr->tmbc = -bp->b_bcount; 5672608Swnj goto opdone; 5681919Swnj } 5692608Swnj /* 5703095Swnj * If we were reading raw tape and the only error was that the 5713095Swnj * record was too long, then we don't consider this an error. 5722608Swnj */ 5733095Swnj if (bp == &rtmbuf[TMUNIT(bp->b_dev)] && (bp->b_flags&B_READ) && 5743095Swnj (addr->tmer&(TMER_HARD|TMER_SOFT)) == TMER_RLE) 5752608Swnj goto ignoreerr; 5762608Swnj /* 5772608Swnj * If error is not hard, and this was an i/o operation 5782608Swnj * retry up to 8 times. 5792608Swnj */ 5803095Swnj if ((addr->tmer&TMER_HARD)==0 && state==SIO) { 5812471Swnj if (++um->um_tab.b_errcnt < 7) { 5822471Swnj sc->sc_blkno++; 5832617Swnj ubadone(um); 5842608Swnj goto opcont; 5851919Swnj } 5862608Swnj } else 5872608Swnj /* 5882608Swnj * Hard or non-i/o errors on non-raw tape 5892608Swnj * cause it to close. 5902608Swnj */ 5913095Swnj if (sc->sc_openf>0 && bp != &rtmbuf[TMUNIT(bp->b_dev)]) 5922608Swnj sc->sc_openf = -1; 5932608Swnj /* 5942608Swnj * Couldn't recover error 5952608Swnj */ 5962928Swnj printf("te%d: hard error bn%d er=%b\n", minor(bp->b_dev)&03, 5973095Swnj bp->b_blkno, sc->sc_erreg, TMER_BITS); 5981919Swnj bp->b_flags |= B_ERROR; 5992608Swnj goto opdone; 6001919Swnj } 6012608Swnj /* 6022608Swnj * Advance tape control FSM. 6032608Swnj */ 6042608Swnj ignoreerr: 6051919Swnj switch (state) { 6061919Swnj 6071919Swnj case SIO: 6082608Swnj /* 6092608Swnj * Read/write increments tape block number 6102608Swnj */ 6112471Swnj sc->sc_blkno++; 6122608Swnj goto opdone; 6131919Swnj 6141919Swnj case SCOM: 6152608Swnj /* 6163095Swnj * For forward/backward space record update current position. 6172608Swnj */ 6183095Swnj if (bp == &ctmbuf[TMUNIT(bp->b_dev)]) 6192608Swnj switch (bp->b_command) { 6201919Swnj 6212608Swnj case TM_SFORW: 6222608Swnj sc->sc_blkno -= bp->b_repcnt; 6233095Swnj break; 6241919Swnj 6252608Swnj case TM_SREV: 6262608Swnj sc->sc_blkno += bp->b_repcnt; 6273095Swnj break; 6281919Swnj } 6293095Swnj goto opdone; 6301919Swnj 6311919Swnj case SSEEK: 6322471Swnj sc->sc_blkno = dbtofsb(bp->b_blkno); 6332608Swnj goto opcont; 6341919Swnj 6351919Swnj default: 6362608Swnj panic("tmintr"); 6372608Swnj } 6382608Swnj opdone: 6392608Swnj /* 6402608Swnj * Reset error count and remove 6412608Swnj * from device queue. 6422608Swnj */ 6432608Swnj um->um_tab.b_errcnt = 0; 6442608Swnj dp->b_actf = bp->av_forw; 6452608Swnj bp->b_resid = -addr->tmbc; 6462617Swnj ubadone(um); 6472608Swnj iodone(bp); 6482608Swnj /* 6492608Swnj * Circulate slave to end of controller 6502608Swnj * queue to give other slaves a chance. 6512608Swnj */ 6522608Swnj um->um_tab.b_actf = dp->b_forw; 6532608Swnj if (dp->b_actf) { 6542608Swnj dp->b_forw = NULL; 6552608Swnj if (um->um_tab.b_actf == NULL) 6562608Swnj um->um_tab.b_actf = dp; 6572608Swnj else 6582608Swnj um->um_tab.b_actl->b_forw = dp; 6592608Swnj um->um_tab.b_actl = dp; 6602608Swnj } 6612608Swnj if (um->um_tab.b_actf == 0) 6621919Swnj return; 6632608Swnj opcont: 6642608Swnj tmstart(um); 6651919Swnj } 6661919Swnj 6671919Swnj tmseteof(bp) 6681919Swnj register struct buf *bp; 6691919Swnj { 6703095Swnj register int teunit = TEUNIT(bp->b_dev); 6712396Swnj register struct device *addr = 6723095Swnj (struct device *)tedinfo[teunit]->ui_addr; 6733095Swnj register struct te_softc *sc = &te_softc[teunit]; 6741919Swnj 6753095Swnj if (bp == &ctmbuf[TMUNIT(bp->b_dev)]) { 6762471Swnj if (sc->sc_blkno > dbtofsb(bp->b_blkno)) { 6771919Swnj /* reversing */ 6782471Swnj sc->sc_nxrec = dbtofsb(bp->b_blkno) - addr->tmbc; 6792471Swnj sc->sc_blkno = sc->sc_nxrec; 6801919Swnj } else { 6811919Swnj /* spacing forward */ 6822471Swnj sc->sc_blkno = dbtofsb(bp->b_blkno) + addr->tmbc; 6832471Swnj sc->sc_nxrec = sc->sc_blkno - 1; 6841919Swnj } 6851919Swnj return; 6861919Swnj } 6871919Swnj /* eof on read */ 6882471Swnj sc->sc_nxrec = dbtofsb(bp->b_blkno); 6891919Swnj } 6901919Swnj 6911919Swnj tmread(dev) 6922608Swnj dev_t dev; 6931919Swnj { 6941919Swnj 6951919Swnj tmphys(dev); 6962982Swnj if (u.u_error) 6972982Swnj return; 6982608Swnj physio(tmstrategy, &rtmbuf[TMUNIT(dev)], dev, B_READ, minphys); 6991919Swnj } 7001919Swnj 7011919Swnj tmwrite(dev) 7022608Swnj dev_t dev; 7031919Swnj { 7041919Swnj 7051919Swnj tmphys(dev); 7062982Swnj if (u.u_error) 7072982Swnj return; 7082608Swnj physio(tmstrategy, &rtmbuf[TMUNIT(dev)], dev, B_WRITE, minphys); 7091919Swnj } 7101919Swnj 7113095Swnj /* 7123095Swnj * Check that a raw device exists. 7133095Swnj * If it does, set up sc_blkno and sc_nxrec 7143095Swnj * so that the tape will appear positioned correctly. 7153095Swnj */ 7161919Swnj tmphys(dev) 7172608Swnj dev_t dev; 7181919Swnj { 7193095Swnj register int teunit = TEUNIT(dev); 7201919Swnj register daddr_t a; 7213095Swnj register struct te_softc *sc; 7223095Swnj register struct uba_device *ui; 7231919Swnj 7243095Swnj if (teunit >= NTE || (ui=tedinfo[teunit]) == 0 || ui->ui_alive == 0) { 7252982Swnj u.u_error = ENXIO; 7262982Swnj return; 7272982Swnj } 7283095Swnj sc = &te_softc[teunit]; 7291919Swnj a = dbtofsb(u.u_offset >> 9); 7302471Swnj sc->sc_blkno = a; 7312471Swnj sc->sc_nxrec = a + 1; 7321919Swnj } 7331919Swnj 7342608Swnj tmreset(uban) 7352608Swnj int uban; 7362608Swnj { 7372982Swnj register struct uba_ctlr *um; 7383095Swnj register tm11, teunit; 7392982Swnj register struct uba_device *ui; 7402608Swnj register struct buf *dp; 7412608Swnj 7422630Swnj for (tm11 = 0; tm11 < NTM; tm11++) { 7432630Swnj if ((um = tmminfo[tm11]) == 0 || um->um_alive == 0 || 7442608Swnj um->um_ubanum != uban) 7452608Swnj continue; 7462928Swnj printf(" tm%d", tm11); 7472608Swnj um->um_tab.b_active = 0; 7482608Swnj um->um_tab.b_actf = um->um_tab.b_actl = 0; 7492608Swnj if (um->um_ubinfo) { 7502608Swnj printf("<%d>", (um->um_ubinfo>>28)&0xf); 7512617Swnj ubadone(um); 7522608Swnj } 7532608Swnj ((struct device *)(um->um_addr))->tmcs = TM_DCLR; 7543095Swnj for (teunit = 0; teunit < NTE; teunit++) { 7553095Swnj if ((ui = tedinfo[teunit]) == 0 || ui->ui_mi != um || 7563095Swnj ui->ui_alive == 0) 7572608Swnj continue; 7583095Swnj dp = &teutab[teunit]; 7592608Swnj dp->b_active = 0; 7602608Swnj dp->b_forw = 0; 7612608Swnj if (um->um_tab.b_actf == NULL) 7622608Swnj um->um_tab.b_actf = dp; 7632608Swnj else 7642608Swnj um->um_tab.b_actl->b_forw = dp; 7652608Swnj um->um_tab.b_actl = dp; 7663095Swnj te_softc[teunit].sc_openf = -1; 7672608Swnj } 7682608Swnj tmstart(um); 7692608Swnj } 7702608Swnj } 7712608Swnj 7721919Swnj /*ARGSUSED*/ 7731919Swnj tmioctl(dev, cmd, addr, flag) 7741919Swnj caddr_t addr; 7751919Swnj dev_t dev; 7761919Swnj { 7773095Swnj int teunit = TEUNIT(dev); 7783095Swnj register struct te_softc *sc = &te_softc[teunit]; 7793095Swnj register struct buf *bp = &ctmbuf[TMUNIT(dev)]; 7801919Swnj register callcount; 7811919Swnj int fcount; 7821919Swnj struct mtop mtop; 7831919Swnj struct mtget mtget; 7841919Swnj /* we depend of the values and order of the MT codes here */ 7852608Swnj static tmops[] = 7862608Swnj {TM_WEOF,TM_SFORW,TM_SREV,TM_SFORW,TM_SREV,TM_REW,TM_OFFL,TM_SENSE}; 7871919Swnj 7882608Swnj switch (cmd) { 7891919Swnj case MTIOCTOP: /* tape operation */ 7901919Swnj if (copyin((caddr_t)addr, (caddr_t)&mtop, sizeof(mtop))) { 7911919Swnj u.u_error = EFAULT; 7921919Swnj return; 7931919Swnj } 7941919Swnj switch(mtop.mt_op) { 7952608Swnj case MTWEOF: 7961919Swnj callcount = mtop.mt_count; 7972608Swnj fcount = 1; 7982608Swnj break; 7992608Swnj case MTFSF: case MTBSF: 8002608Swnj callcount = mtop.mt_count; 8011919Swnj fcount = INF; 8021919Swnj break; 8031919Swnj case MTFSR: case MTBSR: 8041919Swnj callcount = 1; 8051919Swnj fcount = mtop.mt_count; 8061919Swnj break; 8072324Skre case MTREW: case MTOFFL: case MTNOP: 8081919Swnj callcount = 1; 8091919Swnj fcount = 1; 8101919Swnj break; 8111919Swnj default: 8121919Swnj u.u_error = ENXIO; 8131919Swnj return; 8141919Swnj } 8152608Swnj if (callcount <= 0 || fcount <= 0) { 8161919Swnj u.u_error = ENXIO; 8172608Swnj return; 8182608Swnj } 8192608Swnj while (--callcount >= 0) { 8202574Swnj tmcommand(dev, tmops[mtop.mt_op], fcount); 8211919Swnj if ((mtop.mt_op == MTFSR || mtop.mt_op == MTBSR) && 8222608Swnj bp->b_resid) { 8231919Swnj u.u_error = EIO; 8241919Swnj break; 8251919Swnj } 8263095Swnj if ((bp->b_flags&B_ERROR) || sc->sc_erreg&TMER_BOT) 8271919Swnj break; 8281919Swnj } 8292608Swnj geterror(bp); 8301919Swnj return; 8311919Swnj case MTIOCGET: 8322471Swnj mtget.mt_dsreg = sc->sc_dsreg; 8332471Swnj mtget.mt_erreg = sc->sc_erreg; 8342471Swnj mtget.mt_resid = sc->sc_resid; 8351919Swnj if (copyout((caddr_t)&mtget, addr, sizeof(mtget))) 8361919Swnj u.u_error = EFAULT; 8371919Swnj return; 8381919Swnj default: 8391919Swnj u.u_error = ENXIO; 8401919Swnj } 8411919Swnj } 8421919Swnj 8431919Swnj #define DBSIZE 20 8441919Swnj 8452363Swnj tmdump() 8462363Swnj { 8472982Swnj register struct uba_device *ui; 8482396Swnj register struct uba_regs *up; 8492396Swnj register struct device *addr; 8502426Skre int blk, num; 8512426Skre int start; 8521919Swnj 8532426Skre start = 0; 8542426Skre num = maxfree; 8552426Skre #define phys(a,b) ((b)((int)(a)&0x7fffffff)) 8563095Swnj if (tedinfo[0] == 0) 8572887Swnj return (ENXIO); 8583095Swnj ui = phys(tedinfo[0], struct uba_device *); 8592396Swnj up = phys(ui->ui_hd, struct uba_hd *)->uh_physuba; 8602396Swnj #if VAX780 8612396Swnj if (cpu == VAX_780) 8622396Swnj ubainit(up); 8631919Swnj #endif 8642324Skre DELAY(1000000); 8652396Swnj addr = (struct device *)ui->ui_physaddr; 8662396Swnj tmwait(addr); 8672608Swnj addr->tmcs = TM_DCLR | TM_GO; 8681919Swnj while (num > 0) { 8691919Swnj blk = num > DBSIZE ? DBSIZE : num; 8702396Swnj tmdwrite(start, blk, addr, up); 8711919Swnj start += blk; 8721919Swnj num -= blk; 8731919Swnj } 8742426Skre tmeof(addr); 8752426Skre tmeof(addr); 8762426Skre tmwait(addr); 8772887Swnj if (addr->tmcs&TM_ERR) 8782887Swnj return (EIO); 8792608Swnj addr->tmcs = TM_REW | TM_GO; 8802471Swnj tmwait(addr); 8812363Swnj return (0); 8821919Swnj } 8831919Swnj 8842608Swnj tmdwrite(dbuf, num, addr, up) 8852608Swnj register dbuf, num; 8862396Swnj register struct device *addr; 8872396Swnj struct uba_regs *up; 8881919Swnj { 8892396Swnj register struct pte *io; 8902396Swnj register int npf; 8911928Swnj 8922396Swnj tmwait(addr); 8932396Swnj io = up->uba_map; 8941919Swnj npf = num+1; 8951928Swnj while (--npf != 0) 8962982Swnj *(int *)io++ = (dbuf++ | (1<<UBAMR_DPSHIFT) | UBAMR_MRV); 8972396Swnj *(int *)io = 0; 8982396Swnj addr->tmbc = -(num*NBPG); 8992396Swnj addr->tmba = 0; 9002608Swnj addr->tmcs = TM_WCOM | TM_GO; 9011919Swnj } 9021919Swnj 9032396Swnj tmwait(addr) 9042396Swnj register struct device *addr; 9051919Swnj { 9061928Swnj register s; 9071919Swnj 9081919Swnj do 9092396Swnj s = addr->tmcs; 9102608Swnj while ((s & TM_CUR) == 0); 9111919Swnj } 9121919Swnj 9132396Swnj tmeof(addr) 9142396Swnj struct device *addr; 9151919Swnj { 9161919Swnj 9172396Swnj tmwait(addr); 9182608Swnj addr->tmcs = TM_WEOF | TM_GO; 9191919Swnj } 9201919Swnj #endif 921