xref: /csrg-svn/sys/vax/uba/tm.c (revision 3105)
1*3105Swnj /*	tm.c	4.25	03/09/81	*/
21919Swnj 
32709Swnj #include "te.h"
42630Swnj #if NTM > 0
51919Swnj /*
62630Swnj  * TM11/TE10 tape driver
72471Swnj  *
83095Swnj  * TODO:
93095Swnj  *	test driver with more than one slave
103095Swnj  *	test driver with more than one controller
113095Swnj  *	test reset code
123095Swnj  *	test rewinds without hanging in driver
133095Swnj  *	what happens if you offline tape during rewind?
143095Swnj  *	test using file system on tape
151919Swnj  */
161919Swnj #include "../h/param.h"
171919Swnj #include "../h/buf.h"
181919Swnj #include "../h/dir.h"
191919Swnj #include "../h/conf.h"
201919Swnj #include "../h/user.h"
211919Swnj #include "../h/file.h"
221919Swnj #include "../h/map.h"
231919Swnj #include "../h/pte.h"
242574Swnj #include "../h/vm.h"
252982Swnj #include "../h/ubareg.h"
262982Swnj #include "../h/ubavar.h"
271919Swnj #include "../h/mtio.h"
281919Swnj #include "../h/ioctl.h"
292363Swnj #include "../h/cmap.h"
302396Swnj #include "../h/cpu.h"
311919Swnj 
322396Swnj #include "../h/tmreg.h"
331919Swnj 
343095Swnj /*
353095Swnj  * There is a ctmbuf per tape controller.
363095Swnj  * It is used as the token to pass to the internal routines
373095Swnj  * to execute tape ioctls, and also acts as a lock on the slaves
383095Swnj  * on the controller, since there is only one per controller.
393095Swnj  * In particular, when the tape is rewinding on close we release
403095Swnj  * the user process but any further attempts to use the tape drive
413095Swnj  * before the rewind completes will hang waiting for ctmbuf.
423095Swnj  */
433095Swnj struct	buf	ctmbuf[NTM];
441919Swnj 
453095Swnj /*
463095Swnj  * Raw tape operations use rtmbuf.  The driver
473095Swnj  * notices when rtmbuf is being used and allows the user
483095Swnj  * program to continue after errors and read records
493095Swnj  * not of the standard length (BSIZE).
503095Swnj  */
513095Swnj struct	buf	rtmbuf[NTM];
523095Swnj 
533095Swnj /*
543095Swnj  * Driver unibus interface routines and variables.
553095Swnj  */
562608Swnj int	tmprobe(), tmslave(), tmattach(), tmdgo(), tmintr();
572982Swnj struct	uba_ctlr *tmminfo[NTM];
583095Swnj struct	uba_device *tedinfo[NTE];
593095Swnj struct	buf teutab[NTE];
603095Swnj short	tetotm[NTE];
612458Swnj u_short	tmstd[] = { 0772520, 0 };
622396Swnj struct	uba_driver tmdriver =
633095Swnj  { tmprobe, tmslave, tmattach, tmdgo, tmstd, "te", tedinfo, "tm", tmminfo, 0 };
641919Swnj 
651919Swnj /* bits in minor device */
663095Swnj #define	TEUNIT(dev)	(minor(dev)&03)
673095Swnj #define	TMUNIT(dev)	(tetotm[TEUNIT(dev)])
681919Swnj #define	T_NOREWIND	04
691919Swnj #define	T_1600BPI	08
701919Swnj 
711919Swnj #define	INF	(daddr_t)1000000L
721919Swnj 
732608Swnj /*
742608Swnj  * Software state per tape transport.
753095Swnj  *
763095Swnj  * 1. A tape drive is a unique-open device; we refuse opens when it is already.
773095Swnj  * 2. We keep track of the current position on a block tape and seek
783095Swnj  *    before operations by forward/back spacing if necessary.
793095Swnj  * 3. We remember if the last operation was a write on a tape, so if a tape
803095Swnj  *    is open read write and the last thing done is a write we can
813095Swnj  *    write a standard end of tape mark (two eofs).
823095Swnj  * 4. We remember the status registers after the last command, using
833095Swnj  *    then internally and returning them to the SENSE ioctl.
843095Swnj  * 5. We remember the last density the tape was used at.  If it is
853095Swnj  *    not a BOT when we start using it and we are writing, we don't
863095Swnj  *    let the density be changed.
872608Swnj  */
883095Swnj struct	te_softc {
892608Swnj 	char	sc_openf;	/* lock against multiple opens */
902608Swnj 	char	sc_lastiow;	/* last op was a write */
912608Swnj 	daddr_t	sc_blkno;	/* block number, for block device tape */
923095Swnj 	daddr_t	sc_nxrec;	/* position of end of tape, if known */
932608Swnj 	u_short	sc_erreg;	/* copy of last erreg */
942608Swnj 	u_short	sc_dsreg;	/* copy of last dsreg */
952608Swnj 	short	sc_resid;	/* copy of last bc */
96*3105Swnj #ifdef unneeded
972670Swnj 	short	sc_lastcmd;	/* last command to handle direction changes */
982928Swnj #endif
993095Swnj 	u_short	sc_dens;	/* prototype command with density info */
1003095Swnj } te_softc[NTM];
101*3105Swnj #ifdef unneeded
102*3105Swnj int	tmgapsdcnt;		/* DEBUG */
103*3105Swnj #endif
1041919Swnj 
1052608Swnj /*
1063095Swnj  * States for um->um_tab.b_active, the per controller state flag.
1073095Swnj  * This is used to sequence control in the driver.
1082608Swnj  */
1091919Swnj #define	SSEEK	1		/* seeking */
1101919Swnj #define	SIO	2		/* doing seq i/o */
1111919Swnj #define	SCOM	3		/* sending control command */
1122608Swnj #define	SREW	4		/* sending a drive rewind */
1131919Swnj 
1142426Skre /*
1152426Skre  * Determine if there is a controller for
1162426Skre  * a tm at address reg.  Our goal is to make the
1172426Skre  * device interrupt.
1182426Skre  */
1192608Swnj tmprobe(reg)
1202396Swnj 	caddr_t reg;
1212396Swnj {
1223095Swnj 	register int br, cvec;		/* must be r11,r10; value-result */
1232426Skre 
1242608Swnj #ifdef lint
125*3105Swnj 	br = 0; cvec = br; br = cvec;
1262608Swnj #endif
1272608Swnj 	((struct device *)reg)->tmcs = TM_IE;
1282396Swnj 	/*
1292630Swnj 	 * If this is a tm11, it ought to have interrupted
1302396Swnj 	 * by now, if it isn't (ie: it is a ts04) then we just
1312458Swnj 	 * hope that it didn't interrupt, so autoconf will ignore it.
1322458Swnj 	 * Just in case, we will reference one
1332396Swnj 	 * of the more distant registers, and hope for a machine
1342458Swnj 	 * check, or similar disaster if this is a ts.
1352471Swnj 	 *
1362471Swnj 	 * Note: on an 11/780, badaddr will just generate
1372471Swnj 	 * a uba error for a ts; but our caller will notice that
1382471Swnj 	 * so we won't check for it.
1392396Swnj 	 */
140*3105Swnj 	if (badaddr((caddr_t)&((struct device *)reg)->tmrd, 2))
1412458Swnj 		return (0);
1422458Swnj 	return (1);
1432396Swnj }
1442396Swnj 
1452608Swnj /*
1462608Swnj  * Due to a design flaw, we cannot ascertain if the tape
1472608Swnj  * exists or not unless it is on line - ie: unless a tape is
1482608Swnj  * mounted. This is too servere a restriction to bear,
1492608Swnj  * so all units are assumed to exist.
1502608Swnj  */
1512608Swnj /*ARGSUSED*/
1522574Swnj tmslave(ui, reg)
1532982Swnj 	struct uba_device *ui;
1542396Swnj 	caddr_t reg;
1552396Swnj {
1562458Swnj 
1572458Swnj 	return (1);
1582396Swnj }
1592396Swnj 
1602608Swnj /*
1613095Swnj  * Record attachment of the unit to the controller.
1622608Swnj  */
1632608Swnj /*ARGSUSED*/
1642608Swnj tmattach(ui)
1652982Swnj 	struct uba_device *ui;
1662608Swnj {
1672608Swnj 
1683095Swnj 	/*
1693095Swnj 	 * Tetotm is used in TMUNIT to index the ctmbuf and rtmbuf
1703095Swnj 	 * arrays given a te unit number.
1713095Swnj 	 */
1723095Swnj 	tetotm[ui->ui_unit] = ui->ui_mi->um_ctlr;
1732608Swnj }
1742608Swnj 
1752608Swnj /*
1762608Swnj  * Open the device.  Tapes are unique open
1772608Swnj  * devices, so we refuse if it is already open.
1782608Swnj  * We also check that a tape is available, and
1793095Swnj  * don't block waiting here; if you want to wait
1803095Swnj  * for a tape you should timeout in user code.
1812608Swnj  */
1821919Swnj tmopen(dev, flag)
1831919Swnj 	dev_t dev;
1841919Swnj 	int flag;
1851919Swnj {
1863095Swnj 	register int teunit;
1872982Swnj 	register struct uba_device *ui;
1883095Swnj 	register struct te_softc *sc;
1893095Swnj 	int dens;
1901919Swnj 
1913095Swnj 	teunit = TEUNIT(dev);
1923095Swnj 	if (teunit>=NTE || (sc = &te_softc[teunit])->sc_openf ||
1933095Swnj 	    (ui = tedinfo[teunit]) == 0 || ui->ui_alive == 0) {
1942608Swnj 		u.u_error = ENXIO;
1951919Swnj 		return;
1961919Swnj 	}
1972608Swnj 	tmcommand(dev, TM_SENSE, 1);
1983095Swnj 	dens = TM_IE | TM_GO | (ui->ui_slave << 8);
1993095Swnj 	if ((minor(dev) & T_1600BPI) == 0)
2003095Swnj 		dens |= TM_D800;
2013095Swnj 	if ((sc->sc_erreg&(TMER_SELR|TMER_TUR)) != (TMER_SELR|TMER_TUR) ||
2023095Swnj 	    (sc->sc_erreg&TMER_BOT) == 0 && (flag&FWRITE) &&
2033095Swnj 		dens != sc->sc_dens ||
2043095Swnj 	    (flag&(FREAD|FWRITE)) == FWRITE && sc->sc_erreg&TMER_WRL) {
2053095Swnj 		/*
2063095Swnj 		 * Not online or density switch in mid-tape or write locked.
2073095Swnj 		 */
2082471Swnj 		u.u_error = EIO;
2092608Swnj 		return;
2101919Swnj 	}
2112608Swnj 	sc->sc_openf = 1;
2122471Swnj 	sc->sc_blkno = (daddr_t)0;
2132471Swnj 	sc->sc_nxrec = INF;
2142608Swnj 	sc->sc_lastiow = 0;
2153095Swnj 	sc->sc_dens = dens;
2161919Swnj }
2171919Swnj 
2182608Swnj /*
2192608Swnj  * Close tape device.
2202608Swnj  *
2212608Swnj  * If tape was open for writing or last operation was
2222608Swnj  * a write, then write two EOF's and backspace over the last one.
2232608Swnj  * Unless this is a non-rewinding special file, rewind the tape.
2242608Swnj  * Make the tape available to others.
2252608Swnj  */
2261919Swnj tmclose(dev, flag)
2271919Swnj 	register dev_t dev;
2281919Swnj 	register flag;
2291919Swnj {
2303095Swnj 	register struct te_softc *sc = &te_softc[TEUNIT(dev)];
2311919Swnj 
2322608Swnj 	if (flag == FWRITE || (flag&FWRITE) && sc->sc_lastiow) {
2332608Swnj 		tmcommand(dev, TM_WEOF, 1);
2342608Swnj 		tmcommand(dev, TM_WEOF, 1);
2352608Swnj 		tmcommand(dev, TM_SREV, 1);
2361919Swnj 	}
2371919Swnj 	if ((minor(dev)&T_NOREWIND) == 0)
2383095Swnj 		/*
2393095Swnj 		 * 0 count means don't hang waiting for rewind complete
2403095Swnj 		 * rather ctmbuf stays busy until the operation completes
2413095Swnj 		 * preventing further opens from completing by
2423095Swnj 		 * preventing a TM_SENSE from completing.
2433095Swnj 		 */
2443095Swnj 		tmcommand(dev, TM_REW, 0);
2452471Swnj 	sc->sc_openf = 0;
2461919Swnj }
2471919Swnj 
2482608Swnj /*
2492608Swnj  * Execute a command on the tape drive
2502608Swnj  * a specified number of times.
2512608Swnj  */
2522574Swnj tmcommand(dev, com, count)
2531919Swnj 	dev_t dev;
2541919Swnj 	int com, count;
2551919Swnj {
2561919Swnj 	register struct buf *bp;
2571919Swnj 
2582608Swnj 	bp = &ctmbuf[TMUNIT(dev)];
2591919Swnj 	(void) spl5();
2601919Swnj 	while (bp->b_flags&B_BUSY) {
2613095Swnj 		/*
2623095Swnj 		 * This special check is because B_BUSY never
2633095Swnj 		 * gets cleared in the non-waiting rewind case.
2643095Swnj 		 */
2653095Swnj 		if (bp->b_command == TM_REW && bp->b_repcnt == 0 &&
2663095Swnj 		    (bp->b_flags&B_DONE))
2673095Swnj 			break;
2681919Swnj 		bp->b_flags |= B_WANTED;
2691919Swnj 		sleep((caddr_t)bp, PRIBIO);
2701919Swnj 	}
2711919Swnj 	bp->b_flags = B_BUSY|B_READ;
2721919Swnj 	(void) spl0();
2731919Swnj 	bp->b_dev = dev;
2741919Swnj 	bp->b_repcnt = -count;
2751919Swnj 	bp->b_command = com;
2761919Swnj 	bp->b_blkno = 0;
2771919Swnj 	tmstrategy(bp);
2783095Swnj 	/*
2793095Swnj 	 * In case of rewind from close, don't wait.
2803095Swnj 	 * This is the only case where count can be 0.
2813095Swnj 	 */
2823095Swnj 	if (count == 0)
2833095Swnj 		return;
2841919Swnj 	iowait(bp);
2851919Swnj 	if (bp->b_flags&B_WANTED)
2861919Swnj 		wakeup((caddr_t)bp);
2871919Swnj 	bp->b_flags &= B_ERROR;
2881919Swnj }
2891919Swnj 
2902608Swnj /*
2913095Swnj  * Queue a tape operation.
2922608Swnj  */
2931919Swnj tmstrategy(bp)
2941919Swnj 	register struct buf *bp;
2951919Swnj {
2963095Swnj 	int teunit = TEUNIT(bp->b_dev);
2972982Swnj 	register struct uba_ctlr *um;
2982608Swnj 	register struct buf *dp;
2991919Swnj 
3002608Swnj 	/*
3012608Swnj 	 * Put transfer at end of unit queue
3022608Swnj 	 */
3033095Swnj 	dp = &teutab[teunit];
3041919Swnj 	bp->av_forw = NULL;
3051919Swnj 	(void) spl5();
3062608Swnj 	if (dp->b_actf == NULL) {
3072608Swnj 		dp->b_actf = bp;
3082608Swnj 		/*
3092608Swnj 		 * Transport not already active...
3102608Swnj 		 * put at end of controller queue.
3112608Swnj 		 */
3122608Swnj 		dp->b_forw = NULL;
3133095Swnj 		um = tedinfo[teunit]->ui_mi;
3142608Swnj 		if (um->um_tab.b_actf == NULL)
3152608Swnj 			um->um_tab.b_actf = dp;
3162608Swnj 		else
3172608Swnj 			um->um_tab.b_actl->b_forw = dp;
3182608Swnj 		um->um_tab.b_actl = dp;
3192608Swnj 	} else
3202608Swnj 		dp->b_actl->av_forw = bp;
3212608Swnj 	dp->b_actl = bp;
3222608Swnj 	/*
3232608Swnj 	 * If the controller is not busy, get
3242608Swnj 	 * it going.
3252608Swnj 	 */
3262608Swnj 	if (um->um_tab.b_active == 0)
3272608Swnj 		tmstart(um);
3281919Swnj 	(void) spl0();
3291919Swnj }
3301919Swnj 
3312608Swnj /*
3322608Swnj  * Start activity on a tm controller.
3332608Swnj  */
3342608Swnj tmstart(um)
3352982Swnj 	register struct uba_ctlr *um;
3361919Swnj {
3372608Swnj 	register struct buf *bp, *dp;
3382608Swnj 	register struct device *addr = (struct device *)um->um_addr;
3393095Swnj 	register struct te_softc *sc;
3402982Swnj 	register struct uba_device *ui;
3413095Swnj 	int teunit, cmd;
3422471Swnj 	daddr_t blkno;
3431919Swnj 
3442608Swnj 	/*
3452608Swnj 	 * Look for an idle transport on the controller.
3462608Swnj 	 */
3471919Swnj loop:
3482608Swnj 	if ((dp = um->um_tab.b_actf) == NULL)
3491919Swnj 		return;
3502608Swnj 	if ((bp = dp->b_actf) == NULL) {
3512608Swnj 		um->um_tab.b_actf = dp->b_forw;
3522608Swnj 		goto loop;
3532608Swnj 	}
3543095Swnj 	teunit = TEUNIT(bp->b_dev);
3553095Swnj 	ui = tedinfo[teunit];
3562608Swnj 	/*
3572608Swnj 	 * Record pre-transfer status (e.g. for TM_SENSE)
3582608Swnj 	 */
3593095Swnj 	sc = &te_softc[teunit];
3602608Swnj 	addr = (struct device *)um->um_addr;
3612608Swnj 	addr->tmcs = (ui->ui_slave << 8);
3622471Swnj 	sc->sc_dsreg = addr->tmcs;
3632471Swnj 	sc->sc_erreg = addr->tmer;
3642471Swnj 	sc->sc_resid = addr->tmbc;
3652608Swnj 	/*
3662608Swnj 	 * Default is that last command was NOT a write command;
3672608Swnj 	 * if we do a write command we will notice this in tmintr().
3682608Swnj 	 */
3692608Swnj 	sc->sc_lastiow = 1;
3702608Swnj 	if (sc->sc_openf < 0 || (addr->tmcs&TM_CUR) == 0) {
3712608Swnj 		/*
3723095Swnj 		 * Have had a hard error on a non-raw tape
3733095Swnj 		 * or the tape unit is now unavailable
3743095Swnj 		 * (e.g. taken off line).
3752608Swnj 		 */
3762608Swnj 		bp->b_flags |= B_ERROR;
3771919Swnj 		goto next;
3781919Swnj 	}
3793095Swnj 	if (bp == &ctmbuf[TMUNIT(bp->b_dev)]) {
3803095Swnj 		/*
3813095Swnj 		 * Execute control operation with the specified count.
3823095Swnj 		 */
3832608Swnj 		if (bp->b_command == TM_SENSE)
3842608Swnj 			goto next;
3852608Swnj 		um->um_tab.b_active =
3862608Swnj 		    bp->b_command == TM_REW ? SREW : SCOM;
3872608Swnj 		if (bp->b_command == TM_SFORW || bp->b_command == TM_SREV)
3882608Swnj 			addr->tmbc = bp->b_repcnt;
3892670Swnj 		goto dobpcmd;
3902608Swnj 	}
3912608Swnj 	/*
3923095Swnj 	 * The following checks handle boundary cases for operation
3933095Swnj 	 * on non-raw tapes.  On raw tapes the initialization of
3943095Swnj 	 * sc->sc_nxrec by tmphys causes them to be skipped normally
3953095Swnj 	 * (except in the case of retries).
3963095Swnj 	 */
3973095Swnj 	if (dbtofsb(bp->b_blkno) > sc->sc_nxrec) {
3983095Swnj 		/*
3993095Swnj 		 * Can't read past known end-of-file.
4003095Swnj 		 */
4013095Swnj 		bp->b_flags |= B_ERROR;
4023095Swnj 		bp->b_error = ENXIO;
4033095Swnj 		goto next;
4043095Swnj 	}
4053095Swnj 	if (dbtofsb(bp->b_blkno) == sc->sc_nxrec &&
4063095Swnj 	    bp->b_flags&B_READ) {
4073095Swnj 		/*
4083095Swnj 		 * Reading at end of file returns 0 bytes.
4093095Swnj 		 */
4103095Swnj 		bp->b_resid = bp->b_bcount;
4113095Swnj 		clrbuf(bp);
4123095Swnj 		goto next;
4133095Swnj 	}
4143095Swnj 	if ((bp->b_flags&B_READ) == 0)
4153095Swnj 		/*
4163095Swnj 		 * Writing sets EOF
4173095Swnj 		 */
4183095Swnj 		sc->sc_nxrec = dbtofsb(bp->b_blkno) + 1;
4193095Swnj 	/*
4202608Swnj 	 * If the data transfer command is in the correct place,
4212608Swnj 	 * set up all the registers except the csr, and give
4222608Swnj 	 * control over to the UNIBUS adapter routines, to
4232608Swnj 	 * wait for resources to start the i/o.
4242608Swnj 	 */
4252471Swnj 	if ((blkno = sc->sc_blkno) == dbtofsb(bp->b_blkno)) {
4262396Swnj 		addr->tmbc = -bp->b_bcount;
4271919Swnj 		if ((bp->b_flags&B_READ) == 0) {
4282471Swnj 			if (um->um_tab.b_errcnt)
4293095Swnj 				cmd = TM_WIRG;
4301919Swnj 			else
4313095Swnj 				cmd = TM_WCOM;
4321919Swnj 		} else
4333095Swnj 			cmd = TM_RCOM;
4342471Swnj 		um->um_tab.b_active = SIO;
4353095Swnj 		um->um_cmd = sc->sc_dens|cmd;
4362928Swnj #ifdef notdef
4372670Swnj 		if (tmreverseop(sc->sc_lastcmd))
4383095Swnj 			while (addr->tmer & TMER_SDWN)
4392670Swnj 				tmgapsdcnt++;
4402670Swnj 		sc->sc_lastcmd = TM_RCOM;		/* will serve */
4412928Swnj #endif
442*3105Swnj 		(void) ubago(ui);
4431919Swnj 		return;
4441919Swnj 	}
4452608Swnj 	/*
4463095Swnj 	 * Tape positioned incorrectly;
4473095Swnj 	 * set to seek forwards or backwards to the correct spot.
4483095Swnj 	 * This happens for raw tapes only on error retries.
4492608Swnj 	 */
4502471Swnj 	um->um_tab.b_active = SSEEK;
4511919Swnj 	if (blkno < dbtofsb(bp->b_blkno)) {
4522670Swnj 		bp->b_command = TM_SFORW;
4532396Swnj 		addr->tmbc = blkno - dbtofsb(bp->b_blkno);
4541919Swnj 	} else {
4552670Swnj 		bp->b_command = TM_SREV;
4562396Swnj 		addr->tmbc = dbtofsb(bp->b_blkno) - blkno;
4571919Swnj 	}
4582670Swnj dobpcmd:
4592928Swnj #ifdef notdef
4603095Swnj 	/*
4613095Swnj 	 * It is strictly necessary to wait for the tape
4623095Swnj 	 * to stop before changing directions, but the TC11
4633095Swnj 	 * handles this for us.
4643095Swnj 	 */
4652670Swnj 	if (tmreverseop(sc->sc_lastcmd) != tmreverseop(bp->b_command))
4662670Swnj 		while (addr->tmer & TM_SDWN)
4672670Swnj 			tmgapsdcnt++;
4682670Swnj 	sc->sc_lastcmd = bp->b_command;
4692928Swnj #endif
4703095Swnj 	/*
4713095Swnj 	 * Do the command in bp.
4723095Swnj 	 */
4733095Swnj 	addr->tmcs = (sc->sc_dens | bp->b_command);
4741919Swnj 	return;
4751919Swnj 
4761919Swnj next:
4772608Swnj 	/*
4782608Swnj 	 * Done with this operation due to error or
4792608Swnj 	 * the fact that it doesn't do anything.
4802608Swnj 	 * Release UBA resources (if any), dequeue
4812608Swnj 	 * the transfer and continue processing this slave.
4822608Swnj 	 */
4832608Swnj 	if (um->um_ubinfo)
4842617Swnj 		ubadone(um);
4852608Swnj 	um->um_tab.b_errcnt = 0;
4862608Swnj 	dp->b_actf = bp->av_forw;
4871919Swnj 	iodone(bp);
4881919Swnj 	goto loop;
4891919Swnj }
4901919Swnj 
4912608Swnj /*
4922608Swnj  * The UNIBUS resources we needed have been
4932608Swnj  * allocated to us; start the device.
4942608Swnj  */
4952574Swnj tmdgo(um)
4962982Swnj 	register struct uba_ctlr *um;
4971919Swnj {
4982574Swnj 	register struct device *addr = (struct device *)um->um_addr;
4992471Swnj 
5002574Swnj 	addr->tmba = um->um_ubinfo;
5012574Swnj 	addr->tmcs = um->um_cmd | ((um->um_ubinfo >> 12) & 0x30);
5022396Swnj }
5032396Swnj 
5042608Swnj /*
5052608Swnj  * Tm interrupt routine.
5062608Swnj  */
5072471Swnj /*ARGSUSED*/
5082630Swnj tmintr(tm11)
5092630Swnj 	int tm11;
5102396Swnj {
5112608Swnj 	struct buf *dp;
5121919Swnj 	register struct buf *bp;
5132982Swnj 	register struct uba_ctlr *um = tmminfo[tm11];
5143095Swnj 	register struct device *addr;
5153095Swnj 	register struct te_softc *sc;
5163095Swnj 	int teunit;
5171919Swnj 	register state;
5181919Swnj 
5193095Swnj 	if ((dp = um->um_tab.b_actf) == NULL)
5203095Swnj 		return;
5213095Swnj 	bp = dp->b_actf;
5223095Swnj 	teunit = TEUNIT(bp->b_dev);
5233095Swnj 	addr = (struct device *)tedinfo[teunit]->ui_addr;
5242608Swnj 	/*
5252608Swnj 	 * If last command was a rewind, and tape is still
5262608Swnj 	 * rewinding, wait for the rewind complete interrupt.
5272608Swnj 	 */
5282608Swnj 	if (um->um_tab.b_active == SREW) {
5292608Swnj 		um->um_tab.b_active = SCOM;
5303095Swnj 		if (addr->tmer&TMER_RWS)
5312608Swnj 			return;
5321919Swnj 	}
5332608Swnj 	/*
5342608Swnj 	 * An operation completed... record status
5352608Swnj 	 */
5363095Swnj 	sc = &te_softc[teunit];
5372471Swnj 	sc->sc_dsreg = addr->tmcs;
5382471Swnj 	sc->sc_erreg = addr->tmer;
5392471Swnj 	sc->sc_resid = addr->tmbc;
5401919Swnj 	if ((bp->b_flags & B_READ) == 0)
5412608Swnj 		sc->sc_lastiow = 1;
5422471Swnj 	state = um->um_tab.b_active;
5432471Swnj 	um->um_tab.b_active = 0;
5442608Swnj 	/*
5452608Swnj 	 * Check for errors.
5462608Swnj 	 */
5472608Swnj 	if (addr->tmcs&TM_ERR) {
5483095Swnj 		while (addr->tmer & TMER_SDWN)
5491919Swnj 			;			/* await settle down */
5502608Swnj 		/*
5513095Swnj 		 * If we hit the end of the tape file, update our position.
5522608Swnj 		 */
5533095Swnj 		if (addr->tmer&TMER_EOF) {
5542608Swnj 			tmseteof(bp);		/* set blkno and nxrec */
5552608Swnj 			state = SCOM;		/* force completion */
5562608Swnj 			/*
5572608Swnj 			 * Stuff bc so it will be unstuffed correctly
5582608Swnj 			 * later to get resid.
5592608Swnj 			 */
5602396Swnj 			addr->tmbc = -bp->b_bcount;
5612608Swnj 			goto opdone;
5621919Swnj 		}
5632608Swnj 		/*
5643095Swnj 		 * If we were reading raw tape and the only error was that the
5653095Swnj 		 * record was too long, then we don't consider this an error.
5662608Swnj 		 */
5673095Swnj 		if (bp == &rtmbuf[TMUNIT(bp->b_dev)] && (bp->b_flags&B_READ) &&
5683095Swnj 		    (addr->tmer&(TMER_HARD|TMER_SOFT)) == TMER_RLE)
5692608Swnj 			goto ignoreerr;
5702608Swnj 		/*
5712608Swnj 		 * If error is not hard, and this was an i/o operation
5722608Swnj 		 * retry up to 8 times.
5732608Swnj 		 */
5743095Swnj 		if ((addr->tmer&TMER_HARD)==0 && state==SIO) {
5752471Swnj 			if (++um->um_tab.b_errcnt < 7) {
5762471Swnj 				sc->sc_blkno++;
5772617Swnj 				ubadone(um);
5782608Swnj 				goto opcont;
5791919Swnj 			}
5802608Swnj 		} else
5812608Swnj 			/*
5822608Swnj 			 * Hard or non-i/o errors on non-raw tape
5832608Swnj 			 * cause it to close.
5842608Swnj 			 */
5853095Swnj 			if (sc->sc_openf>0 && bp != &rtmbuf[TMUNIT(bp->b_dev)])
5862608Swnj 				sc->sc_openf = -1;
5872608Swnj 		/*
5882608Swnj 		 * Couldn't recover error
5892608Swnj 		 */
5902928Swnj 		printf("te%d: hard error bn%d er=%b\n", minor(bp->b_dev)&03,
5913095Swnj 		    bp->b_blkno, sc->sc_erreg, TMER_BITS);
5921919Swnj 		bp->b_flags |= B_ERROR;
5932608Swnj 		goto opdone;
5941919Swnj 	}
5952608Swnj 	/*
5962608Swnj 	 * Advance tape control FSM.
5972608Swnj 	 */
5982608Swnj ignoreerr:
5991919Swnj 	switch (state) {
6001919Swnj 
6011919Swnj 	case SIO:
6022608Swnj 		/*
6032608Swnj 		 * Read/write increments tape block number
6042608Swnj 		 */
6052471Swnj 		sc->sc_blkno++;
6062608Swnj 		goto opdone;
6071919Swnj 
6081919Swnj 	case SCOM:
6092608Swnj 		/*
6103095Swnj 		 * For forward/backward space record update current position.
6112608Swnj 		 */
6123095Swnj 		if (bp == &ctmbuf[TMUNIT(bp->b_dev)])
6132608Swnj 		switch (bp->b_command) {
6141919Swnj 
6152608Swnj 		case TM_SFORW:
6162608Swnj 			sc->sc_blkno -= bp->b_repcnt;
6173095Swnj 			break;
6181919Swnj 
6192608Swnj 		case TM_SREV:
6202608Swnj 			sc->sc_blkno += bp->b_repcnt;
6213095Swnj 			break;
6221919Swnj 		}
6233095Swnj 		goto opdone;
6241919Swnj 
6251919Swnj 	case SSEEK:
6262471Swnj 		sc->sc_blkno = dbtofsb(bp->b_blkno);
6272608Swnj 		goto opcont;
6281919Swnj 
6291919Swnj 	default:
6302608Swnj 		panic("tmintr");
6312608Swnj 	}
6322608Swnj opdone:
6332608Swnj 	/*
6342608Swnj 	 * Reset error count and remove
6352608Swnj 	 * from device queue.
6362608Swnj 	 */
6372608Swnj 	um->um_tab.b_errcnt = 0;
6382608Swnj 	dp->b_actf = bp->av_forw;
6392608Swnj 	bp->b_resid = -addr->tmbc;
6402617Swnj 	ubadone(um);
6412608Swnj 	iodone(bp);
6422608Swnj 	/*
6432608Swnj 	 * Circulate slave to end of controller
6442608Swnj 	 * queue to give other slaves a chance.
6452608Swnj 	 */
6462608Swnj 	um->um_tab.b_actf = dp->b_forw;
6472608Swnj 	if (dp->b_actf) {
6482608Swnj 		dp->b_forw = NULL;
6492608Swnj 		if (um->um_tab.b_actf == NULL)
6502608Swnj 			um->um_tab.b_actf = dp;
6512608Swnj 		else
6522608Swnj 			um->um_tab.b_actl->b_forw = dp;
6532608Swnj 		um->um_tab.b_actl = dp;
6542608Swnj 	}
6552608Swnj 	if (um->um_tab.b_actf == 0)
6561919Swnj 		return;
6572608Swnj opcont:
6582608Swnj 	tmstart(um);
6591919Swnj }
6601919Swnj 
6611919Swnj tmseteof(bp)
6621919Swnj 	register struct buf *bp;
6631919Swnj {
6643095Swnj 	register int teunit = TEUNIT(bp->b_dev);
6652396Swnj 	register struct device *addr =
6663095Swnj 	    (struct device *)tedinfo[teunit]->ui_addr;
6673095Swnj 	register struct te_softc *sc = &te_softc[teunit];
6681919Swnj 
6693095Swnj 	if (bp == &ctmbuf[TMUNIT(bp->b_dev)]) {
6702471Swnj 		if (sc->sc_blkno > dbtofsb(bp->b_blkno)) {
6711919Swnj 			/* reversing */
6722471Swnj 			sc->sc_nxrec = dbtofsb(bp->b_blkno) - addr->tmbc;
6732471Swnj 			sc->sc_blkno = sc->sc_nxrec;
6741919Swnj 		} else {
6751919Swnj 			/* spacing forward */
6762471Swnj 			sc->sc_blkno = dbtofsb(bp->b_blkno) + addr->tmbc;
6772471Swnj 			sc->sc_nxrec = sc->sc_blkno - 1;
6781919Swnj 		}
6791919Swnj 		return;
6801919Swnj 	}
6811919Swnj 	/* eof on read */
6822471Swnj 	sc->sc_nxrec = dbtofsb(bp->b_blkno);
6831919Swnj }
6841919Swnj 
6851919Swnj tmread(dev)
6862608Swnj 	dev_t dev;
6871919Swnj {
6881919Swnj 
6891919Swnj 	tmphys(dev);
6902982Swnj 	if (u.u_error)
6912982Swnj 		return;
6922608Swnj 	physio(tmstrategy, &rtmbuf[TMUNIT(dev)], dev, B_READ, minphys);
6931919Swnj }
6941919Swnj 
6951919Swnj tmwrite(dev)
6962608Swnj 	dev_t dev;
6971919Swnj {
6981919Swnj 
6991919Swnj 	tmphys(dev);
7002982Swnj 	if (u.u_error)
7012982Swnj 		return;
7022608Swnj 	physio(tmstrategy, &rtmbuf[TMUNIT(dev)], dev, B_WRITE, minphys);
7031919Swnj }
7041919Swnj 
7053095Swnj /*
7063095Swnj  * Check that a raw device exists.
7073095Swnj  * If it does, set up sc_blkno and sc_nxrec
7083095Swnj  * so that the tape will appear positioned correctly.
7093095Swnj  */
7101919Swnj tmphys(dev)
7112608Swnj 	dev_t dev;
7121919Swnj {
7133095Swnj 	register int teunit = TEUNIT(dev);
7141919Swnj 	register daddr_t a;
7153095Swnj 	register struct te_softc *sc;
7163095Swnj 	register struct uba_device *ui;
7171919Swnj 
7183095Swnj 	if (teunit >= NTE || (ui=tedinfo[teunit]) == 0 || ui->ui_alive == 0) {
7192982Swnj 		u.u_error = ENXIO;
7202982Swnj 		return;
7212982Swnj 	}
7223095Swnj 	sc = &te_softc[teunit];
7231919Swnj 	a = dbtofsb(u.u_offset >> 9);
7242471Swnj 	sc->sc_blkno = a;
7252471Swnj 	sc->sc_nxrec = a + 1;
7261919Swnj }
7271919Swnj 
7282608Swnj tmreset(uban)
7292608Swnj 	int uban;
7302608Swnj {
7312982Swnj 	register struct uba_ctlr *um;
7323095Swnj 	register tm11, teunit;
7332982Swnj 	register struct uba_device *ui;
7342608Swnj 	register struct buf *dp;
7352608Swnj 
7362630Swnj 	for (tm11 = 0; tm11 < NTM; tm11++) {
7372630Swnj 		if ((um = tmminfo[tm11]) == 0 || um->um_alive == 0 ||
7382608Swnj 		   um->um_ubanum != uban)
7392608Swnj 			continue;
7402928Swnj 		printf(" tm%d", tm11);
7412608Swnj 		um->um_tab.b_active = 0;
7422608Swnj 		um->um_tab.b_actf = um->um_tab.b_actl = 0;
7432608Swnj 		if (um->um_ubinfo) {
7442608Swnj 			printf("<%d>", (um->um_ubinfo>>28)&0xf);
7452617Swnj 			ubadone(um);
7462608Swnj 		}
7472608Swnj 		((struct device *)(um->um_addr))->tmcs = TM_DCLR;
7483095Swnj 		for (teunit = 0; teunit < NTE; teunit++) {
7493095Swnj 			if ((ui = tedinfo[teunit]) == 0 || ui->ui_mi != um ||
7503095Swnj 			    ui->ui_alive == 0)
7512608Swnj 				continue;
7523095Swnj 			dp = &teutab[teunit];
7532608Swnj 			dp->b_active = 0;
7542608Swnj 			dp->b_forw = 0;
7552608Swnj 			if (um->um_tab.b_actf == NULL)
7562608Swnj 				um->um_tab.b_actf = dp;
7572608Swnj 			else
7582608Swnj 				um->um_tab.b_actl->b_forw = dp;
7592608Swnj 			um->um_tab.b_actl = dp;
7603095Swnj 			te_softc[teunit].sc_openf = -1;
7612608Swnj 		}
7622608Swnj 		tmstart(um);
7632608Swnj 	}
7642608Swnj }
7652608Swnj 
7661919Swnj /*ARGSUSED*/
7671919Swnj tmioctl(dev, cmd, addr, flag)
7681919Swnj 	caddr_t addr;
7691919Swnj 	dev_t dev;
7701919Swnj {
7713095Swnj 	int teunit = TEUNIT(dev);
7723095Swnj 	register struct te_softc *sc = &te_softc[teunit];
7733095Swnj 	register struct buf *bp = &ctmbuf[TMUNIT(dev)];
7741919Swnj 	register callcount;
7751919Swnj 	int fcount;
7761919Swnj 	struct mtop mtop;
7771919Swnj 	struct mtget mtget;
7781919Swnj 	/* we depend of the values and order of the MT codes here */
7792608Swnj 	static tmops[] =
7802608Swnj 	   {TM_WEOF,TM_SFORW,TM_SREV,TM_SFORW,TM_SREV,TM_REW,TM_OFFL,TM_SENSE};
7811919Swnj 
7822608Swnj 	switch (cmd) {
7831919Swnj 		case MTIOCTOP:	/* tape operation */
7841919Swnj 		if (copyin((caddr_t)addr, (caddr_t)&mtop, sizeof(mtop))) {
7851919Swnj 			u.u_error = EFAULT;
7861919Swnj 			return;
7871919Swnj 		}
7881919Swnj 		switch(mtop.mt_op) {
7892608Swnj 		case MTWEOF:
7901919Swnj 			callcount = mtop.mt_count;
7912608Swnj 			fcount = 1;
7922608Swnj 			break;
7932608Swnj 		case MTFSF: case MTBSF:
7942608Swnj 			callcount = mtop.mt_count;
7951919Swnj 			fcount = INF;
7961919Swnj 			break;
7971919Swnj 		case MTFSR: case MTBSR:
7981919Swnj 			callcount = 1;
7991919Swnj 			fcount = mtop.mt_count;
8001919Swnj 			break;
8012324Skre 		case MTREW: case MTOFFL: case MTNOP:
8021919Swnj 			callcount = 1;
8031919Swnj 			fcount = 1;
8041919Swnj 			break;
8051919Swnj 		default:
8061919Swnj 			u.u_error = ENXIO;
8071919Swnj 			return;
8081919Swnj 		}
8092608Swnj 		if (callcount <= 0 || fcount <= 0) {
8101919Swnj 			u.u_error = ENXIO;
8112608Swnj 			return;
8122608Swnj 		}
8132608Swnj 		while (--callcount >= 0) {
8142574Swnj 			tmcommand(dev, tmops[mtop.mt_op], fcount);
8151919Swnj 			if ((mtop.mt_op == MTFSR || mtop.mt_op == MTBSR) &&
8162608Swnj 			    bp->b_resid) {
8171919Swnj 				u.u_error = EIO;
8181919Swnj 				break;
8191919Swnj 			}
8203095Swnj 			if ((bp->b_flags&B_ERROR) || sc->sc_erreg&TMER_BOT)
8211919Swnj 				break;
8221919Swnj 		}
8232608Swnj 		geterror(bp);
8241919Swnj 		return;
8251919Swnj 	case MTIOCGET:
8262471Swnj 		mtget.mt_dsreg = sc->sc_dsreg;
8272471Swnj 		mtget.mt_erreg = sc->sc_erreg;
8282471Swnj 		mtget.mt_resid = sc->sc_resid;
8291919Swnj 		if (copyout((caddr_t)&mtget, addr, sizeof(mtget)))
8301919Swnj 			u.u_error = EFAULT;
8311919Swnj 		return;
8321919Swnj 	default:
8331919Swnj 		u.u_error = ENXIO;
8341919Swnj 	}
8351919Swnj }
8361919Swnj 
8371919Swnj #define	DBSIZE	20
8381919Swnj 
8392363Swnj tmdump()
8402363Swnj {
8412982Swnj 	register struct uba_device *ui;
8422396Swnj 	register struct uba_regs *up;
8432396Swnj 	register struct device *addr;
8442426Skre 	int blk, num;
8452426Skre 	int start;
8461919Swnj 
8472426Skre 	start = 0;
8482426Skre 	num = maxfree;
8492426Skre #define	phys(a,b)	((b)((int)(a)&0x7fffffff))
8503095Swnj 	if (tedinfo[0] == 0)
8512887Swnj 		return (ENXIO);
8523095Swnj 	ui = phys(tedinfo[0], struct uba_device *);
8532396Swnj 	up = phys(ui->ui_hd, struct uba_hd *)->uh_physuba;
8542396Swnj #if VAX780
8552396Swnj 	if (cpu == VAX_780)
8562396Swnj 		ubainit(up);
8571919Swnj #endif
8582324Skre 	DELAY(1000000);
8592396Swnj 	addr = (struct device *)ui->ui_physaddr;
8602396Swnj 	tmwait(addr);
8612608Swnj 	addr->tmcs = TM_DCLR | TM_GO;
8621919Swnj 	while (num > 0) {
8631919Swnj 		blk = num > DBSIZE ? DBSIZE : num;
8642396Swnj 		tmdwrite(start, blk, addr, up);
8651919Swnj 		start += blk;
8661919Swnj 		num -= blk;
8671919Swnj 	}
8682426Skre 	tmeof(addr);
8692426Skre 	tmeof(addr);
8702426Skre 	tmwait(addr);
8712887Swnj 	if (addr->tmcs&TM_ERR)
8722887Swnj 		return (EIO);
8732608Swnj 	addr->tmcs = TM_REW | TM_GO;
8742471Swnj 	tmwait(addr);
8752363Swnj 	return (0);
8761919Swnj }
8771919Swnj 
8782608Swnj tmdwrite(dbuf, num, addr, up)
8792608Swnj 	register dbuf, num;
8802396Swnj 	register struct device *addr;
8812396Swnj 	struct uba_regs *up;
8821919Swnj {
8832396Swnj 	register struct pte *io;
8842396Swnj 	register int npf;
8851928Swnj 
8862396Swnj 	tmwait(addr);
8872396Swnj 	io = up->uba_map;
8881919Swnj 	npf = num+1;
8891928Swnj 	while (--npf != 0)
8902982Swnj 		 *(int *)io++ = (dbuf++ | (1<<UBAMR_DPSHIFT) | UBAMR_MRV);
8912396Swnj 	*(int *)io = 0;
8922396Swnj 	addr->tmbc = -(num*NBPG);
8932396Swnj 	addr->tmba = 0;
8942608Swnj 	addr->tmcs = TM_WCOM | TM_GO;
8951919Swnj }
8961919Swnj 
8972396Swnj tmwait(addr)
8982396Swnj 	register struct device *addr;
8991919Swnj {
9001928Swnj 	register s;
9011919Swnj 
9021919Swnj 	do
9032396Swnj 		s = addr->tmcs;
9042608Swnj 	while ((s & TM_CUR) == 0);
9051919Swnj }
9061919Swnj 
9072396Swnj tmeof(addr)
9082396Swnj 	struct device *addr;
9091919Swnj {
9101919Swnj 
9112396Swnj 	tmwait(addr);
9122608Swnj 	addr->tmcs = TM_WEOF | TM_GO;
9131919Swnj }
9141919Swnj #endif
915