xref: /csrg-svn/sys/vax/uba/qduser.h (revision 31808)
1*31808Smarc /************************************************************************
2*31808Smarc  *									*
3*31808Smarc  *			Copyright (c) 1986 by				*
4*31808Smarc  *		Digital Equipment Corporation, Maynard, MA		*
5*31808Smarc  *			All rights reserved.				*
6*31808Smarc  *									*
7*31808Smarc  *   This software is furnished under a license and may be used and	*
8*31808Smarc  *   copied  only  in accordance with the terms of such license and	*
9*31808Smarc  *   with the  inclusion  of  the  above  copyright  notice.   This	*
10*31808Smarc  *   software  or  any  other copies thereof may not be provided or	*
11*31808Smarc  *   otherwise made available to any other person.  No title to and	*
12*31808Smarc  *   ownership of the software is hereby transferred.			*
13*31808Smarc  *									*
14*31808Smarc  *   The information in this software is subject to change  without	*
15*31808Smarc  *   notice  and should not be construed as a commitment by Digital	*
16*31808Smarc  *   Equipment Corporation.						*
17*31808Smarc  *									*
18*31808Smarc  *   Digital assumes no responsibility for the use  or  reliability	*
19*31808Smarc  *   of its software on equipment which is not supplied by Digital.	*
20*31808Smarc  *									*
21*31808Smarc  ************************************************************************/
22*31808Smarc 
23*31808Smarc /***************************************************************************
24*31808Smarc *
25*31808Smarc *	QDUSER...
26*31808Smarc *	This file defines values shared between the driver and a client
27*31808Smarc *
28*31808Smarc ***************************************************************************/
29*31808Smarc 
30*31808Smarc /***************************************************************************
31*31808Smarc *	revision history:
32*31808Smarc ****************************************************************************
33*31808Smarc *
34*31808Smarc * 21 jul 86  ram    fixed define of CURSOR_MIN_Y
35*31808Smarc * 25 nov 85  longo  added macro and bit defines for DMA error flags
36*31808Smarc * 11 nov 85  longo  renamed _vs_eventqueue to "qdinput" struct
37*31808Smarc * 23 oct 85  longo  added more defines to the DMA stuff
38*31808Smarc * 17 oct 85  longo  changed "struct rgb" chars to be unsigned
39*31808Smarc * 16 oct 85  longo  added new TABLET support definitions
40*31808Smarc * 15 oct 85  longo  re-wrote DMA queue access macros
41*31808Smarc * 08 oct 85  longo  added status flag manipulation macros to DMA stuff
42*31808Smarc * 02 oct 85  longo  added support for color map write buffer loading
43*31808Smarc * 26 sep 85  longo  removed adder sertup params from DMA request struct
44*31808Smarc * 23 sep 85  longo  added DMA queue access macros
45*31808Smarc * 30 aug 85  longo  fixed crock in "qdiobuf" struct compile-time sizing. Also
46*31808Smarc *		    removed DMAcontrol struct from DMA buffer for field test
47*31808Smarc * 26 aug 85  longo  put in conditional include of "qevent.h" for user prg's
48*31808Smarc * 18 jul 85  longo  changed semantics so that head is tail and tail is head
49*31808Smarc * 12 jul 85  longo  moved "mouse_report" struct and defs over to qd_data.c
50*31808Smarc * 11 jul 85  longo  added device coordinate to gate array cursor coordinate
51*31808Smarc *		    transformation macros
52*31808Smarc * 03 jul 85  longo  changed kernel typdef's for data types to long-hand
53*31808Smarc * 10 may 85  longo  created
54*31808Smarc *
55*31808Smarc ***************************************************************************/
56*31808Smarc 
57*31808Smarc #ifdef KERNEL
58*31808Smarc #include "../vaxuba/qevent.h"		/* include event struct defs */
59*31808Smarc #else
60*31808Smarc #include <vaxuba/qevent.h>
61*31808Smarc #endif
62*31808Smarc 
63*31808Smarc /*---------------------
64*31808Smarc * QDSS device map */
65*31808Smarc 
66*31808Smarc 	struct qdmap {			/* map of register blocks in QDSS */
67*31808Smarc 
68*31808Smarc 	    char *template;
69*31808Smarc 	    char *adder;
70*31808Smarc 	    char *dga;
71*31808Smarc 	    char *duart;
72*31808Smarc 	    char *memcsr;
73*31808Smarc 	    char *red;
74*31808Smarc 	    char *blue;
75*31808Smarc 	    char *green;
76*31808Smarc 	};
77*31808Smarc 
78*31808Smarc /*--------------------------------------------
79*31808Smarc * DGA CSR bit definitions and register map */
80*31808Smarc 
81*31808Smarc #define DMADONE		0x8000		/* DMA done status */
82*31808Smarc #define SET_DONE_FIFO	0x4000		/* set DMADONE when FIFO empty.. */
83*31808Smarc 					/* ..AND count = 0 */
84*31808Smarc 
85*31808Smarc #define PTOB_ENB	0x0600		/* host-to-bitmap DMA xfer */
86*31808Smarc #define BTOP_ENB	0x0400		/* bitmap-to-host DMA xfer */
87*31808Smarc #define DL_ENB		0x0200		/* display list DMA xfer */
88*31808Smarc #define HALT		0x0000		/* halt DGA */
89*31808Smarc 
90*31808Smarc #define BYTE_DMA	0x0100		/* byte/word DMA xfer */
91*31808Smarc 
92*31808Smarc #define DMA_ERR		0x0080		/* DMA error bits */
93*31808Smarc #define PARITY_ERR	0x0040		/* memory parity error in DMA */
94*31808Smarc #define BUS_ERR		0x0020		/* bus timeout error in DMA */
95*31808Smarc 
96*31808Smarc #define GLOBAL_IE	0x0004		/* global interrupt enable */
97*31808Smarc #define DMA_IE		0x0002		/* DMA interrupt enable */
98*31808Smarc #define CURS_ENB	0x0001		/* cursor enable */
99*31808Smarc 
100*31808Smarc /* QDSS memcsr bit definitions */
101*31808Smarc 
102*31808Smarc #define	UNBLANK			0x0020
103*31808Smarc #define SYNC_ON			0x0008
104*31808Smarc 
105*31808Smarc 	struct dga {
106*31808Smarc 
107*31808Smarc 	    unsigned short csr;
108*31808Smarc 	    unsigned short adrs_lo;	/* destination address of bitmap to */
109*31808Smarc 	    unsigned short adrs_hi;	/*   host DMA */
110*31808Smarc 	    unsigned short bytcnt_lo;	/* byte length of requested DMA */
111*31808Smarc 	    unsigned short bytcnt_hi;	/* (WO = bytcnt) (RO = fifo count) */
112*31808Smarc 	    unsigned short fifo;	/* FIFO register */
113*31808Smarc 	    unsigned short x_cursor;	/* cursor position registers */
114*31808Smarc 	    unsigned short y_cursor;
115*31808Smarc 	    unsigned short ivr;		/* interrupt vector register */
116*31808Smarc 	    unsigned short memadr;	/* memory base address register */
117*31808Smarc 	};
118*31808Smarc 
119*31808Smarc /*-------------------------------------------------------------------------
120*31808Smarc * macros to transform device coordinates to hardware cursor coordinates */
121*31808Smarc 
122*31808Smarc #define CURS_MIN_X 	232	/* device coordinate x = 0 */
123*31808Smarc #define CURS_MIN_Y 	16	/* device coordinate y = 0 */
124*31808Smarc 
125*31808Smarc #define TRANX(x) ( -(((int)(x)+CURS_MIN_X) & ~0x0003) | \
126*31808Smarc 		   (((int)(x)+CURS_MIN_X) & 0x0003) )
127*31808Smarc 
128*31808Smarc #define TRANY(y) ( -((y)+CURS_MIN_Y) )
129*31808Smarc 
130*31808Smarc /*********************************************************************
131*31808Smarc *
132*31808Smarc *	EVENT QUEUE DEFINITIONS
133*31808Smarc *
134*31808Smarc **********************************************************************
135*31808Smarc * most of the event queue definitions are found in "qevent.h".  But a
136*31808Smarc * few things not found there are here.  */
137*31808Smarc 
138*31808Smarc /* The event queue header */
139*31808Smarc 
140*31808Smarc typedef struct qdinput {
141*31808Smarc 
142*31808Smarc 	    struct _vs_eventqueue header;  /* event queue ring handling */
143*31808Smarc 
144*31808Smarc 	    /* for VS100 and QVSS compatability reasons, additions to this
145*31808Smarc 	    *  structure must be made below this point.  */
146*31808Smarc 
147*31808Smarc 	    struct _vs_cursor curs_pos;	/* current mouse position */
148*31808Smarc 	    struct _vs_box curs_box;	/* cursor reporting box */
149*31808Smarc 
150*31808Smarc 	};
151*31808Smarc 
152*31808Smarc /* vse_key field.  definitions for mouse buttons */
153*31808Smarc 
154*31808Smarc #define VSE_LEFT_BUTTON		0
155*31808Smarc #define VSE_MIDDLE_BUTTON	1
156*31808Smarc #define VSE_RIGHT_BUTTON	2
157*31808Smarc 
158*31808Smarc /* vse_key field.  definitions for mouse buttons */
159*31808Smarc 
160*31808Smarc #define VSE_T_LEFT_BUTTON	0
161*31808Smarc #define VSE_T_FRONT_BUTTON	1
162*31808Smarc #define VSE_T_RIGHT_BUTTON	2
163*31808Smarc #define VSE_T_BACK_BUTTON	4
164*31808Smarc 
165*31808Smarc #define VSE_T_BARREL_BUTTON	VSE_T_LEFT_BUTTON
166*31808Smarc #define VSE_T_TIP_BUTTON	VSE_T_FRONT_BUTTON
167*31808Smarc 
168*31808Smarc /*--------------------------------------------------------------------------
169*31808Smarc *   These are the macros to be used for loading and extracting from the event
170*31808Smarc * queue.  It is presumed that the macro user will only use the access macros
171*31808Smarc * if the event queue is non-empty ( ISEMPTY(eq) == FALSE ), and that the
172*31808Smarc * driver will only load the event queue after checking that it is not full
173*31808Smarc * ( ISFULL(eq) == FALSE ).  ("eq" is a pointer to the event queue header.)
174*31808Smarc *
175*31808Smarc *   Before an event access session for a particular event, the macro users
176*31808Smarc * must use the xxxBEGIN macro, and the xxxEND macro after an event is through
177*31808Smarc * with.  As seen below, the xxxBEGIN and xxxEND macros maintain the event
178*31808Smarc * queue access mechanism.
179*31808Smarc *
180*31808Smarc * First, the macros to be used by the event queue reader
181*31808Smarc */
182*31808Smarc 
183*31808Smarc #define ISEMPTY(eq)	  ((eq)->header.head == (eq)->header.tail)
184*31808Smarc #define GETBEGIN(eq)	  (&(eq)->header.events[(eq)->header.head])
185*31808Smarc 
186*31808Smarc #define GET_X(event)	  ((event)->vse_x)  	     /* get x position */
187*31808Smarc #define GET_Y(event)	  ((event)->vse_y)  	     /* get y position */
188*31808Smarc #define GET_TIME(event)	  ((event)->vse_time) 	     /* get time */
189*31808Smarc #define GET_TYPE(event)	  ((event)->vse_type)	     /* get entry type */
190*31808Smarc #define GET_KEY(event)	  ((event)->vse_key)  	     /* get keycode */
191*31808Smarc #define GET_DIR(event)	  ((event)->vse_direction)     /* get direction */
192*31808Smarc #define GET_DEVICE(event) ((event)->vse_device)        /* get device */
193*31808Smarc 
194*31808Smarc #define GETEND(eq)        (++(eq)->header.head >= (eq)->header.size ? \
195*31808Smarc 			   (eq)->header.head = 0 : 0 )
196*31808Smarc 
197*31808Smarc /*------------------------------------------------
198*31808Smarc * macros to be used by the event queue loader  */
199*31808Smarc 
200*31808Smarc 	/* ISFULL yields TRUE if queue is full */
201*31808Smarc 
202*31808Smarc #define ISFULL(eq)	((eq)->header.tail+1 == (eq)->header.head ||   \
203*31808Smarc 			 ((eq)->header.tail+1 == (eq)->header.size &&  \
204*31808Smarc 			  (eq)->header.head == 0))
205*31808Smarc 
206*31808Smarc 	/* get address of the billet for NEXT event */
207*31808Smarc 
208*31808Smarc #define PUTBEGIN(eq)	(&(eq)->header.events[(eq)->header.tail])
209*31808Smarc 
210*31808Smarc #define PUT_X(event, value)  	((event)->vse_x = value)    /* put X pos */
211*31808Smarc #define PUT_Y(event, value)   	((event)->vse_y = value)    /* put Y pos */
212*31808Smarc #define PUT_TIME(event, value)	((event)->vse_time = value)   /* put time */
213*31808Smarc #define PUT_TYPE(event, value)	((event)->vse_type = value) /* put type */
214*31808Smarc #define PUT_KEY(event, value)	((event)->vse_key = value) /* put input key */
215*31808Smarc #define PUT_DIR(event, value)	((event)->vse_direction = value) /* put dir */
216*31808Smarc #define PUT_DEVICE(event, value) ((event)->vse_device = value)   /* put dev */
217*31808Smarc 
218*31808Smarc #define PUTEND(eq)     (++(eq)->header.tail >= (eq)->header.size ?  \
219*31808Smarc 			(eq)->header.tail = 0 : 0)
220*31808Smarc 
221*31808Smarc /******************************************************************
222*31808Smarc *
223*31808Smarc *	DMA I/O DEFINITIONS
224*31808Smarc *
225*31808Smarc ******************************************************************/
226*31808Smarc 
227*31808Smarc /*---------------------------------------------------------------------
228*31808Smarc * The DMA request queue is implemented as a ring buffer of "DMAreq"
229*31808Smarc   structures.  The queue is accessed using ring indices located in the
230*31808Smarc   "DMAreq_header" structure.  Access is implemented using access macros
231*31808Smarc   similar to the event queue access macros above.  */
232*31808Smarc 
233*31808Smarc 	struct DMAreq {
234*31808Smarc 
235*31808Smarc 	    short DMAtype;		/* DMA type code (for QDSS) */
236*31808Smarc 	    short DMAdone;		/* DMA done parameter */
237*31808Smarc 	    char  *bufp;		/* virtual adrs of buffer */
238*31808Smarc 	    int   length;	        /* transfer buffer length */
239*31808Smarc 	};
240*31808Smarc 
241*31808Smarc /* DMA type command codes */
242*31808Smarc 
243*31808Smarc #define DISPLIST	1	/* display list DMA */
244*31808Smarc #define PTOB		2	/* 1 plane Qbus to bitmap DMA */
245*31808Smarc #define BTOP		3	/* 1 plane bitmap to Qbus DMA */
246*31808Smarc 
247*31808Smarc /* DMA done notification code */
248*31808Smarc 
249*31808Smarc #define FIFO_EMPTY	0x01	/* DONE when FIFO becomes empty */
250*31808Smarc #define COUNT_ZERO	0x02	/* DONE when count becomes zero */
251*31808Smarc #define WORD_PACK	0x04    /* program the gate array for word packing */
252*31808Smarc #define BYTE_PACK	0x08	/* program gate array for byte packing */
253*31808Smarc #define REQUEST_DONE	0x100	/* clear when driver has processed request */
254*31808Smarc #define HARD_ERROR	0x200   /* DMA hardware error occurred */
255*31808Smarc 
256*31808Smarc /* DMA request queue is a ring buffer of request structures */
257*31808Smarc 
258*31808Smarc 	struct DMAreq_header {
259*31808Smarc 
260*31808Smarc 	    int QBAreg;		    /* cookie Qbus map reg for this buffer */
261*31808Smarc 	    short status;	    /* master DMA status word */
262*31808Smarc 	    int shared_size;	    /* size of shared memory in bytes */
263*31808Smarc 	    struct DMAreq *DMAreq;  /* start address of request queue */
264*31808Smarc 	    int used;		    /* # of queue entries currently used */
265*31808Smarc 	    int size;		    /* # of "DMAreq"'s in the request queue */
266*31808Smarc 	    int oldest;		    /* index to oldest queue'd request */
267*31808Smarc 	    int newest;		    /* index to newest queue'd request */
268*31808Smarc 	};
269*31808Smarc 
270*31808Smarc /* bit definitions for DMAstatus word in DMAreq_header */
271*31808Smarc 
272*31808Smarc #define	DMA_ACTIVE	0x0004		/* DMA in progress */
273*31808Smarc #define DMA_ERROR	0x0080		/* DMA hardware error */
274*31808Smarc #define DMA_IGNORE	0x0002		/* flag to ignore this interrupt */
275*31808Smarc 
276*31808Smarc /*------------------------------------------
277*31808Smarc * macros for DMA request queue fiddling  */
278*31808Smarc 
279*31808Smarc 	/* DMA status set/check macros */
280*31808Smarc 
281*31808Smarc #define DMA_SETACTIVE(header)   ((header)->status |= DMA_ACTIVE)
282*31808Smarc #define DMA_CLRACTIVE(header)	((header)->status &= ~DMA_ACTIVE)
283*31808Smarc #define DMA_ISACTIVE(header)    ((header)->status & DMA_ACTIVE)
284*31808Smarc 
285*31808Smarc #define DMA_SETERROR(header)    ((header)->status |= DMA_ERROR)
286*31808Smarc #define DMA_CLRERROR(header)    ((header)->status &= ~DMA_ERROR)
287*31808Smarc #define DMA_ISERROR(header)     ((header)->status & DMA_ERROR)
288*31808Smarc 
289*31808Smarc #define DMA_SETIGNORE(header)	((header)->status |= DMA_IGNORE)
290*31808Smarc #define DMA_CLRIGNORE(header)   ((header)->status &= ~DMA_IGNORE)
291*31808Smarc #define DMA_ISIGNORE(header)    ((header)->status & DMA_IGNORE)
292*31808Smarc 
293*31808Smarc 	/* yields TRUE if queue is empty (ISEMPTY) or full (ISFULL) */
294*31808Smarc 
295*31808Smarc #define DMA_ISEMPTY(header)	((header)->used == 0)
296*31808Smarc #define DMA_ISFULL(header)	((header)->used >= (header)->size)
297*31808Smarc 
298*31808Smarc 	/* returns address of the billet for next (PUT)
299*31808Smarc 	 * or oldest (GET) request */
300*31808Smarc 
301*31808Smarc #define DMA_PUTBEGIN(header)	(&(header)->DMAreq[(header)->newest])
302*31808Smarc #define DMA_GETBEGIN(header)  	(&(header)->DMAreq[(header)->oldest])
303*31808Smarc 
304*31808Smarc 	/* does queue access pointer maintenance */
305*31808Smarc 
306*31808Smarc #define DMA_GETEND(header)      (++(header)->oldest >= (header)->size    \
307*31808Smarc 				  ? (header)->oldest = 0 : 0);		 \
308*31808Smarc 				--(header)->used;
309*31808Smarc 
310*31808Smarc #define DMA_PUTEND(header)     	(++(header)->newest >= (header)->size    \
311*31808Smarc 				  ? (header)->newest = 0 : 0);		 \
312*31808Smarc 				++(header)->used;
313*31808Smarc 
314*31808Smarc /******************************************************************
315*31808Smarc *
316*31808Smarc *	COLOR MAP WRITE BUFFER DEFINITIONS
317*31808Smarc *
318*31808Smarc ******************************************************************/
319*31808Smarc 
320*31808Smarc 	struct rgb {
321*31808Smarc 
322*31808Smarc 	    unsigned char offset;	/* color map address for load */
323*31808Smarc 	    unsigned char red;		/* data for red map */
324*31808Smarc 	    unsigned char green;	/* data for green map */
325*31808Smarc 	    unsigned char blue;		/* data for blue map */
326*31808Smarc 	};
327*31808Smarc 
328*31808Smarc 	struct color_buf {
329*31808Smarc 
330*31808Smarc 	    char status;		/* load request/service status */
331*31808Smarc 	    short count;		/* number of entries to br loaded */
332*31808Smarc 	    struct rgb rgb[256];
333*31808Smarc 	};
334*31808Smarc 
335*31808Smarc #define LOAD_COLOR_MAP	0x0001
336*31808Smarc 
337*31808Smarc /******************************************************************
338*31808Smarc *
339*31808Smarc *	SCROLL ASSIST DEFINITIONS
340*31808Smarc *
341*31808Smarc ******************************************************************/
342*31808Smarc 
343*31808Smarc 	struct scroll {
344*31808Smarc 
345*31808Smarc 	    short status;
346*31808Smarc 	    short viper_constant;
347*31808Smarc 	    short y_scroll_constant;
348*31808Smarc 	    short y_offset;
349*31808Smarc 	    short x_index_pending;
350*31808Smarc 	    short y_index_pending;
351*31808Smarc 	};
352*31808Smarc 
353*31808Smarc #define LOAD_REGS	0x0001
354*31808Smarc #define LOAD_INDEX	0x0002
355*31808Smarc 
356*31808Smarc /******************************************************************
357*31808Smarc *
358*31808Smarc *	MOUSE/TABLET/KBD PROGRAMMING DEFINITIONS
359*31808Smarc *
360*31808Smarc ******************************************************************/
361*31808Smarc 
362*31808Smarc /*-----------------------------------
363*31808Smarc * LK201 programmming definitions  */
364*31808Smarc 
365*31808Smarc #define LK_UPDOWN 	0x86		/* bits for setting lk201 modes */
366*31808Smarc #define LK_AUTODOWN 	0x82
367*31808Smarc #define LK_DOWN 	0x80
368*31808Smarc #define LK_DEFAULTS 	0xD3		/* reset (some) default settings */
369*31808Smarc #define LK_AR_ENABLE 	0xE3		/* global auto repeat enable */
370*31808Smarc #define LK_CL_ENABLE 	0x1B		/* keyclick enable */
371*31808Smarc #define LK_KBD_ENABLE 	0x8B		/* keyboard enable */
372*31808Smarc #define LK_BELL_ENABLE 	0x23		/* the bell */
373*31808Smarc #define LK_RING_BELL 	0xA7		/* ring keyboard bell */
374*31808Smarc 
375*31808Smarc #define LK_LED_ENABLE 	0x13		/* light led */
376*31808Smarc #define LK_LED_DISABLE 	0x11		/* turn off led */
377*31808Smarc #define LED_1 		0x81		/* led bits */
378*31808Smarc #define LED_2 		0x82
379*31808Smarc #define LED_3 		0x84
380*31808Smarc #define LED_4 		0x88
381*31808Smarc #define LED_ALL 	0x8F
382*31808Smarc #define LK_LED_HOLD	LED_4
383*31808Smarc #define LK_LED_LOCK	LED_3
384*31808Smarc #define LK_LED_COMPOSE	LED_2
385*31808Smarc #define LK_LED_WAIT 	LED_1
386*31808Smarc 
387*31808Smarc #define LK_KDOWN_ERROR	0x3D		/* key down on powerup error */
388*31808Smarc #define LK_POWER_ERROR 	0x3E		/* keyboard failure on powerup test */
389*31808Smarc #define LK_OUTPUT_ERROR	0xB5		/* keystrokes lost during inhibit */
390*31808Smarc #define LK_INPUT_ERROR 	0xB6		/* garbage command to keyboard */
391*31808Smarc #define LK_LOWEST	0x56		/* lowest significant keycode */
392*31808Smarc #define LK_DIV6_START	0xAD		/* start of div 6 */
393*31808Smarc #define LK_DIV5_END	0xB2		/* end of div 5 */
394*31808Smarc 
395*31808Smarc #define LAST_PARAM	0x80		/* "no more params" bit */
396*31808Smarc 
397*31808Smarc 	struct prgkbd {
398*31808Smarc 
399*31808Smarc 	    short cmd;			/* LK201 command opcode */
400*31808Smarc 	    short param1;		/* 1st cmd parameter (can be null) */
401*31808Smarc 	    short param2;		/* 2nd cmd parameter (can be null) */
402*31808Smarc 	};
403*31808Smarc 
404*31808Smarc /*-------------------------
405*31808Smarc * "special" LK-201 keys */
406*31808Smarc 
407*31808Smarc #define SHIFT		174
408*31808Smarc #define LOCK		176
409*31808Smarc #define REPEAT		180
410*31808Smarc #define CNTRL		175
411*31808Smarc #define ALLUP		179
412*31808Smarc 
413*31808Smarc /*--------------------------------
414*31808Smarc * cursor programming structure */
415*31808Smarc 
416*31808Smarc 	struct prg_cursor {
417*31808Smarc 
418*31808Smarc 	    unsigned short acc_factor;	/* cursor aceleration factor */
419*31808Smarc 	    unsigned short threshold;	/* threshold to trigger acc at */
420*31808Smarc 	};
421*31808Smarc 
422*31808Smarc /*---------------------
423*31808Smarc * mouse definitions */
424*31808Smarc 
425*31808Smarc #define INC_STREAM_MODE	'R'		/* stream mode reports (55 hz) */
426*31808Smarc #define PROMPT_MODE	'D'		/* report when prompted */
427*31808Smarc #define REQUEST_POS	'P'		/* request position report */
428*31808Smarc #define SELF_TEST	'T'		/* request self test */
429*31808Smarc 
430*31808Smarc #define MOUSE_ID	0x2		/* mouse ID in lo 4 bits */
431*31808Smarc 
432*31808Smarc #define START_FRAME	0x80		/* start of report frame bit */
433*31808Smarc #define X_SIGN		0x10		/* position sign bits */
434*31808Smarc #define Y_SIGN		0x08
435*31808Smarc 
436*31808Smarc #define RIGHT_BUTTON	0x01		/* mouse buttons */
437*31808Smarc #define MIDDLE_BUTTON	0x02
438*31808Smarc #define LEFT_BUTTON	0x04
439*31808Smarc 
440*31808Smarc 	/* mouse report structure definition */
441*31808Smarc 
442*31808Smarc 	struct mouse_report {
443*31808Smarc 
444*31808Smarc 	    char state;		/* buttons and sign bits */
445*31808Smarc 	    short dx;		/* delta X since last change */
446*31808Smarc 	    short dy;		/* delta Y since last change */
447*31808Smarc 	    char bytcnt;	/* mouse report byte count */
448*31808Smarc 	};
449*31808Smarc 
450*31808Smarc /*-----------------------------------------
451*31808Smarc * tablet command/interface definitions  */
452*31808Smarc 
453*31808Smarc #define T_STREAM	'R'		/* continuous stream report mode */
454*31808Smarc #define T_POINT	 	'D'		/* enter report-on-request mode */
455*31808Smarc #define T_REQUEST	'P'		/* request position report */
456*31808Smarc 
457*31808Smarc #define T_BAUD		'B'		/* increase baud to 9600 from 4800 */
458*31808Smarc #define T_RATE_55	'K'		/* report rate: 55/sec */
459*31808Smarc #define T_RATE_72	'L'		/* report rate: 72/sec */
460*31808Smarc #define T_RATE_120	'M'		/* report rate: 120/sec (9600 only) */
461*31808Smarc 
462*31808Smarc #define T_TEST		SELF_TEST	/* do self test */
463*31808Smarc 
464*31808Smarc #define TABLET_ID	0x4		/* tablet ID in lo 4 bits */
465*31808Smarc 
466*31808Smarc #define T_START_FRAME	0x80		/* start of report frame bit */
467*31808Smarc #define T_PROXIMITY	0x01		/* state pointer in proximity */
468*31808Smarc 
469*31808Smarc #define T_LEFT_BUTTON	0x02		/* puck buttons */
470*31808Smarc #define T_FRONT_BUTTON	0x04
471*31808Smarc #define T_RIGHT_BUTTON	0x08
472*31808Smarc #define T_BACK_BUTTON	0x10
473*31808Smarc 
474*31808Smarc #define T_BARREL_BUTTON T_LEFT_BUTTON		/* stylus buttons */
475*31808Smarc #define T_TIP_BUTTON	T_FRONT_BUTTON
476*31808Smarc 
477