xref: /csrg-svn/sys/vax/uba/ct.c (revision 3936)
1*3936Sbugs /*	ct.c	4.6	81/07/05	*/
22621Swnj 
33201Swnj #include "ct.h"
42621Swnj #if NCT > 0
52621Swnj /*
62621Swnj  * GP DR11C driver used for C/A/T
7*3936Sbugs  *
8*3936Sbugs  * BUGS:
9*3936Sbugs  *	This driver hasn't been tested in 4.1bsd
102621Swnj  */
112621Swnj 
122621Swnj #include "../h/param.h"
133201Swnj #include "../h/systm.h"
142621Swnj #include "../h/tty.h"
152621Swnj #include "../h/pte.h"
162621Swnj #include "../h/map.h"
172621Swnj #include "../h/buf.h"
183201Swnj #include "../h/ubareg.h"
193201Swnj #include "../h/ubavar.h"
202621Swnj #include "../h/conf.h"
212621Swnj #include "../h/dir.h"
222621Swnj #include "../h/user.h"
232621Swnj 
242621Swnj #define	PCAT	(PZERO+9)
252621Swnj #define	CATHIWAT	100
262621Swnj #define	CATLOWAT	30
272621Swnj 
283201Swnj struct ct_softc {
293201Swnj 	int	sc_openf;
303201Swnj 	struct	clist sc_oq;
313201Swnj } ct_softc[NCT];
322621Swnj 
333201Swnj struct ctdevice {
343201Swnj 	short	ctcsr;
353201Swnj 	short	ctbuf;
362621Swnj };
372621Swnj 
383201Swnj int	ctprobe(), ctattach(), ctintr();
393201Swnj struct	uba_device *ctdinfo[NCT];
403201Swnj u_short	ctstd[] = { 0 };
413201Swnj struct	uba_driver ctdriver =
423201Swnj     { ctprobe, 0, ctattach, 0, ctstd, "ct", ctdinfo };
432621Swnj 
443217Swnj #define	CTUNIT(dev)	(minor(dev))
453217Swnj 
463201Swnj ctprobe(reg)
473201Swnj 	caddr_t reg;
483201Swnj {
49*3936Sbugs 	register int br, cvec;		/* value-result */
503201Swnj 	register struct ctdevice *ctaddr = (struct ctdevice *)reg;
513201Swnj 
523201Swnj 	ctaddr->ctcsr = IENABLE;
533201Swnj 	DELAY(10000);
543201Swnj 	ctaddr->ctcsr = 0;
553201Swnj }
563201Swnj 
573217Swnj /*ARGSUSED*/
583217Swnj ctattach(ui)
593217Swnj 	register struct uba_device *ui;
603217Swnj {
613217Swnj 
623217Swnj }
633217Swnj 
642621Swnj ctopen(dev)
653201Swnj 	dev_t dev;
662621Swnj {
673201Swnj 	register struct ct_softc *sc;
683201Swnj 	register struct uba_device *ui;
693201Swnj 	register struct ctdevice *ctaddr;
703201Swnj 
713201Swnj 	if (CTUNIT(dev) >= NCT || (ui = ctdinfo[CTUNIT(dev)]) == 0 ||
723201Swnj 	    ui->ui_alive == 0 || (sc = &ct_softc[CTUNIT(dev)])->sc_openf) {
732621Swnj 		u.u_error = ENXIO;
743201Swnj 		return;
753201Swnj 	}
763201Swnj 	sc->sc_openf = 1;
773201Swnj 	ctaddr->ctcsr |= IENABLE;
782621Swnj }
792621Swnj 
803201Swnj ctclose(dev)
813201Swnj 	dev_t dev;
822621Swnj {
833201Swnj 
843201Swnj 	ct_softc[CTUNIT(dev)].sc_openf = 0;
853201Swnj 	ctintr(dev);
862621Swnj }
872621Swnj 
882621Swnj ctwrite(dev)
893201Swnj 	dev_t dev;
902621Swnj {
913201Swnj 	register struct ct_softc *sc = &ct_softc[CTUNIT(dev)];
923201Swnj 	register int c;
932621Swnj 
942621Swnj 	while ((c=cpass()) >= 0) {
953101Swnj 		(void) spl5();
963201Swnj 		while (sc->sc_oq.c_cc > CATHIWAT)
973201Swnj 			sleep((caddr_t)&sc->sc_oq, PCAT);
983201Swnj 		while (putc(c, &sc->sc_oq) < 0)
992621Swnj 			sleep((caddr_t)&lbolt, PCAT);
1003201Swnj 		ctintr(dev);
1013101Swnj 		(void) spl0();
1022621Swnj 	}
1032621Swnj }
1042621Swnj 
1053201Swnj ctintr(dev)
1063201Swnj 	dev_t dev;
1072621Swnj {
1082621Swnj 	register int c;
1093201Swnj 	register struct ct_softc *sc = &ct_softc[CTUNIT(dev)];
1103201Swnj 	register struct ctdevice *ctaddr =
1113201Swnj 	    (struct ctdevice *)ctdinfo[CTUNIT(dev)]->ui_addr;
1122621Swnj 
1133201Swnj 	if (ctaddr->ctcsr&DONE) {
1143201Swnj 		if ((c = getc(&sc->sc_oq)) >= 0) {
1152621Swnj #if MH135A
1162621Swnj 			c |= (c & 01) << 8;	/* for dr11c bug */
1172621Swnj #endif
1183201Swnj 			ctaddr->ctbuf = c;
1193201Swnj 			if (sc->sc_oq.c_cc==0 || sc->sc_oq.c_cc==CATLOWAT)
1203201Swnj 				wakeup(&sc->sc_oq);
1212621Swnj 		} else {
1223201Swnj 			if (sc->sc_openf==0)
1233201Swnj 				ctaddr->ctcsr = 0;
1242621Swnj 		}
1252621Swnj 	}
1262621Swnj 
1272621Swnj }
1282621Swnj #endif
129