xref: /csrg-svn/sys/vax/uba/ct.c (revision 3101)
1*3101Swnj /*	ct.c	4.2	81/03/09	*/
22621Swnj 
32621Swnj #include "cat.h"
42621Swnj #if NCT > 0
52621Swnj /*
62621Swnj  * GP DR11C driver used for C/A/T
72621Swnj  */
82621Swnj 
92621Swnj #include "../h/param.h"
102621Swnj #include "../h/tty.h"
112621Swnj #include "../h/pte.h"
122621Swnj #include "../h/map.h"
132621Swnj #include "../h/uba.h"
142621Swnj #include "../h/buf.h"
152621Swnj #include "../h/conf.h"
162621Swnj #include "../h/dir.h"
172621Swnj #include "../h/user.h"
182621Swnj 
192621Swnj #define	PCAT	(PZERO+9)
202621Swnj #define	CATHIWAT	100
212621Swnj #define	CATLOWAT	30
222621Swnj 
232621Swnj struct {
242621Swnj 	int	catlock;
252621Swnj 	struct	clist	oq;
262621Swnj } cat;
272621Swnj 
282621Swnj struct device {
292621Swnj 	short	catcsr;
302621Swnj 	short	catbuf;
312621Swnj };
322621Swnj 
332621Swnj int ctintr();
342621Swnj 
352621Swnj ctopen(dev)
362621Swnj {
372621Swnj 	if (cat.catlock==0) {
382621Swnj 		cat.catlock++;
392621Swnj 		CATADDR->catcsr |= IENABLE;
402621Swnj 	} else
412621Swnj 		u.u_error = ENXIO;
422621Swnj }
432621Swnj 
442621Swnj ctclose()
452621Swnj {
462621Swnj 	cat.catlock = 0;
472621Swnj 	ctintr();
482621Swnj }
492621Swnj 
502621Swnj ctwrite(dev)
512621Swnj {
522621Swnj 	register c;
532621Swnj 	extern lbolt;
542621Swnj 
552621Swnj 	while ((c=cpass()) >= 0) {
56*3101Swnj 		(void) spl5();
572621Swnj 		while (cat.oq.c_cc > CATHIWAT)
582621Swnj 			sleep((caddr_t)&cat.oq, PCAT);
592621Swnj 		while (putc(c, &cat.oq) < 0)
602621Swnj 			sleep((caddr_t)&lbolt, PCAT);
612621Swnj 		ctintr();
62*3101Swnj 		(void) spl0();
632621Swnj 	}
642621Swnj }
652621Swnj 
662621Swnj ctintr()
672621Swnj {
682621Swnj 	register int c;
692621Swnj 
702621Swnj 	if (CATADDR->catcsr&DONE) {
712621Swnj 		if ((c = getc(&cat.oq)) >= 0) {
722621Swnj #if MH135A
732621Swnj 			c |= (c & 01) << 8;	/* for dr11c bug */
742621Swnj #endif
752621Swnj 			CATADDR->catbuf = c;
762621Swnj 			if (cat.oq.c_cc==0 || cat.oq.c_cc==CATLOWAT)
772621Swnj 				wakeup(&cat.oq);
782621Swnj 		} else {
792621Swnj 			if (cat.catlock==0)
802621Swnj 				CATADDR->catcsr = 0;
812621Swnj 		}
822621Swnj 	}
832621Swnj 
842621Swnj }
852621Swnj #endif
86