xref: /csrg-svn/sys/vax/stand/autoconf.c (revision 33408)
1 /*
2  * Copyright (c) 1982, 1986 Regents of the University of California.
3  * All rights reserved.  The Berkeley software License Agreement
4  * specifies the terms and conditions for redistribution.
5  *
6  *	@(#)autoconf.c	7.3 (Berkeley) 01/28/88
7  */
8 
9 #include "../machine/pte.h"
10 
11 #include "param.h"
12 
13 #include "../vax/cpu.h"
14 #include "../vax/nexus.h"
15 #include "../vaxuba/ubareg.h"
16 #include "../vaxmba/mbareg.h"
17 #include "../vax/mtpr.h"
18 
19 #include "savax.h"
20 
21 #ifdef VAX8200
22 #include "../vax/bireg.h"
23 /*
24  * These are found during configuration, rather than being compiled in
25  * statically.
26  */
27 struct	uba_regs *ubaddr8200[MAXNUBA];
28 caddr_t	uioaddr8200[MAXNUBA];
29 #endif
30 
31 #if VAX8600 || VAX780
32 #define	UTR(i)	((struct uba_regs *)(NEX780+(i)))
33 #define	UMA(i)	((caddr_t)UMEM780(i)+UBAIOADDR)
34 #define	MTR(i)	((struct mba_regs *)(NEX780+(i)))
35 #define	UTRB(i)	((struct uba_regs *)(NEXB8600+(i)))
36 #define	UMAB(i)	((caddr_t)UMEMB8600(i)+UBAIOADDR)
37 #define	MTRB(i)	((struct mba_regs *)(NEXB8600+(i)))
38 
39 struct	uba_regs *ubaddr780[] = {
40 	UTR(3), UTR(4), UTR(5), UTR(6),
41 #if VAX8600
42 	UTRB(3), UTRB(4), UTRB(5), UTRB(6),
43 #endif
44 };
45 caddr_t	uioaddr780[] = {
46 	UMA(0), UMA(1), UMA(2), UMA(3),
47 #if VAX8600
48 	UMAB(0), UMAB(1), UMAB(2), UMAB(3),
49 #endif
50 };
51 struct	mba_regs *mbaddr780[] = {
52 	MTR(8), MTR(9), MTR(10), MTR(11),
53 #if VAX8600
54 	MTRB(8), MTRB(9), MTRB(10), MTRB(11),
55 #endif
56 };
57 
58 #undef	UTR
59 #undef	UMA
60 #undef	MTR
61 #endif
62 
63 #if VAX750
64 #define	UTR(i)	((struct uba_regs *)(NEX750+(i)))
65 #define	UMA(i)	((caddr_t)UMEM750(i)+UBAIOADDR)
66 #define	MTR(i)	((struct mba_regs *)(NEX750+(i)))
67 
68 struct	uba_regs *ubaddr750[] = { UTR(8), UTR(9) };
69 caddr_t	uioaddr750[] = { UMA(0), UMA(1) };
70 struct	mba_regs *mbaddr750[] = { MTR(4), MTR(5), MTR(6), MTR(7) };
71 
72 #undef	UTR
73 #undef	UMA
74 #undef	MTR
75 #endif
76 
77 #if VAX730
78 #define	UTR(i)	((struct uba_regs *)(NEX730+(i)))
79 #define	UMA	((caddr_t)UMEM730+UBAIOADDR)
80 
81 struct	uba_regs *ubaddr730[] = { UTR(3) };
82 caddr_t	uioaddr730[] = { UMA };
83 
84 #undef	UTR
85 #undef	UMA
86 #endif
87 
88 #if VAX630
89 /*
90  * The map registers start at 20088000 on the ka630, so
91  * subtract a 2k offset to make things work.
92  *
93  * This could stand serious cleanup.
94  */
95 struct	uba_regs *ubaddr630[] =
96 	{ (struct uba_regs *)((caddr_t)QBAMAP630 - 0x800) };
97 caddr_t	uioaddr630[] = { (caddr_t)QIOPAGE630 };
98 #endif
99 
100 configure()
101 {
102 	union cpusid cpusid;
103 	register int nmba, nuba, i;
104 
105 	cpusid.cpusid = mfpr(SID);
106 	cpu = cpusid.cpuany.cp_type;
107 	switch (cpu) {
108 
109 #if VAX8600
110 	case VAX_8600:
111 		nmba = sizeof (mbaddr780) / sizeof (mbaddr780[0]);
112 		nuba = sizeof (ubaddr780) / sizeof (ubaddr780[0]);
113 		mbaddr = mbaddr780;
114 		ubaddr = ubaddr780;
115 		uioaddr = uioaddr780;
116 		break;
117 #endif
118 
119 #if VAX780
120 	case VAX_780:
121 		nmba = 4;
122 		nuba = 4;
123 		mbaddr = mbaddr780;
124 		ubaddr = ubaddr780;
125 		uioaddr = uioaddr780;
126 		break;
127 #endif
128 
129 #if VAX8200
130 	case VAX_8200: {
131 		register struct bi_node *bi;
132 
133 		nmba = 0;
134 		nuba = 0;
135 		for (i = 0, bi = BI_BASE(0); i < NNODEBI; i++, bi++) {
136 			if (badaddr((caddr_t)bi, sizeof (long)))
137 				continue;
138 #ifdef notdef
139 			/* clear bus errors */
140 			bi->biic.bi_ber = ~(BIBER_MBZ|BIBER_NMR|BIBER_UPEN);
141 #endif
142 			switch (bi->biic.bi_dtype) {
143 
144 			case BIDT_DWBUA:
145 				if (nuba >= MAXNUBA)	/* sorry */
146 					break;
147 				ubaddr8200[nuba] = (struct uba_regs *)bi;
148 				uioaddr8200[nuba] = (caddr_t)UMEM8200(i);
149 				((struct dwbua_regs *)bi)->bua_csr |=
150 				    BUACSR_UPI;
151 				nuba++;
152 				break;
153 
154 			case BIDT_KDB50:
155 				if (nkdb < MAXNKDB)
156 					kdbaddr[nkdb++] = (caddr_t)bi;
157 				break;
158 			}
159 		}
160 		ubaddr = ubaddr8200;
161 		uioaddr = uioaddr8200;
162 	}
163 		break;
164 #endif
165 
166 #if VAX750
167 	case VAX_750:
168 		mbaddr = mbaddr750;
169 		ubaddr = ubaddr750;
170 		uioaddr = uioaddr750;
171 		nmba = sizeof (mbaddr750) / sizeof (mbaddr750[0]);
172 		nuba = 0;
173 		break;
174 #endif
175 
176 #if VAX730
177 	case VAX_730:
178 		ubaddr = ubaddr730;
179 		uioaddr = uioaddr730;
180 		nmba = 0;
181 		nuba = 0;
182 		break;
183 #endif
184 
185 #if VAX630
186 	case VAX_630:
187 		ubaddr = ubaddr630;
188 		uioaddr = uioaddr630;
189 		nmba = 0;
190 		nuba = 0;
191 		break;
192 #endif
193 	}
194 
195 	/*
196 	 * Forward into the past...
197 	 */
198 /*
199 	for (i = 0; i < nmba; i++)
200 		if (!badaddr(mbaddr[i], sizeof(long)))
201 			mbaddr[i]->mba_cr = MBCR_INIT;
202 */
203 	switch (cpu) {
204 
205 #if VAX8600 || VAX780
206 	case VAX_8600:
207 	case VAX_780:
208 		for (i = 0; i < nuba; i++)
209 			if (!badaddr(ubaddr[i], sizeof(long)))
210 				ubaddr[i]->uba_cr = UBACR_ADINIT;
211 		break;
212 #endif
213 
214 #if VAX750 || VAX730
215 	case VAX_750:
216 	case VAX_730:
217 		mtpr(IUR, 0);
218 		break;
219 #endif
220 
221 #if VAX630
222 	case VAX_630:
223 		mtpr(IUR, 0);
224 		*((char *)QIOPAGE630 + QIPCR) = Q_LMEAE;
225 		break;
226 #endif
227 	}
228 
229 	/* give unibus devices a chance to recover... */
230 	if (nuba > 0)
231 		DELAY(2000000);
232 }
233