1 /* 2 * Copyright (c) 1982, 1986 Regents of the University of California. 3 * All rights reserved. The Berkeley software License Agreement 4 * specifies the terms and conditions for redistribution. 5 * 6 * @(#)autoconf.c 7.2 (Berkeley) 02/21/87 7 */ 8 9 #include "../machine/pte.h" 10 11 #include "../h/param.h" 12 13 #include "../vax/cpu.h" 14 #include "../vax/nexus.h" 15 #include "../vaxuba/ubareg.h" 16 #include "../vaxmba/mbareg.h" 17 #include "../vax/mtpr.h" 18 19 #include "savax.h" 20 21 #define UTR(i) ((struct uba_regs *)(NEX780+(i))) 22 #define UMA(i) ((caddr_t)UMEM780(i)) 23 #define MTR(i) ((struct mba_regs *)(NEX780+(i))) 24 #define UTRB(i) ((struct uba_regs *)(NEXB8600+(i))) 25 #define UMAB(i) ((caddr_t)UMEMB8600(i)) 26 #define MTRB(i) ((struct mba_regs *)(NEXB8600+(i))) 27 28 struct uba_regs *ubaddr780[] = { 29 UTR(3), UTR(4), UTR(5), UTR(6), 30 #if VAX8600 31 UTRB(3), UTRB(4), UTRB(5), UTRB(6), 32 #endif 33 }; 34 caddr_t umaddr780[] = { 35 UMA(0), UMA(1), UMA(2), UMA(3), 36 #if VAX8600 37 UMAB(0), UMAB(1), UMAB(2), UMAB(3), 38 #endif 39 }; 40 struct mba_regs *mbaddr780[] = { 41 MTR(8), MTR(9), MTR(10), MTR(11), 42 #if VAX8600 43 MTRB(8), MTRB(9), MTRB(10), MTRB(11), 44 #endif 45 }; 46 47 #undef UTR 48 #undef UMA 49 #undef MTR 50 51 #define UTR(i) ((struct uba_regs *)(NEX750+(i))) 52 #define UMA(i) ((caddr_t)UMEM750(i)) 53 #define MTR(i) ((struct mba_regs *)(NEX750+(i))) 54 55 struct uba_regs *ubaddr750[] = { UTR(8), UTR(9) }; 56 caddr_t umaddr750[] = { UMA(0), UMA(1) }; 57 struct mba_regs *mbaddr750[] = { MTR(4), MTR(5), MTR(6), MTR(7) }; 58 59 #undef UTR 60 #undef UMA 61 #undef MTR 62 63 #define UTR(i) ((struct uba_regs *)(NEX730+(i))) 64 #define UMA ((caddr_t)UMEM730) 65 66 struct uba_regs *ubaddr730[] = { UTR(3) }; 67 caddr_t umaddr730[] = { UMA }; 68 69 #undef UTR 70 #undef UMA 71 72 configure() 73 { 74 union cpusid cpusid; 75 int nmba, nuba, i; 76 77 cpusid.cpusid = mfpr(SID); 78 cpu = cpusid.cpuany.cp_type; 79 switch (cpu) { 80 81 case VAX_8600: 82 case VAX_780: 83 mbaddr = mbaddr780; 84 ubaddr = ubaddr780; 85 umaddr = umaddr780; 86 if (cpu == VAX_8600) { 87 nmba = sizeof (mbaddr780) / sizeof (mbaddr780[0]); 88 nuba = sizeof (ubaddr780) / sizeof (ubaddr780[0]); 89 } else { 90 nmba = 4; 91 nuba = 4; 92 } 93 break; 94 95 case VAX_750: 96 mbaddr = mbaddr750; 97 ubaddr = ubaddr750; 98 umaddr = umaddr750; 99 nmba = sizeof (mbaddr750) / sizeof (mbaddr750[0]); 100 nuba = 0; 101 break; 102 103 case VAX_730: 104 ubaddr = ubaddr730; 105 umaddr = umaddr730; 106 nmba = nuba = 0; 107 break; 108 } 109 /* 110 * Forward into the past... 111 */ 112 /* 113 for (i = 0; i < nmba; i++) 114 if (!badaddr(mbaddr[i], sizeof(long))) 115 mbaddr[i]->mba_cr = MBCR_INIT; 116 */ 117 for (i = 0; i < nuba; i++) 118 if (!badaddr(ubaddr[i], sizeof(long))) 119 ubaddr[i]->uba_cr = UBACR_ADINIT; 120 if ((cpu != VAX_780) && (cpu != VAX_8600)) 121 mtpr(IUR, 0); 122 /* give unibus devices a chance to recover... */ 123 if (nuba > 0) 124 DELAY(2000000); 125 } 126