123218Smckusick /* 229291Smckusick * Copyright (c) 1982, 1986 Regents of the University of California. 323218Smckusick * All rights reserved. The Berkeley software License Agreement 423218Smckusick * specifies the terms and conditions for redistribution. 523218Smckusick * 6*34947Skarels * @(#)autoconf.c 7.9 (Berkeley) 07/01/88 723218Smckusick */ 83264Swnj 99803Ssam #include "../machine/pte.h" 109803Ssam 1133408Skarels #include "param.h" 129186Ssam 139186Ssam #include "../vax/cpu.h" 149186Ssam #include "../vax/nexus.h" 159186Ssam #include "../vaxuba/ubareg.h" 169186Ssam #include "../vaxmba/mbareg.h" 179186Ssam #include "../vax/mtpr.h" 189186Ssam 193264Swnj #include "savax.h" 203264Swnj 2133408Skarels #ifdef VAX8200 2234882Sbostic #include "../vaxbi/bireg.h" 2333408Skarels /* 2433408Skarels * These are found during configuration, rather than being compiled in 2533408Skarels * statically. 2633408Skarels */ 2733408Skarels struct uba_regs *ubaddr8200[MAXNUBA]; 2833408Skarels caddr_t uioaddr8200[MAXNUBA]; 2933408Skarels #endif 3033408Skarels 3133408Skarels #if VAX8600 || VAX780 323264Swnj #define UTR(i) ((struct uba_regs *)(NEX780+(i))) 3333408Skarels #define UMA(i) ((caddr_t)UMEM780(i)+UBAIOADDR) 343264Swnj #define MTR(i) ((struct mba_regs *)(NEX780+(i))) 3530547Skarels #define UTRB(i) ((struct uba_regs *)(NEXB8600+(i))) 3633408Skarels #define UMAB(i) ((caddr_t)UMEMB8600(i)+UBAIOADDR) 3730547Skarels #define MTRB(i) ((struct mba_regs *)(NEXB8600+(i))) 383264Swnj 3930547Skarels struct uba_regs *ubaddr780[] = { 4030547Skarels UTR(3), UTR(4), UTR(5), UTR(6), 4130547Skarels #if VAX8600 4230547Skarels UTRB(3), UTRB(4), UTRB(5), UTRB(6), 4330547Skarels #endif 4430547Skarels }; 4533408Skarels caddr_t uioaddr780[] = { 4630547Skarels UMA(0), UMA(1), UMA(2), UMA(3), 4730547Skarels #if VAX8600 4830547Skarels UMAB(0), UMAB(1), UMAB(2), UMAB(3), 4930547Skarels #endif 5030547Skarels }; 5130547Skarels struct mba_regs *mbaddr780[] = { 5230547Skarels MTR(8), MTR(9), MTR(10), MTR(11), 5330547Skarels #if VAX8600 5430547Skarels MTRB(8), MTRB(9), MTRB(10), MTRB(11), 5530547Skarels #endif 5630547Skarels }; 573264Swnj 583264Swnj #undef UTR 593264Swnj #undef UMA 603264Swnj #undef MTR 6133408Skarels #endif 623264Swnj 6333408Skarels #if VAX750 643264Swnj #define UTR(i) ((struct uba_regs *)(NEX750+(i))) 6533408Skarels #define UMA(i) ((caddr_t)UMEM750(i)+UBAIOADDR) 663264Swnj #define MTR(i) ((struct mba_regs *)(NEX750+(i))) 673264Swnj 683264Swnj struct uba_regs *ubaddr750[] = { UTR(8), UTR(9) }; 6933408Skarels caddr_t uioaddr750[] = { UMA(0), UMA(1) }; 703341Swnj struct mba_regs *mbaddr750[] = { MTR(4), MTR(5), MTR(6), MTR(7) }; 713264Swnj 723264Swnj #undef UTR 733264Swnj #undef UMA 743264Swnj #undef MTR 7533408Skarels #endif 763264Swnj 7733408Skarels #if VAX730 787444Sroot #define UTR(i) ((struct uba_regs *)(NEX730+(i))) 7933408Skarels #define UMA ((caddr_t)UMEM730+UBAIOADDR) 803341Swnj 817444Sroot struct uba_regs *ubaddr730[] = { UTR(3) }; 8233408Skarels caddr_t uioaddr730[] = { UMA }; 833341Swnj 843341Swnj #undef UTR 853341Swnj #undef UMA 8633408Skarels #endif 873341Swnj 8833408Skarels #if VAX630 8933408Skarels /* 9033408Skarels * The map registers start at 20088000 on the ka630, so 9133408Skarels * subtract a 2k offset to make things work. 9233408Skarels * 9333408Skarels * This could stand serious cleanup. 9433408Skarels */ 9533408Skarels struct uba_regs *ubaddr630[] = 9633408Skarels { (struct uba_regs *)((caddr_t)QBAMAP630 - 0x800) }; 9733408Skarels caddr_t uioaddr630[] = { (caddr_t)QIOPAGE630 }; 9834946Skarels 9934946Skarels int (*v_getc)()=0, 10034946Skarels (*v_putc)()=0; 10134946Skarels 10234946Skarels #ifndef SMALL 10334659Smarc /* 10434659Smarc * Virtual console configuration tables. 10534659Smarc */ 10634659Smarc extern qv_init(),qd_init(); 10734659Smarc 10834659Smarc int (*vcons_init[])() = { 10934659Smarc qd_init, 11034659Smarc qv_init, 11134659Smarc 0 11234659Smarc }; 11333408Skarels #endif 11434946Skarels #endif 11533408Skarels 11633441Skarels int cpuspeed = 1; 11733441Skarels 1183264Swnj configure() 1193264Swnj { 1203264Swnj union cpusid cpusid; 12133408Skarels register int nmba, nuba, i; 1223264Swnj 1233264Swnj cpusid.cpusid = mfpr(SID); 1243264Swnj cpu = cpusid.cpuany.cp_type; 1253264Swnj switch (cpu) { 1263264Swnj 12733408Skarels #if VAX8600 12824151Sbloom case VAX_8600: 12933408Skarels nmba = sizeof (mbaddr780) / sizeof (mbaddr780[0]); 13033408Skarels nuba = sizeof (ubaddr780) / sizeof (ubaddr780[0]); 13133408Skarels mbaddr = mbaddr780; 13233408Skarels ubaddr = ubaddr780; 13333408Skarels uioaddr = uioaddr780; 13433441Skarels cpuspeed = 6; 13533408Skarels break; 13633408Skarels #endif 13733408Skarels 13833408Skarels #if VAX780 1393264Swnj case VAX_780: 14033408Skarels nmba = 4; 14133408Skarels nuba = 4; 1423264Swnj mbaddr = mbaddr780; 1433264Swnj ubaddr = ubaddr780; 14433408Skarels uioaddr = uioaddr780; 14533441Skarels cpuspeed = 2; 14633408Skarels break; 14733408Skarels #endif 14833408Skarels 14933408Skarels #if VAX8200 15033408Skarels case VAX_8200: { 15133408Skarels register struct bi_node *bi; 15233408Skarels 15333408Skarels nmba = 0; 15433408Skarels nuba = 0; 15533408Skarels for (i = 0, bi = BI_BASE(0); i < NNODEBI; i++, bi++) { 15633408Skarels if (badaddr((caddr_t)bi, sizeof (long))) 15733408Skarels continue; 15833408Skarels #ifdef notdef 15933408Skarels /* clear bus errors */ 16033408Skarels bi->biic.bi_ber = ~(BIBER_MBZ|BIBER_NMR|BIBER_UPEN); 16133408Skarels #endif 16233408Skarels switch (bi->biic.bi_dtype) { 16333408Skarels 16433408Skarels case BIDT_DWBUA: 16533408Skarels if (nuba >= MAXNUBA) /* sorry */ 16633408Skarels break; 16733408Skarels ubaddr8200[nuba] = (struct uba_regs *)bi; 16834883Sbostic uioaddr8200[nuba] = (caddr_t)UMEM8200(i) + 16934883Sbostic UBAIOADDR; 17033408Skarels ((struct dwbua_regs *)bi)->bua_csr |= 17133408Skarels BUACSR_UPI; 17233408Skarels nuba++; 17333408Skarels break; 17433408Skarels 17533408Skarels case BIDT_KDB50: 17633408Skarels if (nkdb < MAXNKDB) 17733408Skarels kdbaddr[nkdb++] = (caddr_t)bi; 17833408Skarels break; 17933408Skarels } 18030547Skarels } 18133408Skarels ubaddr = ubaddr8200; 18233408Skarels uioaddr = uioaddr8200; 18333408Skarels } 1843264Swnj break; 18533408Skarels #endif 1863264Swnj 18733408Skarels #if VAX750 1883264Swnj case VAX_750: 1893264Swnj mbaddr = mbaddr750; 1903264Swnj ubaddr = ubaddr750; 19133408Skarels uioaddr = uioaddr750; 1923348Swnj nmba = sizeof (mbaddr750) / sizeof (mbaddr750[0]); 1933348Swnj nuba = 0; 1943264Swnj break; 19533408Skarels #endif 1963341Swnj 19733408Skarels #if VAX730 1987444Sroot case VAX_730: 1997444Sroot ubaddr = ubaddr730; 20033408Skarels uioaddr = uioaddr730; 20133408Skarels nmba = 0; 20233408Skarels nuba = 0; 2033341Swnj break; 20433408Skarels #endif 20533408Skarels 20633408Skarels #if VAX630 20733408Skarels case VAX_630: 20833408Skarels ubaddr = ubaddr630; 20933408Skarels uioaddr = uioaddr630; 21033408Skarels nmba = 0; 21133408Skarels nuba = 0; 21233408Skarels break; 21333408Skarels #endif 2143264Swnj } 21533408Skarels 2163348Swnj /* 2173348Swnj * Forward into the past... 2183348Swnj */ 2197444Sroot /* 2203348Swnj for (i = 0; i < nmba; i++) 22130547Skarels if (!badaddr(mbaddr[i], sizeof(long))) 2223348Swnj mbaddr[i]->mba_cr = MBCR_INIT; 2237444Sroot */ 22433408Skarels switch (cpu) { 22533408Skarels 22633408Skarels #if VAX8600 || VAX780 22733408Skarels case VAX_8600: 22833408Skarels case VAX_780: 22933408Skarels for (i = 0; i < nuba; i++) 23033408Skarels if (!badaddr(ubaddr[i], sizeof(long))) 23133408Skarels ubaddr[i]->uba_cr = UBACR_ADINIT; 23233408Skarels break; 23333408Skarels #endif 23433408Skarels 23533408Skarels #if VAX750 || VAX730 23633408Skarels case VAX_750: 23733408Skarels case VAX_730: 2387444Sroot mtpr(IUR, 0); 23933408Skarels break; 24033408Skarels #endif 24133408Skarels 24233408Skarels #if VAX630 24333408Skarels case VAX_630: 24433408Skarels mtpr(IUR, 0); 24533408Skarels *((char *)QIOPAGE630 + QIPCR) = Q_LMEAE; 246*34947Skarels 247*34947Skarels #if !defined(SMALL) 248*34947Skarels /* 249*34947Skarels * configure the console 250*34947Skarels */ 251*34947Skarels for(i = 0; vcons_init[i] && !(*vcons_init[i])(); i++) 252*34947Skarels ; 253*34947Skarels #endif 25433408Skarels break; 25533408Skarels #endif 25633408Skarels } 25733408Skarels 2583348Swnj /* give unibus devices a chance to recover... */ 2593348Swnj if (nuba > 0) 2603348Swnj DELAY(2000000); 2613264Swnj } 262