123218Smckusick /* 229291Smckusick * Copyright (c) 1982, 1986 Regents of the University of California. 323218Smckusick * All rights reserved. The Berkeley software License Agreement 423218Smckusick * specifies the terms and conditions for redistribution. 523218Smckusick * 6*33441Skarels * @(#)autoconf.c 7.4 (Berkeley) 02/06/88 723218Smckusick */ 83264Swnj 99803Ssam #include "../machine/pte.h" 109803Ssam 1133408Skarels #include "param.h" 129186Ssam 139186Ssam #include "../vax/cpu.h" 149186Ssam #include "../vax/nexus.h" 159186Ssam #include "../vaxuba/ubareg.h" 169186Ssam #include "../vaxmba/mbareg.h" 179186Ssam #include "../vax/mtpr.h" 189186Ssam 193264Swnj #include "savax.h" 203264Swnj 2133408Skarels #ifdef VAX8200 2233408Skarels #include "../vax/bireg.h" 2333408Skarels /* 2433408Skarels * These are found during configuration, rather than being compiled in 2533408Skarels * statically. 2633408Skarels */ 2733408Skarels struct uba_regs *ubaddr8200[MAXNUBA]; 2833408Skarels caddr_t uioaddr8200[MAXNUBA]; 2933408Skarels #endif 3033408Skarels 3133408Skarels #if VAX8600 || VAX780 323264Swnj #define UTR(i) ((struct uba_regs *)(NEX780+(i))) 3333408Skarels #define UMA(i) ((caddr_t)UMEM780(i)+UBAIOADDR) 343264Swnj #define MTR(i) ((struct mba_regs *)(NEX780+(i))) 3530547Skarels #define UTRB(i) ((struct uba_regs *)(NEXB8600+(i))) 3633408Skarels #define UMAB(i) ((caddr_t)UMEMB8600(i)+UBAIOADDR) 3730547Skarels #define MTRB(i) ((struct mba_regs *)(NEXB8600+(i))) 383264Swnj 3930547Skarels struct uba_regs *ubaddr780[] = { 4030547Skarels UTR(3), UTR(4), UTR(5), UTR(6), 4130547Skarels #if VAX8600 4230547Skarels UTRB(3), UTRB(4), UTRB(5), UTRB(6), 4330547Skarels #endif 4430547Skarels }; 4533408Skarels caddr_t uioaddr780[] = { 4630547Skarels UMA(0), UMA(1), UMA(2), UMA(3), 4730547Skarels #if VAX8600 4830547Skarels UMAB(0), UMAB(1), UMAB(2), UMAB(3), 4930547Skarels #endif 5030547Skarels }; 5130547Skarels struct mba_regs *mbaddr780[] = { 5230547Skarels MTR(8), MTR(9), MTR(10), MTR(11), 5330547Skarels #if VAX8600 5430547Skarels MTRB(8), MTRB(9), MTRB(10), MTRB(11), 5530547Skarels #endif 5630547Skarels }; 573264Swnj 583264Swnj #undef UTR 593264Swnj #undef UMA 603264Swnj #undef MTR 6133408Skarels #endif 623264Swnj 6333408Skarels #if VAX750 643264Swnj #define UTR(i) ((struct uba_regs *)(NEX750+(i))) 6533408Skarels #define UMA(i) ((caddr_t)UMEM750(i)+UBAIOADDR) 663264Swnj #define MTR(i) ((struct mba_regs *)(NEX750+(i))) 673264Swnj 683264Swnj struct uba_regs *ubaddr750[] = { UTR(8), UTR(9) }; 6933408Skarels caddr_t uioaddr750[] = { UMA(0), UMA(1) }; 703341Swnj struct mba_regs *mbaddr750[] = { MTR(4), MTR(5), MTR(6), MTR(7) }; 713264Swnj 723264Swnj #undef UTR 733264Swnj #undef UMA 743264Swnj #undef MTR 7533408Skarels #endif 763264Swnj 7733408Skarels #if VAX730 787444Sroot #define UTR(i) ((struct uba_regs *)(NEX730+(i))) 7933408Skarels #define UMA ((caddr_t)UMEM730+UBAIOADDR) 803341Swnj 817444Sroot struct uba_regs *ubaddr730[] = { UTR(3) }; 8233408Skarels caddr_t uioaddr730[] = { UMA }; 833341Swnj 843341Swnj #undef UTR 853341Swnj #undef UMA 8633408Skarels #endif 873341Swnj 8833408Skarels #if VAX630 8933408Skarels /* 9033408Skarels * The map registers start at 20088000 on the ka630, so 9133408Skarels * subtract a 2k offset to make things work. 9233408Skarels * 9333408Skarels * This could stand serious cleanup. 9433408Skarels */ 9533408Skarels struct uba_regs *ubaddr630[] = 9633408Skarels { (struct uba_regs *)((caddr_t)QBAMAP630 - 0x800) }; 9733408Skarels caddr_t uioaddr630[] = { (caddr_t)QIOPAGE630 }; 9833408Skarels #endif 9933408Skarels 100*33441Skarels int cpuspeed = 1; 101*33441Skarels 1023264Swnj configure() 1033264Swnj { 1043264Swnj union cpusid cpusid; 10533408Skarels register int nmba, nuba, i; 1063264Swnj 1073264Swnj cpusid.cpusid = mfpr(SID); 1083264Swnj cpu = cpusid.cpuany.cp_type; 1093264Swnj switch (cpu) { 1103264Swnj 11133408Skarels #if VAX8600 11224151Sbloom case VAX_8600: 11333408Skarels nmba = sizeof (mbaddr780) / sizeof (mbaddr780[0]); 11433408Skarels nuba = sizeof (ubaddr780) / sizeof (ubaddr780[0]); 11533408Skarels mbaddr = mbaddr780; 11633408Skarels ubaddr = ubaddr780; 11733408Skarels uioaddr = uioaddr780; 118*33441Skarels cpuspeed = 6; 11933408Skarels break; 12033408Skarels #endif 12133408Skarels 12233408Skarels #if VAX780 1233264Swnj case VAX_780: 12433408Skarels nmba = 4; 12533408Skarels nuba = 4; 1263264Swnj mbaddr = mbaddr780; 1273264Swnj ubaddr = ubaddr780; 12833408Skarels uioaddr = uioaddr780; 129*33441Skarels cpuspeed = 2; 13033408Skarels break; 13133408Skarels #endif 13233408Skarels 13333408Skarels #if VAX8200 13433408Skarels case VAX_8200: { 13533408Skarels register struct bi_node *bi; 13633408Skarels 13733408Skarels nmba = 0; 13833408Skarels nuba = 0; 13933408Skarels for (i = 0, bi = BI_BASE(0); i < NNODEBI; i++, bi++) { 14033408Skarels if (badaddr((caddr_t)bi, sizeof (long))) 14133408Skarels continue; 14233408Skarels #ifdef notdef 14333408Skarels /* clear bus errors */ 14433408Skarels bi->biic.bi_ber = ~(BIBER_MBZ|BIBER_NMR|BIBER_UPEN); 14533408Skarels #endif 14633408Skarels switch (bi->biic.bi_dtype) { 14733408Skarels 14833408Skarels case BIDT_DWBUA: 14933408Skarels if (nuba >= MAXNUBA) /* sorry */ 15033408Skarels break; 15133408Skarels ubaddr8200[nuba] = (struct uba_regs *)bi; 15233408Skarels uioaddr8200[nuba] = (caddr_t)UMEM8200(i); 15333408Skarels ((struct dwbua_regs *)bi)->bua_csr |= 15433408Skarels BUACSR_UPI; 15533408Skarels nuba++; 15633408Skarels break; 15733408Skarels 15833408Skarels case BIDT_KDB50: 15933408Skarels if (nkdb < MAXNKDB) 16033408Skarels kdbaddr[nkdb++] = (caddr_t)bi; 16133408Skarels break; 16233408Skarels } 16330547Skarels } 16433408Skarels ubaddr = ubaddr8200; 16533408Skarels uioaddr = uioaddr8200; 16633408Skarels } 1673264Swnj break; 16833408Skarels #endif 1693264Swnj 17033408Skarels #if VAX750 1713264Swnj case VAX_750: 1723264Swnj mbaddr = mbaddr750; 1733264Swnj ubaddr = ubaddr750; 17433408Skarels uioaddr = uioaddr750; 1753348Swnj nmba = sizeof (mbaddr750) / sizeof (mbaddr750[0]); 1763348Swnj nuba = 0; 1773264Swnj break; 17833408Skarels #endif 1793341Swnj 18033408Skarels #if VAX730 1817444Sroot case VAX_730: 1827444Sroot ubaddr = ubaddr730; 18333408Skarels uioaddr = uioaddr730; 18433408Skarels nmba = 0; 18533408Skarels nuba = 0; 1863341Swnj break; 18733408Skarels #endif 18833408Skarels 18933408Skarels #if VAX630 19033408Skarels case VAX_630: 19133408Skarels ubaddr = ubaddr630; 19233408Skarels uioaddr = uioaddr630; 19333408Skarels nmba = 0; 19433408Skarels nuba = 0; 19533408Skarels break; 19633408Skarels #endif 1973264Swnj } 19833408Skarels 1993348Swnj /* 2003348Swnj * Forward into the past... 2013348Swnj */ 2027444Sroot /* 2033348Swnj for (i = 0; i < nmba; i++) 20430547Skarels if (!badaddr(mbaddr[i], sizeof(long))) 2053348Swnj mbaddr[i]->mba_cr = MBCR_INIT; 2067444Sroot */ 20733408Skarels switch (cpu) { 20833408Skarels 20933408Skarels #if VAX8600 || VAX780 21033408Skarels case VAX_8600: 21133408Skarels case VAX_780: 21233408Skarels for (i = 0; i < nuba; i++) 21333408Skarels if (!badaddr(ubaddr[i], sizeof(long))) 21433408Skarels ubaddr[i]->uba_cr = UBACR_ADINIT; 21533408Skarels break; 21633408Skarels #endif 21733408Skarels 21833408Skarels #if VAX750 || VAX730 21933408Skarels case VAX_750: 22033408Skarels case VAX_730: 2217444Sroot mtpr(IUR, 0); 22233408Skarels break; 22333408Skarels #endif 22433408Skarels 22533408Skarels #if VAX630 22633408Skarels case VAX_630: 22733408Skarels mtpr(IUR, 0); 22833408Skarels *((char *)QIOPAGE630 + QIPCR) = Q_LMEAE; 22933408Skarels break; 23033408Skarels #endif 23133408Skarels } 23233408Skarels 2333348Swnj /* give unibus devices a chance to recover... */ 2343348Swnj if (nuba > 0) 2353348Swnj DELAY(2000000); 2363264Swnj } 237