123218Smckusick /* 229291Smckusick * Copyright (c) 1982, 1986 Regents of the University of California. 323218Smckusick * All rights reserved. The Berkeley software License Agreement 423218Smckusick * specifies the terms and conditions for redistribution. 523218Smckusick * 6*33408Skarels * @(#)autoconf.c 7.3 (Berkeley) 01/28/88 723218Smckusick */ 83264Swnj 99803Ssam #include "../machine/pte.h" 109803Ssam 11*33408Skarels #include "param.h" 129186Ssam 139186Ssam #include "../vax/cpu.h" 149186Ssam #include "../vax/nexus.h" 159186Ssam #include "../vaxuba/ubareg.h" 169186Ssam #include "../vaxmba/mbareg.h" 179186Ssam #include "../vax/mtpr.h" 189186Ssam 193264Swnj #include "savax.h" 203264Swnj 21*33408Skarels #ifdef VAX8200 22*33408Skarels #include "../vax/bireg.h" 23*33408Skarels /* 24*33408Skarels * These are found during configuration, rather than being compiled in 25*33408Skarels * statically. 26*33408Skarels */ 27*33408Skarels struct uba_regs *ubaddr8200[MAXNUBA]; 28*33408Skarels caddr_t uioaddr8200[MAXNUBA]; 29*33408Skarels #endif 30*33408Skarels 31*33408Skarels #if VAX8600 || VAX780 323264Swnj #define UTR(i) ((struct uba_regs *)(NEX780+(i))) 33*33408Skarels #define UMA(i) ((caddr_t)UMEM780(i)+UBAIOADDR) 343264Swnj #define MTR(i) ((struct mba_regs *)(NEX780+(i))) 3530547Skarels #define UTRB(i) ((struct uba_regs *)(NEXB8600+(i))) 36*33408Skarels #define UMAB(i) ((caddr_t)UMEMB8600(i)+UBAIOADDR) 3730547Skarels #define MTRB(i) ((struct mba_regs *)(NEXB8600+(i))) 383264Swnj 3930547Skarels struct uba_regs *ubaddr780[] = { 4030547Skarels UTR(3), UTR(4), UTR(5), UTR(6), 4130547Skarels #if VAX8600 4230547Skarels UTRB(3), UTRB(4), UTRB(5), UTRB(6), 4330547Skarels #endif 4430547Skarels }; 45*33408Skarels caddr_t uioaddr780[] = { 4630547Skarels UMA(0), UMA(1), UMA(2), UMA(3), 4730547Skarels #if VAX8600 4830547Skarels UMAB(0), UMAB(1), UMAB(2), UMAB(3), 4930547Skarels #endif 5030547Skarels }; 5130547Skarels struct mba_regs *mbaddr780[] = { 5230547Skarels MTR(8), MTR(9), MTR(10), MTR(11), 5330547Skarels #if VAX8600 5430547Skarels MTRB(8), MTRB(9), MTRB(10), MTRB(11), 5530547Skarels #endif 5630547Skarels }; 573264Swnj 583264Swnj #undef UTR 593264Swnj #undef UMA 603264Swnj #undef MTR 61*33408Skarels #endif 623264Swnj 63*33408Skarels #if VAX750 643264Swnj #define UTR(i) ((struct uba_regs *)(NEX750+(i))) 65*33408Skarels #define UMA(i) ((caddr_t)UMEM750(i)+UBAIOADDR) 663264Swnj #define MTR(i) ((struct mba_regs *)(NEX750+(i))) 673264Swnj 683264Swnj struct uba_regs *ubaddr750[] = { UTR(8), UTR(9) }; 69*33408Skarels caddr_t uioaddr750[] = { UMA(0), UMA(1) }; 703341Swnj struct mba_regs *mbaddr750[] = { MTR(4), MTR(5), MTR(6), MTR(7) }; 713264Swnj 723264Swnj #undef UTR 733264Swnj #undef UMA 743264Swnj #undef MTR 75*33408Skarels #endif 763264Swnj 77*33408Skarels #if VAX730 787444Sroot #define UTR(i) ((struct uba_regs *)(NEX730+(i))) 79*33408Skarels #define UMA ((caddr_t)UMEM730+UBAIOADDR) 803341Swnj 817444Sroot struct uba_regs *ubaddr730[] = { UTR(3) }; 82*33408Skarels caddr_t uioaddr730[] = { UMA }; 833341Swnj 843341Swnj #undef UTR 853341Swnj #undef UMA 86*33408Skarels #endif 873341Swnj 88*33408Skarels #if VAX630 89*33408Skarels /* 90*33408Skarels * The map registers start at 20088000 on the ka630, so 91*33408Skarels * subtract a 2k offset to make things work. 92*33408Skarels * 93*33408Skarels * This could stand serious cleanup. 94*33408Skarels */ 95*33408Skarels struct uba_regs *ubaddr630[] = 96*33408Skarels { (struct uba_regs *)((caddr_t)QBAMAP630 - 0x800) }; 97*33408Skarels caddr_t uioaddr630[] = { (caddr_t)QIOPAGE630 }; 98*33408Skarels #endif 99*33408Skarels 1003264Swnj configure() 1013264Swnj { 1023264Swnj union cpusid cpusid; 103*33408Skarels register int nmba, nuba, i; 1043264Swnj 1053264Swnj cpusid.cpusid = mfpr(SID); 1063264Swnj cpu = cpusid.cpuany.cp_type; 1073264Swnj switch (cpu) { 1083264Swnj 109*33408Skarels #if VAX8600 11024151Sbloom case VAX_8600: 111*33408Skarels nmba = sizeof (mbaddr780) / sizeof (mbaddr780[0]); 112*33408Skarels nuba = sizeof (ubaddr780) / sizeof (ubaddr780[0]); 113*33408Skarels mbaddr = mbaddr780; 114*33408Skarels ubaddr = ubaddr780; 115*33408Skarels uioaddr = uioaddr780; 116*33408Skarels break; 117*33408Skarels #endif 118*33408Skarels 119*33408Skarels #if VAX780 1203264Swnj case VAX_780: 121*33408Skarels nmba = 4; 122*33408Skarels nuba = 4; 1233264Swnj mbaddr = mbaddr780; 1243264Swnj ubaddr = ubaddr780; 125*33408Skarels uioaddr = uioaddr780; 126*33408Skarels break; 127*33408Skarels #endif 128*33408Skarels 129*33408Skarels #if VAX8200 130*33408Skarels case VAX_8200: { 131*33408Skarels register struct bi_node *bi; 132*33408Skarels 133*33408Skarels nmba = 0; 134*33408Skarels nuba = 0; 135*33408Skarels for (i = 0, bi = BI_BASE(0); i < NNODEBI; i++, bi++) { 136*33408Skarels if (badaddr((caddr_t)bi, sizeof (long))) 137*33408Skarels continue; 138*33408Skarels #ifdef notdef 139*33408Skarels /* clear bus errors */ 140*33408Skarels bi->biic.bi_ber = ~(BIBER_MBZ|BIBER_NMR|BIBER_UPEN); 141*33408Skarels #endif 142*33408Skarels switch (bi->biic.bi_dtype) { 143*33408Skarels 144*33408Skarels case BIDT_DWBUA: 145*33408Skarels if (nuba >= MAXNUBA) /* sorry */ 146*33408Skarels break; 147*33408Skarels ubaddr8200[nuba] = (struct uba_regs *)bi; 148*33408Skarels uioaddr8200[nuba] = (caddr_t)UMEM8200(i); 149*33408Skarels ((struct dwbua_regs *)bi)->bua_csr |= 150*33408Skarels BUACSR_UPI; 151*33408Skarels nuba++; 152*33408Skarels break; 153*33408Skarels 154*33408Skarels case BIDT_KDB50: 155*33408Skarels if (nkdb < MAXNKDB) 156*33408Skarels kdbaddr[nkdb++] = (caddr_t)bi; 157*33408Skarels break; 158*33408Skarels } 15930547Skarels } 160*33408Skarels ubaddr = ubaddr8200; 161*33408Skarels uioaddr = uioaddr8200; 162*33408Skarels } 1633264Swnj break; 164*33408Skarels #endif 1653264Swnj 166*33408Skarels #if VAX750 1673264Swnj case VAX_750: 1683264Swnj mbaddr = mbaddr750; 1693264Swnj ubaddr = ubaddr750; 170*33408Skarels uioaddr = uioaddr750; 1713348Swnj nmba = sizeof (mbaddr750) / sizeof (mbaddr750[0]); 1723348Swnj nuba = 0; 1733264Swnj break; 174*33408Skarels #endif 1753341Swnj 176*33408Skarels #if VAX730 1777444Sroot case VAX_730: 1787444Sroot ubaddr = ubaddr730; 179*33408Skarels uioaddr = uioaddr730; 180*33408Skarels nmba = 0; 181*33408Skarels nuba = 0; 1823341Swnj break; 183*33408Skarels #endif 184*33408Skarels 185*33408Skarels #if VAX630 186*33408Skarels case VAX_630: 187*33408Skarels ubaddr = ubaddr630; 188*33408Skarels uioaddr = uioaddr630; 189*33408Skarels nmba = 0; 190*33408Skarels nuba = 0; 191*33408Skarels break; 192*33408Skarels #endif 1933264Swnj } 194*33408Skarels 1953348Swnj /* 1963348Swnj * Forward into the past... 1973348Swnj */ 1987444Sroot /* 1993348Swnj for (i = 0; i < nmba; i++) 20030547Skarels if (!badaddr(mbaddr[i], sizeof(long))) 2013348Swnj mbaddr[i]->mba_cr = MBCR_INIT; 2027444Sroot */ 203*33408Skarels switch (cpu) { 204*33408Skarels 205*33408Skarels #if VAX8600 || VAX780 206*33408Skarels case VAX_8600: 207*33408Skarels case VAX_780: 208*33408Skarels for (i = 0; i < nuba; i++) 209*33408Skarels if (!badaddr(ubaddr[i], sizeof(long))) 210*33408Skarels ubaddr[i]->uba_cr = UBACR_ADINIT; 211*33408Skarels break; 212*33408Skarels #endif 213*33408Skarels 214*33408Skarels #if VAX750 || VAX730 215*33408Skarels case VAX_750: 216*33408Skarels case VAX_730: 2177444Sroot mtpr(IUR, 0); 218*33408Skarels break; 219*33408Skarels #endif 220*33408Skarels 221*33408Skarels #if VAX630 222*33408Skarels case VAX_630: 223*33408Skarels mtpr(IUR, 0); 224*33408Skarels *((char *)QIOPAGE630 + QIPCR) = Q_LMEAE; 225*33408Skarels break; 226*33408Skarels #endif 227*33408Skarels } 228*33408Skarels 2293348Swnj /* give unibus devices a chance to recover... */ 2303348Swnj if (nuba > 0) 2313348Swnj DELAY(2000000); 2323264Swnj } 233