1*3264Swnj /* autoconf.c 4.1 81/03/15 */ 2*3264Swnj 3*3264Swnj #include "../h/param.h" 4*3264Swnj #include "../h/cpu.h" 5*3264Swnj #include "../h/nexus.h" 6*3264Swnj #include "../h/pte.h" 7*3264Swnj #include "../h/ubareg.h" 8*3264Swnj #include "../h/mbareg.h" 9*3264Swnj #include "../h/mtpr.h" 10*3264Swnj #include "savax.h" 11*3264Swnj 12*3264Swnj #define UTR(i) ((struct uba_regs *)(NEX780+(i))) 13*3264Swnj #define UMA(i) ((caddr_t)UMEM780(i)) 14*3264Swnj #define MTR(i) ((struct mba_regs *)(NEX780+(i))) 15*3264Swnj 16*3264Swnj struct uba_regs *ubaddr780[] = { UTR(3), UTR(4), UTR(5), UTR(6) }; 17*3264Swnj caddr_t umaddr780[] = { UMA(0), UMA(1), UMA(2), UMA(3) }; 18*3264Swnj struct mba_regs *mbaddr780[] = { MTR(8), MTR(9), MTR(10), MTR(11) }; 19*3264Swnj 20*3264Swnj #undef UTR 21*3264Swnj #undef UMA 22*3264Swnj #undef MTR 23*3264Swnj 24*3264Swnj #define UTR(i) ((struct uba_regs *)(NEX750+(i))) 25*3264Swnj #define UMA(i) ((caddr_t)UMEM750(i)) 26*3264Swnj #define MTR(i) ((struct mba_regs *)(NEX750+(i))) 27*3264Swnj 28*3264Swnj struct uba_regs *ubaddr750[] = { UTR(8), UTR(9) }; 29*3264Swnj caddr_t umaddr750[] = { UMA(0), UMA(1) }; 30*3264Swnj struct mba_regs *mbaddr750[] = { MTR(3), MTR(4), MTR(5), MTR(6) }; 31*3264Swnj 32*3264Swnj #undef UTR 33*3264Swnj #undef UMA 34*3264Swnj #undef MTR 35*3264Swnj 36*3264Swnj configure() 37*3264Swnj { 38*3264Swnj union cpusid cpusid; 39*3264Swnj 40*3264Swnj cpusid.cpusid = mfpr(SID); 41*3264Swnj cpu = cpusid.cpuany.cp_type; 42*3264Swnj switch (cpu) { 43*3264Swnj 44*3264Swnj case VAX_780: 45*3264Swnj mbaddr = mbaddr780; 46*3264Swnj ubaddr = ubaddr780; 47*3264Swnj /*###47 [cc] warning: illegal pointer combination %%%*/ 48*3264Swnj umaddr = umaddr780; 49*3264Swnj break; 50*3264Swnj 51*3264Swnj case VAX_750: 52*3264Swnj mbaddr = mbaddr750; 53*3264Swnj ubaddr = ubaddr750; 54*3264Swnj /*###53 [cc] warning: illegal pointer combination %%%*/ 55*3264Swnj umaddr = umaddr750; 56*3264Swnj break; 57*3264Swnj } 58*3264Swnj } 59