xref: /csrg-svn/sys/vax/mdec/rlboot.c (revision 23148)
1 /*
2  * Copyright (c) 1980 Regents of the University of California.
3  * All rights reserved.  The Berkeley software License Agreement
4  * specifies the terms and conditions for redistribution.
5  */
6 
7 #ifndef lint
8 _sccsid:.asciz	"@(#)rlboot.c	6.2 (Berkeley) 06/08/85"
9 #endif not lint
10 
11 /*
12  * RL02 1st level boot program: loads next 7.5Kbytes from
13  * boot sector of file system and sets it up to run.
14  * Always reads from drive 0.
15  * 	UNTESTED
16  */
17 	.set	BOOTSIZE,15		/* 15 ``sectors'' */
18         .set    RELOC,0x50000
19         .set    SID,62			/* system ID register */
20 /* UBA registers */
21         .set    UBA_CNFGR,0		/* UBA configuration register */
22         .set    UBA_CR,4		/* UBA control register offset */
23         .set    UBA_MAP,0x800		/* UBA offset to map reg's */
24         .set    UBAinit,1		/* UBA init bit in UBA control reg */
25         .set    pUBIC,16		/* Unibus init complete */
26 /* RL11 registers and bits */
27         .set    HL,0174400-0160000	/* address of RL11 */
28         .set    HLBPSECT,512		/* sector size in bytes (kludge) */
29         .set    HL_cs,HL+0		/* control and status */
30         .set    HL_ba,HL+2		/* bus address */
31         .set    HL_da,HL+4		/* disk address */
32         .set    HL_wc,HL+6		/* word count */
33         .set    HL_GO,0			/* go bit */
34         .set    HL_RCOM,014		/* read command */
35         .set    HL_SEEK,06		/* seek */
36         .set    HL_RESET,013		/* reset drive */
37         .set    HL_GSTAT,04		/* get status command */
38         .set    HL_pRDY,7		/* position of ready bit */
39         .set    HL_pERR,15		/* position of error bit */
40 
41 init:
42 /* r9   UBA address */
43 /* r10  umem addr */
44         .word   0			/* entry mask for dec monitor */
45         nop;nop;nop;nop;nop;nop;nop;nop	/* some no-ops for 750 boot to skip */
46 	nop;nop;
47 /* get cpu type and find the first uba */
48         mfpr    $SID,r0
49         extzv   $24,$8,r0,r0		/* get cpu type */
50         ashl    $2,r0,r1
51         movab   physUBA,r2		/* get physUBA[cpu] */
52         addl2   r1,r2
53         movl    (r2),r9
54         movab   physUMEM,r2		/* get physUMEM[cpu] */
55         addl2   r1,r2
56         movl    (r2),r10
57 /* if 780, init uba */
58         cmpl    r0,$1
59         bneq    2f
60         movl    $UBAinit,UBA_CR(r9)
61 1:
62         bbc     $pUBIC,UBA_CNFGR(r9),1b
63 2:
64 /* init rl11, and drive 0, don't check for any errors now */
65         movw    $HL_RESET,HL_da(r10)
66         movw    $HL_GSTAT+HL_GO,HL_cs(r10)
67 /* relocate to high core */
68 start:
69         movl    r5,r11			/* save boot flags */
70         movl    $RELOC,sp
71         moval   init,r6
72         movc3   $end,(r6),(sp)
73         jmp     *$RELOC+start2
74 /* now running relocated */
75 /* read in the boot program */
76 	.set	PROGSIZE,(BOOTSIZE*HLBPSECT)
77 start2:
78 	movw	$1,HL_da(r10)			/* seek to cylinder 0 */
79 	movw    $HL_SEEK+HL_GO,HL_cs(r10)
80 1:
81         movw    HL_cs(r10),r0
82         bbc     $HL_pRDY,r0,1b
83         bbs     $HL_pERR,r0,hlerr
84 	/* Rl has 256 byte sectors */
85 	movw	$2,HL_da(r10)			/* read program */
86 	movw	$-PROGSIZE/2,HL_wc(r10)
87 	clrl	r0
88 1:
89 	bisl3	$0x80000000,r0,UBA_MAP(r9)
90 	addl2	$4,r9
91 	aobleq	$BOOTSIZE,r0,1b
92 	clrw	HL_ba(r10)
93 	movw	$HL_RCOM+HL_GO,HL_cs(r10)
94 1:
95         movw    HL_cs(r10),r0
96         bbc     $HL_pRDY,r0,1b
97         bbs     $HL_pERR,r0,hlerr
98 	brw	done
99 hlerr:
100         halt				/* ungraceful */
101 done:
102         movl    $PROGSIZE,r3
103 clrcor:
104         clrq    (r3)
105         acbl    $RELOC,$8,r3,clrcor
106 /* run loaded program */
107         movl    $14,r10			/* major("/dev/hl0a") */
108         calls   $0,*$0
109         brw     start2
110 physUBA:
111         .long   0
112         .long   0x20006000		/* 11/780 */
113         .long   0xf30000		/* 11/750 */
114         .long   0xf26000		/* 11/730 */
115 physUMEM:
116         .long   0
117         .long   0x2013e000		/* 11/780 */
118         .long   0xffe000		/* 11/750 */
119         .long   0xffe000		/* 11/730 */
120 end:
121