xref: /csrg-svn/sys/vax/mba/mba.c (revision 9788)
1*9788Ssam /*	mba.c	4.30	82/12/17	*/
228Sbill 
32704Swnj #include "mba.h"
42704Swnj #if NMBA > 0
52383Swnj /*
63095Swnj  * Massbus driver, arbitrates a massbus among attached devices.
72383Swnj  */
8*9788Ssam #include "../machine/pte.h"
9*9788Ssam 
1028Sbill #include "../h/param.h"
112383Swnj #include "../h/systm.h"
122383Swnj #include "../h/dk.h"
1328Sbill #include "../h/buf.h"
1428Sbill #include "../h/conf.h"
1528Sbill #include "../h/dir.h"
1628Sbill #include "../h/user.h"
1728Sbill #include "../h/proc.h"
182383Swnj #include "../h/map.h"
198470Sroot #include "../vax/mtpr.h"
2028Sbill #include "../h/vm.h"
2128Sbill 
228470Sroot #include "../vaxmba/mbareg.h"
238470Sroot #include "../vaxmba/mbavar.h"
248470Sroot 
253095Swnj char	mbsr_bits[] = MBSR_BITS;
2628Sbill /*
272383Swnj  * Start activity on a massbus device.
282981Swnj  * We are given the device's mba_device structure and activate
292383Swnj  * the device via the unit start routine.  The unit start
302383Swnj  * routine may indicate that it is finished (e.g. if the operation
312383Swnj  * was a ``sense'' on a tape drive), that the (multi-ported) unit
322383Swnj  * is busy (we will get an interrupt later), that it started the
332383Swnj  * unit (e.g. for a non-data transfer operation), or that it has
342383Swnj  * set up a data transfer operation and we should start the massbus adaptor.
3528Sbill  */
362383Swnj mbustart(mi)
372981Swnj 	register struct mba_device *mi;
382383Swnj {
392383Swnj 	register struct buf *bp;	/* i/o operation at head of queue */
402383Swnj 	register struct mba_hd *mhp;	/* header for mba device is on */
4128Sbill 
422383Swnj loop:
432383Swnj 	/*
442383Swnj 	 * Get the first thing to do off device queue.
452383Swnj 	 */
462383Swnj 	bp = mi->mi_tab.b_actf;
472383Swnj 	if (bp == NULL)
482383Swnj 		return;
492383Swnj 	/*
506537Ssam 	 * Make sure the drive is still there before starting it up.
516537Ssam 	 */
526537Ssam 	if ((mi->mi_drv->mbd_dt & MBDT_TYPE) == 0) {
536537Ssam 		printf("%s%d: nonexistent\n", mi->mi_driver->md_dname,
546537Ssam 		    dkunit(bp));
556537Ssam 		mi->mi_alive = 0;
566537Ssam 		mi->mi_tab.b_actf = bp->av_forw;
576537Ssam 		mi->mi_tab.b_active = 0;
586537Ssam 		mi->mi_tab.b_errcnt = 0;
596537Ssam 		bp->b_flags |= B_ERROR;
606537Ssam 		iodone(bp);
616537Ssam 		goto loop;
626537Ssam 	}
636537Ssam 	/*
642383Swnj 	 * Let the drivers unit start routine have at it
652383Swnj 	 * and then process the request further, per its instructions.
662383Swnj 	 */
672383Swnj 	switch ((*mi->mi_driver->md_ustart)(mi)) {
682383Swnj 
692383Swnj 	case MBU_NEXT:		/* request is complete (e.g. ``sense'') */
702383Swnj 		mi->mi_tab.b_active = 0;
712955Swnj 		mi->mi_tab.b_errcnt = 0;
722383Swnj 		mi->mi_tab.b_actf = bp->av_forw;
732383Swnj 		iodone(bp);
742383Swnj 		goto loop;
752383Swnj 
762383Swnj 	case MBU_DODATA:	/* all ready to do data transfer */
772383Swnj 		/*
782981Swnj 		 * Queue the device mba_device structure on the massbus
792383Swnj 		 * mba_hd structure for processing as soon as the
802383Swnj 		 * data path is available.
812383Swnj 		 */
822383Swnj 		mhp = mi->mi_hd;
832383Swnj 		mi->mi_forw = NULL;
842383Swnj 		if (mhp->mh_actf == NULL)
852383Swnj 			mhp->mh_actf = mi;
862383Swnj 		else
872383Swnj 			mhp->mh_actl->mi_forw = mi;
882383Swnj 		mhp->mh_actl = mi;
892383Swnj 		/*
902383Swnj 		 * If data path is idle, start transfer now.
912383Swnj 		 * In any case the device is ``active'' waiting for the
922383Swnj 		 * data to transfer.
932383Swnj 		 */
942893Swnj 		mi->mi_tab.b_active = 1;
952383Swnj 		if (mhp->mh_active == 0)
962383Swnj 			mbstart(mhp);
972383Swnj 		return;
982383Swnj 
992383Swnj 	case MBU_STARTED:	/* driver started a non-data transfer */
1002383Swnj 		/*
1012383Swnj 		 * Mark device busy during non-data transfer
1022383Swnj 		 * and count this as a ``seek'' on the device.
1032383Swnj 		 */
1043182Swnj 		if (mi->mi_dk >= 0) {
1052383Swnj 			dk_seek[mi->mi_dk]++;
1063182Swnj 			dk_busy |= (1 << mi->mi_dk);
1073182Swnj 		}
1082383Swnj 		mi->mi_tab.b_active = 1;
1092383Swnj 		return;
1102383Swnj 
1112383Swnj 	case MBU_BUSY:		/* dual port drive busy */
1122383Swnj 		/*
1132383Swnj 		 * We mark the device structure so that when an
1142383Swnj 		 * interrupt occurs we will know to restart the unit.
1152383Swnj 		 */
1162383Swnj 		mi->mi_tab.b_flags |= B_BUSY;
1172383Swnj 		return;
1182383Swnj 
1192383Swnj 	default:
1202383Swnj 		panic("mbustart");
1212383Swnj 	}
1222403Skre }
1232383Swnj 
1242383Swnj /*
1252383Swnj  * Start an i/o operation on the massbus specified by the argument.
1262383Swnj  * We peel the first operation off its queue and insure that the drive
1272383Swnj  * is present and on-line.  We then use the drivers start routine
1282383Swnj  * (if any) to prepare the drive, setup the massbus map for the transfer
1292383Swnj  * and start the transfer.
1302383Swnj  */
1312383Swnj mbstart(mhp)
1322383Swnj 	register struct mba_hd *mhp;
1332383Swnj {
1342981Swnj 	register struct mba_device *mi;
1352383Swnj 	struct buf *bp;
1362383Swnj 	register struct mba_regs *mbp;
1373708Sroot 	register int com;
1382383Swnj 
1392383Swnj loop:
1402383Swnj 	/*
1412383Swnj 	 * Look for an operation at the front of the queue.
1422383Swnj 	 */
1432955Swnj 	if ((mi = mhp->mh_actf) == NULL) {
1442383Swnj 		return;
1452955Swnj 	}
1462383Swnj 	if ((bp = mi->mi_tab.b_actf) == NULL) {
1472383Swnj 		mhp->mh_actf = mi->mi_forw;
1482383Swnj 		goto loop;
1492383Swnj 	}
1502383Swnj 	/*
1512383Swnj 	 * If this device isn't present and on-line, then
1522383Swnj 	 * we screwed up, and can't really do the operation.
1534757Swnj 	 * Only check for non-tapes because tape drivers check
1544757Swnj 	 * ONLINE themselves and because TU78 registers are
1554757Swnj 	 * different.
1562383Swnj 	 */
1576537Ssam 	if (((com = mi->mi_drv->mbd_dt) & MBDT_TAP) == 0)
1583095Swnj 	if ((mi->mi_drv->mbd_ds & MBDS_DREADY) != MBDS_DREADY) {
1596537Ssam 		if ((com & MBDT_TYPE) == 0) {
1606537Ssam 			mi->mi_alive = 0;
1616537Ssam 			printf("%s%d: nonexistent\n", mi->mi_driver->md_dname,
1626537Ssam 			    dkunit(bp));
1636537Ssam 		} else
1646537Ssam 			printf("%s%d: not ready\n", mi->mi_driver->md_dname,
1656537Ssam 			    dkunit(bp));
1662383Swnj 		mi->mi_tab.b_actf = bp->av_forw;
1672893Swnj 		mi->mi_tab.b_errcnt = 0;
1682893Swnj 		mi->mi_tab.b_active = 0;
1692383Swnj 		bp->b_flags |= B_ERROR;
1702383Swnj 		iodone(bp);
1712383Swnj 		goto loop;
1722383Swnj 	}
1732383Swnj 	/*
1742383Swnj 	 * We can do the operation; mark the massbus active
1752383Swnj 	 * and let the device start routine setup any necessary
1762383Swnj 	 * device state for the transfer (e.g. desired cylinder, etc
1772383Swnj 	 * on disks).
1782383Swnj 	 */
1792383Swnj 	mhp->mh_active = 1;
1803708Sroot 	if (mi->mi_driver->md_start) {
1813708Sroot 		if ((com = (*mi->mi_driver->md_start)(mi)) == 0)
1823708Sroot 			com = (bp->b_flags & B_READ) ?
1833708Sroot 			    MB_RCOM|MB_GO : MB_WCOM|MB_GO;
1843708Sroot 	} else
1853708Sroot 		com = (bp->b_flags & B_READ) ? MB_RCOM|MB_GO : MB_WCOM|MB_GO;
1862383Swnj 
1872383Swnj 	/*
1882383Swnj 	 * Setup the massbus control and map registers and start
1892383Swnj 	 * the transfer.
1902383Swnj 	 */
1912383Swnj 	mbp = mi->mi_mba;
1922383Swnj 	mbp->mba_sr = -1;	/* conservative */
1932383Swnj 	mbp->mba_var = mbasetup(mi);
1942383Swnj 	mbp->mba_bcr = -bp->b_bcount;
1953708Sroot 	mi->mi_drv->mbd_cs1 = com;
1962383Swnj 	if (mi->mi_dk >= 0) {
1972383Swnj 		dk_busy |= 1 << mi->mi_dk;
1982383Swnj 		dk_xfer[mi->mi_dk]++;
1992383Swnj 		dk_wds[mi->mi_dk] += bp->b_bcount >> 6;
2002383Swnj 	}
2012383Swnj }
2022383Swnj 
2032383Swnj /*
2042383Swnj  * Take an interrupt off of massbus mbanum,
2052383Swnj  * and dispatch to drivers as appropriate.
2062383Swnj  */
2072383Swnj mbintr(mbanum)
2082383Swnj 	int mbanum;
2092383Swnj {
2102383Swnj 	register struct mba_hd *mhp = &mba_hd[mbanum];
2112383Swnj 	register struct mba_regs *mbp = mhp->mh_mba;
2122981Swnj 	register struct mba_device *mi;
213420Sbill 	register struct buf *bp;
2142383Swnj 	register int drive;
2152955Swnj 	int mbasr, as;
2166537Ssam 	extern struct mba_device *mbaconfig();
2172383Swnj 
2182383Swnj 	/*
2192383Swnj 	 * Read out the massbus status register
2202383Swnj 	 * and attention status register and clear
2212383Swnj 	 * the bits in same by writing them back.
2222383Swnj 	 */
2232955Swnj 	mbasr = mbp->mba_sr;
2242955Swnj 	mbp->mba_sr = mbasr;
2252884Swnj #if VAX750
2263095Swnj 	if (mbasr&MBSR_CBHUNG) {
2272930Swnj 		printf("mba%d: control bus hung\n", mbanum);
2282930Swnj 		panic("cbhung");
2292930Swnj 	}
2302884Swnj #endif
2312383Swnj 	/* note: the mbd_as register is shared between drives */
2322955Swnj 	as = mbp->mba_drv[0].mbd_as & 0xff;
2332383Swnj 	mbp->mba_drv[0].mbd_as = as;
2342383Swnj 
2352383Swnj 	/*
2362383Swnj 	 * If the mba was active, process the data transfer
2372383Swnj 	 * complete interrupt; otherwise just process units which
2382383Swnj 	 * are now finished.
2392383Swnj 	 */
2402383Swnj 	if (mhp->mh_active) {
2412383Swnj 		/*
2422383Swnj 		 * Clear attention status for drive whose data
2433095Swnj 		 * transfer related operation completed,
2443095Swnj 		 * and give the dtint driver
2452383Swnj 		 * routine a chance to say what is next.
2462383Swnj 		 */
2472383Swnj 		mi = mhp->mh_actf;
2482383Swnj 		as &= ~(1 << mi->mi_drive);
2492383Swnj 		dk_busy &= ~(1 << mi->mi_dk);
2502383Swnj 		bp = mi->mi_tab.b_actf;
2513095Swnj 		switch ((*mi->mi_driver->md_dtint)(mi, mbasr)) {
2522383Swnj 
2532383Swnj 		case MBD_DONE:		/* all done, for better or worse */
2542383Swnj 			/*
2552383Swnj 			 * Flush request from drive queue.
2562383Swnj 			 */
2572383Swnj 			mi->mi_tab.b_errcnt = 0;
2582383Swnj 			mi->mi_tab.b_actf = bp->av_forw;
2592383Swnj 			iodone(bp);
2602383Swnj 			/* fall into... */
2612383Swnj 		case MBD_RETRY:		/* attempt the operation again */
2622383Swnj 			/*
2632383Swnj 			 * Dequeue data transfer from massbus queue;
2642383Swnj 			 * if there is still a i/o request on the device
2652383Swnj 			 * queue then start the next operation on the device.
2662383Swnj 			 * (Common code for DONE and RETRY).
2672383Swnj 			 */
2682383Swnj 			mhp->mh_active = 0;
2692383Swnj 			mi->mi_tab.b_active = 0;
2702383Swnj 			mhp->mh_actf = mi->mi_forw;
2712383Swnj 			if (mi->mi_tab.b_actf)
2722383Swnj 				mbustart(mi);
2732383Swnj 			break;
2742383Swnj 
2752383Swnj 		case MBD_RESTARTED:	/* driver restarted op (ecc, e.g.)
2762383Swnj 			/*
2772893Swnj 			 * Note that mhp->mh_active is still on.
2782383Swnj 			 */
2792383Swnj 			break;
2802383Swnj 
2812383Swnj 		default:
2822884Swnj 			panic("mbintr");
2832383Swnj 		}
2842383Swnj 	}
2852383Swnj 	/*
2862383Swnj 	 * Service drives which require attention
2872383Swnj 	 * after non-data-transfer operations.
2882383Swnj 	 */
2892955Swnj 	while (drive = ffs(as)) {
2902955Swnj 		drive--;		/* was 1 origin */
2912955Swnj 		as &= ~(1 << drive);
2922981Swnj 		mi = mhp->mh_mbip[drive];
2936537Ssam 		if (mi == NULL || mi->mi_alive == 0) {
2946537Ssam 			struct mba_device fnd;
2956537Ssam 			struct mba_slave *ms;
2966537Ssam 			struct mba_drv *mbd = &mhp->mh_mba->mba_drv[drive];
2976537Ssam 			int dt = mbd->mbd_dt & 0xffff;
2986537Ssam 
2996537Ssam 			if (dt == 0 || dt == MBDT_MOH)
3006537Ssam 				continue;
3016537Ssam 			fnd.mi_mba = mhp->mh_mba;
3026537Ssam 			fnd.mi_mbanum = mbanum;
3036537Ssam 			fnd.mi_drive = drive;
3046537Ssam 			if ((mi = mbaconfig(&fnd, dt)) == NULL)
3056537Ssam 				continue;
3066537Ssam 			if (dt & MBDT_TAP) {
3076537Ssam 				for (ms = mbsinit; ms->ms_driver; ms++)
3086537Ssam 				if (ms->ms_driver == mi->mi_driver &&
3096537Ssam 				    ms->ms_alive == 0 &&
3106537Ssam 				    (ms->ms_ctlr == mi->mi_unit ||
3116537Ssam 				     ms->ms_ctlr == '?')) {
3126537Ssam 					if ((*ms->ms_driver->md_slave)(mi, ms)) {
3136537Ssam 						printf("%s%d at %s%d slave %d\n",
3146537Ssam 						    ms->ms_driver->md_sname,
3156537Ssam 						    ms->ms_unit,
3166537Ssam 						    mi->mi_driver->md_dname,
3176537Ssam 						    mi->mi_unit,
3186537Ssam 						    ms->ms_slave);
3196537Ssam 						ms->ms_alive = 1;
3206537Ssam 						ms->ms_ctlr = mi->mi_unit;
3216537Ssam 					}
3226537Ssam 				}
3236537Ssam 			}
3246537Ssam 		}
3252955Swnj 		/*
3262981Swnj 		 * If driver has a handler for non-data transfer
3273095Swnj 		 * interrupts, give it a chance to tell us what to do.
3282955Swnj 		 */
3292955Swnj 		if (mi->mi_driver->md_ndint) {
3302955Swnj 			switch ((*mi->mi_driver->md_ndint)(mi)) {
3312383Swnj 
3323095Swnj 			case MBN_DONE:		/* operation completed */
3336537Ssam 				mi->mi_tab.b_active = 0;
3342955Swnj 				mi->mi_tab.b_errcnt = 0;
3352981Swnj 				bp = mi->mi_tab.b_actf;
3362955Swnj 				mi->mi_tab.b_actf = bp->av_forw;
3372955Swnj 				iodone(bp);
3383095Swnj 				/* fall into common code */
3393095Swnj 			case MBN_RETRY:		/* operation continues */
3402955Swnj 				if (mi->mi_tab.b_actf)
3412955Swnj 					mbustart(mi);
3422955Swnj 				break;
3433095Swnj 			case MBN_SKIP:		/* ignore unsol. interrupt */
3442981Swnj 				break;
3452955Swnj 			default:
3462955Swnj 				panic("mbintr");
3472955Swnj 			}
3482955Swnj 		} else
3493095Swnj 			/*
3503095Swnj 			 * If there is no non-data transfer interrupt
3513095Swnj 			 * routine, then we should just
3523095Swnj 			 * restart the unit, leading to a mbstart() soon.
3533095Swnj 			 */
3542955Swnj 			mbustart(mi);
3552955Swnj 	}
3562383Swnj 	/*
3572383Swnj 	 * If there is an operation available and
3582383Swnj 	 * the massbus isn't active, get it going.
3592383Swnj 	 */
3602383Swnj 	if (mhp->mh_actf && !mhp->mh_active)
3612383Swnj 		mbstart(mhp);
3623095Swnj 	/* THHHHATS all folks... */
3632383Swnj }
3642383Swnj 
3652383Swnj /*
3662383Swnj  * Setup the mapping registers for a transfer.
3672383Swnj  */
3682383Swnj mbasetup(mi)
3692981Swnj 	register struct mba_device *mi;
37028Sbill {
3712383Swnj 	register struct mba_regs *mbap = mi->mi_mba;
3722383Swnj 	struct buf *bp = mi->mi_tab.b_actf;
3736381Swnj 	register int npf;
37428Sbill 	unsigned v;
37528Sbill 	register struct pte *pte, *io;
37628Sbill 	int o;
37728Sbill 	struct proc *rp;
37828Sbill 
3791412Sbill 	v = btop(bp->b_un.b_addr);
3801412Sbill 	o = (int)bp->b_un.b_addr & PGOFSET;
3811412Sbill 	npf = btoc(bp->b_bcount + o);
3821412Sbill 	rp = bp->b_flags&B_DIRTY ? &proc[2] : bp->b_proc;
3836381Swnj 	if ((bp->b_flags & B_PHYS) == 0)
3841412Sbill 		pte = &Sysmap[btop(((int)bp->b_un.b_addr)&0x7fffffff)];
3856381Swnj 	else if (bp->b_flags & B_UAREA)
3866381Swnj 		pte = &rp->p_addr[v];
3876381Swnj 	else if (bp->b_flags & B_PAGET)
3886381Swnj 		pte = &Usrptmap[btokmx((struct pte *)bp->b_un.b_addr)];
3896381Swnj 	else
3906381Swnj 		pte = vtopte(rp, v);
3916381Swnj 	io = mbap->mba_map;
3926381Swnj 	while (--npf >= 0) {
3936381Swnj 		if (pte->pg_pfnum == 0)
3946381Swnj 			panic("mba, zero entry");
3956381Swnj 		*(int *)io++ = pte++->pg_pfnum | PG_V;
39628Sbill 	}
3971412Sbill 	*(int *)io++ = 0;
3986381Swnj 	return (o);
39928Sbill }
4002930Swnj 
4016181Sroot #if notdef
4023095Swnj /*
4033095Swnj  * Init and interrupt enable a massbus adapter.
4043095Swnj  */
4052930Swnj mbainit(mp)
4062930Swnj 	struct mba_regs *mp;
4072930Swnj {
4082930Swnj 
4093095Swnj 	mp->mba_cr = MBCR_INIT;
4103095Swnj 	mp->mba_cr = MBCR_IE;
4112930Swnj }
4122704Swnj #endif
4134966Swnj #endif
414