xref: /csrg-svn/sys/vax/mba/mba.c (revision 8470)
1*8470Sroot /*	mba.c	4.29	82/10/10	*/
228Sbill 
32704Swnj #include "mba.h"
42704Swnj #if NMBA > 0
52383Swnj /*
63095Swnj  * Massbus driver, arbitrates a massbus among attached devices.
72383Swnj  */
828Sbill #include "../h/param.h"
92383Swnj #include "../h/systm.h"
102383Swnj #include "../h/dk.h"
1128Sbill #include "../h/buf.h"
1228Sbill #include "../h/conf.h"
1328Sbill #include "../h/dir.h"
1428Sbill #include "../h/user.h"
1528Sbill #include "../h/proc.h"
162383Swnj #include "../h/map.h"
1728Sbill #include "../h/pte.h"
18*8470Sroot #include "../vax/mtpr.h"
1928Sbill #include "../h/vm.h"
2028Sbill 
21*8470Sroot #include "../vaxmba/mbareg.h"
22*8470Sroot #include "../vaxmba/mbavar.h"
23*8470Sroot 
243095Swnj char	mbsr_bits[] = MBSR_BITS;
2528Sbill /*
262383Swnj  * Start activity on a massbus device.
272981Swnj  * We are given the device's mba_device structure and activate
282383Swnj  * the device via the unit start routine.  The unit start
292383Swnj  * routine may indicate that it is finished (e.g. if the operation
302383Swnj  * was a ``sense'' on a tape drive), that the (multi-ported) unit
312383Swnj  * is busy (we will get an interrupt later), that it started the
322383Swnj  * unit (e.g. for a non-data transfer operation), or that it has
332383Swnj  * set up a data transfer operation and we should start the massbus adaptor.
3428Sbill  */
352383Swnj mbustart(mi)
362981Swnj 	register struct mba_device *mi;
372383Swnj {
382383Swnj 	register struct buf *bp;	/* i/o operation at head of queue */
392383Swnj 	register struct mba_hd *mhp;	/* header for mba device is on */
4028Sbill 
412383Swnj loop:
422383Swnj 	/*
432383Swnj 	 * Get the first thing to do off device queue.
442383Swnj 	 */
452383Swnj 	bp = mi->mi_tab.b_actf;
462383Swnj 	if (bp == NULL)
472383Swnj 		return;
482383Swnj 	/*
496537Ssam 	 * Make sure the drive is still there before starting it up.
506537Ssam 	 */
516537Ssam 	if ((mi->mi_drv->mbd_dt & MBDT_TYPE) == 0) {
526537Ssam 		printf("%s%d: nonexistent\n", mi->mi_driver->md_dname,
536537Ssam 		    dkunit(bp));
546537Ssam 		mi->mi_alive = 0;
556537Ssam 		mi->mi_tab.b_actf = bp->av_forw;
566537Ssam 		mi->mi_tab.b_active = 0;
576537Ssam 		mi->mi_tab.b_errcnt = 0;
586537Ssam 		bp->b_flags |= B_ERROR;
596537Ssam 		iodone(bp);
606537Ssam 		goto loop;
616537Ssam 	}
626537Ssam 	/*
632383Swnj 	 * Let the drivers unit start routine have at it
642383Swnj 	 * and then process the request further, per its instructions.
652383Swnj 	 */
662383Swnj 	switch ((*mi->mi_driver->md_ustart)(mi)) {
672383Swnj 
682383Swnj 	case MBU_NEXT:		/* request is complete (e.g. ``sense'') */
692383Swnj 		mi->mi_tab.b_active = 0;
702955Swnj 		mi->mi_tab.b_errcnt = 0;
712383Swnj 		mi->mi_tab.b_actf = bp->av_forw;
722383Swnj 		iodone(bp);
732383Swnj 		goto loop;
742383Swnj 
752383Swnj 	case MBU_DODATA:	/* all ready to do data transfer */
762383Swnj 		/*
772981Swnj 		 * Queue the device mba_device structure on the massbus
782383Swnj 		 * mba_hd structure for processing as soon as the
792383Swnj 		 * data path is available.
802383Swnj 		 */
812383Swnj 		mhp = mi->mi_hd;
822383Swnj 		mi->mi_forw = NULL;
832383Swnj 		if (mhp->mh_actf == NULL)
842383Swnj 			mhp->mh_actf = mi;
852383Swnj 		else
862383Swnj 			mhp->mh_actl->mi_forw = mi;
872383Swnj 		mhp->mh_actl = mi;
882383Swnj 		/*
892383Swnj 		 * If data path is idle, start transfer now.
902383Swnj 		 * In any case the device is ``active'' waiting for the
912383Swnj 		 * data to transfer.
922383Swnj 		 */
932893Swnj 		mi->mi_tab.b_active = 1;
942383Swnj 		if (mhp->mh_active == 0)
952383Swnj 			mbstart(mhp);
962383Swnj 		return;
972383Swnj 
982383Swnj 	case MBU_STARTED:	/* driver started a non-data transfer */
992383Swnj 		/*
1002383Swnj 		 * Mark device busy during non-data transfer
1012383Swnj 		 * and count this as a ``seek'' on the device.
1022383Swnj 		 */
1033182Swnj 		if (mi->mi_dk >= 0) {
1042383Swnj 			dk_seek[mi->mi_dk]++;
1053182Swnj 			dk_busy |= (1 << mi->mi_dk);
1063182Swnj 		}
1072383Swnj 		mi->mi_tab.b_active = 1;
1082383Swnj 		return;
1092383Swnj 
1102383Swnj 	case MBU_BUSY:		/* dual port drive busy */
1112383Swnj 		/*
1122383Swnj 		 * We mark the device structure so that when an
1132383Swnj 		 * interrupt occurs we will know to restart the unit.
1142383Swnj 		 */
1152383Swnj 		mi->mi_tab.b_flags |= B_BUSY;
1162383Swnj 		return;
1172383Swnj 
1182383Swnj 	default:
1192383Swnj 		panic("mbustart");
1202383Swnj 	}
1212403Skre }
1222383Swnj 
1232383Swnj /*
1242383Swnj  * Start an i/o operation on the massbus specified by the argument.
1252383Swnj  * We peel the first operation off its queue and insure that the drive
1262383Swnj  * is present and on-line.  We then use the drivers start routine
1272383Swnj  * (if any) to prepare the drive, setup the massbus map for the transfer
1282383Swnj  * and start the transfer.
1292383Swnj  */
1302383Swnj mbstart(mhp)
1312383Swnj 	register struct mba_hd *mhp;
1322383Swnj {
1332981Swnj 	register struct mba_device *mi;
1342383Swnj 	struct buf *bp;
1352383Swnj 	register struct mba_regs *mbp;
1363708Sroot 	register int com;
1372383Swnj 
1382383Swnj loop:
1392383Swnj 	/*
1402383Swnj 	 * Look for an operation at the front of the queue.
1412383Swnj 	 */
1422955Swnj 	if ((mi = mhp->mh_actf) == NULL) {
1432383Swnj 		return;
1442955Swnj 	}
1452383Swnj 	if ((bp = mi->mi_tab.b_actf) == NULL) {
1462383Swnj 		mhp->mh_actf = mi->mi_forw;
1472383Swnj 		goto loop;
1482383Swnj 	}
1492383Swnj 	/*
1502383Swnj 	 * If this device isn't present and on-line, then
1512383Swnj 	 * we screwed up, and can't really do the operation.
1524757Swnj 	 * Only check for non-tapes because tape drivers check
1534757Swnj 	 * ONLINE themselves and because TU78 registers are
1544757Swnj 	 * different.
1552383Swnj 	 */
1566537Ssam 	if (((com = mi->mi_drv->mbd_dt) & MBDT_TAP) == 0)
1573095Swnj 	if ((mi->mi_drv->mbd_ds & MBDS_DREADY) != MBDS_DREADY) {
1586537Ssam 		if ((com & MBDT_TYPE) == 0) {
1596537Ssam 			mi->mi_alive = 0;
1606537Ssam 			printf("%s%d: nonexistent\n", mi->mi_driver->md_dname,
1616537Ssam 			    dkunit(bp));
1626537Ssam 		} else
1636537Ssam 			printf("%s%d: not ready\n", mi->mi_driver->md_dname,
1646537Ssam 			    dkunit(bp));
1652383Swnj 		mi->mi_tab.b_actf = bp->av_forw;
1662893Swnj 		mi->mi_tab.b_errcnt = 0;
1672893Swnj 		mi->mi_tab.b_active = 0;
1682383Swnj 		bp->b_flags |= B_ERROR;
1692383Swnj 		iodone(bp);
1702383Swnj 		goto loop;
1712383Swnj 	}
1722383Swnj 	/*
1732383Swnj 	 * We can do the operation; mark the massbus active
1742383Swnj 	 * and let the device start routine setup any necessary
1752383Swnj 	 * device state for the transfer (e.g. desired cylinder, etc
1762383Swnj 	 * on disks).
1772383Swnj 	 */
1782383Swnj 	mhp->mh_active = 1;
1793708Sroot 	if (mi->mi_driver->md_start) {
1803708Sroot 		if ((com = (*mi->mi_driver->md_start)(mi)) == 0)
1813708Sroot 			com = (bp->b_flags & B_READ) ?
1823708Sroot 			    MB_RCOM|MB_GO : MB_WCOM|MB_GO;
1833708Sroot 	} else
1843708Sroot 		com = (bp->b_flags & B_READ) ? MB_RCOM|MB_GO : MB_WCOM|MB_GO;
1852383Swnj 
1862383Swnj 	/*
1872383Swnj 	 * Setup the massbus control and map registers and start
1882383Swnj 	 * the transfer.
1892383Swnj 	 */
1902383Swnj 	mbp = mi->mi_mba;
1912383Swnj 	mbp->mba_sr = -1;	/* conservative */
1922383Swnj 	mbp->mba_var = mbasetup(mi);
1932383Swnj 	mbp->mba_bcr = -bp->b_bcount;
1943708Sroot 	mi->mi_drv->mbd_cs1 = com;
1952383Swnj 	if (mi->mi_dk >= 0) {
1962383Swnj 		dk_busy |= 1 << mi->mi_dk;
1972383Swnj 		dk_xfer[mi->mi_dk]++;
1982383Swnj 		dk_wds[mi->mi_dk] += bp->b_bcount >> 6;
1992383Swnj 	}
2002383Swnj }
2012383Swnj 
2022383Swnj /*
2032383Swnj  * Take an interrupt off of massbus mbanum,
2042383Swnj  * and dispatch to drivers as appropriate.
2052383Swnj  */
2062383Swnj mbintr(mbanum)
2072383Swnj 	int mbanum;
2082383Swnj {
2092383Swnj 	register struct mba_hd *mhp = &mba_hd[mbanum];
2102383Swnj 	register struct mba_regs *mbp = mhp->mh_mba;
2112981Swnj 	register struct mba_device *mi;
212420Sbill 	register struct buf *bp;
2132383Swnj 	register int drive;
2142955Swnj 	int mbasr, as;
2156537Ssam 	extern struct mba_device *mbaconfig();
2162383Swnj 
2172383Swnj 	/*
2182383Swnj 	 * Read out the massbus status register
2192383Swnj 	 * and attention status register and clear
2202383Swnj 	 * the bits in same by writing them back.
2212383Swnj 	 */
2222955Swnj 	mbasr = mbp->mba_sr;
2232955Swnj 	mbp->mba_sr = mbasr;
2242884Swnj #if VAX750
2253095Swnj 	if (mbasr&MBSR_CBHUNG) {
2262930Swnj 		printf("mba%d: control bus hung\n", mbanum);
2272930Swnj 		panic("cbhung");
2282930Swnj 	}
2292884Swnj #endif
2302383Swnj 	/* note: the mbd_as register is shared between drives */
2312955Swnj 	as = mbp->mba_drv[0].mbd_as & 0xff;
2322383Swnj 	mbp->mba_drv[0].mbd_as = as;
2332383Swnj 
2342383Swnj 	/*
2352383Swnj 	 * If the mba was active, process the data transfer
2362383Swnj 	 * complete interrupt; otherwise just process units which
2372383Swnj 	 * are now finished.
2382383Swnj 	 */
2392383Swnj 	if (mhp->mh_active) {
2402383Swnj 		/*
2412383Swnj 		 * Clear attention status for drive whose data
2423095Swnj 		 * transfer related operation completed,
2433095Swnj 		 * and give the dtint driver
2442383Swnj 		 * routine a chance to say what is next.
2452383Swnj 		 */
2462383Swnj 		mi = mhp->mh_actf;
2472383Swnj 		as &= ~(1 << mi->mi_drive);
2482383Swnj 		dk_busy &= ~(1 << mi->mi_dk);
2492383Swnj 		bp = mi->mi_tab.b_actf;
2503095Swnj 		switch ((*mi->mi_driver->md_dtint)(mi, mbasr)) {
2512383Swnj 
2522383Swnj 		case MBD_DONE:		/* all done, for better or worse */
2532383Swnj 			/*
2542383Swnj 			 * Flush request from drive queue.
2552383Swnj 			 */
2562383Swnj 			mi->mi_tab.b_errcnt = 0;
2572383Swnj 			mi->mi_tab.b_actf = bp->av_forw;
2582383Swnj 			iodone(bp);
2592383Swnj 			/* fall into... */
2602383Swnj 		case MBD_RETRY:		/* attempt the operation again */
2612383Swnj 			/*
2622383Swnj 			 * Dequeue data transfer from massbus queue;
2632383Swnj 			 * if there is still a i/o request on the device
2642383Swnj 			 * queue then start the next operation on the device.
2652383Swnj 			 * (Common code for DONE and RETRY).
2662383Swnj 			 */
2672383Swnj 			mhp->mh_active = 0;
2682383Swnj 			mi->mi_tab.b_active = 0;
2692383Swnj 			mhp->mh_actf = mi->mi_forw;
2702383Swnj 			if (mi->mi_tab.b_actf)
2712383Swnj 				mbustart(mi);
2722383Swnj 			break;
2732383Swnj 
2742383Swnj 		case MBD_RESTARTED:	/* driver restarted op (ecc, e.g.)
2752383Swnj 			/*
2762893Swnj 			 * Note that mhp->mh_active is still on.
2772383Swnj 			 */
2782383Swnj 			break;
2792383Swnj 
2802383Swnj 		default:
2812884Swnj 			panic("mbintr");
2822383Swnj 		}
2832383Swnj 	}
2842383Swnj 	/*
2852383Swnj 	 * Service drives which require attention
2862383Swnj 	 * after non-data-transfer operations.
2872383Swnj 	 */
2882955Swnj 	while (drive = ffs(as)) {
2892955Swnj 		drive--;		/* was 1 origin */
2902955Swnj 		as &= ~(1 << drive);
2912981Swnj 		mi = mhp->mh_mbip[drive];
2926537Ssam 		if (mi == NULL || mi->mi_alive == 0) {
2936537Ssam 			struct mba_device fnd;
2946537Ssam 			struct mba_slave *ms;
2956537Ssam 			struct mba_drv *mbd = &mhp->mh_mba->mba_drv[drive];
2966537Ssam 			int dt = mbd->mbd_dt & 0xffff;
2976537Ssam 
2986537Ssam 			if (dt == 0 || dt == MBDT_MOH)
2996537Ssam 				continue;
3006537Ssam 			fnd.mi_mba = mhp->mh_mba;
3016537Ssam 			fnd.mi_mbanum = mbanum;
3026537Ssam 			fnd.mi_drive = drive;
3036537Ssam 			if ((mi = mbaconfig(&fnd, dt)) == NULL)
3046537Ssam 				continue;
3056537Ssam 			if (dt & MBDT_TAP) {
3066537Ssam 				for (ms = mbsinit; ms->ms_driver; ms++)
3076537Ssam 				if (ms->ms_driver == mi->mi_driver &&
3086537Ssam 				    ms->ms_alive == 0 &&
3096537Ssam 				    (ms->ms_ctlr == mi->mi_unit ||
3106537Ssam 				     ms->ms_ctlr == '?')) {
3116537Ssam 					if ((*ms->ms_driver->md_slave)(mi, ms)) {
3126537Ssam 						printf("%s%d at %s%d slave %d\n",
3136537Ssam 						    ms->ms_driver->md_sname,
3146537Ssam 						    ms->ms_unit,
3156537Ssam 						    mi->mi_driver->md_dname,
3166537Ssam 						    mi->mi_unit,
3176537Ssam 						    ms->ms_slave);
3186537Ssam 						ms->ms_alive = 1;
3196537Ssam 						ms->ms_ctlr = mi->mi_unit;
3206537Ssam 					}
3216537Ssam 				}
3226537Ssam 			}
3236537Ssam 		}
3242955Swnj 		/*
3252981Swnj 		 * If driver has a handler for non-data transfer
3263095Swnj 		 * interrupts, give it a chance to tell us what to do.
3272955Swnj 		 */
3282955Swnj 		if (mi->mi_driver->md_ndint) {
3292955Swnj 			switch ((*mi->mi_driver->md_ndint)(mi)) {
3302383Swnj 
3313095Swnj 			case MBN_DONE:		/* operation completed */
3326537Ssam 				mi->mi_tab.b_active = 0;
3332955Swnj 				mi->mi_tab.b_errcnt = 0;
3342981Swnj 				bp = mi->mi_tab.b_actf;
3352955Swnj 				mi->mi_tab.b_actf = bp->av_forw;
3362955Swnj 				iodone(bp);
3373095Swnj 				/* fall into common code */
3383095Swnj 			case MBN_RETRY:		/* operation continues */
3392955Swnj 				if (mi->mi_tab.b_actf)
3402955Swnj 					mbustart(mi);
3412955Swnj 				break;
3423095Swnj 			case MBN_SKIP:		/* ignore unsol. interrupt */
3432981Swnj 				break;
3442955Swnj 			default:
3452955Swnj 				panic("mbintr");
3462955Swnj 			}
3472955Swnj 		} else
3483095Swnj 			/*
3493095Swnj 			 * If there is no non-data transfer interrupt
3503095Swnj 			 * routine, then we should just
3513095Swnj 			 * restart the unit, leading to a mbstart() soon.
3523095Swnj 			 */
3532955Swnj 			mbustart(mi);
3542955Swnj 	}
3552383Swnj 	/*
3562383Swnj 	 * If there is an operation available and
3572383Swnj 	 * the massbus isn't active, get it going.
3582383Swnj 	 */
3592383Swnj 	if (mhp->mh_actf && !mhp->mh_active)
3602383Swnj 		mbstart(mhp);
3613095Swnj 	/* THHHHATS all folks... */
3622383Swnj }
3632383Swnj 
3642383Swnj /*
3652383Swnj  * Setup the mapping registers for a transfer.
3662383Swnj  */
3672383Swnj mbasetup(mi)
3682981Swnj 	register struct mba_device *mi;
36928Sbill {
3702383Swnj 	register struct mba_regs *mbap = mi->mi_mba;
3712383Swnj 	struct buf *bp = mi->mi_tab.b_actf;
3726381Swnj 	register int npf;
37328Sbill 	unsigned v;
37428Sbill 	register struct pte *pte, *io;
37528Sbill 	int o;
37628Sbill 	struct proc *rp;
37728Sbill 
3781412Sbill 	v = btop(bp->b_un.b_addr);
3791412Sbill 	o = (int)bp->b_un.b_addr & PGOFSET;
3801412Sbill 	npf = btoc(bp->b_bcount + o);
3811412Sbill 	rp = bp->b_flags&B_DIRTY ? &proc[2] : bp->b_proc;
3826381Swnj 	if ((bp->b_flags & B_PHYS) == 0)
3831412Sbill 		pte = &Sysmap[btop(((int)bp->b_un.b_addr)&0x7fffffff)];
3846381Swnj 	else if (bp->b_flags & B_UAREA)
3856381Swnj 		pte = &rp->p_addr[v];
3866381Swnj 	else if (bp->b_flags & B_PAGET)
3876381Swnj 		pte = &Usrptmap[btokmx((struct pte *)bp->b_un.b_addr)];
3886381Swnj 	else
3896381Swnj 		pte = vtopte(rp, v);
3906381Swnj 	io = mbap->mba_map;
3916381Swnj 	while (--npf >= 0) {
3926381Swnj 		if (pte->pg_pfnum == 0)
3936381Swnj 			panic("mba, zero entry");
3946381Swnj 		*(int *)io++ = pte++->pg_pfnum | PG_V;
39528Sbill 	}
3961412Sbill 	*(int *)io++ = 0;
3976381Swnj 	return (o);
39828Sbill }
3992930Swnj 
4006181Sroot #if notdef
4013095Swnj /*
4023095Swnj  * Init and interrupt enable a massbus adapter.
4033095Swnj  */
4042930Swnj mbainit(mp)
4052930Swnj 	struct mba_regs *mp;
4062930Swnj {
4072930Swnj 
4083095Swnj 	mp->mba_cr = MBCR_INIT;
4093095Swnj 	mp->mba_cr = MBCR_IE;
4102930Swnj }
4112704Swnj #endif
4124966Swnj #endif
413