123312Smckusick /* 2*30535Skarels * Copyright (c) 1982 Regents of the University of California. 323312Smckusick * All rights reserved. The Berkeley software License Agreement 423312Smckusick * specifies the terms and conditions for redistribution. 523312Smckusick * 6*30535Skarels * @(#)mba.c 7.2 (Berkeley) 02/19/87 723312Smckusick */ 828Sbill 92704Swnj #include "mba.h" 102704Swnj #if NMBA > 0 112383Swnj /* 123095Swnj * Massbus driver, arbitrates a massbus among attached devices. 132383Swnj */ 149788Ssam #include "../machine/pte.h" 159788Ssam 1617121Sbloom #include "param.h" 1717121Sbloom #include "systm.h" 18*30535Skarels #include "dkstat.h" 1917121Sbloom #include "buf.h" 2017121Sbloom #include "conf.h" 2117121Sbloom #include "dir.h" 2217121Sbloom #include "user.h" 2317121Sbloom #include "proc.h" 2417121Sbloom #include "map.h" 258470Sroot #include "../vax/mtpr.h" 2617121Sbloom #include "vm.h" 2728Sbill 2817121Sbloom #include "mbareg.h" 2917121Sbloom #include "mbavar.h" 308470Sroot 3124779Skarels /* mbunit should be the same as hpunit, etc.! */ 3224779Skarels #define mbunit(dev) (minor(dev) >> 3) 3324779Skarels 343095Swnj char mbsr_bits[] = MBSR_BITS; 3528Sbill /* 362383Swnj * Start activity on a massbus device. 372981Swnj * We are given the device's mba_device structure and activate 382383Swnj * the device via the unit start routine. The unit start 392383Swnj * routine may indicate that it is finished (e.g. if the operation 402383Swnj * was a ``sense'' on a tape drive), that the (multi-ported) unit 412383Swnj * is busy (we will get an interrupt later), that it started the 422383Swnj * unit (e.g. for a non-data transfer operation), or that it has 432383Swnj * set up a data transfer operation and we should start the massbus adaptor. 4428Sbill */ 452383Swnj mbustart(mi) 462981Swnj register struct mba_device *mi; 472383Swnj { 482383Swnj register struct buf *bp; /* i/o operation at head of queue */ 492383Swnj register struct mba_hd *mhp; /* header for mba device is on */ 5028Sbill 512383Swnj loop: 522383Swnj /* 532383Swnj * Get the first thing to do off device queue. 542383Swnj */ 552383Swnj bp = mi->mi_tab.b_actf; 562383Swnj if (bp == NULL) 572383Swnj return; 582383Swnj /* 592383Swnj * Let the drivers unit start routine have at it 602383Swnj * and then process the request further, per its instructions. 612383Swnj */ 622383Swnj switch ((*mi->mi_driver->md_ustart)(mi)) { 632383Swnj 642383Swnj case MBU_NEXT: /* request is complete (e.g. ``sense'') */ 652383Swnj mi->mi_tab.b_active = 0; 662955Swnj mi->mi_tab.b_errcnt = 0; 672383Swnj mi->mi_tab.b_actf = bp->av_forw; 68*30535Skarels biodone(bp); 692383Swnj goto loop; 702383Swnj 712383Swnj case MBU_DODATA: /* all ready to do data transfer */ 722383Swnj /* 732981Swnj * Queue the device mba_device structure on the massbus 742383Swnj * mba_hd structure for processing as soon as the 752383Swnj * data path is available. 762383Swnj */ 772383Swnj mhp = mi->mi_hd; 782383Swnj mi->mi_forw = NULL; 792383Swnj if (mhp->mh_actf == NULL) 802383Swnj mhp->mh_actf = mi; 812383Swnj else 822383Swnj mhp->mh_actl->mi_forw = mi; 832383Swnj mhp->mh_actl = mi; 842383Swnj /* 852383Swnj * If data path is idle, start transfer now. 862383Swnj * In any case the device is ``active'' waiting for the 872383Swnj * data to transfer. 882383Swnj */ 892893Swnj mi->mi_tab.b_active = 1; 902383Swnj if (mhp->mh_active == 0) 912383Swnj mbstart(mhp); 922383Swnj return; 932383Swnj 942383Swnj case MBU_STARTED: /* driver started a non-data transfer */ 952383Swnj /* 962383Swnj * Mark device busy during non-data transfer 972383Swnj * and count this as a ``seek'' on the device. 982383Swnj */ 993182Swnj if (mi->mi_dk >= 0) { 1002383Swnj dk_seek[mi->mi_dk]++; 1013182Swnj dk_busy |= (1 << mi->mi_dk); 1023182Swnj } 1032383Swnj mi->mi_tab.b_active = 1; 1042383Swnj return; 1052383Swnj 1062383Swnj case MBU_BUSY: /* dual port drive busy */ 1072383Swnj /* 1082383Swnj * We mark the device structure so that when an 1092383Swnj * interrupt occurs we will know to restart the unit. 1102383Swnj */ 1112383Swnj mi->mi_tab.b_flags |= B_BUSY; 1122383Swnj return; 1132383Swnj 1142383Swnj default: 1152383Swnj panic("mbustart"); 1162383Swnj } 1172403Skre } 1182383Swnj 1192383Swnj /* 1202383Swnj * Start an i/o operation on the massbus specified by the argument. 1212383Swnj * We peel the first operation off its queue and insure that the drive 1222383Swnj * is present and on-line. We then use the drivers start routine 1232383Swnj * (if any) to prepare the drive, setup the massbus map for the transfer 1242383Swnj * and start the transfer. 1252383Swnj */ 1262383Swnj mbstart(mhp) 1272383Swnj register struct mba_hd *mhp; 1282383Swnj { 1292981Swnj register struct mba_device *mi; 1302383Swnj struct buf *bp; 1312383Swnj register struct mba_regs *mbp; 1323708Sroot register int com; 133*30535Skarels extern int cold; 1342383Swnj 1352383Swnj loop: 1362383Swnj /* 1372383Swnj * Look for an operation at the front of the queue. 1382383Swnj */ 1392955Swnj if ((mi = mhp->mh_actf) == NULL) { 1402383Swnj return; 1412955Swnj } 1422383Swnj if ((bp = mi->mi_tab.b_actf) == NULL) { 1432383Swnj mhp->mh_actf = mi->mi_forw; 1442383Swnj goto loop; 1452383Swnj } 1462383Swnj /* 1472383Swnj * If this device isn't present and on-line, then 1482383Swnj * we screwed up, and can't really do the operation. 1494757Swnj * Only check for non-tapes because tape drivers check 1504757Swnj * ONLINE themselves and because TU78 registers are 1514757Swnj * different. 152*30535Skarels * No complaints during autoconfiguration, 153*30535Skarels * when we try to read disk labels from anything on line. 1542383Swnj */ 1556537Ssam if (((com = mi->mi_drv->mbd_dt) & MBDT_TAP) == 0) 1563095Swnj if ((mi->mi_drv->mbd_ds & MBDS_DREADY) != MBDS_DREADY) { 157*30535Skarels if (!cold) { 158*30535Skarels if ((com & MBDT_TYPE) == 0) { 1596537Ssam mi->mi_alive = 0; 1606537Ssam printf("%s%d: nonexistent\n", mi->mi_driver->md_dname, 16124779Skarels mbunit(bp->b_dev)); 162*30535Skarels } else 1636537Ssam printf("%s%d: not ready\n", mi->mi_driver->md_dname, 16424779Skarels mbunit(bp->b_dev)); 165*30535Skarels } 1662383Swnj mi->mi_tab.b_actf = bp->av_forw; 1672893Swnj mi->mi_tab.b_errcnt = 0; 1682893Swnj mi->mi_tab.b_active = 0; 1692383Swnj bp->b_flags |= B_ERROR; 170*30535Skarels biodone(bp); 1712383Swnj goto loop; 1722383Swnj } 1732383Swnj /* 1742383Swnj * We can do the operation; mark the massbus active 1752383Swnj * and let the device start routine setup any necessary 1762383Swnj * device state for the transfer (e.g. desired cylinder, etc 1772383Swnj * on disks). 1782383Swnj */ 1792383Swnj mhp->mh_active = 1; 18026040Skarels if (mi->mi_driver->md_start == (int (*)())0 || 18126040Skarels (com = (*mi->mi_driver->md_start)(mi)) == 0) 1823708Sroot com = (bp->b_flags & B_READ) ? MB_RCOM|MB_GO : MB_WCOM|MB_GO; 1832383Swnj 1842383Swnj /* 1852383Swnj * Setup the massbus control and map registers and start 1862383Swnj * the transfer. 1872383Swnj */ 1882383Swnj mbp = mi->mi_mba; 1892383Swnj mbp->mba_sr = -1; /* conservative */ 19017215Smckusick if (bp->b_bcount >= 0) { 19126040Skarels mbp->mba_var = mbasetup(mi) + mi->mi_tab.b_bdone; 19226040Skarels mbp->mba_bcr = -(bp->b_bcount - mi->mi_tab.b_bdone); 19317215Smckusick } else { 19426040Skarels mbp->mba_var = mbasetup(mi) - bp->b_bcount - mi->mi_tab.b_bdone - 1; 19526040Skarels mbp->mba_bcr = bp->b_bcount + mi->mi_tab.b_bdone; 19617215Smckusick } 1973708Sroot mi->mi_drv->mbd_cs1 = com; 1982383Swnj if (mi->mi_dk >= 0) { 1992383Swnj dk_busy |= 1 << mi->mi_dk; 2002383Swnj dk_xfer[mi->mi_dk]++; 20117215Smckusick if (bp->b_bcount >= 0) 20217215Smckusick dk_wds[mi->mi_dk] += bp->b_bcount >> 6; 20317215Smckusick else 20417215Smckusick dk_wds[mi->mi_dk] += -(bp->b_bcount) >> 6; 2052383Swnj } 2062383Swnj } 2072383Swnj 2082383Swnj /* 2092383Swnj * Take an interrupt off of massbus mbanum, 2102383Swnj * and dispatch to drivers as appropriate. 2112383Swnj */ 2122383Swnj mbintr(mbanum) 2132383Swnj int mbanum; 2142383Swnj { 2152383Swnj register struct mba_hd *mhp = &mba_hd[mbanum]; 2162383Swnj register struct mba_regs *mbp = mhp->mh_mba; 2172981Swnj register struct mba_device *mi; 218420Sbill register struct buf *bp; 2192383Swnj register int drive; 2202955Swnj int mbasr, as; 2216537Ssam extern struct mba_device *mbaconfig(); 2222383Swnj 2232383Swnj /* 2242383Swnj * Read out the massbus status register 2252383Swnj * and attention status register and clear 2262383Swnj * the bits in same by writing them back. 2272383Swnj */ 2282955Swnj mbasr = mbp->mba_sr; 2292955Swnj mbp->mba_sr = mbasr; 2302884Swnj #if VAX750 2313095Swnj if (mbasr&MBSR_CBHUNG) { 2322930Swnj printf("mba%d: control bus hung\n", mbanum); 2332930Swnj panic("cbhung"); 2342930Swnj } 2352884Swnj #endif 2362383Swnj /* note: the mbd_as register is shared between drives */ 2372955Swnj as = mbp->mba_drv[0].mbd_as & 0xff; 2382383Swnj mbp->mba_drv[0].mbd_as = as; 2392383Swnj 2402383Swnj /* 2412383Swnj * If the mba was active, process the data transfer 2422383Swnj * complete interrupt; otherwise just process units which 2432383Swnj * are now finished. 2442383Swnj */ 2452383Swnj if (mhp->mh_active) { 2462383Swnj /* 2472383Swnj * Clear attention status for drive whose data 2483095Swnj * transfer related operation completed, 2493095Swnj * and give the dtint driver 2502383Swnj * routine a chance to say what is next. 2512383Swnj */ 2522383Swnj mi = mhp->mh_actf; 2532383Swnj as &= ~(1 << mi->mi_drive); 2542383Swnj dk_busy &= ~(1 << mi->mi_dk); 2552383Swnj bp = mi->mi_tab.b_actf; 2563095Swnj switch ((*mi->mi_driver->md_dtint)(mi, mbasr)) { 2572383Swnj 2582383Swnj case MBD_DONE: /* all done, for better or worse */ 2592383Swnj /* 2602383Swnj * Flush request from drive queue. 2612383Swnj */ 2622383Swnj mi->mi_tab.b_errcnt = 0; 2632383Swnj mi->mi_tab.b_actf = bp->av_forw; 264*30535Skarels biodone(bp); 2652383Swnj /* fall into... */ 2662383Swnj case MBD_RETRY: /* attempt the operation again */ 2672383Swnj /* 2682383Swnj * Dequeue data transfer from massbus queue; 2692383Swnj * if there is still a i/o request on the device 2702383Swnj * queue then start the next operation on the device. 2712383Swnj * (Common code for DONE and RETRY). 2722383Swnj */ 2732383Swnj mhp->mh_active = 0; 2742383Swnj mi->mi_tab.b_active = 0; 2752383Swnj mhp->mh_actf = mi->mi_forw; 2762383Swnj if (mi->mi_tab.b_actf) 2772383Swnj mbustart(mi); 2782383Swnj break; 2792383Swnj 28025199Skarels case MBD_REPOSITION: /* driver started repositioning */ 2812383Swnj /* 28225199Skarels * Drive is repositioning, not doing data transfer. 28325199Skarels * Free controller, but don't have to restart drive. 28425199Skarels */ 28525199Skarels mhp->mh_active = 0; 28625199Skarels mhp->mh_actf = mi->mi_forw; 28725199Skarels break; 28825199Skarels 28925199Skarels case MBD_RESTARTED: /* driver restarted op (ecc, e.g.) */ 29025199Skarels /* 2912893Swnj * Note that mhp->mh_active is still on. 2922383Swnj */ 2932383Swnj break; 2942383Swnj 2952383Swnj default: 2962884Swnj panic("mbintr"); 2972383Swnj } 2982383Swnj } 2992383Swnj /* 3002383Swnj * Service drives which require attention 3012383Swnj * after non-data-transfer operations. 3022383Swnj */ 30326376Skarels while (drive = ffs((long)as)) { 3042955Swnj drive--; /* was 1 origin */ 3052955Swnj as &= ~(1 << drive); 3062981Swnj mi = mhp->mh_mbip[drive]; 3076537Ssam if (mi == NULL || mi->mi_alive == 0) { 3086537Ssam struct mba_device fnd; 3096537Ssam struct mba_drv *mbd = &mhp->mh_mba->mba_drv[drive]; 3106537Ssam int dt = mbd->mbd_dt & 0xffff; 3116537Ssam 3126537Ssam if (dt == 0 || dt == MBDT_MOH) 3136537Ssam continue; 3146537Ssam fnd.mi_mba = mhp->mh_mba; 3156537Ssam fnd.mi_mbanum = mbanum; 3166537Ssam fnd.mi_drive = drive; 3176537Ssam if ((mi = mbaconfig(&fnd, dt)) == NULL) 3186537Ssam continue; 31912507Ssam /* 32012507Ssam * If a tape, poke the slave attach routines. 32112507Ssam * Otherwise, could be a disk which we want 32212507Ssam * to swap on, so make a pass over the swap 32312507Ssam * configuration table in case the size of 32412507Ssam * the swap area must be determined by drive type. 32512507Ssam */ 32612507Ssam if (dt & MBDT_TAP) 32712507Ssam mbaddtape(mi, drive); 32812507Ssam else 32912507Ssam swapconf(); 3306537Ssam } 3312955Swnj /* 3322981Swnj * If driver has a handler for non-data transfer 3333095Swnj * interrupts, give it a chance to tell us what to do. 3342955Swnj */ 3352955Swnj if (mi->mi_driver->md_ndint) { 3362955Swnj switch ((*mi->mi_driver->md_ndint)(mi)) { 3372383Swnj 3383095Swnj case MBN_DONE: /* operation completed */ 3396537Ssam mi->mi_tab.b_active = 0; 3402955Swnj mi->mi_tab.b_errcnt = 0; 3412981Swnj bp = mi->mi_tab.b_actf; 3422955Swnj mi->mi_tab.b_actf = bp->av_forw; 343*30535Skarels biodone(bp); 3443095Swnj /* fall into common code */ 3453095Swnj case MBN_RETRY: /* operation continues */ 3462955Swnj if (mi->mi_tab.b_actf) 3472955Swnj mbustart(mi); 3482955Swnj break; 3493095Swnj case MBN_SKIP: /* ignore unsol. interrupt */ 3502981Swnj break; 3512955Swnj default: 3522955Swnj panic("mbintr"); 3532955Swnj } 3542955Swnj } else 3553095Swnj /* 3563095Swnj * If there is no non-data transfer interrupt 3573095Swnj * routine, then we should just 3583095Swnj * restart the unit, leading to a mbstart() soon. 3593095Swnj */ 3602955Swnj mbustart(mi); 3612955Swnj } 3622383Swnj /* 3632383Swnj * If there is an operation available and 3642383Swnj * the massbus isn't active, get it going. 3652383Swnj */ 3662383Swnj if (mhp->mh_actf && !mhp->mh_active) 3672383Swnj mbstart(mhp); 3683095Swnj /* THHHHATS all folks... */ 3692383Swnj } 3702383Swnj 3712383Swnj /* 37212507Ssam * For autoconfig'ng tape drives on the fly. 37312507Ssam */ 37412507Ssam mbaddtape(mi, drive) 37512507Ssam struct mba_device *mi; 37612507Ssam int drive; 37712507Ssam { 37812507Ssam register struct mba_slave *ms; 37912507Ssam 38012507Ssam for (ms = mbsinit; ms->ms_driver; ms++) 38112507Ssam if (ms->ms_driver == mi->mi_driver && ms->ms_alive == 0 && 38212507Ssam (ms->ms_ctlr == mi->mi_unit || 38312507Ssam ms->ms_ctlr == '?')) { 38412507Ssam if ((*ms->ms_driver->md_slave)(mi, ms, drive)) { 38512507Ssam printf("%s%d at %s%d slave %d\n", 38612507Ssam ms->ms_driver->md_sname, 38712507Ssam ms->ms_unit, 38812507Ssam mi->mi_driver->md_dname, 38912507Ssam mi->mi_unit, 39012507Ssam ms->ms_slave); 39112507Ssam ms->ms_alive = 1; 39212507Ssam ms->ms_ctlr = mi->mi_unit; 39312507Ssam } 39412507Ssam } 39512507Ssam } 39612507Ssam 39712507Ssam /* 3982383Swnj * Setup the mapping registers for a transfer. 3992383Swnj */ 4002383Swnj mbasetup(mi) 4012981Swnj register struct mba_device *mi; 40228Sbill { 4032383Swnj register struct mba_regs *mbap = mi->mi_mba; 4042383Swnj struct buf *bp = mi->mi_tab.b_actf; 4056381Swnj register int npf; 40628Sbill unsigned v; 40728Sbill register struct pte *pte, *io; 40828Sbill int o; 40928Sbill struct proc *rp; 41028Sbill 4111412Sbill v = btop(bp->b_un.b_addr); 41226040Skarels o = (int)(bp->b_un.b_addr) & PGOFSET; 41317215Smckusick if (bp->b_bcount >= 0) 41417215Smckusick npf = btoc(bp->b_bcount + o); 41517215Smckusick else 41617215Smckusick npf = btoc(-(bp->b_bcount) + o); 4171412Sbill rp = bp->b_flags&B_DIRTY ? &proc[2] : bp->b_proc; 4186381Swnj if ((bp->b_flags & B_PHYS) == 0) 4191412Sbill pte = &Sysmap[btop(((int)bp->b_un.b_addr)&0x7fffffff)]; 4206381Swnj else if (bp->b_flags & B_UAREA) 4216381Swnj pte = &rp->p_addr[v]; 4226381Swnj else if (bp->b_flags & B_PAGET) 4236381Swnj pte = &Usrptmap[btokmx((struct pte *)bp->b_un.b_addr)]; 4246381Swnj else 4256381Swnj pte = vtopte(rp, v); 4266381Swnj io = mbap->mba_map; 4276381Swnj while (--npf >= 0) { 4286381Swnj if (pte->pg_pfnum == 0) 4296381Swnj panic("mba, zero entry"); 4306381Swnj *(int *)io++ = pte++->pg_pfnum | PG_V; 43128Sbill } 4321412Sbill *(int *)io++ = 0; 4336381Swnj return (o); 43428Sbill } 4352930Swnj 4366181Sroot #if notdef 4373095Swnj /* 4383095Swnj * Init and interrupt enable a massbus adapter. 4393095Swnj */ 4402930Swnj mbainit(mp) 4412930Swnj struct mba_regs *mp; 4422930Swnj { 4432930Swnj 4443095Swnj mp->mba_cr = MBCR_INIT; 4453095Swnj mp->mba_cr = MBCR_IE; 4462930Swnj } 4472704Swnj #endif 4484966Swnj #endif 449