1*2930Swnj /* mba.c 4.14 81/03/06 */ 228Sbill 32704Swnj #include "mba.h" 42704Swnj #if NMBA > 0 52383Swnj /* 62884Swnj * Massbus driver; arbitrates massbus using device 72884Swnj * driver routines. This module provides common functions. 82383Swnj */ 928Sbill #include "../h/param.h" 102383Swnj #include "../h/systm.h" 112383Swnj #include "../h/dk.h" 1228Sbill #include "../h/buf.h" 1328Sbill #include "../h/conf.h" 1428Sbill #include "../h/dir.h" 1528Sbill #include "../h/user.h" 1628Sbill #include "../h/proc.h" 172383Swnj #include "../h/map.h" 1828Sbill #include "../h/pte.h" 1928Sbill #include "../h/mba.h" 2028Sbill #include "../h/mtpr.h" 2128Sbill #include "../h/vm.h" 2228Sbill 232673Swnj char mbasr_bits[] = MBASR_BITS; 2428Sbill /* 252383Swnj * Start activity on a massbus device. 262383Swnj * We are given the device's mba_info structure and activate 272383Swnj * the device via the unit start routine. The unit start 282383Swnj * routine may indicate that it is finished (e.g. if the operation 292383Swnj * was a ``sense'' on a tape drive), that the (multi-ported) unit 302383Swnj * is busy (we will get an interrupt later), that it started the 312383Swnj * unit (e.g. for a non-data transfer operation), or that it has 322383Swnj * set up a data transfer operation and we should start the massbus adaptor. 3328Sbill */ 342383Swnj mbustart(mi) 352383Swnj register struct mba_info *mi; 362383Swnj { 372383Swnj register struct mba_drv *mdp; /* drive registers */ 382383Swnj register struct buf *bp; /* i/o operation at head of queue */ 392383Swnj register struct mba_hd *mhp; /* header for mba device is on */ 4028Sbill 412383Swnj loop: 422383Swnj /* 432383Swnj * Get the first thing to do off device queue. 442383Swnj */ 452383Swnj bp = mi->mi_tab.b_actf; 462383Swnj if (bp == NULL) 472383Swnj return; 482383Swnj mdp = mi->mi_drv; 492383Swnj /* 502383Swnj * Let the drivers unit start routine have at it 512383Swnj * and then process the request further, per its instructions. 522383Swnj */ 532383Swnj switch ((*mi->mi_driver->md_ustart)(mi)) { 542383Swnj 552383Swnj case MBU_NEXT: /* request is complete (e.g. ``sense'') */ 562383Swnj mi->mi_tab.b_active = 0; 572383Swnj mi->mi_tab.b_actf = bp->av_forw; 582383Swnj iodone(bp); 592383Swnj goto loop; 602383Swnj 612383Swnj case MBU_DODATA: /* all ready to do data transfer */ 622383Swnj /* 632383Swnj * Queue the device mba_info structure on the massbus 642383Swnj * mba_hd structure for processing as soon as the 652383Swnj * data path is available. 662383Swnj */ 672383Swnj mhp = mi->mi_hd; 682383Swnj mi->mi_forw = NULL; 692383Swnj if (mhp->mh_actf == NULL) 702383Swnj mhp->mh_actf = mi; 712383Swnj else 722383Swnj mhp->mh_actl->mi_forw = mi; 732383Swnj mhp->mh_actl = mi; 742383Swnj /* 752383Swnj * If data path is idle, start transfer now. 762383Swnj * In any case the device is ``active'' waiting for the 772383Swnj * data to transfer. 782383Swnj */ 792893Swnj mi->mi_tab.b_active = 1; 802383Swnj if (mhp->mh_active == 0) 812383Swnj mbstart(mhp); 822383Swnj return; 832383Swnj 842383Swnj case MBU_STARTED: /* driver started a non-data transfer */ 852383Swnj /* 862383Swnj * Mark device busy during non-data transfer 872383Swnj * and count this as a ``seek'' on the device. 882383Swnj */ 892383Swnj if (mi->mi_dk >= 0) 902383Swnj dk_seek[mi->mi_dk]++; 912383Swnj mi->mi_tab.b_active = 1; 922383Swnj return; 932383Swnj 942383Swnj case MBU_BUSY: /* dual port drive busy */ 952383Swnj /* 962383Swnj * We mark the device structure so that when an 972383Swnj * interrupt occurs we will know to restart the unit. 982383Swnj */ 992383Swnj mi->mi_tab.b_flags |= B_BUSY; 1002383Swnj return; 1012383Swnj 1022383Swnj default: 1032383Swnj panic("mbustart"); 1042383Swnj } 1052403Skre } 1062383Swnj 1072383Swnj /* 1082383Swnj * Start an i/o operation on the massbus specified by the argument. 1092383Swnj * We peel the first operation off its queue and insure that the drive 1102383Swnj * is present and on-line. We then use the drivers start routine 1112383Swnj * (if any) to prepare the drive, setup the massbus map for the transfer 1122383Swnj * and start the transfer. 1132383Swnj */ 1142383Swnj mbstart(mhp) 1152383Swnj register struct mba_hd *mhp; 1162383Swnj { 1172383Swnj register struct mba_info *mi; 1182383Swnj struct buf *bp; 1192383Swnj register struct mba_regs *mbp; 1202383Swnj 1212383Swnj loop: 1222383Swnj /* 1232383Swnj * Look for an operation at the front of the queue. 1242383Swnj */ 1252884Swnj if ((mi = mhp->mh_actf) == NULL) 1262383Swnj return; 1272383Swnj if ((bp = mi->mi_tab.b_actf) == NULL) { 1282383Swnj mhp->mh_actf = mi->mi_forw; 1292383Swnj goto loop; 1302383Swnj } 1312383Swnj /* 1322383Swnj * If this device isn't present and on-line, then 1332383Swnj * we screwed up, and can't really do the operation. 1342383Swnj */ 1352383Swnj if ((mi->mi_drv->mbd_ds & (MBD_DPR|MBD_MOL)) != (MBD_DPR|MBD_MOL)) { 136*2930Swnj printf("%c%d: not ready\n", mi->mi_name, dkunit(bp)); 1372383Swnj mi->mi_tab.b_actf = bp->av_forw; 1382893Swnj mi->mi_tab.b_errcnt = 0; 1392893Swnj mi->mi_tab.b_active = 0; 1402383Swnj bp->b_flags |= B_ERROR; 1412383Swnj iodone(bp); 1422383Swnj goto loop; 1432383Swnj } 1442383Swnj /* 1452383Swnj * We can do the operation; mark the massbus active 1462383Swnj * and let the device start routine setup any necessary 1472383Swnj * device state for the transfer (e.g. desired cylinder, etc 1482383Swnj * on disks). 1492383Swnj */ 1502383Swnj mhp->mh_active = 1; 1512884Swnj if (mi->mi_driver->md_start) 1522383Swnj (*mi->mi_driver->md_start)(mi); 1532383Swnj 1542383Swnj /* 1552383Swnj * Setup the massbus control and map registers and start 1562383Swnj * the transfer. 1572383Swnj */ 1582383Swnj mbp = mi->mi_mba; 1592383Swnj mbp->mba_sr = -1; /* conservative */ 1602383Swnj mbp->mba_var = mbasetup(mi); 1612383Swnj mbp->mba_bcr = -bp->b_bcount; 1622383Swnj mi->mi_drv->mbd_cs1 = 1632383Swnj (bp->b_flags & B_READ) ? MBD_RCOM|MBD_GO : MBD_WCOM|MBD_GO; 1642383Swnj if (mi->mi_dk >= 0) { 1652383Swnj dk_busy |= 1 << mi->mi_dk; 1662383Swnj dk_xfer[mi->mi_dk]++; 1672383Swnj dk_wds[mi->mi_dk] += bp->b_bcount >> 6; 1682383Swnj } 1692383Swnj } 1702383Swnj 1712383Swnj /* 1722383Swnj * Take an interrupt off of massbus mbanum, 1732383Swnj * and dispatch to drivers as appropriate. 1742383Swnj */ 1752383Swnj mbintr(mbanum) 1762383Swnj int mbanum; 1772383Swnj { 1782383Swnj register struct mba_hd *mhp = &mba_hd[mbanum]; 1792383Swnj register struct mba_regs *mbp = mhp->mh_mba; 1802383Swnj register struct mba_info *mi; 181420Sbill register struct buf *bp; 1822383Swnj register int drive; 1832383Swnj int mbastat, as; 1842383Swnj 1852383Swnj /* 1862383Swnj * Read out the massbus status register 1872383Swnj * and attention status register and clear 1882383Swnj * the bits in same by writing them back. 1892383Swnj */ 1902383Swnj mbastat = mbp->mba_sr; 1912383Swnj mbp->mba_sr = mbastat; 1922884Swnj #if VAX750 193*2930Swnj if (mbastat&MBS_CBHUNG) { 194*2930Swnj printf("mba%d: control bus hung\n", mbanum); 195*2930Swnj panic("cbhung"); 196*2930Swnj } 1972884Swnj #endif 1982383Swnj /* note: the mbd_as register is shared between drives */ 1992383Swnj as = mbp->mba_drv[0].mbd_as; 2002383Swnj mbp->mba_drv[0].mbd_as = as; 2012383Swnj 2022383Swnj /* 2032383Swnj * Disable interrupts from the massbus adapter 2042383Swnj * for the duration of the operation of the massbus 2052383Swnj * driver, so that spurious interrupts won't be generated. 2062383Swnj */ 2072383Swnj mbp->mba_cr &= ~MBAIE; 2082383Swnj 2092383Swnj /* 2102383Swnj * If the mba was active, process the data transfer 2112383Swnj * complete interrupt; otherwise just process units which 2122383Swnj * are now finished. 2132383Swnj */ 2142383Swnj if (mhp->mh_active) { 2152383Swnj /* 2162383Swnj * Clear attention status for drive whose data 2172383Swnj * transfer completed, and give the dtint driver 2182383Swnj * routine a chance to say what is next. 2192383Swnj */ 2202383Swnj mi = mhp->mh_actf; 2212383Swnj as &= ~(1 << mi->mi_drive); 2222383Swnj dk_busy &= ~(1 << mi->mi_dk); 2232383Swnj bp = mi->mi_tab.b_actf; 2242383Swnj switch((*mi->mi_driver->md_dtint)(mi, mbastat)) { 2252383Swnj 2262383Swnj case MBD_DONE: /* all done, for better or worse */ 2272383Swnj /* 2282383Swnj * Flush request from drive queue. 2292383Swnj */ 2302383Swnj mi->mi_tab.b_errcnt = 0; 2312383Swnj mi->mi_tab.b_actf = bp->av_forw; 2322383Swnj iodone(bp); 2332383Swnj /* fall into... */ 2342383Swnj case MBD_RETRY: /* attempt the operation again */ 2352383Swnj /* 2362383Swnj * Dequeue data transfer from massbus queue; 2372383Swnj * if there is still a i/o request on the device 2382383Swnj * queue then start the next operation on the device. 2392383Swnj * (Common code for DONE and RETRY). 2402383Swnj */ 2412383Swnj mhp->mh_active = 0; 2422383Swnj mi->mi_tab.b_active = 0; 2432383Swnj mhp->mh_actf = mi->mi_forw; 2442383Swnj if (mi->mi_tab.b_actf) 2452383Swnj mbustart(mi); 2462383Swnj break; 2472383Swnj 2482383Swnj case MBD_RESTARTED: /* driver restarted op (ecc, e.g.) 2492383Swnj /* 2502893Swnj * Note that mhp->mh_active is still on. 2512383Swnj */ 2522383Swnj break; 2532383Swnj 2542383Swnj default: 2552884Swnj panic("mbintr"); 2562383Swnj } 2572383Swnj } 2582383Swnj doattn: 2592383Swnj /* 2602383Swnj * Service drives which require attention 2612383Swnj * after non-data-transfer operations. 2622383Swnj */ 2632383Swnj for (drive = 0; as && drive < 8; drive++) 2642383Swnj if (as & (1 << drive)) { 2652383Swnj as &= ~(1 << drive); 2662383Swnj /* 2672383Swnj * Consistency check the implied attention, 2682383Swnj * to make sure the drive should have interrupted. 2692383Swnj */ 2702383Swnj mi = mhp->mh_mbip[drive]; 2712884Swnj if (mi == NULL || mi->mi_tab.b_active == 0 && 2722884Swnj (mi->mi_tab.b_flags&B_BUSY) == 0 || 2732884Swnj (bp = mi->mi_tab.b_actf) == NULL) 2742884Swnj continue; /* unsolicited */ 2752383Swnj /* 2762383Swnj * If this interrupt wasn't a notification that 2772383Swnj * a dual ported drive is available, and if the 2782383Swnj * driver has a handler for non-data transfer 2792383Swnj * interrupts, give it a chance to tell us that 2802383Swnj * the operation needs to be redone 2812383Swnj */ 2822893Swnj if (mi->mi_driver->md_ndint && 2832893Swnj (mi->mi_tab.b_flags&B_BUSY) == 0) { 2842383Swnj mi->mi_tab.b_active = 0; 2852383Swnj switch((*mi->mi_driver->md_ndint)(mi)) { 2862383Swnj 2872383Swnj case MBN_DONE: 2882383Swnj /* 2892383Swnj * Non-data transfer interrupt 2902383Swnj * completed i/o request's processing. 2912383Swnj */ 2922383Swnj mi->mi_tab.b_errcnt = 0; 2932383Swnj mi->mi_tab.b_actf = bp->av_forw; 2942383Swnj iodone(bp); 2952383Swnj /* fall into... */ 2962383Swnj case MBN_RETRY: 2972383Swnj if (mi->mi_tab.b_actf) 2982383Swnj mbustart(mi); 2992383Swnj break; 3002383Swnj 3012383Swnj default: 3022884Swnj panic("mbintr"); 3032383Swnj } 3042383Swnj } else 3052383Swnj mbustart(mi); 3062383Swnj } 3072383Swnj /* 3082383Swnj * If there is an operation available and 3092383Swnj * the massbus isn't active, get it going. 3102383Swnj */ 3112383Swnj if (mhp->mh_actf && !mhp->mh_active) 3122383Swnj mbstart(mhp); 3132383Swnj mbp->mba_cr |= MBAIE; 3142383Swnj } 3152383Swnj 3162383Swnj /* 3172383Swnj * Setup the mapping registers for a transfer. 3182383Swnj */ 3192383Swnj mbasetup(mi) 3202383Swnj register struct mba_info *mi; 32128Sbill { 3222383Swnj register struct mba_regs *mbap = mi->mi_mba; 3232383Swnj struct buf *bp = mi->mi_tab.b_actf; 32428Sbill register int i; 32528Sbill int npf; 32628Sbill unsigned v; 32728Sbill register struct pte *pte, *io; 32828Sbill int o; 32928Sbill int vaddr; 33028Sbill struct proc *rp; 33128Sbill 3321412Sbill io = mbap->mba_map; 3331412Sbill v = btop(bp->b_un.b_addr); 3341412Sbill o = (int)bp->b_un.b_addr & PGOFSET; 3351412Sbill npf = btoc(bp->b_bcount + o); 3361412Sbill rp = bp->b_flags&B_DIRTY ? &proc[2] : bp->b_proc; 3371412Sbill vaddr = o; 3381412Sbill if (bp->b_flags & B_UAREA) { 3391412Sbill for (i = 0; i < UPAGES; i++) { 3401412Sbill if (rp->p_addr[i].pg_pfnum == 0) 3411412Sbill panic("mba: zero upage"); 3421412Sbill *(int *)io++ = rp->p_addr[i].pg_pfnum | PG_V; 34328Sbill } 3441412Sbill } else if ((bp->b_flags & B_PHYS) == 0) { 3451412Sbill pte = &Sysmap[btop(((int)bp->b_un.b_addr)&0x7fffffff)]; 3461412Sbill while (--npf >= 0) 3471412Sbill *(int *)io++ = pte++->pg_pfnum | PG_V; 3481412Sbill } else { 3491412Sbill if (bp->b_flags & B_PAGET) 3501412Sbill pte = &Usrptmap[btokmx((struct pte *)bp->b_un.b_addr)]; 3511412Sbill else 3521412Sbill pte = vtopte(rp, v); 3531412Sbill while (--npf >= 0) { 3541412Sbill if (pte->pg_pfnum == 0) 3551412Sbill panic("mba, zero entry"); 3561412Sbill *(int *)io++ = pte++->pg_pfnum | PG_V; 3571412Sbill } 35828Sbill } 3591412Sbill *(int *)io++ = 0; 3602383Swnj return (vaddr); 36128Sbill } 362*2930Swnj 363*2930Swnj mbainit(mp) 364*2930Swnj struct mba_regs *mp; 365*2930Swnj { 366*2930Swnj 367*2930Swnj mp->mba_cr = MBAINIT; 368*2930Swnj mp->mba_cr = MBAIE; 369*2930Swnj } 3702704Swnj #endif 371