1*2704Swnj /* mba.c 4.10 81/02/26 */ 228Sbill 3*2704Swnj #include "mba.h" 4*2704Swnj #if NMBA > 0 52383Swnj /* 62383Swnj * Massbus driver; arbitrates massbusses through device driver routines 72383Swnj * and provides common functions. 82383Swnj */ 92383Swnj int mbadebug = 0; 102383Swnj #define dprintf if (mbadebug) printf 112383Swnj 1228Sbill #include "../h/param.h" 132383Swnj #include "../h/systm.h" 142383Swnj #include "../h/dk.h" 1528Sbill #include "../h/buf.h" 1628Sbill #include "../h/conf.h" 1728Sbill #include "../h/dir.h" 1828Sbill #include "../h/user.h" 1928Sbill #include "../h/proc.h" 202383Swnj #include "../h/map.h" 2128Sbill #include "../h/pte.h" 2228Sbill #include "../h/mba.h" 2328Sbill #include "../h/mtpr.h" 2428Sbill #include "../h/vm.h" 2528Sbill 262673Swnj char mbasr_bits[] = MBASR_BITS; 2728Sbill /* 282383Swnj * Start activity on a massbus device. 292383Swnj * We are given the device's mba_info structure and activate 302383Swnj * the device via the unit start routine. The unit start 312383Swnj * routine may indicate that it is finished (e.g. if the operation 322383Swnj * was a ``sense'' on a tape drive), that the (multi-ported) unit 332383Swnj * is busy (we will get an interrupt later), that it started the 342383Swnj * unit (e.g. for a non-data transfer operation), or that it has 352383Swnj * set up a data transfer operation and we should start the massbus adaptor. 3628Sbill */ 372383Swnj mbustart(mi) 382383Swnj register struct mba_info *mi; 392383Swnj { 402383Swnj register struct mba_drv *mdp; /* drive registers */ 412383Swnj register struct buf *bp; /* i/o operation at head of queue */ 422383Swnj register struct mba_hd *mhp; /* header for mba device is on */ 4328Sbill 442383Swnj dprintf("enter mbustart\n"); 452383Swnj loop: 462383Swnj /* 472383Swnj * Get the first thing to do off device queue. 482383Swnj */ 492383Swnj bp = mi->mi_tab.b_actf; 502383Swnj if (bp == NULL) 512383Swnj return; 522383Swnj mdp = mi->mi_drv; 532383Swnj /* 542383Swnj * Since we clear attentions on the drive when we are 552383Swnj * finished processing it, the fact that an attention 562383Swnj * status shows indicated confusion in the hardware or our logic. 572383Swnj */ 582383Swnj if (mdp->mbd_as & (1 << mi->mi_drive)) { 592383Swnj printf("mbustart: ata on for %d\n", mi->mi_drive); 602383Swnj mdp->mbd_as = 1 << mi->mi_drive; 612383Swnj } 622383Swnj /* 632383Swnj * Let the drivers unit start routine have at it 642383Swnj * and then process the request further, per its instructions. 652383Swnj */ 662383Swnj switch ((*mi->mi_driver->md_ustart)(mi)) { 672383Swnj 682383Swnj case MBU_NEXT: /* request is complete (e.g. ``sense'') */ 692383Swnj dprintf("mbu_next\n"); 702383Swnj mi->mi_tab.b_active = 0; 712383Swnj mi->mi_tab.b_actf = bp->av_forw; 722383Swnj iodone(bp); 732383Swnj goto loop; 742383Swnj 752383Swnj case MBU_DODATA: /* all ready to do data transfer */ 762383Swnj dprintf("mbu_dodata\n"); 772383Swnj /* 782383Swnj * Queue the device mba_info structure on the massbus 792383Swnj * mba_hd structure for processing as soon as the 802383Swnj * data path is available. 812383Swnj */ 822383Swnj mhp = mi->mi_hd; 832383Swnj mi->mi_forw = NULL; 842383Swnj if (mhp->mh_actf == NULL) 852383Swnj mhp->mh_actf = mi; 862383Swnj else 872383Swnj mhp->mh_actl->mi_forw = mi; 882383Swnj mhp->mh_actl = mi; 892383Swnj /* 902383Swnj * If data path is idle, start transfer now. 912383Swnj * In any case the device is ``active'' waiting for the 922383Swnj * data to transfer. 932383Swnj */ 942383Swnj if (mhp->mh_active == 0) 952383Swnj mbstart(mhp); 962383Swnj mi->mi_tab.b_active = 1; 972383Swnj return; 982383Swnj 992383Swnj case MBU_STARTED: /* driver started a non-data transfer */ 1002383Swnj dprintf("mbu_started\n"); 1012383Swnj /* 1022383Swnj * Mark device busy during non-data transfer 1032383Swnj * and count this as a ``seek'' on the device. 1042383Swnj */ 1052383Swnj if (mi->mi_dk >= 0) 1062383Swnj dk_seek[mi->mi_dk]++; 1072383Swnj mi->mi_tab.b_active = 1; 1082383Swnj return; 1092383Swnj 1102383Swnj case MBU_BUSY: /* dual port drive busy */ 1112383Swnj dprintf("mbu_busy\n"); 1122383Swnj /* 1132383Swnj * We mark the device structure so that when an 1142383Swnj * interrupt occurs we will know to restart the unit. 1152383Swnj */ 1162383Swnj mi->mi_tab.b_flags |= B_BUSY; 1172383Swnj return; 1182383Swnj 1192383Swnj default: 1202383Swnj panic("mbustart"); 1212383Swnj } 1222403Skre } 1232383Swnj 1242383Swnj /* 1252383Swnj * Start an i/o operation on the massbus specified by the argument. 1262383Swnj * We peel the first operation off its queue and insure that the drive 1272383Swnj * is present and on-line. We then use the drivers start routine 1282383Swnj * (if any) to prepare the drive, setup the massbus map for the transfer 1292383Swnj * and start the transfer. 1302383Swnj */ 1312383Swnj mbstart(mhp) 1322383Swnj register struct mba_hd *mhp; 1332383Swnj { 1342383Swnj register struct mba_info *mi; 1352383Swnj struct buf *bp; 1362383Swnj register struct mba_regs *mbp; 1372383Swnj 1382383Swnj dprintf("mbstart\n"); 1392383Swnj loop: 1402383Swnj /* 1412383Swnj * Look for an operation at the front of the queue. 1422383Swnj */ 1432383Swnj if ((mi = mhp->mh_actf) == NULL) { 1442383Swnj dprintf("nothing to do\n"); 1452383Swnj return; 1462383Swnj } 1472383Swnj if ((bp = mi->mi_tab.b_actf) == NULL) { 1482383Swnj dprintf("nothing on actf\n"); 1492383Swnj mhp->mh_actf = mi->mi_forw; 1502383Swnj goto loop; 1512383Swnj } 1522383Swnj /* 1532383Swnj * If this device isn't present and on-line, then 1542383Swnj * we screwed up, and can't really do the operation. 1552383Swnj */ 1562383Swnj if ((mi->mi_drv->mbd_ds & (MBD_DPR|MBD_MOL)) != (MBD_DPR|MBD_MOL)) { 1572383Swnj dprintf("not on line ds %x\n", mi->mi_drv->mbd_ds); 1582383Swnj mi->mi_tab.b_actf = bp->av_forw; 1592383Swnj bp->b_flags |= B_ERROR; 1602383Swnj iodone(bp); 1612383Swnj goto loop; 1622383Swnj } 1632383Swnj /* 1642383Swnj * We can do the operation; mark the massbus active 1652383Swnj * and let the device start routine setup any necessary 1662383Swnj * device state for the transfer (e.g. desired cylinder, etc 1672383Swnj * on disks). 1682383Swnj */ 1692383Swnj mhp->mh_active = 1; 1702383Swnj if (mi->mi_driver->md_start) { 1712383Swnj dprintf("md_start\n"); 1722383Swnj (*mi->mi_driver->md_start)(mi); 1732383Swnj } 1742383Swnj 1752383Swnj /* 1762383Swnj * Setup the massbus control and map registers and start 1772383Swnj * the transfer. 1782383Swnj */ 1792383Swnj dprintf("start mba\n"); 1802383Swnj mbp = mi->mi_mba; 1812383Swnj mbp->mba_sr = -1; /* conservative */ 1822383Swnj mbp->mba_var = mbasetup(mi); 1832383Swnj mbp->mba_bcr = -bp->b_bcount; 1842383Swnj mi->mi_drv->mbd_cs1 = 1852383Swnj (bp->b_flags & B_READ) ? MBD_RCOM|MBD_GO : MBD_WCOM|MBD_GO; 1862383Swnj if (mi->mi_dk >= 0) { 1872383Swnj dk_busy |= 1 << mi->mi_dk; 1882383Swnj dk_xfer[mi->mi_dk]++; 1892383Swnj dk_wds[mi->mi_dk] += bp->b_bcount >> 6; 1902383Swnj } 1912383Swnj } 1922383Swnj 1932383Swnj /* 1942383Swnj * Take an interrupt off of massbus mbanum, 1952383Swnj * and dispatch to drivers as appropriate. 1962383Swnj */ 1972383Swnj mbintr(mbanum) 1982383Swnj int mbanum; 1992383Swnj { 2002383Swnj register struct mba_hd *mhp = &mba_hd[mbanum]; 2012383Swnj register struct mba_regs *mbp = mhp->mh_mba; 2022383Swnj register struct mba_info *mi; 203420Sbill register struct buf *bp; 2042383Swnj register int drive; 2052383Swnj int mbastat, as; 2062383Swnj 2072383Swnj /* 2082383Swnj * Read out the massbus status register 2092383Swnj * and attention status register and clear 2102383Swnj * the bits in same by writing them back. 2112383Swnj */ 2122383Swnj mbastat = mbp->mba_sr; 2132383Swnj mbp->mba_sr = mbastat; 2142383Swnj /* note: the mbd_as register is shared between drives */ 2152383Swnj as = mbp->mba_drv[0].mbd_as; 2162383Swnj mbp->mba_drv[0].mbd_as = as; 2172383Swnj dprintf("mbintr mbastat %x as %x\n", mbastat, as); 2182383Swnj 2192383Swnj /* 2202383Swnj * Disable interrupts from the massbus adapter 2212383Swnj * for the duration of the operation of the massbus 2222383Swnj * driver, so that spurious interrupts won't be generated. 2232383Swnj */ 2242383Swnj mbp->mba_cr &= ~MBAIE; 2252383Swnj 2262383Swnj /* 2272383Swnj * If the mba was active, process the data transfer 2282383Swnj * complete interrupt; otherwise just process units which 2292383Swnj * are now finished. 2302383Swnj */ 2312383Swnj if (mhp->mh_active) { 2322383Swnj if ((mbastat & MBS_DTCMP) == 0) { 2332383Swnj printf("mbintr(%d),b_active,no DTCMP!\n", mbanum); 2342383Swnj goto doattn; 2352403Skre } 2362383Swnj /* 2372383Swnj * Clear attention status for drive whose data 2382383Swnj * transfer completed, and give the dtint driver 2392383Swnj * routine a chance to say what is next. 2402383Swnj */ 2412383Swnj mi = mhp->mh_actf; 2422383Swnj as &= ~(1 << mi->mi_drive); 2432383Swnj dk_busy &= ~(1 << mi->mi_dk); 2442383Swnj bp = mi->mi_tab.b_actf; 2452383Swnj switch((*mi->mi_driver->md_dtint)(mi, mbastat)) { 2462383Swnj 2472383Swnj case MBD_DONE: /* all done, for better or worse */ 2482383Swnj dprintf("mbd_done\n"); 2492383Swnj /* 2502383Swnj * Flush request from drive queue. 2512383Swnj */ 2522383Swnj mi->mi_tab.b_errcnt = 0; 2532383Swnj mi->mi_tab.b_actf = bp->av_forw; 2542383Swnj iodone(bp); 2552383Swnj /* fall into... */ 2562383Swnj case MBD_RETRY: /* attempt the operation again */ 2572383Swnj dprintf("mbd_retry\n"); 2582383Swnj /* 2592383Swnj * Dequeue data transfer from massbus queue; 2602383Swnj * if there is still a i/o request on the device 2612383Swnj * queue then start the next operation on the device. 2622383Swnj * (Common code for DONE and RETRY). 2632383Swnj */ 2642383Swnj mhp->mh_active = 0; 2652383Swnj mi->mi_tab.b_active = 0; 2662383Swnj mhp->mh_actf = mi->mi_forw; 2672383Swnj if (mi->mi_tab.b_actf) 2682383Swnj mbustart(mi); 2692383Swnj break; 2702383Swnj 2712383Swnj case MBD_RESTARTED: /* driver restarted op (ecc, e.g.) 2722383Swnj dprintf("mbd_restarted\n"); 2732383Swnj /* 2742383Swnj * Note that mp->b_active is still on. 2752383Swnj */ 2762383Swnj break; 2772383Swnj 2782383Swnj default: 2792383Swnj panic("mbaintr"); 2802383Swnj } 2812383Swnj } else { 2822383Swnj dprintf("!dtcmp\n"); 2832383Swnj if (mbastat & MBS_DTCMP) 2842383Swnj printf("mbaintr,DTCMP,!b_active\n"); 2852383Swnj } 2862383Swnj doattn: 2872383Swnj /* 2882383Swnj * Service drives which require attention 2892383Swnj * after non-data-transfer operations. 2902383Swnj */ 2912383Swnj for (drive = 0; as && drive < 8; drive++) 2922383Swnj if (as & (1 << drive)) { 2932383Swnj dprintf("service as %d\n", drive); 2942383Swnj as &= ~(1 << drive); 2952383Swnj /* 2962383Swnj * Consistency check the implied attention, 2972383Swnj * to make sure the drive should have interrupted. 2982383Swnj */ 2992383Swnj mi = mhp->mh_mbip[drive]; 3002383Swnj if (mi == NULL) 3012383Swnj goto random; /* no such drive */ 3022383Swnj if (mi->mi_tab.b_active == 0 && 3032383Swnj (mi->mi_tab.b_flags&B_BUSY) == 0) 3042383Swnj goto random; /* not active */ 3052383Swnj if ((bp = mi->mi_tab.b_actf) == NULL) { 3062383Swnj /* nothing doing */ 3072383Swnj random: 3082383Swnj printf("random mbaintr %d %d\n",mbanum,drive); 3092383Swnj continue; 3102383Swnj } 3112383Swnj /* 3122383Swnj * If this interrupt wasn't a notification that 3132383Swnj * a dual ported drive is available, and if the 3142383Swnj * driver has a handler for non-data transfer 3152383Swnj * interrupts, give it a chance to tell us that 3162383Swnj * the operation needs to be redone 3172383Swnj */ 3182383Swnj if ((mi->mi_tab.b_flags&B_BUSY) == 0 && 3192383Swnj mi->mi_driver->md_ndint) { 3202383Swnj mi->mi_tab.b_active = 0; 3212383Swnj switch((*mi->mi_driver->md_ndint)(mi)) { 3222383Swnj 3232383Swnj case MBN_DONE: 3242383Swnj dprintf("mbn_done\n"); 3252383Swnj /* 3262383Swnj * Non-data transfer interrupt 3272383Swnj * completed i/o request's processing. 3282383Swnj */ 3292383Swnj mi->mi_tab.b_errcnt = 0; 3302383Swnj mi->mi_tab.b_actf = bp->av_forw; 3312383Swnj iodone(bp); 3322383Swnj /* fall into... */ 3332383Swnj case MBN_RETRY: 3342383Swnj dprintf("mbn_retry\n"); 3352383Swnj if (mi->mi_tab.b_actf) 3362383Swnj mbustart(mi); 3372383Swnj break; 3382383Swnj 3392383Swnj default: 3402383Swnj panic("mbintr ndint"); 3412383Swnj } 3422383Swnj } else 3432383Swnj mbustart(mi); 3442383Swnj } 3452383Swnj /* 3462383Swnj * If there is an operation available and 3472383Swnj * the massbus isn't active, get it going. 3482383Swnj */ 3492383Swnj if (mhp->mh_actf && !mhp->mh_active) 3502383Swnj mbstart(mhp); 3512383Swnj mbp->mba_cr |= MBAIE; 3522383Swnj } 3532383Swnj 3542383Swnj /* 3552383Swnj * Setup the mapping registers for a transfer. 3562383Swnj */ 3572383Swnj mbasetup(mi) 3582383Swnj register struct mba_info *mi; 35928Sbill { 3602383Swnj register struct mba_regs *mbap = mi->mi_mba; 3612383Swnj struct buf *bp = mi->mi_tab.b_actf; 36228Sbill register int i; 36328Sbill int npf; 36428Sbill unsigned v; 36528Sbill register struct pte *pte, *io; 36628Sbill int o; 36728Sbill int vaddr; 36828Sbill struct proc *rp; 36928Sbill 3701412Sbill io = mbap->mba_map; 3711412Sbill v = btop(bp->b_un.b_addr); 3721412Sbill o = (int)bp->b_un.b_addr & PGOFSET; 3731412Sbill npf = btoc(bp->b_bcount + o); 3741412Sbill rp = bp->b_flags&B_DIRTY ? &proc[2] : bp->b_proc; 3751412Sbill vaddr = o; 3761412Sbill if (bp->b_flags & B_UAREA) { 3771412Sbill for (i = 0; i < UPAGES; i++) { 3781412Sbill if (rp->p_addr[i].pg_pfnum == 0) 3791412Sbill panic("mba: zero upage"); 3801412Sbill *(int *)io++ = rp->p_addr[i].pg_pfnum | PG_V; 38128Sbill } 3821412Sbill } else if ((bp->b_flags & B_PHYS) == 0) { 3831412Sbill pte = &Sysmap[btop(((int)bp->b_un.b_addr)&0x7fffffff)]; 3841412Sbill while (--npf >= 0) 3851412Sbill *(int *)io++ = pte++->pg_pfnum | PG_V; 3861412Sbill } else { 3871412Sbill if (bp->b_flags & B_PAGET) 3881412Sbill pte = &Usrptmap[btokmx((struct pte *)bp->b_un.b_addr)]; 3891412Sbill else 3901412Sbill pte = vtopte(rp, v); 3911412Sbill while (--npf >= 0) { 3921412Sbill if (pte->pg_pfnum == 0) 3931412Sbill panic("mba, zero entry"); 3941412Sbill *(int *)io++ = pte++->pg_pfnum | PG_V; 3951412Sbill } 39628Sbill } 3971412Sbill *(int *)io++ = 0; 3982383Swnj return (vaddr); 39928Sbill } 400*2704Swnj #endif 401