xref: /csrg-svn/sys/vax/mba/mba.c (revision 25199)
123312Smckusick /*
223312Smckusick  * Copyright (c) 1982 Regents of the University of California.
323312Smckusick  * All rights reserved.  The Berkeley software License Agreement
423312Smckusick  * specifies the terms and conditions for redistribution.
523312Smckusick  *
6*25199Skarels  *	@(#)mba.c	6.6 (Berkeley) 10/14/85
723312Smckusick  */
828Sbill 
92704Swnj #include "mba.h"
102704Swnj #if NMBA > 0
112383Swnj /*
123095Swnj  * Massbus driver, arbitrates a massbus among attached devices.
132383Swnj  */
149788Ssam #include "../machine/pte.h"
159788Ssam 
1617121Sbloom #include "param.h"
1717121Sbloom #include "systm.h"
1817121Sbloom #include "dk.h"
1917121Sbloom #include "buf.h"
2017121Sbloom #include "conf.h"
2117121Sbloom #include "dir.h"
2217121Sbloom #include "user.h"
2317121Sbloom #include "proc.h"
2417121Sbloom #include "map.h"
258470Sroot #include "../vax/mtpr.h"
2617121Sbloom #include "vm.h"
2728Sbill 
2817121Sbloom #include "mbareg.h"
2917121Sbloom #include "mbavar.h"
308470Sroot 
3124779Skarels /* mbunit should be the same as hpunit, etc.! */
3224779Skarels #define mbunit(dev)	(minor(dev) >> 3)
3324779Skarels 
343095Swnj char	mbsr_bits[] = MBSR_BITS;
3528Sbill /*
362383Swnj  * Start activity on a massbus device.
372981Swnj  * We are given the device's mba_device structure and activate
382383Swnj  * the device via the unit start routine.  The unit start
392383Swnj  * routine may indicate that it is finished (e.g. if the operation
402383Swnj  * was a ``sense'' on a tape drive), that the (multi-ported) unit
412383Swnj  * is busy (we will get an interrupt later), that it started the
422383Swnj  * unit (e.g. for a non-data transfer operation), or that it has
432383Swnj  * set up a data transfer operation and we should start the massbus adaptor.
4428Sbill  */
452383Swnj mbustart(mi)
462981Swnj 	register struct mba_device *mi;
472383Swnj {
482383Swnj 	register struct buf *bp;	/* i/o operation at head of queue */
492383Swnj 	register struct mba_hd *mhp;	/* header for mba device is on */
5028Sbill 
512383Swnj loop:
522383Swnj 	/*
532383Swnj 	 * Get the first thing to do off device queue.
542383Swnj 	 */
552383Swnj 	bp = mi->mi_tab.b_actf;
562383Swnj 	if (bp == NULL)
572383Swnj 		return;
582383Swnj 	/*
592383Swnj 	 * Let the drivers unit start routine have at it
602383Swnj 	 * and then process the request further, per its instructions.
612383Swnj 	 */
622383Swnj 	switch ((*mi->mi_driver->md_ustart)(mi)) {
632383Swnj 
642383Swnj 	case MBU_NEXT:		/* request is complete (e.g. ``sense'') */
652383Swnj 		mi->mi_tab.b_active = 0;
662955Swnj 		mi->mi_tab.b_errcnt = 0;
672383Swnj 		mi->mi_tab.b_actf = bp->av_forw;
682383Swnj 		iodone(bp);
692383Swnj 		goto loop;
702383Swnj 
712383Swnj 	case MBU_DODATA:	/* all ready to do data transfer */
722383Swnj 		/*
732981Swnj 		 * Queue the device mba_device structure on the massbus
742383Swnj 		 * mba_hd structure for processing as soon as the
752383Swnj 		 * data path is available.
762383Swnj 		 */
772383Swnj 		mhp = mi->mi_hd;
782383Swnj 		mi->mi_forw = NULL;
792383Swnj 		if (mhp->mh_actf == NULL)
802383Swnj 			mhp->mh_actf = mi;
812383Swnj 		else
822383Swnj 			mhp->mh_actl->mi_forw = mi;
832383Swnj 		mhp->mh_actl = mi;
842383Swnj 		/*
852383Swnj 		 * If data path is idle, start transfer now.
862383Swnj 		 * In any case the device is ``active'' waiting for the
872383Swnj 		 * data to transfer.
882383Swnj 		 */
892893Swnj 		mi->mi_tab.b_active = 1;
902383Swnj 		if (mhp->mh_active == 0)
912383Swnj 			mbstart(mhp);
922383Swnj 		return;
932383Swnj 
942383Swnj 	case MBU_STARTED:	/* driver started a non-data transfer */
952383Swnj 		/*
962383Swnj 		 * Mark device busy during non-data transfer
972383Swnj 		 * and count this as a ``seek'' on the device.
982383Swnj 		 */
993182Swnj 		if (mi->mi_dk >= 0) {
1002383Swnj 			dk_seek[mi->mi_dk]++;
1013182Swnj 			dk_busy |= (1 << mi->mi_dk);
1023182Swnj 		}
1032383Swnj 		mi->mi_tab.b_active = 1;
1042383Swnj 		return;
1052383Swnj 
1062383Swnj 	case MBU_BUSY:		/* dual port drive busy */
1072383Swnj 		/*
1082383Swnj 		 * We mark the device structure so that when an
1092383Swnj 		 * interrupt occurs we will know to restart the unit.
1102383Swnj 		 */
1112383Swnj 		mi->mi_tab.b_flags |= B_BUSY;
1122383Swnj 		return;
1132383Swnj 
1142383Swnj 	default:
1152383Swnj 		panic("mbustart");
1162383Swnj 	}
1172403Skre }
1182383Swnj 
1192383Swnj /*
1202383Swnj  * Start an i/o operation on the massbus specified by the argument.
1212383Swnj  * We peel the first operation off its queue and insure that the drive
1222383Swnj  * is present and on-line.  We then use the drivers start routine
1232383Swnj  * (if any) to prepare the drive, setup the massbus map for the transfer
1242383Swnj  * and start the transfer.
1252383Swnj  */
1262383Swnj mbstart(mhp)
1272383Swnj 	register struct mba_hd *mhp;
1282383Swnj {
1292981Swnj 	register struct mba_device *mi;
1302383Swnj 	struct buf *bp;
1312383Swnj 	register struct mba_regs *mbp;
1323708Sroot 	register int com;
1332383Swnj 
1342383Swnj loop:
1352383Swnj 	/*
1362383Swnj 	 * Look for an operation at the front of the queue.
1372383Swnj 	 */
1382955Swnj 	if ((mi = mhp->mh_actf) == NULL) {
1392383Swnj 		return;
1402955Swnj 	}
1412383Swnj 	if ((bp = mi->mi_tab.b_actf) == NULL) {
1422383Swnj 		mhp->mh_actf = mi->mi_forw;
1432383Swnj 		goto loop;
1442383Swnj 	}
1452383Swnj 	/*
1462383Swnj 	 * If this device isn't present and on-line, then
1472383Swnj 	 * we screwed up, and can't really do the operation.
1484757Swnj 	 * Only check for non-tapes because tape drivers check
1494757Swnj 	 * ONLINE themselves and because TU78 registers are
1504757Swnj 	 * different.
1512383Swnj 	 */
1526537Ssam 	if (((com = mi->mi_drv->mbd_dt) & MBDT_TAP) == 0)
1533095Swnj 	if ((mi->mi_drv->mbd_ds & MBDS_DREADY) != MBDS_DREADY) {
1546537Ssam 		if ((com & MBDT_TYPE) == 0) {
1556537Ssam 			mi->mi_alive = 0;
1566537Ssam 			printf("%s%d: nonexistent\n", mi->mi_driver->md_dname,
15724779Skarels 			    mbunit(bp->b_dev));
1586537Ssam 		} else
1596537Ssam 			printf("%s%d: not ready\n", mi->mi_driver->md_dname,
16024779Skarels 			    mbunit(bp->b_dev));
1612383Swnj 		mi->mi_tab.b_actf = bp->av_forw;
1622893Swnj 		mi->mi_tab.b_errcnt = 0;
1632893Swnj 		mi->mi_tab.b_active = 0;
1642383Swnj 		bp->b_flags |= B_ERROR;
1652383Swnj 		iodone(bp);
1662383Swnj 		goto loop;
1672383Swnj 	}
1682383Swnj 	/*
1692383Swnj 	 * We can do the operation; mark the massbus active
1702383Swnj 	 * and let the device start routine setup any necessary
1712383Swnj 	 * device state for the transfer (e.g. desired cylinder, etc
1722383Swnj 	 * on disks).
1732383Swnj 	 */
1742383Swnj 	mhp->mh_active = 1;
1753708Sroot 	if (mi->mi_driver->md_start) {
1763708Sroot 		if ((com = (*mi->mi_driver->md_start)(mi)) == 0)
1773708Sroot 			com = (bp->b_flags & B_READ) ?
1783708Sroot 			    MB_RCOM|MB_GO : MB_WCOM|MB_GO;
1793708Sroot 	} else
1803708Sroot 		com = (bp->b_flags & B_READ) ? MB_RCOM|MB_GO : MB_WCOM|MB_GO;
1812383Swnj 
1822383Swnj 	/*
1832383Swnj 	 * Setup the massbus control and map registers and start
1842383Swnj 	 * the transfer.
1852383Swnj 	 */
1862383Swnj 	mbp = mi->mi_mba;
1872383Swnj 	mbp->mba_sr = -1;	/* conservative */
18817215Smckusick 	if (bp->b_bcount >= 0) {
18917215Smckusick 		mbp->mba_var = mbasetup(mi);
19017215Smckusick 		mbp->mba_bcr = -bp->b_bcount;
19117215Smckusick 	} else {
19217215Smckusick 		mbp->mba_var = mbasetup(mi) - bp->b_bcount - 1;
19317215Smckusick 		mbp->mba_bcr = bp->b_bcount;
19417215Smckusick 	}
1953708Sroot 	mi->mi_drv->mbd_cs1 = com;
1962383Swnj 	if (mi->mi_dk >= 0) {
1972383Swnj 		dk_busy |= 1 << mi->mi_dk;
1982383Swnj 		dk_xfer[mi->mi_dk]++;
19917215Smckusick 		if (bp->b_bcount >= 0)
20017215Smckusick 			dk_wds[mi->mi_dk] += bp->b_bcount >> 6;
20117215Smckusick 		else
20217215Smckusick 			dk_wds[mi->mi_dk] += -(bp->b_bcount) >> 6;
2032383Swnj 	}
2042383Swnj }
2052383Swnj 
2062383Swnj /*
2072383Swnj  * Take an interrupt off of massbus mbanum,
2082383Swnj  * and dispatch to drivers as appropriate.
2092383Swnj  */
2102383Swnj mbintr(mbanum)
2112383Swnj 	int mbanum;
2122383Swnj {
2132383Swnj 	register struct mba_hd *mhp = &mba_hd[mbanum];
2142383Swnj 	register struct mba_regs *mbp = mhp->mh_mba;
2152981Swnj 	register struct mba_device *mi;
216420Sbill 	register struct buf *bp;
2172383Swnj 	register int drive;
2182955Swnj 	int mbasr, as;
2196537Ssam 	extern struct mba_device *mbaconfig();
2202383Swnj 
2212383Swnj 	/*
2222383Swnj 	 * Read out the massbus status register
2232383Swnj 	 * and attention status register and clear
2242383Swnj 	 * the bits in same by writing them back.
2252383Swnj 	 */
2262955Swnj 	mbasr = mbp->mba_sr;
2272955Swnj 	mbp->mba_sr = mbasr;
2282884Swnj #if VAX750
2293095Swnj 	if (mbasr&MBSR_CBHUNG) {
2302930Swnj 		printf("mba%d: control bus hung\n", mbanum);
2312930Swnj 		panic("cbhung");
2322930Swnj 	}
2332884Swnj #endif
2342383Swnj 	/* note: the mbd_as register is shared between drives */
2352955Swnj 	as = mbp->mba_drv[0].mbd_as & 0xff;
2362383Swnj 	mbp->mba_drv[0].mbd_as = as;
2372383Swnj 
2382383Swnj 	/*
2392383Swnj 	 * If the mba was active, process the data transfer
2402383Swnj 	 * complete interrupt; otherwise just process units which
2412383Swnj 	 * are now finished.
2422383Swnj 	 */
2432383Swnj 	if (mhp->mh_active) {
2442383Swnj 		/*
2452383Swnj 		 * Clear attention status for drive whose data
2463095Swnj 		 * transfer related operation completed,
2473095Swnj 		 * and give the dtint driver
2482383Swnj 		 * routine a chance to say what is next.
2492383Swnj 		 */
2502383Swnj 		mi = mhp->mh_actf;
2512383Swnj 		as &= ~(1 << mi->mi_drive);
2522383Swnj 		dk_busy &= ~(1 << mi->mi_dk);
2532383Swnj 		bp = mi->mi_tab.b_actf;
2543095Swnj 		switch ((*mi->mi_driver->md_dtint)(mi, mbasr)) {
2552383Swnj 
2562383Swnj 		case MBD_DONE:		/* all done, for better or worse */
2572383Swnj 			/*
2582383Swnj 			 * Flush request from drive queue.
2592383Swnj 			 */
2602383Swnj 			mi->mi_tab.b_errcnt = 0;
2612383Swnj 			mi->mi_tab.b_actf = bp->av_forw;
2622383Swnj 			iodone(bp);
2632383Swnj 			/* fall into... */
2642383Swnj 		case MBD_RETRY:		/* attempt the operation again */
2652383Swnj 			/*
2662383Swnj 			 * Dequeue data transfer from massbus queue;
2672383Swnj 			 * if there is still a i/o request on the device
2682383Swnj 			 * queue then start the next operation on the device.
2692383Swnj 			 * (Common code for DONE and RETRY).
2702383Swnj 			 */
2712383Swnj 			mhp->mh_active = 0;
2722383Swnj 			mi->mi_tab.b_active = 0;
2732383Swnj 			mhp->mh_actf = mi->mi_forw;
2742383Swnj 			if (mi->mi_tab.b_actf)
2752383Swnj 				mbustart(mi);
2762383Swnj 			break;
2772383Swnj 
278*25199Skarels 		case MBD_REPOSITION:	/* driver started repositioning */
2792383Swnj 			/*
280*25199Skarels 			 * Drive is repositioning, not doing data transfer.
281*25199Skarels 			 * Free controller, but don't have to restart drive.
282*25199Skarels 			 */
283*25199Skarels 			mhp->mh_active = 0;
284*25199Skarels 			mhp->mh_actf = mi->mi_forw;
285*25199Skarels 			break;
286*25199Skarels 
287*25199Skarels 		case MBD_RESTARTED:	/* driver restarted op (ecc, e.g.) */
288*25199Skarels 			/*
2892893Swnj 			 * Note that mhp->mh_active is still on.
2902383Swnj 			 */
2912383Swnj 			break;
2922383Swnj 
2932383Swnj 		default:
2942884Swnj 			panic("mbintr");
2952383Swnj 		}
2962383Swnj 	}
2972383Swnj 	/*
2982383Swnj 	 * Service drives which require attention
2992383Swnj 	 * after non-data-transfer operations.
3002383Swnj 	 */
3012955Swnj 	while (drive = ffs(as)) {
3022955Swnj 		drive--;		/* was 1 origin */
3032955Swnj 		as &= ~(1 << drive);
3042981Swnj 		mi = mhp->mh_mbip[drive];
3056537Ssam 		if (mi == NULL || mi->mi_alive == 0) {
3066537Ssam 			struct mba_device fnd;
3076537Ssam 			struct mba_drv *mbd = &mhp->mh_mba->mba_drv[drive];
3086537Ssam 			int dt = mbd->mbd_dt & 0xffff;
3096537Ssam 
3106537Ssam 			if (dt == 0 || dt == MBDT_MOH)
3116537Ssam 				continue;
3126537Ssam 			fnd.mi_mba = mhp->mh_mba;
3136537Ssam 			fnd.mi_mbanum = mbanum;
3146537Ssam 			fnd.mi_drive = drive;
3156537Ssam 			if ((mi = mbaconfig(&fnd, dt)) == NULL)
3166537Ssam 				continue;
31712507Ssam 			/*
31812507Ssam 			 * If a tape, poke the slave attach routines.
31912507Ssam 			 * Otherwise, could be a disk which we want
32012507Ssam 			 * to swap on, so make a pass over the swap
32112507Ssam 			 * configuration table in case the size of
32212507Ssam 			 * the swap area must be determined by drive type.
32312507Ssam 			 */
32412507Ssam 			if (dt & MBDT_TAP)
32512507Ssam 				mbaddtape(mi, drive);
32612507Ssam 			else
32712507Ssam 				swapconf();
3286537Ssam 		}
3292955Swnj 		/*
3302981Swnj 		 * If driver has a handler for non-data transfer
3313095Swnj 		 * interrupts, give it a chance to tell us what to do.
3322955Swnj 		 */
3332955Swnj 		if (mi->mi_driver->md_ndint) {
3342955Swnj 			switch ((*mi->mi_driver->md_ndint)(mi)) {
3352383Swnj 
3363095Swnj 			case MBN_DONE:		/* operation completed */
3376537Ssam 				mi->mi_tab.b_active = 0;
3382955Swnj 				mi->mi_tab.b_errcnt = 0;
3392981Swnj 				bp = mi->mi_tab.b_actf;
3402955Swnj 				mi->mi_tab.b_actf = bp->av_forw;
3412955Swnj 				iodone(bp);
3423095Swnj 				/* fall into common code */
3433095Swnj 			case MBN_RETRY:		/* operation continues */
3442955Swnj 				if (mi->mi_tab.b_actf)
3452955Swnj 					mbustart(mi);
3462955Swnj 				break;
3473095Swnj 			case MBN_SKIP:		/* ignore unsol. interrupt */
3482981Swnj 				break;
3492955Swnj 			default:
3502955Swnj 				panic("mbintr");
3512955Swnj 			}
3522955Swnj 		} else
3533095Swnj 			/*
3543095Swnj 			 * If there is no non-data transfer interrupt
3553095Swnj 			 * routine, then we should just
3563095Swnj 			 * restart the unit, leading to a mbstart() soon.
3573095Swnj 			 */
3582955Swnj 			mbustart(mi);
3592955Swnj 	}
3602383Swnj 	/*
3612383Swnj 	 * If there is an operation available and
3622383Swnj 	 * the massbus isn't active, get it going.
3632383Swnj 	 */
3642383Swnj 	if (mhp->mh_actf && !mhp->mh_active)
3652383Swnj 		mbstart(mhp);
3663095Swnj 	/* THHHHATS all folks... */
3672383Swnj }
3682383Swnj 
3692383Swnj /*
37012507Ssam  * For autoconfig'ng tape drives on the fly.
37112507Ssam  */
37212507Ssam mbaddtape(mi, drive)
37312507Ssam 	struct mba_device *mi;
37412507Ssam 	int drive;
37512507Ssam {
37612507Ssam 	register struct mba_slave *ms;
37712507Ssam 
37812507Ssam 	for (ms = mbsinit; ms->ms_driver; ms++)
37912507Ssam 		if (ms->ms_driver == mi->mi_driver && ms->ms_alive == 0 &&
38012507Ssam 		    (ms->ms_ctlr == mi->mi_unit ||
38112507Ssam 		     ms->ms_ctlr == '?')) {
38212507Ssam 			if ((*ms->ms_driver->md_slave)(mi, ms, drive)) {
38312507Ssam 				printf("%s%d at %s%d slave %d\n",
38412507Ssam 				    ms->ms_driver->md_sname,
38512507Ssam 				    ms->ms_unit,
38612507Ssam 				    mi->mi_driver->md_dname,
38712507Ssam 				    mi->mi_unit,
38812507Ssam 				    ms->ms_slave);
38912507Ssam 				ms->ms_alive = 1;
39012507Ssam 				ms->ms_ctlr = mi->mi_unit;
39112507Ssam 			}
39212507Ssam 		}
39312507Ssam }
39412507Ssam 
39512507Ssam /*
3962383Swnj  * Setup the mapping registers for a transfer.
3972383Swnj  */
3982383Swnj mbasetup(mi)
3992981Swnj 	register struct mba_device *mi;
40028Sbill {
4012383Swnj 	register struct mba_regs *mbap = mi->mi_mba;
4022383Swnj 	struct buf *bp = mi->mi_tab.b_actf;
4036381Swnj 	register int npf;
40428Sbill 	unsigned v;
40528Sbill 	register struct pte *pte, *io;
40628Sbill 	int o;
40728Sbill 	struct proc *rp;
40828Sbill 
4091412Sbill 	v = btop(bp->b_un.b_addr);
4101412Sbill 	o = (int)bp->b_un.b_addr & PGOFSET;
41117215Smckusick 	if (bp->b_bcount >= 0)
41217215Smckusick 		npf = btoc(bp->b_bcount + o);
41317215Smckusick 	else
41417215Smckusick 		npf = btoc(-(bp->b_bcount) + o);
4151412Sbill 	rp = bp->b_flags&B_DIRTY ? &proc[2] : bp->b_proc;
4166381Swnj 	if ((bp->b_flags & B_PHYS) == 0)
4171412Sbill 		pte = &Sysmap[btop(((int)bp->b_un.b_addr)&0x7fffffff)];
4186381Swnj 	else if (bp->b_flags & B_UAREA)
4196381Swnj 		pte = &rp->p_addr[v];
4206381Swnj 	else if (bp->b_flags & B_PAGET)
4216381Swnj 		pte = &Usrptmap[btokmx((struct pte *)bp->b_un.b_addr)];
4226381Swnj 	else
4236381Swnj 		pte = vtopte(rp, v);
4246381Swnj 	io = mbap->mba_map;
4256381Swnj 	while (--npf >= 0) {
4266381Swnj 		if (pte->pg_pfnum == 0)
4276381Swnj 			panic("mba, zero entry");
4286381Swnj 		*(int *)io++ = pte++->pg_pfnum | PG_V;
42928Sbill 	}
4301412Sbill 	*(int *)io++ = 0;
4316381Swnj 	return (o);
43228Sbill }
4332930Swnj 
4346181Sroot #if notdef
4353095Swnj /*
4363095Swnj  * Init and interrupt enable a massbus adapter.
4373095Swnj  */
4382930Swnj mbainit(mp)
4392930Swnj 	struct mba_regs *mp;
4402930Swnj {
4412930Swnj 
4423095Swnj 	mp->mba_cr = MBCR_INIT;
4433095Swnj 	mp->mba_cr = MBCR_IE;
4442930Swnj }
4452704Swnj #endif
4464966Swnj #endif
447