123312Smckusick /* 223312Smckusick * Copyright (c) 1982 Regents of the University of California. 323312Smckusick * All rights reserved. The Berkeley software License Agreement 423312Smckusick * specifies the terms and conditions for redistribution. 523312Smckusick * 6*24779Skarels * @(#)mba.c 6.5 (Berkeley) 09/16/85 723312Smckusick */ 828Sbill 92704Swnj #include "mba.h" 102704Swnj #if NMBA > 0 112383Swnj /* 123095Swnj * Massbus driver, arbitrates a massbus among attached devices. 132383Swnj */ 149788Ssam #include "../machine/pte.h" 159788Ssam 1617121Sbloom #include "param.h" 1717121Sbloom #include "systm.h" 1817121Sbloom #include "dk.h" 1917121Sbloom #include "buf.h" 2017121Sbloom #include "conf.h" 2117121Sbloom #include "dir.h" 2217121Sbloom #include "user.h" 2317121Sbloom #include "proc.h" 2417121Sbloom #include "map.h" 258470Sroot #include "../vax/mtpr.h" 2617121Sbloom #include "vm.h" 2728Sbill 2817121Sbloom #include "mbareg.h" 2917121Sbloom #include "mbavar.h" 308470Sroot 31*24779Skarels /* mbunit should be the same as hpunit, etc.! */ 32*24779Skarels #define mbunit(dev) (minor(dev) >> 3) 33*24779Skarels 343095Swnj char mbsr_bits[] = MBSR_BITS; 3528Sbill /* 362383Swnj * Start activity on a massbus device. 372981Swnj * We are given the device's mba_device structure and activate 382383Swnj * the device via the unit start routine. The unit start 392383Swnj * routine may indicate that it is finished (e.g. if the operation 402383Swnj * was a ``sense'' on a tape drive), that the (multi-ported) unit 412383Swnj * is busy (we will get an interrupt later), that it started the 422383Swnj * unit (e.g. for a non-data transfer operation), or that it has 432383Swnj * set up a data transfer operation and we should start the massbus adaptor. 4428Sbill */ 452383Swnj mbustart(mi) 462981Swnj register struct mba_device *mi; 472383Swnj { 482383Swnj register struct buf *bp; /* i/o operation at head of queue */ 492383Swnj register struct mba_hd *mhp; /* header for mba device is on */ 5028Sbill 512383Swnj loop: 522383Swnj /* 532383Swnj * Get the first thing to do off device queue. 542383Swnj */ 552383Swnj bp = mi->mi_tab.b_actf; 562383Swnj if (bp == NULL) 572383Swnj return; 582383Swnj /* 596537Ssam * Make sure the drive is still there before starting it up. 606537Ssam */ 616537Ssam if ((mi->mi_drv->mbd_dt & MBDT_TYPE) == 0) { 626537Ssam printf("%s%d: nonexistent\n", mi->mi_driver->md_dname, 63*24779Skarels mbunit(bp->b_dev)); 646537Ssam mi->mi_alive = 0; 656537Ssam mi->mi_tab.b_actf = bp->av_forw; 666537Ssam mi->mi_tab.b_active = 0; 676537Ssam mi->mi_tab.b_errcnt = 0; 686537Ssam bp->b_flags |= B_ERROR; 696537Ssam iodone(bp); 706537Ssam goto loop; 716537Ssam } 726537Ssam /* 732383Swnj * Let the drivers unit start routine have at it 742383Swnj * and then process the request further, per its instructions. 752383Swnj */ 762383Swnj switch ((*mi->mi_driver->md_ustart)(mi)) { 772383Swnj 782383Swnj case MBU_NEXT: /* request is complete (e.g. ``sense'') */ 792383Swnj mi->mi_tab.b_active = 0; 802955Swnj mi->mi_tab.b_errcnt = 0; 812383Swnj mi->mi_tab.b_actf = bp->av_forw; 822383Swnj iodone(bp); 832383Swnj goto loop; 842383Swnj 852383Swnj case MBU_DODATA: /* all ready to do data transfer */ 862383Swnj /* 872981Swnj * Queue the device mba_device structure on the massbus 882383Swnj * mba_hd structure for processing as soon as the 892383Swnj * data path is available. 902383Swnj */ 912383Swnj mhp = mi->mi_hd; 922383Swnj mi->mi_forw = NULL; 932383Swnj if (mhp->mh_actf == NULL) 942383Swnj mhp->mh_actf = mi; 952383Swnj else 962383Swnj mhp->mh_actl->mi_forw = mi; 972383Swnj mhp->mh_actl = mi; 982383Swnj /* 992383Swnj * If data path is idle, start transfer now. 1002383Swnj * In any case the device is ``active'' waiting for the 1012383Swnj * data to transfer. 1022383Swnj */ 1032893Swnj mi->mi_tab.b_active = 1; 1042383Swnj if (mhp->mh_active == 0) 1052383Swnj mbstart(mhp); 1062383Swnj return; 1072383Swnj 1082383Swnj case MBU_STARTED: /* driver started a non-data transfer */ 1092383Swnj /* 1102383Swnj * Mark device busy during non-data transfer 1112383Swnj * and count this as a ``seek'' on the device. 1122383Swnj */ 1133182Swnj if (mi->mi_dk >= 0) { 1142383Swnj dk_seek[mi->mi_dk]++; 1153182Swnj dk_busy |= (1 << mi->mi_dk); 1163182Swnj } 1172383Swnj mi->mi_tab.b_active = 1; 1182383Swnj return; 1192383Swnj 1202383Swnj case MBU_BUSY: /* dual port drive busy */ 1212383Swnj /* 1222383Swnj * We mark the device structure so that when an 1232383Swnj * interrupt occurs we will know to restart the unit. 1242383Swnj */ 1252383Swnj mi->mi_tab.b_flags |= B_BUSY; 1262383Swnj return; 1272383Swnj 1282383Swnj default: 1292383Swnj panic("mbustart"); 1302383Swnj } 1312403Skre } 1322383Swnj 1332383Swnj /* 1342383Swnj * Start an i/o operation on the massbus specified by the argument. 1352383Swnj * We peel the first operation off its queue and insure that the drive 1362383Swnj * is present and on-line. We then use the drivers start routine 1372383Swnj * (if any) to prepare the drive, setup the massbus map for the transfer 1382383Swnj * and start the transfer. 1392383Swnj */ 1402383Swnj mbstart(mhp) 1412383Swnj register struct mba_hd *mhp; 1422383Swnj { 1432981Swnj register struct mba_device *mi; 1442383Swnj struct buf *bp; 1452383Swnj register struct mba_regs *mbp; 1463708Sroot register int com; 1472383Swnj 1482383Swnj loop: 1492383Swnj /* 1502383Swnj * Look for an operation at the front of the queue. 1512383Swnj */ 1522955Swnj if ((mi = mhp->mh_actf) == NULL) { 1532383Swnj return; 1542955Swnj } 1552383Swnj if ((bp = mi->mi_tab.b_actf) == NULL) { 1562383Swnj mhp->mh_actf = mi->mi_forw; 1572383Swnj goto loop; 1582383Swnj } 1592383Swnj /* 1602383Swnj * If this device isn't present and on-line, then 1612383Swnj * we screwed up, and can't really do the operation. 1624757Swnj * Only check for non-tapes because tape drivers check 1634757Swnj * ONLINE themselves and because TU78 registers are 1644757Swnj * different. 1652383Swnj */ 1666537Ssam if (((com = mi->mi_drv->mbd_dt) & MBDT_TAP) == 0) 1673095Swnj if ((mi->mi_drv->mbd_ds & MBDS_DREADY) != MBDS_DREADY) { 1686537Ssam if ((com & MBDT_TYPE) == 0) { 1696537Ssam mi->mi_alive = 0; 1706537Ssam printf("%s%d: nonexistent\n", mi->mi_driver->md_dname, 171*24779Skarels mbunit(bp->b_dev)); 1726537Ssam } else 1736537Ssam printf("%s%d: not ready\n", mi->mi_driver->md_dname, 174*24779Skarels mbunit(bp->b_dev)); 1752383Swnj mi->mi_tab.b_actf = bp->av_forw; 1762893Swnj mi->mi_tab.b_errcnt = 0; 1772893Swnj mi->mi_tab.b_active = 0; 1782383Swnj bp->b_flags |= B_ERROR; 1792383Swnj iodone(bp); 1802383Swnj goto loop; 1812383Swnj } 1822383Swnj /* 1832383Swnj * We can do the operation; mark the massbus active 1842383Swnj * and let the device start routine setup any necessary 1852383Swnj * device state for the transfer (e.g. desired cylinder, etc 1862383Swnj * on disks). 1872383Swnj */ 1882383Swnj mhp->mh_active = 1; 1893708Sroot if (mi->mi_driver->md_start) { 1903708Sroot if ((com = (*mi->mi_driver->md_start)(mi)) == 0) 1913708Sroot com = (bp->b_flags & B_READ) ? 1923708Sroot MB_RCOM|MB_GO : MB_WCOM|MB_GO; 1933708Sroot } else 1943708Sroot com = (bp->b_flags & B_READ) ? MB_RCOM|MB_GO : MB_WCOM|MB_GO; 1952383Swnj 1962383Swnj /* 1972383Swnj * Setup the massbus control and map registers and start 1982383Swnj * the transfer. 1992383Swnj */ 2002383Swnj mbp = mi->mi_mba; 2012383Swnj mbp->mba_sr = -1; /* conservative */ 20217215Smckusick if (bp->b_bcount >= 0) { 20317215Smckusick mbp->mba_var = mbasetup(mi); 20417215Smckusick mbp->mba_bcr = -bp->b_bcount; 20517215Smckusick } else { 20617215Smckusick mbp->mba_var = mbasetup(mi) - bp->b_bcount - 1; 20717215Smckusick mbp->mba_bcr = bp->b_bcount; 20817215Smckusick } 2093708Sroot mi->mi_drv->mbd_cs1 = com; 2102383Swnj if (mi->mi_dk >= 0) { 2112383Swnj dk_busy |= 1 << mi->mi_dk; 2122383Swnj dk_xfer[mi->mi_dk]++; 21317215Smckusick if (bp->b_bcount >= 0) 21417215Smckusick dk_wds[mi->mi_dk] += bp->b_bcount >> 6; 21517215Smckusick else 21617215Smckusick dk_wds[mi->mi_dk] += -(bp->b_bcount) >> 6; 2172383Swnj } 2182383Swnj } 2192383Swnj 2202383Swnj /* 2212383Swnj * Take an interrupt off of massbus mbanum, 2222383Swnj * and dispatch to drivers as appropriate. 2232383Swnj */ 2242383Swnj mbintr(mbanum) 2252383Swnj int mbanum; 2262383Swnj { 2272383Swnj register struct mba_hd *mhp = &mba_hd[mbanum]; 2282383Swnj register struct mba_regs *mbp = mhp->mh_mba; 2292981Swnj register struct mba_device *mi; 230420Sbill register struct buf *bp; 2312383Swnj register int drive; 2322955Swnj int mbasr, as; 2336537Ssam extern struct mba_device *mbaconfig(); 2342383Swnj 2352383Swnj /* 2362383Swnj * Read out the massbus status register 2372383Swnj * and attention status register and clear 2382383Swnj * the bits in same by writing them back. 2392383Swnj */ 2402955Swnj mbasr = mbp->mba_sr; 2412955Swnj mbp->mba_sr = mbasr; 2422884Swnj #if VAX750 2433095Swnj if (mbasr&MBSR_CBHUNG) { 2442930Swnj printf("mba%d: control bus hung\n", mbanum); 2452930Swnj panic("cbhung"); 2462930Swnj } 2472884Swnj #endif 2482383Swnj /* note: the mbd_as register is shared between drives */ 2492955Swnj as = mbp->mba_drv[0].mbd_as & 0xff; 2502383Swnj mbp->mba_drv[0].mbd_as = as; 2512383Swnj 2522383Swnj /* 2532383Swnj * If the mba was active, process the data transfer 2542383Swnj * complete interrupt; otherwise just process units which 2552383Swnj * are now finished. 2562383Swnj */ 2572383Swnj if (mhp->mh_active) { 2582383Swnj /* 2592383Swnj * Clear attention status for drive whose data 2603095Swnj * transfer related operation completed, 2613095Swnj * and give the dtint driver 2622383Swnj * routine a chance to say what is next. 2632383Swnj */ 2642383Swnj mi = mhp->mh_actf; 2652383Swnj as &= ~(1 << mi->mi_drive); 2662383Swnj dk_busy &= ~(1 << mi->mi_dk); 2672383Swnj bp = mi->mi_tab.b_actf; 2683095Swnj switch ((*mi->mi_driver->md_dtint)(mi, mbasr)) { 2692383Swnj 2702383Swnj case MBD_DONE: /* all done, for better or worse */ 2712383Swnj /* 2722383Swnj * Flush request from drive queue. 2732383Swnj */ 2742383Swnj mi->mi_tab.b_errcnt = 0; 2752383Swnj mi->mi_tab.b_actf = bp->av_forw; 2762383Swnj iodone(bp); 2772383Swnj /* fall into... */ 2782383Swnj case MBD_RETRY: /* attempt the operation again */ 2792383Swnj /* 2802383Swnj * Dequeue data transfer from massbus queue; 2812383Swnj * if there is still a i/o request on the device 2822383Swnj * queue then start the next operation on the device. 2832383Swnj * (Common code for DONE and RETRY). 2842383Swnj */ 2852383Swnj mhp->mh_active = 0; 2862383Swnj mi->mi_tab.b_active = 0; 2872383Swnj mhp->mh_actf = mi->mi_forw; 2882383Swnj if (mi->mi_tab.b_actf) 2892383Swnj mbustart(mi); 2902383Swnj break; 2912383Swnj 2922383Swnj case MBD_RESTARTED: /* driver restarted op (ecc, e.g.) 2932383Swnj /* 2942893Swnj * Note that mhp->mh_active is still on. 2952383Swnj */ 2962383Swnj break; 2972383Swnj 2982383Swnj default: 2992884Swnj panic("mbintr"); 3002383Swnj } 3012383Swnj } 3022383Swnj /* 3032383Swnj * Service drives which require attention 3042383Swnj * after non-data-transfer operations. 3052383Swnj */ 3062955Swnj while (drive = ffs(as)) { 3072955Swnj drive--; /* was 1 origin */ 3082955Swnj as &= ~(1 << drive); 3092981Swnj mi = mhp->mh_mbip[drive]; 3106537Ssam if (mi == NULL || mi->mi_alive == 0) { 3116537Ssam struct mba_device fnd; 3126537Ssam struct mba_drv *mbd = &mhp->mh_mba->mba_drv[drive]; 3136537Ssam int dt = mbd->mbd_dt & 0xffff; 3146537Ssam 3156537Ssam if (dt == 0 || dt == MBDT_MOH) 3166537Ssam continue; 3176537Ssam fnd.mi_mba = mhp->mh_mba; 3186537Ssam fnd.mi_mbanum = mbanum; 3196537Ssam fnd.mi_drive = drive; 3206537Ssam if ((mi = mbaconfig(&fnd, dt)) == NULL) 3216537Ssam continue; 32212507Ssam /* 32312507Ssam * If a tape, poke the slave attach routines. 32412507Ssam * Otherwise, could be a disk which we want 32512507Ssam * to swap on, so make a pass over the swap 32612507Ssam * configuration table in case the size of 32712507Ssam * the swap area must be determined by drive type. 32812507Ssam */ 32912507Ssam if (dt & MBDT_TAP) 33012507Ssam mbaddtape(mi, drive); 33112507Ssam else 33212507Ssam swapconf(); 3336537Ssam } 3342955Swnj /* 3352981Swnj * If driver has a handler for non-data transfer 3363095Swnj * interrupts, give it a chance to tell us what to do. 3372955Swnj */ 3382955Swnj if (mi->mi_driver->md_ndint) { 3392955Swnj switch ((*mi->mi_driver->md_ndint)(mi)) { 3402383Swnj 3413095Swnj case MBN_DONE: /* operation completed */ 3426537Ssam mi->mi_tab.b_active = 0; 3432955Swnj mi->mi_tab.b_errcnt = 0; 3442981Swnj bp = mi->mi_tab.b_actf; 3452955Swnj mi->mi_tab.b_actf = bp->av_forw; 3462955Swnj iodone(bp); 3473095Swnj /* fall into common code */ 3483095Swnj case MBN_RETRY: /* operation continues */ 3492955Swnj if (mi->mi_tab.b_actf) 3502955Swnj mbustart(mi); 3512955Swnj break; 3523095Swnj case MBN_SKIP: /* ignore unsol. interrupt */ 3532981Swnj break; 3542955Swnj default: 3552955Swnj panic("mbintr"); 3562955Swnj } 3572955Swnj } else 3583095Swnj /* 3593095Swnj * If there is no non-data transfer interrupt 3603095Swnj * routine, then we should just 3613095Swnj * restart the unit, leading to a mbstart() soon. 3623095Swnj */ 3632955Swnj mbustart(mi); 3642955Swnj } 3652383Swnj /* 3662383Swnj * If there is an operation available and 3672383Swnj * the massbus isn't active, get it going. 3682383Swnj */ 3692383Swnj if (mhp->mh_actf && !mhp->mh_active) 3702383Swnj mbstart(mhp); 3713095Swnj /* THHHHATS all folks... */ 3722383Swnj } 3732383Swnj 3742383Swnj /* 37512507Ssam * For autoconfig'ng tape drives on the fly. 37612507Ssam */ 37712507Ssam mbaddtape(mi, drive) 37812507Ssam struct mba_device *mi; 37912507Ssam int drive; 38012507Ssam { 38112507Ssam register struct mba_slave *ms; 38212507Ssam 38312507Ssam for (ms = mbsinit; ms->ms_driver; ms++) 38412507Ssam if (ms->ms_driver == mi->mi_driver && ms->ms_alive == 0 && 38512507Ssam (ms->ms_ctlr == mi->mi_unit || 38612507Ssam ms->ms_ctlr == '?')) { 38712507Ssam if ((*ms->ms_driver->md_slave)(mi, ms, drive)) { 38812507Ssam printf("%s%d at %s%d slave %d\n", 38912507Ssam ms->ms_driver->md_sname, 39012507Ssam ms->ms_unit, 39112507Ssam mi->mi_driver->md_dname, 39212507Ssam mi->mi_unit, 39312507Ssam ms->ms_slave); 39412507Ssam ms->ms_alive = 1; 39512507Ssam ms->ms_ctlr = mi->mi_unit; 39612507Ssam } 39712507Ssam } 39812507Ssam } 39912507Ssam 40012507Ssam /* 4012383Swnj * Setup the mapping registers for a transfer. 4022383Swnj */ 4032383Swnj mbasetup(mi) 4042981Swnj register struct mba_device *mi; 40528Sbill { 4062383Swnj register struct mba_regs *mbap = mi->mi_mba; 4072383Swnj struct buf *bp = mi->mi_tab.b_actf; 4086381Swnj register int npf; 40928Sbill unsigned v; 41028Sbill register struct pte *pte, *io; 41128Sbill int o; 41228Sbill struct proc *rp; 41328Sbill 4141412Sbill v = btop(bp->b_un.b_addr); 4151412Sbill o = (int)bp->b_un.b_addr & PGOFSET; 41617215Smckusick if (bp->b_bcount >= 0) 41717215Smckusick npf = btoc(bp->b_bcount + o); 41817215Smckusick else 41917215Smckusick npf = btoc(-(bp->b_bcount) + o); 4201412Sbill rp = bp->b_flags&B_DIRTY ? &proc[2] : bp->b_proc; 4216381Swnj if ((bp->b_flags & B_PHYS) == 0) 4221412Sbill pte = &Sysmap[btop(((int)bp->b_un.b_addr)&0x7fffffff)]; 4236381Swnj else if (bp->b_flags & B_UAREA) 4246381Swnj pte = &rp->p_addr[v]; 4256381Swnj else if (bp->b_flags & B_PAGET) 4266381Swnj pte = &Usrptmap[btokmx((struct pte *)bp->b_un.b_addr)]; 4276381Swnj else 4286381Swnj pte = vtopte(rp, v); 4296381Swnj io = mbap->mba_map; 4306381Swnj while (--npf >= 0) { 4316381Swnj if (pte->pg_pfnum == 0) 4326381Swnj panic("mba, zero entry"); 4336381Swnj *(int *)io++ = pte++->pg_pfnum | PG_V; 43428Sbill } 4351412Sbill *(int *)io++ = 0; 4366381Swnj return (o); 43728Sbill } 4382930Swnj 4396181Sroot #if notdef 4403095Swnj /* 4413095Swnj * Init and interrupt enable a massbus adapter. 4423095Swnj */ 4432930Swnj mbainit(mp) 4442930Swnj struct mba_regs *mp; 4452930Swnj { 4462930Swnj 4473095Swnj mp->mba_cr = MBCR_INIT; 4483095Swnj mp->mba_cr = MBCR_IE; 4492930Swnj } 4502704Swnj #endif 4514966Swnj #endif 452