xref: /csrg-svn/sys/vax/mba/mba.c (revision 17215)
1*17215Smckusick /*	mba.c	6.3	84/09/25	*/
228Sbill 
32704Swnj #include "mba.h"
42704Swnj #if NMBA > 0
52383Swnj /*
63095Swnj  * Massbus driver, arbitrates a massbus among attached devices.
7*17215Smckusick  *
8*17215Smckusick  * OPTION:
9*17215Smckusick  *	MTRDREV - Enable mag tape read backwards error recovery
102383Swnj  */
119788Ssam #include "../machine/pte.h"
129788Ssam 
1317121Sbloom #include "param.h"
1417121Sbloom #include "systm.h"
1517121Sbloom #include "dk.h"
1617121Sbloom #include "buf.h"
1717121Sbloom #include "conf.h"
1817121Sbloom #include "dir.h"
1917121Sbloom #include "user.h"
2017121Sbloom #include "proc.h"
2117121Sbloom #include "map.h"
228470Sroot #include "../vax/mtpr.h"
2317121Sbloom #include "vm.h"
2428Sbill 
2517121Sbloom #include "mbareg.h"
2617121Sbloom #include "mbavar.h"
278470Sroot 
283095Swnj char	mbsr_bits[] = MBSR_BITS;
2928Sbill /*
302383Swnj  * Start activity on a massbus device.
312981Swnj  * We are given the device's mba_device structure and activate
322383Swnj  * the device via the unit start routine.  The unit start
332383Swnj  * routine may indicate that it is finished (e.g. if the operation
342383Swnj  * was a ``sense'' on a tape drive), that the (multi-ported) unit
352383Swnj  * is busy (we will get an interrupt later), that it started the
362383Swnj  * unit (e.g. for a non-data transfer operation), or that it has
372383Swnj  * set up a data transfer operation and we should start the massbus adaptor.
3828Sbill  */
392383Swnj mbustart(mi)
402981Swnj 	register struct mba_device *mi;
412383Swnj {
422383Swnj 	register struct buf *bp;	/* i/o operation at head of queue */
432383Swnj 	register struct mba_hd *mhp;	/* header for mba device is on */
4428Sbill 
452383Swnj loop:
462383Swnj 	/*
472383Swnj 	 * Get the first thing to do off device queue.
482383Swnj 	 */
492383Swnj 	bp = mi->mi_tab.b_actf;
502383Swnj 	if (bp == NULL)
512383Swnj 		return;
522383Swnj 	/*
536537Ssam 	 * Make sure the drive is still there before starting it up.
546537Ssam 	 */
556537Ssam 	if ((mi->mi_drv->mbd_dt & MBDT_TYPE) == 0) {
566537Ssam 		printf("%s%d: nonexistent\n", mi->mi_driver->md_dname,
576537Ssam 		    dkunit(bp));
586537Ssam 		mi->mi_alive = 0;
596537Ssam 		mi->mi_tab.b_actf = bp->av_forw;
606537Ssam 		mi->mi_tab.b_active = 0;
616537Ssam 		mi->mi_tab.b_errcnt = 0;
626537Ssam 		bp->b_flags |= B_ERROR;
636537Ssam 		iodone(bp);
646537Ssam 		goto loop;
656537Ssam 	}
666537Ssam 	/*
672383Swnj 	 * Let the drivers unit start routine have at it
682383Swnj 	 * and then process the request further, per its instructions.
692383Swnj 	 */
702383Swnj 	switch ((*mi->mi_driver->md_ustart)(mi)) {
712383Swnj 
722383Swnj 	case MBU_NEXT:		/* request is complete (e.g. ``sense'') */
732383Swnj 		mi->mi_tab.b_active = 0;
742955Swnj 		mi->mi_tab.b_errcnt = 0;
752383Swnj 		mi->mi_tab.b_actf = bp->av_forw;
762383Swnj 		iodone(bp);
772383Swnj 		goto loop;
782383Swnj 
792383Swnj 	case MBU_DODATA:	/* all ready to do data transfer */
802383Swnj 		/*
812981Swnj 		 * Queue the device mba_device structure on the massbus
822383Swnj 		 * mba_hd structure for processing as soon as the
832383Swnj 		 * data path is available.
842383Swnj 		 */
852383Swnj 		mhp = mi->mi_hd;
862383Swnj 		mi->mi_forw = NULL;
872383Swnj 		if (mhp->mh_actf == NULL)
882383Swnj 			mhp->mh_actf = mi;
892383Swnj 		else
902383Swnj 			mhp->mh_actl->mi_forw = mi;
912383Swnj 		mhp->mh_actl = mi;
922383Swnj 		/*
932383Swnj 		 * If data path is idle, start transfer now.
942383Swnj 		 * In any case the device is ``active'' waiting for the
952383Swnj 		 * data to transfer.
962383Swnj 		 */
972893Swnj 		mi->mi_tab.b_active = 1;
982383Swnj 		if (mhp->mh_active == 0)
992383Swnj 			mbstart(mhp);
1002383Swnj 		return;
1012383Swnj 
1022383Swnj 	case MBU_STARTED:	/* driver started a non-data transfer */
1032383Swnj 		/*
1042383Swnj 		 * Mark device busy during non-data transfer
1052383Swnj 		 * and count this as a ``seek'' on the device.
1062383Swnj 		 */
1073182Swnj 		if (mi->mi_dk >= 0) {
1082383Swnj 			dk_seek[mi->mi_dk]++;
1093182Swnj 			dk_busy |= (1 << mi->mi_dk);
1103182Swnj 		}
1112383Swnj 		mi->mi_tab.b_active = 1;
1122383Swnj 		return;
1132383Swnj 
1142383Swnj 	case MBU_BUSY:		/* dual port drive busy */
1152383Swnj 		/*
1162383Swnj 		 * We mark the device structure so that when an
1172383Swnj 		 * interrupt occurs we will know to restart the unit.
1182383Swnj 		 */
1192383Swnj 		mi->mi_tab.b_flags |= B_BUSY;
1202383Swnj 		return;
1212383Swnj 
1222383Swnj 	default:
1232383Swnj 		panic("mbustart");
1242383Swnj 	}
1252403Skre }
1262383Swnj 
1272383Swnj /*
1282383Swnj  * Start an i/o operation on the massbus specified by the argument.
1292383Swnj  * We peel the first operation off its queue and insure that the drive
1302383Swnj  * is present and on-line.  We then use the drivers start routine
1312383Swnj  * (if any) to prepare the drive, setup the massbus map for the transfer
1322383Swnj  * and start the transfer.
1332383Swnj  */
1342383Swnj mbstart(mhp)
1352383Swnj 	register struct mba_hd *mhp;
1362383Swnj {
1372981Swnj 	register struct mba_device *mi;
1382383Swnj 	struct buf *bp;
1392383Swnj 	register struct mba_regs *mbp;
1403708Sroot 	register int com;
1412383Swnj 
1422383Swnj loop:
1432383Swnj 	/*
1442383Swnj 	 * Look for an operation at the front of the queue.
1452383Swnj 	 */
1462955Swnj 	if ((mi = mhp->mh_actf) == NULL) {
1472383Swnj 		return;
1482955Swnj 	}
1492383Swnj 	if ((bp = mi->mi_tab.b_actf) == NULL) {
1502383Swnj 		mhp->mh_actf = mi->mi_forw;
1512383Swnj 		goto loop;
1522383Swnj 	}
1532383Swnj 	/*
1542383Swnj 	 * If this device isn't present and on-line, then
1552383Swnj 	 * we screwed up, and can't really do the operation.
1564757Swnj 	 * Only check for non-tapes because tape drivers check
1574757Swnj 	 * ONLINE themselves and because TU78 registers are
1584757Swnj 	 * different.
1592383Swnj 	 */
1606537Ssam 	if (((com = mi->mi_drv->mbd_dt) & MBDT_TAP) == 0)
1613095Swnj 	if ((mi->mi_drv->mbd_ds & MBDS_DREADY) != MBDS_DREADY) {
1626537Ssam 		if ((com & MBDT_TYPE) == 0) {
1636537Ssam 			mi->mi_alive = 0;
1646537Ssam 			printf("%s%d: nonexistent\n", mi->mi_driver->md_dname,
1656537Ssam 			    dkunit(bp));
1666537Ssam 		} else
1676537Ssam 			printf("%s%d: not ready\n", mi->mi_driver->md_dname,
1686537Ssam 			    dkunit(bp));
1692383Swnj 		mi->mi_tab.b_actf = bp->av_forw;
1702893Swnj 		mi->mi_tab.b_errcnt = 0;
1712893Swnj 		mi->mi_tab.b_active = 0;
1722383Swnj 		bp->b_flags |= B_ERROR;
1732383Swnj 		iodone(bp);
1742383Swnj 		goto loop;
1752383Swnj 	}
1762383Swnj 	/*
1772383Swnj 	 * We can do the operation; mark the massbus active
1782383Swnj 	 * and let the device start routine setup any necessary
1792383Swnj 	 * device state for the transfer (e.g. desired cylinder, etc
1802383Swnj 	 * on disks).
1812383Swnj 	 */
1822383Swnj 	mhp->mh_active = 1;
1833708Sroot 	if (mi->mi_driver->md_start) {
1843708Sroot 		if ((com = (*mi->mi_driver->md_start)(mi)) == 0)
1853708Sroot 			com = (bp->b_flags & B_READ) ?
1863708Sroot 			    MB_RCOM|MB_GO : MB_WCOM|MB_GO;
1873708Sroot 	} else
1883708Sroot 		com = (bp->b_flags & B_READ) ? MB_RCOM|MB_GO : MB_WCOM|MB_GO;
1892383Swnj 
1902383Swnj 	/*
1912383Swnj 	 * Setup the massbus control and map registers and start
1922383Swnj 	 * the transfer.
1932383Swnj 	 */
1942383Swnj 	mbp = mi->mi_mba;
1952383Swnj 	mbp->mba_sr = -1;	/* conservative */
196*17215Smckusick #ifdef MTRDREV
197*17215Smckusick 	if (bp->b_bcount >= 0) {
198*17215Smckusick 		mbp->mba_var = mbasetup(mi);
199*17215Smckusick 		mbp->mba_bcr = -bp->b_bcount;
200*17215Smckusick 	} else {
201*17215Smckusick 		mbp->mba_var = mbasetup(mi) - bp->b_bcount - 1;
202*17215Smckusick 		mbp->mba_bcr = bp->b_bcount;
203*17215Smckusick 	}
204*17215Smckusick #else
2052383Swnj 	mbp->mba_var = mbasetup(mi);
2062383Swnj 	mbp->mba_bcr = -bp->b_bcount;
207*17215Smckusick #endif
2083708Sroot 	mi->mi_drv->mbd_cs1 = com;
2092383Swnj 	if (mi->mi_dk >= 0) {
2102383Swnj 		dk_busy |= 1 << mi->mi_dk;
2112383Swnj 		dk_xfer[mi->mi_dk]++;
212*17215Smckusick #ifdef MTRDREV
213*17215Smckusick 		if (bp->b_bcount >= 0)
214*17215Smckusick 			dk_wds[mi->mi_dk] += bp->b_bcount >> 6;
215*17215Smckusick 		else
216*17215Smckusick 			dk_wds[mi->mi_dk] += -(bp->b_bcount) >> 6;
217*17215Smckusick #else
2182383Swnj 		dk_wds[mi->mi_dk] += bp->b_bcount >> 6;
219*17215Smckusick #endif
2202383Swnj 	}
2212383Swnj }
2222383Swnj 
2232383Swnj /*
2242383Swnj  * Take an interrupt off of massbus mbanum,
2252383Swnj  * and dispatch to drivers as appropriate.
2262383Swnj  */
2272383Swnj mbintr(mbanum)
2282383Swnj 	int mbanum;
2292383Swnj {
2302383Swnj 	register struct mba_hd *mhp = &mba_hd[mbanum];
2312383Swnj 	register struct mba_regs *mbp = mhp->mh_mba;
2322981Swnj 	register struct mba_device *mi;
233420Sbill 	register struct buf *bp;
2342383Swnj 	register int drive;
2352955Swnj 	int mbasr, as;
2366537Ssam 	extern struct mba_device *mbaconfig();
2372383Swnj 
2382383Swnj 	/*
2392383Swnj 	 * Read out the massbus status register
2402383Swnj 	 * and attention status register and clear
2412383Swnj 	 * the bits in same by writing them back.
2422383Swnj 	 */
2432955Swnj 	mbasr = mbp->mba_sr;
2442955Swnj 	mbp->mba_sr = mbasr;
2452884Swnj #if VAX750
2463095Swnj 	if (mbasr&MBSR_CBHUNG) {
2472930Swnj 		printf("mba%d: control bus hung\n", mbanum);
2482930Swnj 		panic("cbhung");
2492930Swnj 	}
2502884Swnj #endif
2512383Swnj 	/* note: the mbd_as register is shared between drives */
2522955Swnj 	as = mbp->mba_drv[0].mbd_as & 0xff;
2532383Swnj 	mbp->mba_drv[0].mbd_as = as;
2542383Swnj 
2552383Swnj 	/*
2562383Swnj 	 * If the mba was active, process the data transfer
2572383Swnj 	 * complete interrupt; otherwise just process units which
2582383Swnj 	 * are now finished.
2592383Swnj 	 */
2602383Swnj 	if (mhp->mh_active) {
2612383Swnj 		/*
2622383Swnj 		 * Clear attention status for drive whose data
2633095Swnj 		 * transfer related operation completed,
2643095Swnj 		 * and give the dtint driver
2652383Swnj 		 * routine a chance to say what is next.
2662383Swnj 		 */
2672383Swnj 		mi = mhp->mh_actf;
2682383Swnj 		as &= ~(1 << mi->mi_drive);
2692383Swnj 		dk_busy &= ~(1 << mi->mi_dk);
2702383Swnj 		bp = mi->mi_tab.b_actf;
2713095Swnj 		switch ((*mi->mi_driver->md_dtint)(mi, mbasr)) {
2722383Swnj 
2732383Swnj 		case MBD_DONE:		/* all done, for better or worse */
2742383Swnj 			/*
2752383Swnj 			 * Flush request from drive queue.
2762383Swnj 			 */
2772383Swnj 			mi->mi_tab.b_errcnt = 0;
2782383Swnj 			mi->mi_tab.b_actf = bp->av_forw;
2792383Swnj 			iodone(bp);
2802383Swnj 			/* fall into... */
2812383Swnj 		case MBD_RETRY:		/* attempt the operation again */
2822383Swnj 			/*
2832383Swnj 			 * Dequeue data transfer from massbus queue;
2842383Swnj 			 * if there is still a i/o request on the device
2852383Swnj 			 * queue then start the next operation on the device.
2862383Swnj 			 * (Common code for DONE and RETRY).
2872383Swnj 			 */
2882383Swnj 			mhp->mh_active = 0;
2892383Swnj 			mi->mi_tab.b_active = 0;
2902383Swnj 			mhp->mh_actf = mi->mi_forw;
2912383Swnj 			if (mi->mi_tab.b_actf)
2922383Swnj 				mbustart(mi);
2932383Swnj 			break;
2942383Swnj 
2952383Swnj 		case MBD_RESTARTED:	/* driver restarted op (ecc, e.g.)
2962383Swnj 			/*
2972893Swnj 			 * Note that mhp->mh_active is still on.
2982383Swnj 			 */
2992383Swnj 			break;
3002383Swnj 
3012383Swnj 		default:
3022884Swnj 			panic("mbintr");
3032383Swnj 		}
3042383Swnj 	}
3052383Swnj 	/*
3062383Swnj 	 * Service drives which require attention
3072383Swnj 	 * after non-data-transfer operations.
3082383Swnj 	 */
3092955Swnj 	while (drive = ffs(as)) {
3102955Swnj 		drive--;		/* was 1 origin */
3112955Swnj 		as &= ~(1 << drive);
3122981Swnj 		mi = mhp->mh_mbip[drive];
3136537Ssam 		if (mi == NULL || mi->mi_alive == 0) {
3146537Ssam 			struct mba_device fnd;
3156537Ssam 			struct mba_drv *mbd = &mhp->mh_mba->mba_drv[drive];
3166537Ssam 			int dt = mbd->mbd_dt & 0xffff;
3176537Ssam 
3186537Ssam 			if (dt == 0 || dt == MBDT_MOH)
3196537Ssam 				continue;
3206537Ssam 			fnd.mi_mba = mhp->mh_mba;
3216537Ssam 			fnd.mi_mbanum = mbanum;
3226537Ssam 			fnd.mi_drive = drive;
3236537Ssam 			if ((mi = mbaconfig(&fnd, dt)) == NULL)
3246537Ssam 				continue;
32512507Ssam 			/*
32612507Ssam 			 * If a tape, poke the slave attach routines.
32712507Ssam 			 * Otherwise, could be a disk which we want
32812507Ssam 			 * to swap on, so make a pass over the swap
32912507Ssam 			 * configuration table in case the size of
33012507Ssam 			 * the swap area must be determined by drive type.
33112507Ssam 			 */
33212507Ssam 			if (dt & MBDT_TAP)
33312507Ssam 				mbaddtape(mi, drive);
33412507Ssam 			else
33512507Ssam 				swapconf();
3366537Ssam 		}
3372955Swnj 		/*
3382981Swnj 		 * If driver has a handler for non-data transfer
3393095Swnj 		 * interrupts, give it a chance to tell us what to do.
3402955Swnj 		 */
3412955Swnj 		if (mi->mi_driver->md_ndint) {
3422955Swnj 			switch ((*mi->mi_driver->md_ndint)(mi)) {
3432383Swnj 
3443095Swnj 			case MBN_DONE:		/* operation completed */
3456537Ssam 				mi->mi_tab.b_active = 0;
3462955Swnj 				mi->mi_tab.b_errcnt = 0;
3472981Swnj 				bp = mi->mi_tab.b_actf;
3482955Swnj 				mi->mi_tab.b_actf = bp->av_forw;
3492955Swnj 				iodone(bp);
3503095Swnj 				/* fall into common code */
3513095Swnj 			case MBN_RETRY:		/* operation continues */
3522955Swnj 				if (mi->mi_tab.b_actf)
3532955Swnj 					mbustart(mi);
3542955Swnj 				break;
3553095Swnj 			case MBN_SKIP:		/* ignore unsol. interrupt */
3562981Swnj 				break;
3572955Swnj 			default:
3582955Swnj 				panic("mbintr");
3592955Swnj 			}
3602955Swnj 		} else
3613095Swnj 			/*
3623095Swnj 			 * If there is no non-data transfer interrupt
3633095Swnj 			 * routine, then we should just
3643095Swnj 			 * restart the unit, leading to a mbstart() soon.
3653095Swnj 			 */
3662955Swnj 			mbustart(mi);
3672955Swnj 	}
3682383Swnj 	/*
3692383Swnj 	 * If there is an operation available and
3702383Swnj 	 * the massbus isn't active, get it going.
3712383Swnj 	 */
3722383Swnj 	if (mhp->mh_actf && !mhp->mh_active)
3732383Swnj 		mbstart(mhp);
3743095Swnj 	/* THHHHATS all folks... */
3752383Swnj }
3762383Swnj 
3772383Swnj /*
37812507Ssam  * For autoconfig'ng tape drives on the fly.
37912507Ssam  */
38012507Ssam mbaddtape(mi, drive)
38112507Ssam 	struct mba_device *mi;
38212507Ssam 	int drive;
38312507Ssam {
38412507Ssam 	register struct mba_slave *ms;
38512507Ssam 
38612507Ssam 	for (ms = mbsinit; ms->ms_driver; ms++)
38712507Ssam 		if (ms->ms_driver == mi->mi_driver && ms->ms_alive == 0 &&
38812507Ssam 		    (ms->ms_ctlr == mi->mi_unit ||
38912507Ssam 		     ms->ms_ctlr == '?')) {
39012507Ssam 			if ((*ms->ms_driver->md_slave)(mi, ms, drive)) {
39112507Ssam 				printf("%s%d at %s%d slave %d\n",
39212507Ssam 				    ms->ms_driver->md_sname,
39312507Ssam 				    ms->ms_unit,
39412507Ssam 				    mi->mi_driver->md_dname,
39512507Ssam 				    mi->mi_unit,
39612507Ssam 				    ms->ms_slave);
39712507Ssam 				ms->ms_alive = 1;
39812507Ssam 				ms->ms_ctlr = mi->mi_unit;
39912507Ssam 			}
40012507Ssam 		}
40112507Ssam }
40212507Ssam 
40312507Ssam /*
4042383Swnj  * Setup the mapping registers for a transfer.
4052383Swnj  */
4062383Swnj mbasetup(mi)
4072981Swnj 	register struct mba_device *mi;
40828Sbill {
4092383Swnj 	register struct mba_regs *mbap = mi->mi_mba;
4102383Swnj 	struct buf *bp = mi->mi_tab.b_actf;
4116381Swnj 	register int npf;
41228Sbill 	unsigned v;
41328Sbill 	register struct pte *pte, *io;
41428Sbill 	int o;
41528Sbill 	struct proc *rp;
41628Sbill 
4171412Sbill 	v = btop(bp->b_un.b_addr);
4181412Sbill 	o = (int)bp->b_un.b_addr & PGOFSET;
419*17215Smckusick #ifdef MTRDREV
420*17215Smckusick 	if (bp->b_bcount >= 0)
421*17215Smckusick 		npf = btoc(bp->b_bcount + o);
422*17215Smckusick 	else
423*17215Smckusick 		npf = btoc(-(bp->b_bcount) + o);
424*17215Smckusick #else
4251412Sbill 	npf = btoc(bp->b_bcount + o);
426*17215Smckusick #endif
4271412Sbill 	rp = bp->b_flags&B_DIRTY ? &proc[2] : bp->b_proc;
4286381Swnj 	if ((bp->b_flags & B_PHYS) == 0)
4291412Sbill 		pte = &Sysmap[btop(((int)bp->b_un.b_addr)&0x7fffffff)];
4306381Swnj 	else if (bp->b_flags & B_UAREA)
4316381Swnj 		pte = &rp->p_addr[v];
4326381Swnj 	else if (bp->b_flags & B_PAGET)
4336381Swnj 		pte = &Usrptmap[btokmx((struct pte *)bp->b_un.b_addr)];
4346381Swnj 	else
4356381Swnj 		pte = vtopte(rp, v);
4366381Swnj 	io = mbap->mba_map;
4376381Swnj 	while (--npf >= 0) {
4386381Swnj 		if (pte->pg_pfnum == 0)
4396381Swnj 			panic("mba, zero entry");
4406381Swnj 		*(int *)io++ = pte++->pg_pfnum | PG_V;
44128Sbill 	}
4421412Sbill 	*(int *)io++ = 0;
4436381Swnj 	return (o);
44428Sbill }
4452930Swnj 
4466181Sroot #if notdef
4473095Swnj /*
4483095Swnj  * Init and interrupt enable a massbus adapter.
4493095Swnj  */
4502930Swnj mbainit(mp)
4512930Swnj 	struct mba_regs *mp;
4522930Swnj {
4532930Swnj 
4543095Swnj 	mp->mba_cr = MBCR_INIT;
4553095Swnj 	mp->mba_cr = MBCR_IE;
4562930Swnj }
4572704Swnj #endif
4584966Swnj #endif
459