123310Smckusick /* 229266Smckusick * Copyright (c) 1982, 1986 Regents of the University of California. 323310Smckusick * All rights reserved. The Berkeley software License Agreement 423310Smckusick * specifies the terms and conditions for redistribution. 523310Smckusick * 6*45622Storek * @(#)ht.c 7.12 (Berkeley) 11/16/90 723310Smckusick */ 82961Swnj 92980Swnj #include "tu.h" 101563Sbill #if NHT > 0 1122Sbill /* 122926Swnj * TM03/TU?? tape driver 133094Swnj * 143094Swnj * TODO: 153204Swnj * cleanup messages on errors 163094Swnj * test ioctl's 173094Swnj * see how many rewind interrups we get if we kick when not at BOT 183204Swnj * fixup rle error on block tape code 1922Sbill */ 2017118Sbloom #include "param.h" 2117118Sbloom #include "systm.h" 2217118Sbloom #include "buf.h" 2317118Sbloom #include "conf.h" 2417118Sbloom #include "file.h" 2517118Sbloom #include "user.h" 2640898Ssklower #include "proc.h" 2717118Sbloom #include "map.h" 2817118Sbloom #include "ioctl.h" 2917118Sbloom #include "mtio.h" 3017118Sbloom #include "cmap.h" 3118325Sralph #include "tty.h" 3231036Skarels #include "syslog.h" 33*45622Storek #include "tprintf.h" 3422Sbill 3537509Smckusick #include "machine/pte.h" 368469Sroot #include "../vax/cpu.h" 3717118Sbloom #include "mbareg.h" 3817118Sbloom #include "mbavar.h" 3917118Sbloom #include "htreg.h" 4022Sbill 412926Swnj struct buf chtbuf[NHT]; 4222Sbill 432926Swnj short httypes[] = 443181Swnj { MBDT_TM03, MBDT_TE16, MBDT_TU45, MBDT_TU77, 0 }; 452980Swnj struct mba_device *htinfo[NHT]; 4631552Skarels struct mba_slave *tuinfo[NTU]; 473103Swnj int htattach(), htslave(), htustart(), htndtint(), htdtint(); 482926Swnj struct mba_driver htdriver = 492980Swnj { htattach, htslave, htustart, 0, htdtint, htndtint, 502980Swnj httypes, "ht", "tu", htinfo }; 5122Sbill 522926Swnj #define MASKREG(r) ((r) & 0xffff) 5322Sbill 542926Swnj /* bits in minor device */ 552980Swnj #define TUUNIT(dev) (minor(dev)&03) 562926Swnj #define H_NOREWIND 04 5731094Skarels #define H_DENS(dev) ((minor(dev) >> 3) & 03) 5822Sbill 5934220Sbostic #define HTUNIT(dev) (tuinfo[TUUNIT(dev)]->ms_ctlr) 602980Swnj 612926Swnj #define INF (daddr_t)1000000L /* a block number that wont exist */ 622926Swnj 633094Swnj struct tu_softc { 642926Swnj char sc_openf; 652926Swnj char sc_flags; 662926Swnj daddr_t sc_blkno; 672926Swnj daddr_t sc_nxrec; 682926Swnj u_short sc_erreg; 692926Swnj u_short sc_dsreg; 702926Swnj short sc_resid; 712926Swnj short sc_dens; 72*45622Storek caddr_t sc_tpr; /* tprintf handle for errors to user */ 7330918Skarels int sc_blks; /* number of I/O operations since open */ 7430918Skarels int sc_softerrs; /* number of soft I/O errors since open */ 753094Swnj } tu_softc[NTU]; 762926Swnj 772926Swnj /* 782926Swnj * Bits for sc_flags. 792926Swnj */ 802926Swnj #define H_WRITTEN 1 /* last operation was a write */ 812926Swnj #define H_ERASED 2 /* last write retry was an erase gap */ 822926Swnj #define H_REWIND 4 /* last unit start was a rewind */ 8322Sbill 843204Swnj char hter_bits[] = HTER_BITS; 853204Swnj char htds_bits[] = HTDS_BITS; 863204Swnj 872926Swnj /*ARGSUSED*/ 882980Swnj htattach(mi) 892980Swnj struct mba_device *mi; 902926Swnj { 912926Swnj 922926Swnj } 932926Swnj 947430Skre htslave(mi, ms, sn) 952980Swnj struct mba_device *mi; 962980Swnj struct mba_slave *ms; 977430Skre int sn; 982980Swnj { 994756Swnj register struct htdevice *htaddr = (struct htdevice *)mi->mi_drv; 1002980Swnj 1017430Skre htaddr->httc = sn; 1024756Swnj if (htaddr->htdt & HTDT_SPR) { 10331552Skarels tuinfo[ms->ms_unit] = ms; 1044756Swnj return (1); 1054756Swnj } else 1064756Swnj return (0); 1072980Swnj } 1082980Swnj 10931094Skarels int htdens[4] = { HTTC_800BPI, HTTC_1600BPI, HTTC_6250BPI, HTTC_800BPI }; 11031094Skarels 11122Sbill htopen(dev, flag) 1122926Swnj dev_t dev; 1132926Swnj int flag; 11422Sbill { 1153094Swnj register int tuunit; 1163094Swnj register struct tu_softc *sc; 11734220Sbostic register struct mba_slave *ms; 1183203Swnj int olddens, dens; 11922Sbill 1203094Swnj tuunit = TUUNIT(dev); 12134220Sbostic if (tuunit >= NTU || (ms = tuinfo[tuunit]) == NULL || 12234220Sbostic ms->ms_alive == 0 || htinfo[ms->ms_ctlr]->mi_alive == 0) 1238580Sroot return (ENXIO); 12425052Skarels if ((sc = &tu_softc[tuunit])->sc_openf) 12525052Skarels return (EBUSY); 12630918Skarels sc->sc_openf = 1; 1273203Swnj olddens = sc->sc_dens; 12834220Sbostic dens = sc->sc_dens = htdens[H_DENS(dev)] | HTTC_PDP11 | ms->ms_slave; 1293203Swnj htcommand(dev, HT_SENSE, 1); 1303203Swnj sc->sc_dens = olddens; 1313707Sroot if ((sc->sc_dsreg & HTDS_MOL) == 0) { 13230918Skarels sc->sc_openf = 0; 1333717Sroot uprintf("tu%d: not online\n", tuunit); 1348580Sroot return (EIO); 1352926Swnj } 1363707Sroot if ((flag&FWRITE) && (sc->sc_dsreg&HTDS_WRL)) { 13730918Skarels sc->sc_openf = 0; 1383717Sroot uprintf("tu%d: no write ring\n", tuunit); 1398580Sroot return (EIO); 1403707Sroot } 1413707Sroot if ((sc->sc_dsreg & HTDS_BOT) == 0 && (flag&FWRITE) && 1423707Sroot dens != sc->sc_dens) { 14330918Skarels sc->sc_openf = 0; 1443717Sroot uprintf("tu%d: can't change density in mid-tape\n", tuunit); 1458580Sroot return (EIO); 1463707Sroot } 1472926Swnj sc->sc_blkno = (daddr_t)0; 1482926Swnj sc->sc_nxrec = INF; 1492926Swnj sc->sc_flags = 0; 1503094Swnj sc->sc_dens = dens; 15130918Skarels sc->sc_blks = 0; 15230918Skarels sc->sc_softerrs = 0; 153*45622Storek sc->sc_tpr = tprintf_open(); 1548580Sroot return (0); 15522Sbill } 15622Sbill 15722Sbill htclose(dev, flag) 1582926Swnj register dev_t dev; 1592926Swnj register flag; 16022Sbill { 1613094Swnj register struct tu_softc *sc = &tu_softc[TUUNIT(dev)]; 16222Sbill 1632926Swnj if (flag == FWRITE || ((flag&FWRITE) && (sc->sc_flags&H_WRITTEN))) { 1642926Swnj htcommand(dev, HT_WEOF, 1); 1652926Swnj htcommand(dev, HT_WEOF, 1); 1662926Swnj htcommand(dev, HT_SREV, 1); 16722Sbill } 1682926Swnj if ((minor(dev)&H_NOREWIND) == 0) 1692926Swnj htcommand(dev, HT_REW, 0); 17030918Skarels if (sc->sc_blks > 100 && sc->sc_softerrs > sc->sc_blks / 100) 17130918Skarels log(LOG_INFO, "tu%d: %d soft errors in %d blocks\n", 17230918Skarels TUUNIT(dev), sc->sc_softerrs, sc->sc_blks); 173*45622Storek tprintf_close(sc->sc_tpr); 1742926Swnj sc->sc_openf = 0; 17540733Skarels return (0); 17622Sbill } 17722Sbill 1782926Swnj htcommand(dev, com, count) 1792926Swnj dev_t dev; 1802926Swnj int com, count; 18122Sbill { 18222Sbill register struct buf *bp; 1835436Sroot register int s; 18422Sbill 1852926Swnj bp = &chtbuf[HTUNIT(dev)]; 1865436Sroot s = spl5(); 1872926Swnj while (bp->b_flags&B_BUSY) { 1883157Swnj if(bp->b_repcnt == 0 && (bp->b_flags&B_DONE)) 1892980Swnj break; 19022Sbill bp->b_flags |= B_WANTED; 19122Sbill sleep((caddr_t)bp, PRIBIO); 19222Sbill } 1932943Swnj bp->b_flags = B_BUSY|B_READ; 1945436Sroot splx(s); 19522Sbill bp->b_dev = dev; 1962926Swnj bp->b_command = com; 1972926Swnj bp->b_repcnt = count; 19822Sbill bp->b_blkno = 0; 19922Sbill htstrategy(bp); 2002926Swnj if (count == 0) 2012926Swnj return; 20222Sbill iowait(bp); 2032926Swnj if (bp->b_flags&B_WANTED) 20422Sbill wakeup((caddr_t)bp); 2052926Swnj bp->b_flags &= B_ERROR; 20622Sbill } 20722Sbill 20822Sbill htstrategy(bp) 2092926Swnj register struct buf *bp; 21022Sbill { 2113094Swnj register struct mba_device *mi = htinfo[HTUNIT(bp->b_dev)]; 2122926Swnj register struct buf *dp; 2135436Sroot register int s; 21422Sbill 21522Sbill bp->av_forw = NULL; 2162926Swnj dp = &mi->mi_tab; 2175436Sroot s = spl5(); 2182926Swnj if (dp->b_actf == NULL) 2192926Swnj dp->b_actf = bp; 22022Sbill else 2212926Swnj dp->b_actl->av_forw = bp; 2222926Swnj dp->b_actl = bp; 2232926Swnj if (dp->b_active == 0) 2242926Swnj mbustart(mi); 2255436Sroot splx(s); 22622Sbill } 22722Sbill 2282926Swnj htustart(mi) 2292980Swnj register struct mba_device *mi; 23022Sbill { 2312926Swnj register struct htdevice *htaddr = 2322926Swnj (struct htdevice *)mi->mi_drv; 2332926Swnj register struct buf *bp = mi->mi_tab.b_actf; 2343094Swnj register struct tu_softc *sc = &tu_softc[TUUNIT(bp->b_dev)]; 23522Sbill daddr_t blkno; 23622Sbill 2372926Swnj htaddr->httc = sc->sc_dens; 23815108Skarels #ifdef notdef 23915108Skarels /* unneeded, may hang controller */ 2403181Swnj if (bp == &chtbuf[HTUNIT(bp->b_dev)] && bp->b_command == HT_SENSE) { 2413157Swnj htaddr->htcs1 = HT_SENSE|HT_GO; 2423157Swnj mbclrattn(mi); 2433157Swnj } 24415108Skarels #endif 2452926Swnj sc->sc_dsreg = htaddr->htds; 2462926Swnj sc->sc_erreg = htaddr->hter; 2472926Swnj sc->sc_resid = htaddr->htfc; 2482926Swnj sc->sc_flags &= ~(H_WRITTEN|H_REWIND); 2492926Swnj if ((htaddr->htdt & HTDT_SPR) == 0 || (htaddr->htds & HTDS_MOL) == 0) 2502926Swnj if (sc->sc_openf > 0) 2512926Swnj sc->sc_openf = -1; 2522926Swnj if (sc->sc_openf < 0) { 2532926Swnj bp->b_flags |= B_ERROR; 2542926Swnj return (MBU_NEXT); 2552926Swnj } 2563094Swnj if (bp != &chtbuf[HTUNIT(bp->b_dev)]) { 25734220Sbostic /* transfer: check positioning */ 25834220Sbostic if (bp->b_flags & B_RAW) { 25934220Sbostic /* raw transfer: record position for retry */ 26034220Sbostic if (mi->mi_tab.b_errcnt == 0) { 26134220Sbostic sc->sc_blkno = bdbtofsb(bp->b_blkno); 26234220Sbostic sc->sc_nxrec = sc->sc_blkno + 1; 26334220Sbostic } 26434220Sbostic } else { 26534220Sbostic if (bdbtofsb(bp->b_blkno) > sc->sc_nxrec) { 26634220Sbostic bp->b_flags |= B_ERROR; 26734220Sbostic bp->b_error = ENXIO; 26834220Sbostic return (MBU_NEXT); 26934220Sbostic } 27034220Sbostic if (bdbtofsb(bp->b_blkno) == sc->sc_nxrec && 27134220Sbostic bp->b_flags&B_READ) { 27234220Sbostic bp->b_resid = bp->b_bcount; 27334220Sbostic clrbuf(bp); 27434220Sbostic return (MBU_NEXT); 27534220Sbostic } 27634220Sbostic if ((bp->b_flags&B_READ)==0) 27734220Sbostic sc->sc_nxrec = bdbtofsb(bp->b_blkno) + 1; 2783094Swnj } 2792926Swnj } else { 2802961Swnj if (bp->b_command == HT_SENSE) 2812926Swnj return (MBU_NEXT); 2822926Swnj if (bp->b_command == HT_REW) 2832926Swnj sc->sc_flags |= H_REWIND; 2842926Swnj else 2852926Swnj htaddr->htfc = -bp->b_bcount; 2862926Swnj htaddr->htcs1 = bp->b_command|HT_GO; 2872926Swnj return (MBU_STARTED); 2882926Swnj } 2897379Ssam if ((blkno = sc->sc_blkno) == bdbtofsb(bp->b_blkno)) { 2902926Swnj htaddr->htfc = -bp->b_bcount; 2912926Swnj if ((bp->b_flags&B_READ) == 0) { 2923094Swnj if (mi->mi_tab.b_errcnt) { 2933094Swnj if ((sc->sc_flags & H_ERASED) == 0) { 2942926Swnj sc->sc_flags |= H_ERASED; 2952926Swnj htaddr->htcs1 = HT_ERASE | HT_GO; 2962926Swnj return (MBU_STARTED); 2972926Swnj } 2983094Swnj sc->sc_flags &= ~H_ERASED; 2993094Swnj } 3002926Swnj if (htaddr->htds & HTDS_EOT) { 3012926Swnj bp->b_resid = bp->b_bcount; 3026812Swnj bp->b_flags |= B_ERROR; 3032926Swnj return (MBU_NEXT); 3042926Swnj } 30522Sbill } 3062926Swnj return (MBU_DODATA); 30722Sbill } 3087379Ssam if (blkno < bdbtofsb(bp->b_blkno)) { 3097379Ssam htaddr->htfc = blkno - bdbtofsb(bp->b_blkno); 3102926Swnj htaddr->htcs1 = HT_SFORW|HT_GO; 31122Sbill } else { 3127379Ssam htaddr->htfc = bdbtofsb(bp->b_blkno) - blkno; 3132926Swnj htaddr->htcs1 = HT_SREV|HT_GO; 31422Sbill } 3152926Swnj return (MBU_STARTED); 31622Sbill } 31722Sbill 3183094Swnj htdtint(mi, mbsr) 3192980Swnj register struct mba_device *mi; 3203094Swnj int mbsr; 32122Sbill { 3222926Swnj register struct htdevice *htaddr = (struct htdevice *)mi->mi_drv; 3232926Swnj register struct buf *bp = mi->mi_tab.b_actf; 3243094Swnj register struct tu_softc *sc; 3252961Swnj int ds, er, mbs; 32622Sbill 3273094Swnj sc = &tu_softc[TUUNIT(bp->b_dev)]; 3282926Swnj ds = sc->sc_dsreg = MASKREG(htaddr->htds); 3292926Swnj er = sc->sc_erreg = MASKREG(htaddr->hter); 3302926Swnj sc->sc_resid = MASKREG(htaddr->htfc); 3313094Swnj mbs = mbsr; 3322926Swnj sc->sc_blkno++; 3332926Swnj if((bp->b_flags & B_READ) == 0) 3342926Swnj sc->sc_flags |= H_WRITTEN; 3353094Swnj if ((ds&(HTDS_ERR|HTDS_MOL)) != HTDS_MOL || mbs & MBSR_EBITS) { 3362926Swnj htaddr->htcs1 = HT_DCLR|HT_GO; 3372961Swnj mbclrattn(mi); 33834220Sbostic if (bp->b_flags & B_RAW) { 3392926Swnj er &= ~HTER_FCE; 3403094Swnj mbs &= ~(MBSR_DTABT|MBSR_MBEXC); 3414276Sroot } 3422926Swnj if (bp->b_flags & B_READ && ds & HTDS_PES) 3432926Swnj er &= ~(HTER_CSITM|HTER_CORCRC); 3443094Swnj if (er&HTER_HARD || mbs&MBSR_EBITS || (ds&HTDS_MOL) == 0 || 3452961Swnj er && ++mi->mi_tab.b_errcnt >= 7) { 3462926Swnj if ((ds & HTDS_MOL) == 0 && sc->sc_openf > 0) 3472926Swnj sc->sc_openf = -1; 3483157Swnj if ((er&HTER_HARD) == HTER_FCE && 3493157Swnj (mbs&MBSR_EBITS) == (MBSR_DTABT|MBSR_MBEXC) && 3503157Swnj (ds&HTDS_MOL)) 3513157Swnj goto noprint; 352*45622Storek tprintf(sc->sc_tpr, 353*45622Storek "tu%d: hard error bn%d mbsr=%b er=%b ds=%b\n", 3542980Swnj TUUNIT(bp->b_dev), bp->b_blkno, 3553094Swnj mbsr, mbsr_bits, 3563204Swnj sc->sc_erreg, hter_bits, 3573204Swnj sc->sc_dsreg, htds_bits); 3583157Swnj noprint: 35922Sbill bp->b_flags |= B_ERROR; 3602926Swnj return (MBD_DONE); 36122Sbill } 3622926Swnj if (er) 3632926Swnj return (MBD_RETRY); 36422Sbill } 3652926Swnj bp->b_resid = 0; 36630918Skarels sc->sc_blks++; 36730918Skarels if (mi->mi_tab.b_errcnt) 36830918Skarels sc->sc_softerrs++; 3692926Swnj if (bp->b_flags & B_READ) 3702926Swnj if (ds&HTDS_TM) { /* must be a read, right? */ 3712926Swnj bp->b_resid = bp->b_bcount; 3727379Ssam sc->sc_nxrec = bdbtofsb(bp->b_blkno); 3732926Swnj } else if(bp->b_bcount > MASKREG(htaddr->htfc)) 3742926Swnj bp->b_resid = bp->b_bcount - MASKREG(htaddr->htfc); 3752926Swnj return (MBD_DONE); 3762926Swnj } 37722Sbill 3782926Swnj htndtint(mi) 3792980Swnj register struct mba_device *mi; 3802926Swnj { 3812926Swnj register struct htdevice *htaddr = (struct htdevice *)mi->mi_drv; 3822926Swnj register struct buf *bp = mi->mi_tab.b_actf; 3833094Swnj register struct tu_softc *sc; 3842926Swnj int er, ds, fc; 38522Sbill 3863094Swnj ds = MASKREG(htaddr->htds); 3873094Swnj er = MASKREG(htaddr->hter); 3883094Swnj fc = MASKREG(htaddr->htfc); 3893094Swnj if (er) { 3902926Swnj htaddr->htcs1 = HT_DCLR|HT_GO; 3912961Swnj mbclrattn(mi); 3922961Swnj } 3933094Swnj if (bp == 0) 3943094Swnj return (MBN_SKIP); 3953094Swnj sc = &tu_softc[TUUNIT(bp->b_dev)]; 3963094Swnj sc->sc_dsreg = ds; 3973094Swnj sc->sc_erreg = er; 3983094Swnj sc->sc_resid = fc; 3993094Swnj if (bp == &chtbuf[HTUNIT(bp->b_dev)]) { 40026290Skarels switch ((int)bp->b_command) { 4013094Swnj case HT_REWOFFL: 4022926Swnj /* offline is on purpose; don't do anything special */ 4032926Swnj ds |= HTDS_MOL; 4043094Swnj break; 4053094Swnj case HT_SREV: 4063094Swnj /* if backspace file hit bot, its not an error */ 4073094Swnj if (er == (HTER_NEF|HTER_FCE) && ds&HTDS_BOT && 4083094Swnj bp->b_repcnt == INF) 4093094Swnj er &= ~HTER_NEF; 4103094Swnj break; 4113094Swnj } 4122926Swnj er &= ~HTER_FCE; 4132926Swnj if (er == 0) 4142926Swnj ds &= ~HTDS_ERR; 41522Sbill } 4162926Swnj if ((ds & (HTDS_ERR|HTDS_MOL)) != HTDS_MOL) { 4172926Swnj if ((ds & HTDS_MOL) == 0 && sc->sc_openf > 0) 4182926Swnj sc->sc_openf = -1; 419*45622Storek tprintf(sc->sc_tpr, "tu%d: hard error bn%d er=%b ds=%b\n", 4202980Swnj TUUNIT(bp->b_dev), bp->b_blkno, 4213204Swnj sc->sc_erreg, hter_bits, sc->sc_dsreg, htds_bits); 4222926Swnj bp->b_flags |= B_ERROR; 4232926Swnj return (MBN_DONE); 4242926Swnj } 4253094Swnj if (bp == &chtbuf[HTUNIT(bp->b_dev)]) { 4262926Swnj if (sc->sc_flags & H_REWIND) 4272926Swnj return (ds & HTDS_BOT ? MBN_DONE : MBN_RETRY); 4282926Swnj bp->b_resid = -sc->sc_resid; 4292926Swnj return (MBN_DONE); 4302926Swnj } 4312926Swnj if (ds & HTDS_TM) 4327379Ssam if (sc->sc_blkno > bdbtofsb(bp->b_blkno)) { 4337379Ssam sc->sc_nxrec = bdbtofsb(bp->b_blkno) - fc; 4342926Swnj sc->sc_blkno = sc->sc_nxrec; 4353094Swnj } else { 4367379Ssam sc->sc_blkno = bdbtofsb(bp->b_blkno) + fc; 4372926Swnj sc->sc_nxrec = sc->sc_blkno - 1; 4382926Swnj } 4392926Swnj else 4407379Ssam sc->sc_blkno = bdbtofsb(bp->b_blkno); 4412926Swnj return (MBN_RETRY); 44222Sbill } 44322Sbill 4442926Swnj /*ARGSUSED*/ 4457636Ssam htioctl(dev, cmd, data, flag) 4462926Swnj dev_t dev; 4472926Swnj int cmd; 4487636Ssam caddr_t data; 4492926Swnj int flag; 4502926Swnj { 4513094Swnj register struct tu_softc *sc = &tu_softc[TUUNIT(dev)]; 4523094Swnj register struct buf *bp = &chtbuf[HTUNIT(dev)]; 4532926Swnj register callcount; 454*45622Storek int fcount; 4557636Ssam struct mtop *mtop; 4567636Ssam struct mtget *mtget; 4572926Swnj /* we depend of the values and order of the MT codes here */ 4582926Swnj static htops[] = 4592926Swnj {HT_WEOF,HT_SFORW,HT_SREV,HT_SFORW,HT_SREV,HT_REW,HT_REWOFFL,HT_SENSE}; 4601917Swnj 4612926Swnj switch (cmd) { 4627636Ssam 4637636Ssam case MTIOCTOP: /* tape operation */ 4647636Ssam mtop = (struct mtop *)data; 4657636Ssam switch (mtop->mt_op) { 4667636Ssam 4672926Swnj case MTWEOF: 4687636Ssam callcount = mtop->mt_count; 4692926Swnj fcount = 1; 4702926Swnj break; 4717636Ssam 4722926Swnj case MTFSF: case MTBSF: 4737636Ssam callcount = mtop->mt_count; 4742926Swnj fcount = INF; 4752926Swnj break; 4767636Ssam 4772926Swnj case MTFSR: case MTBSR: 4782926Swnj callcount = 1; 4797636Ssam fcount = mtop->mt_count; 4802926Swnj break; 4817636Ssam 4822926Swnj case MTREW: case MTOFFL: 4832926Swnj callcount = 1; 4842926Swnj fcount = 1; 4852926Swnj break; 4867636Ssam 4872926Swnj default: 4888580Sroot return (ENXIO); 4892926Swnj } 4908580Sroot if (callcount <= 0 || fcount <= 0) 4918580Sroot return (EINVAL); 4922926Swnj while (--callcount >= 0) { 4937636Ssam htcommand(dev, htops[mtop->mt_op], fcount); 4947636Ssam if ((mtop->mt_op == MTFSR || mtop->mt_op == MTBSR) && 4958580Sroot bp->b_resid) 4968580Sroot return (EIO); 4973094Swnj if ((bp->b_flags&B_ERROR) || sc->sc_dsreg&HTDS_BOT) 4982926Swnj break; 4992926Swnj } 50040909Ssklower if (bp->b_flags&B_ERROR) 501*45622Storek return (bp->b_error ? bp->b_error : EIO); 502*45622Storek return (0); 5037636Ssam 5042926Swnj case MTIOCGET: 5057636Ssam mtget = (struct mtget *)data; 5067636Ssam mtget->mt_dsreg = sc->sc_dsreg; 5077636Ssam mtget->mt_erreg = sc->sc_erreg; 5087636Ssam mtget->mt_resid = sc->sc_resid; 5097636Ssam mtget->mt_type = MT_ISHT; 5108580Sroot break; 5117636Ssam 5122926Swnj default: 5138580Sroot return (ENXIO); 5142926Swnj } 5158580Sroot return (0); 5162926Swnj } 5172926Swnj 5181917Swnj #define DBSIZE 20 5191917Swnj 5202926Swnj htdump() 5211917Swnj { 5222980Swnj register struct mba_device *mi; 5232926Swnj register struct mba_regs *mp; 5242926Swnj register struct htdevice *htaddr; 5252926Swnj int blk, num; 5262926Swnj int start; 5271917Swnj 5282926Swnj start = 0; 5292926Swnj num = maxfree; 5302926Swnj #define phys(a,b) ((b)((int)(a)&0x7fffffff)) 5312926Swnj if (htinfo[0] == 0) 5322926Swnj return (ENXIO); 5332980Swnj mi = phys(htinfo[0], struct mba_device *); 5342926Swnj mp = phys(mi->mi_hd, struct mba_hd *)->mh_physmba; 5353157Swnj mp->mba_cr = MBCR_IE; 5362926Swnj htaddr = (struct htdevice *)&mp->mba_drv[mi->mi_drive]; 5372926Swnj htaddr->httc = HTTC_PDP11|HTTC_1600BPI; 5382926Swnj htaddr->htcs1 = HT_DCLR|HT_GO; 5391917Swnj while (num > 0) { 5401917Swnj blk = num > DBSIZE ? DBSIZE : num; 5412926Swnj htdwrite(start, blk, htaddr, mp); 5422926Swnj start += blk; 5431917Swnj num -= blk; 5441917Swnj } 5453157Swnj hteof(htaddr); 5463157Swnj hteof(htaddr); 5472926Swnj htwait(htaddr); 5483181Swnj if (htaddr->htds&HTDS_ERR) 5493157Swnj return (EIO); 5502926Swnj htaddr->htcs1 = HT_REW|HT_GO; 5513103Swnj return (0); 5521917Swnj } 5531917Swnj 5542926Swnj htdwrite(dbuf, num, htaddr, mp) 5552926Swnj register dbuf, num; 5562926Swnj register struct htdevice *htaddr; 5572926Swnj struct mba_regs *mp; 5581917Swnj { 5592926Swnj register struct pte *io; 5601917Swnj register int i; 5611917Swnj 5622926Swnj htwait(htaddr); 5632926Swnj io = mp->mba_map; 5641917Swnj for (i = 0; i < num; i++) 5652926Swnj *(int *)io++ = dbuf++ | PG_V; 5662926Swnj htaddr->htfc = -(num*NBPG); 5672926Swnj mp->mba_sr = -1; 5682926Swnj mp->mba_bcr = -(num*NBPG); 5692926Swnj mp->mba_var = 0; 5702926Swnj htaddr->htcs1 = HT_WCOM|HT_GO; 5711917Swnj } 5721917Swnj 5732926Swnj htwait(htaddr) 5742926Swnj struct htdevice *htaddr; 5751917Swnj { 5761917Swnj register s; 5771917Swnj 5781917Swnj do 5792926Swnj s = htaddr->htds; 5802926Swnj while ((s & HTDS_DRY) == 0); 5811917Swnj } 5821917Swnj 5832926Swnj hteof(htaddr) 5842926Swnj struct htdevice *htaddr; 5851917Swnj { 5861917Swnj 5872926Swnj htwait(htaddr); 5882926Swnj htaddr->htcs1 = HT_WEOF|HT_GO; 5891917Swnj } 5901563Sbill #endif 591