123310Smckusick /* 229266Smckusick * Copyright (c) 1982, 1986 Regents of the University of California. 323310Smckusick * All rights reserved. The Berkeley software License Agreement 423310Smckusick * specifies the terms and conditions for redistribution. 523310Smckusick * 6*40733Skarels * @(#)ht.c 7.9 (Berkeley) 04/03/90 723310Smckusick */ 82961Swnj 92980Swnj #include "tu.h" 101563Sbill #if NHT > 0 1122Sbill /* 122926Swnj * TM03/TU?? tape driver 133094Swnj * 143094Swnj * TODO: 153204Swnj * cleanup messages on errors 163094Swnj * test ioctl's 173094Swnj * see how many rewind interrups we get if we kick when not at BOT 183204Swnj * fixup rle error on block tape code 1922Sbill */ 2017118Sbloom #include "param.h" 2117118Sbloom #include "systm.h" 2217118Sbloom #include "buf.h" 2317118Sbloom #include "conf.h" 2417118Sbloom #include "file.h" 2517118Sbloom #include "user.h" 2617118Sbloom #include "map.h" 2717118Sbloom #include "ioctl.h" 2817118Sbloom #include "mtio.h" 2917118Sbloom #include "cmap.h" 3018325Sralph #include "tty.h" 3131036Skarels #include "syslog.h" 3222Sbill 3337509Smckusick #include "machine/pte.h" 348469Sroot #include "../vax/cpu.h" 3517118Sbloom #include "mbareg.h" 3617118Sbloom #include "mbavar.h" 3717118Sbloom #include "htreg.h" 3822Sbill 392926Swnj struct buf chtbuf[NHT]; 4022Sbill 412926Swnj short httypes[] = 423181Swnj { MBDT_TM03, MBDT_TE16, MBDT_TU45, MBDT_TU77, 0 }; 432980Swnj struct mba_device *htinfo[NHT]; 4431552Skarels struct mba_slave *tuinfo[NTU]; 453103Swnj int htattach(), htslave(), htustart(), htndtint(), htdtint(); 462926Swnj struct mba_driver htdriver = 472980Swnj { htattach, htslave, htustart, 0, htdtint, htndtint, 482980Swnj httypes, "ht", "tu", htinfo }; 4922Sbill 502926Swnj #define MASKREG(r) ((r) & 0xffff) 5122Sbill 522926Swnj /* bits in minor device */ 532980Swnj #define TUUNIT(dev) (minor(dev)&03) 542926Swnj #define H_NOREWIND 04 5531094Skarels #define H_DENS(dev) ((minor(dev) >> 3) & 03) 5622Sbill 5734220Sbostic #define HTUNIT(dev) (tuinfo[TUUNIT(dev)]->ms_ctlr) 582980Swnj 592926Swnj #define INF (daddr_t)1000000L /* a block number that wont exist */ 602926Swnj 613094Swnj struct tu_softc { 622926Swnj char sc_openf; 632926Swnj char sc_flags; 642926Swnj daddr_t sc_blkno; 652926Swnj daddr_t sc_nxrec; 662926Swnj u_short sc_erreg; 672926Swnj u_short sc_dsreg; 682926Swnj short sc_resid; 692926Swnj short sc_dens; 7018325Sralph struct tty *sc_ttyp; /* record user's tty for errors */ 7130918Skarels int sc_blks; /* number of I/O operations since open */ 7230918Skarels int sc_softerrs; /* number of soft I/O errors since open */ 733094Swnj } tu_softc[NTU]; 742926Swnj 752926Swnj /* 762926Swnj * Bits for sc_flags. 772926Swnj */ 782926Swnj #define H_WRITTEN 1 /* last operation was a write */ 792926Swnj #define H_ERASED 2 /* last write retry was an erase gap */ 802926Swnj #define H_REWIND 4 /* last unit start was a rewind */ 8122Sbill 823204Swnj char hter_bits[] = HTER_BITS; 833204Swnj char htds_bits[] = HTDS_BITS; 843204Swnj 852926Swnj /*ARGSUSED*/ 862980Swnj htattach(mi) 872980Swnj struct mba_device *mi; 882926Swnj { 892926Swnj 902926Swnj } 912926Swnj 927430Skre htslave(mi, ms, sn) 932980Swnj struct mba_device *mi; 942980Swnj struct mba_slave *ms; 957430Skre int sn; 962980Swnj { 974756Swnj register struct htdevice *htaddr = (struct htdevice *)mi->mi_drv; 982980Swnj 997430Skre htaddr->httc = sn; 1004756Swnj if (htaddr->htdt & HTDT_SPR) { 10131552Skarels tuinfo[ms->ms_unit] = ms; 1024756Swnj return (1); 1034756Swnj } else 1044756Swnj return (0); 1052980Swnj } 1062980Swnj 10731094Skarels int htdens[4] = { HTTC_800BPI, HTTC_1600BPI, HTTC_6250BPI, HTTC_800BPI }; 10831094Skarels 10922Sbill htopen(dev, flag) 1102926Swnj dev_t dev; 1112926Swnj int flag; 11222Sbill { 1133094Swnj register int tuunit; 1143094Swnj register struct tu_softc *sc; 11534220Sbostic register struct mba_slave *ms; 1163203Swnj int olddens, dens; 11722Sbill 1183094Swnj tuunit = TUUNIT(dev); 11934220Sbostic if (tuunit >= NTU || (ms = tuinfo[tuunit]) == NULL || 12034220Sbostic ms->ms_alive == 0 || htinfo[ms->ms_ctlr]->mi_alive == 0) 1218580Sroot return (ENXIO); 12225052Skarels if ((sc = &tu_softc[tuunit])->sc_openf) 12325052Skarels return (EBUSY); 12430918Skarels sc->sc_openf = 1; 1253203Swnj olddens = sc->sc_dens; 12634220Sbostic dens = sc->sc_dens = htdens[H_DENS(dev)] | HTTC_PDP11 | ms->ms_slave; 1273203Swnj htcommand(dev, HT_SENSE, 1); 1283203Swnj sc->sc_dens = olddens; 1293707Sroot if ((sc->sc_dsreg & HTDS_MOL) == 0) { 13030918Skarels sc->sc_openf = 0; 1313717Sroot uprintf("tu%d: not online\n", tuunit); 1328580Sroot return (EIO); 1332926Swnj } 1343707Sroot if ((flag&FWRITE) && (sc->sc_dsreg&HTDS_WRL)) { 13530918Skarels sc->sc_openf = 0; 1363717Sroot uprintf("tu%d: no write ring\n", tuunit); 1378580Sroot return (EIO); 1383707Sroot } 1393707Sroot if ((sc->sc_dsreg & HTDS_BOT) == 0 && (flag&FWRITE) && 1403707Sroot dens != sc->sc_dens) { 14130918Skarels sc->sc_openf = 0; 1423717Sroot uprintf("tu%d: can't change density in mid-tape\n", tuunit); 1438580Sroot return (EIO); 1443707Sroot } 1452926Swnj sc->sc_blkno = (daddr_t)0; 1462926Swnj sc->sc_nxrec = INF; 1472926Swnj sc->sc_flags = 0; 1483094Swnj sc->sc_dens = dens; 14930918Skarels sc->sc_blks = 0; 15030918Skarels sc->sc_softerrs = 0; 15118325Sralph sc->sc_ttyp = u.u_ttyp; 1528580Sroot return (0); 15322Sbill } 15422Sbill 15522Sbill htclose(dev, flag) 1562926Swnj register dev_t dev; 1572926Swnj register flag; 15822Sbill { 1593094Swnj register struct tu_softc *sc = &tu_softc[TUUNIT(dev)]; 16022Sbill 1612926Swnj if (flag == FWRITE || ((flag&FWRITE) && (sc->sc_flags&H_WRITTEN))) { 1622926Swnj htcommand(dev, HT_WEOF, 1); 1632926Swnj htcommand(dev, HT_WEOF, 1); 1642926Swnj htcommand(dev, HT_SREV, 1); 16522Sbill } 1662926Swnj if ((minor(dev)&H_NOREWIND) == 0) 1672926Swnj htcommand(dev, HT_REW, 0); 16830918Skarels if (sc->sc_blks > 100 && sc->sc_softerrs > sc->sc_blks / 100) 16930918Skarels log(LOG_INFO, "tu%d: %d soft errors in %d blocks\n", 17030918Skarels TUUNIT(dev), sc->sc_softerrs, sc->sc_blks); 1712926Swnj sc->sc_openf = 0; 172*40733Skarels return (0); 17322Sbill } 17422Sbill 1752926Swnj htcommand(dev, com, count) 1762926Swnj dev_t dev; 1772926Swnj int com, count; 17822Sbill { 17922Sbill register struct buf *bp; 1805436Sroot register int s; 18122Sbill 1822926Swnj bp = &chtbuf[HTUNIT(dev)]; 1835436Sroot s = spl5(); 1842926Swnj while (bp->b_flags&B_BUSY) { 1853157Swnj if(bp->b_repcnt == 0 && (bp->b_flags&B_DONE)) 1862980Swnj break; 18722Sbill bp->b_flags |= B_WANTED; 18822Sbill sleep((caddr_t)bp, PRIBIO); 18922Sbill } 1902943Swnj bp->b_flags = B_BUSY|B_READ; 1915436Sroot splx(s); 19222Sbill bp->b_dev = dev; 1932926Swnj bp->b_command = com; 1942926Swnj bp->b_repcnt = count; 19522Sbill bp->b_blkno = 0; 19622Sbill htstrategy(bp); 1972926Swnj if (count == 0) 1982926Swnj return; 19922Sbill iowait(bp); 2002926Swnj if (bp->b_flags&B_WANTED) 20122Sbill wakeup((caddr_t)bp); 2022926Swnj bp->b_flags &= B_ERROR; 20322Sbill } 20422Sbill 20522Sbill htstrategy(bp) 2062926Swnj register struct buf *bp; 20722Sbill { 2083094Swnj register struct mba_device *mi = htinfo[HTUNIT(bp->b_dev)]; 2092926Swnj register struct buf *dp; 2105436Sroot register int s; 21122Sbill 21222Sbill bp->av_forw = NULL; 2132926Swnj dp = &mi->mi_tab; 2145436Sroot s = spl5(); 2152926Swnj if (dp->b_actf == NULL) 2162926Swnj dp->b_actf = bp; 21722Sbill else 2182926Swnj dp->b_actl->av_forw = bp; 2192926Swnj dp->b_actl = bp; 2202926Swnj if (dp->b_active == 0) 2212926Swnj mbustart(mi); 2225436Sroot splx(s); 22322Sbill } 22422Sbill 2252926Swnj htustart(mi) 2262980Swnj register struct mba_device *mi; 22722Sbill { 2282926Swnj register struct htdevice *htaddr = 2292926Swnj (struct htdevice *)mi->mi_drv; 2302926Swnj register struct buf *bp = mi->mi_tab.b_actf; 2313094Swnj register struct tu_softc *sc = &tu_softc[TUUNIT(bp->b_dev)]; 23222Sbill daddr_t blkno; 23322Sbill 2342926Swnj htaddr->httc = sc->sc_dens; 23515108Skarels #ifdef notdef 23615108Skarels /* unneeded, may hang controller */ 2373181Swnj if (bp == &chtbuf[HTUNIT(bp->b_dev)] && bp->b_command == HT_SENSE) { 2383157Swnj htaddr->htcs1 = HT_SENSE|HT_GO; 2393157Swnj mbclrattn(mi); 2403157Swnj } 24115108Skarels #endif 2422926Swnj sc->sc_dsreg = htaddr->htds; 2432926Swnj sc->sc_erreg = htaddr->hter; 2442926Swnj sc->sc_resid = htaddr->htfc; 2452926Swnj sc->sc_flags &= ~(H_WRITTEN|H_REWIND); 2462926Swnj if ((htaddr->htdt & HTDT_SPR) == 0 || (htaddr->htds & HTDS_MOL) == 0) 2472926Swnj if (sc->sc_openf > 0) 2482926Swnj sc->sc_openf = -1; 2492926Swnj if (sc->sc_openf < 0) { 2502926Swnj bp->b_flags |= B_ERROR; 2512926Swnj return (MBU_NEXT); 2522926Swnj } 2533094Swnj if (bp != &chtbuf[HTUNIT(bp->b_dev)]) { 25434220Sbostic /* transfer: check positioning */ 25534220Sbostic if (bp->b_flags & B_RAW) { 25634220Sbostic /* raw transfer: record position for retry */ 25734220Sbostic if (mi->mi_tab.b_errcnt == 0) { 25834220Sbostic sc->sc_blkno = bdbtofsb(bp->b_blkno); 25934220Sbostic sc->sc_nxrec = sc->sc_blkno + 1; 26034220Sbostic } 26134220Sbostic } else { 26234220Sbostic if (bdbtofsb(bp->b_blkno) > sc->sc_nxrec) { 26334220Sbostic bp->b_flags |= B_ERROR; 26434220Sbostic bp->b_error = ENXIO; 26534220Sbostic return (MBU_NEXT); 26634220Sbostic } 26734220Sbostic if (bdbtofsb(bp->b_blkno) == sc->sc_nxrec && 26834220Sbostic bp->b_flags&B_READ) { 26934220Sbostic bp->b_resid = bp->b_bcount; 27034220Sbostic clrbuf(bp); 27134220Sbostic return (MBU_NEXT); 27234220Sbostic } 27334220Sbostic if ((bp->b_flags&B_READ)==0) 27434220Sbostic sc->sc_nxrec = bdbtofsb(bp->b_blkno) + 1; 2753094Swnj } 2762926Swnj } else { 2772961Swnj if (bp->b_command == HT_SENSE) 2782926Swnj return (MBU_NEXT); 2792926Swnj if (bp->b_command == HT_REW) 2802926Swnj sc->sc_flags |= H_REWIND; 2812926Swnj else 2822926Swnj htaddr->htfc = -bp->b_bcount; 2832926Swnj htaddr->htcs1 = bp->b_command|HT_GO; 2842926Swnj return (MBU_STARTED); 2852926Swnj } 2867379Ssam if ((blkno = sc->sc_blkno) == bdbtofsb(bp->b_blkno)) { 2872926Swnj htaddr->htfc = -bp->b_bcount; 2882926Swnj if ((bp->b_flags&B_READ) == 0) { 2893094Swnj if (mi->mi_tab.b_errcnt) { 2903094Swnj if ((sc->sc_flags & H_ERASED) == 0) { 2912926Swnj sc->sc_flags |= H_ERASED; 2922926Swnj htaddr->htcs1 = HT_ERASE | HT_GO; 2932926Swnj return (MBU_STARTED); 2942926Swnj } 2953094Swnj sc->sc_flags &= ~H_ERASED; 2963094Swnj } 2972926Swnj if (htaddr->htds & HTDS_EOT) { 2982926Swnj bp->b_resid = bp->b_bcount; 2996812Swnj bp->b_flags |= B_ERROR; 3002926Swnj return (MBU_NEXT); 3012926Swnj } 30222Sbill } 3032926Swnj return (MBU_DODATA); 30422Sbill } 3057379Ssam if (blkno < bdbtofsb(bp->b_blkno)) { 3067379Ssam htaddr->htfc = blkno - bdbtofsb(bp->b_blkno); 3072926Swnj htaddr->htcs1 = HT_SFORW|HT_GO; 30822Sbill } else { 3097379Ssam htaddr->htfc = bdbtofsb(bp->b_blkno) - blkno; 3102926Swnj htaddr->htcs1 = HT_SREV|HT_GO; 31122Sbill } 3122926Swnj return (MBU_STARTED); 31322Sbill } 31422Sbill 3153094Swnj htdtint(mi, mbsr) 3162980Swnj register struct mba_device *mi; 3173094Swnj int mbsr; 31822Sbill { 3192926Swnj register struct htdevice *htaddr = (struct htdevice *)mi->mi_drv; 3202926Swnj register struct buf *bp = mi->mi_tab.b_actf; 3213094Swnj register struct tu_softc *sc; 3222961Swnj int ds, er, mbs; 32322Sbill 3243094Swnj sc = &tu_softc[TUUNIT(bp->b_dev)]; 3252926Swnj ds = sc->sc_dsreg = MASKREG(htaddr->htds); 3262926Swnj er = sc->sc_erreg = MASKREG(htaddr->hter); 3272926Swnj sc->sc_resid = MASKREG(htaddr->htfc); 3283094Swnj mbs = mbsr; 3292926Swnj sc->sc_blkno++; 3302926Swnj if((bp->b_flags & B_READ) == 0) 3312926Swnj sc->sc_flags |= H_WRITTEN; 3323094Swnj if ((ds&(HTDS_ERR|HTDS_MOL)) != HTDS_MOL || mbs & MBSR_EBITS) { 3332926Swnj htaddr->htcs1 = HT_DCLR|HT_GO; 3342961Swnj mbclrattn(mi); 33534220Sbostic if (bp->b_flags & B_RAW) { 3362926Swnj er &= ~HTER_FCE; 3373094Swnj mbs &= ~(MBSR_DTABT|MBSR_MBEXC); 3384276Sroot } 3392926Swnj if (bp->b_flags & B_READ && ds & HTDS_PES) 3402926Swnj er &= ~(HTER_CSITM|HTER_CORCRC); 3413094Swnj if (er&HTER_HARD || mbs&MBSR_EBITS || (ds&HTDS_MOL) == 0 || 3422961Swnj er && ++mi->mi_tab.b_errcnt >= 7) { 3432926Swnj if ((ds & HTDS_MOL) == 0 && sc->sc_openf > 0) 3442926Swnj sc->sc_openf = -1; 3453157Swnj if ((er&HTER_HARD) == HTER_FCE && 3463157Swnj (mbs&MBSR_EBITS) == (MBSR_DTABT|MBSR_MBEXC) && 3473157Swnj (ds&HTDS_MOL)) 3483157Swnj goto noprint; 34918325Sralph tprintf(sc->sc_ttyp, "tu%d: hard error bn%d mbsr=%b er=%b ds=%b\n", 3502980Swnj TUUNIT(bp->b_dev), bp->b_blkno, 3513094Swnj mbsr, mbsr_bits, 3523204Swnj sc->sc_erreg, hter_bits, 3533204Swnj sc->sc_dsreg, htds_bits); 3543157Swnj noprint: 35522Sbill bp->b_flags |= B_ERROR; 3562926Swnj return (MBD_DONE); 35722Sbill } 3582926Swnj if (er) 3592926Swnj return (MBD_RETRY); 36022Sbill } 3612926Swnj bp->b_resid = 0; 36230918Skarels sc->sc_blks++; 36330918Skarels if (mi->mi_tab.b_errcnt) 36430918Skarels sc->sc_softerrs++; 3652926Swnj if (bp->b_flags & B_READ) 3662926Swnj if (ds&HTDS_TM) { /* must be a read, right? */ 3672926Swnj bp->b_resid = bp->b_bcount; 3687379Ssam sc->sc_nxrec = bdbtofsb(bp->b_blkno); 3692926Swnj } else if(bp->b_bcount > MASKREG(htaddr->htfc)) 3702926Swnj bp->b_resid = bp->b_bcount - MASKREG(htaddr->htfc); 3712926Swnj return (MBD_DONE); 3722926Swnj } 37322Sbill 3742926Swnj htndtint(mi) 3752980Swnj register struct mba_device *mi; 3762926Swnj { 3772926Swnj register struct htdevice *htaddr = (struct htdevice *)mi->mi_drv; 3782926Swnj register struct buf *bp = mi->mi_tab.b_actf; 3793094Swnj register struct tu_softc *sc; 3802926Swnj int er, ds, fc; 38122Sbill 3823094Swnj ds = MASKREG(htaddr->htds); 3833094Swnj er = MASKREG(htaddr->hter); 3843094Swnj fc = MASKREG(htaddr->htfc); 3853094Swnj if (er) { 3862926Swnj htaddr->htcs1 = HT_DCLR|HT_GO; 3872961Swnj mbclrattn(mi); 3882961Swnj } 3893094Swnj if (bp == 0) 3903094Swnj return (MBN_SKIP); 3913094Swnj sc = &tu_softc[TUUNIT(bp->b_dev)]; 3923094Swnj sc->sc_dsreg = ds; 3933094Swnj sc->sc_erreg = er; 3943094Swnj sc->sc_resid = fc; 3953094Swnj if (bp == &chtbuf[HTUNIT(bp->b_dev)]) { 39626290Skarels switch ((int)bp->b_command) { 3973094Swnj case HT_REWOFFL: 3982926Swnj /* offline is on purpose; don't do anything special */ 3992926Swnj ds |= HTDS_MOL; 4003094Swnj break; 4013094Swnj case HT_SREV: 4023094Swnj /* if backspace file hit bot, its not an error */ 4033094Swnj if (er == (HTER_NEF|HTER_FCE) && ds&HTDS_BOT && 4043094Swnj bp->b_repcnt == INF) 4053094Swnj er &= ~HTER_NEF; 4063094Swnj break; 4073094Swnj } 4082926Swnj er &= ~HTER_FCE; 4092926Swnj if (er == 0) 4102926Swnj ds &= ~HTDS_ERR; 41122Sbill } 4122926Swnj if ((ds & (HTDS_ERR|HTDS_MOL)) != HTDS_MOL) { 4132926Swnj if ((ds & HTDS_MOL) == 0 && sc->sc_openf > 0) 4142926Swnj sc->sc_openf = -1; 41518325Sralph tprintf(sc->sc_ttyp, "tu%d: hard error bn%d er=%b ds=%b\n", 4162980Swnj TUUNIT(bp->b_dev), bp->b_blkno, 4173204Swnj sc->sc_erreg, hter_bits, sc->sc_dsreg, htds_bits); 4182926Swnj bp->b_flags |= B_ERROR; 4192926Swnj return (MBN_DONE); 4202926Swnj } 4213094Swnj if (bp == &chtbuf[HTUNIT(bp->b_dev)]) { 4222926Swnj if (sc->sc_flags & H_REWIND) 4232926Swnj return (ds & HTDS_BOT ? MBN_DONE : MBN_RETRY); 4242926Swnj bp->b_resid = -sc->sc_resid; 4252926Swnj return (MBN_DONE); 4262926Swnj } 4272926Swnj if (ds & HTDS_TM) 4287379Ssam if (sc->sc_blkno > bdbtofsb(bp->b_blkno)) { 4297379Ssam sc->sc_nxrec = bdbtofsb(bp->b_blkno) - fc; 4302926Swnj sc->sc_blkno = sc->sc_nxrec; 4313094Swnj } else { 4327379Ssam sc->sc_blkno = bdbtofsb(bp->b_blkno) + fc; 4332926Swnj sc->sc_nxrec = sc->sc_blkno - 1; 4342926Swnj } 4352926Swnj else 4367379Ssam sc->sc_blkno = bdbtofsb(bp->b_blkno); 4372926Swnj return (MBN_RETRY); 43822Sbill } 43922Sbill 4402926Swnj /*ARGSUSED*/ 4417636Ssam htioctl(dev, cmd, data, flag) 4422926Swnj dev_t dev; 4432926Swnj int cmd; 4447636Ssam caddr_t data; 4452926Swnj int flag; 4462926Swnj { 4473094Swnj register struct tu_softc *sc = &tu_softc[TUUNIT(dev)]; 4483094Swnj register struct buf *bp = &chtbuf[HTUNIT(dev)]; 4492926Swnj register callcount; 4502926Swnj int fcount; 4517636Ssam struct mtop *mtop; 4527636Ssam struct mtget *mtget; 4532926Swnj /* we depend of the values and order of the MT codes here */ 4542926Swnj static htops[] = 4552926Swnj {HT_WEOF,HT_SFORW,HT_SREV,HT_SFORW,HT_SREV,HT_REW,HT_REWOFFL,HT_SENSE}; 4561917Swnj 4572926Swnj switch (cmd) { 4587636Ssam 4597636Ssam case MTIOCTOP: /* tape operation */ 4607636Ssam mtop = (struct mtop *)data; 4617636Ssam switch (mtop->mt_op) { 4627636Ssam 4632926Swnj case MTWEOF: 4647636Ssam callcount = mtop->mt_count; 4652926Swnj fcount = 1; 4662926Swnj break; 4677636Ssam 4682926Swnj case MTFSF: case MTBSF: 4697636Ssam callcount = mtop->mt_count; 4702926Swnj fcount = INF; 4712926Swnj break; 4727636Ssam 4732926Swnj case MTFSR: case MTBSR: 4742926Swnj callcount = 1; 4757636Ssam fcount = mtop->mt_count; 4762926Swnj break; 4777636Ssam 4782926Swnj case MTREW: case MTOFFL: 4792926Swnj callcount = 1; 4802926Swnj fcount = 1; 4812926Swnj break; 4827636Ssam 4832926Swnj default: 4848580Sroot return (ENXIO); 4852926Swnj } 4868580Sroot if (callcount <= 0 || fcount <= 0) 4878580Sroot return (EINVAL); 4882926Swnj while (--callcount >= 0) { 4897636Ssam htcommand(dev, htops[mtop->mt_op], fcount); 4907636Ssam if ((mtop->mt_op == MTFSR || mtop->mt_op == MTBSR) && 4918580Sroot bp->b_resid) 4928580Sroot return (EIO); 4933094Swnj if ((bp->b_flags&B_ERROR) || sc->sc_dsreg&HTDS_BOT) 4942926Swnj break; 4952926Swnj } 4968711Sroot return (geterror(bp)); 4977636Ssam 4982926Swnj case MTIOCGET: 4997636Ssam mtget = (struct mtget *)data; 5007636Ssam mtget->mt_dsreg = sc->sc_dsreg; 5017636Ssam mtget->mt_erreg = sc->sc_erreg; 5027636Ssam mtget->mt_resid = sc->sc_resid; 5037636Ssam mtget->mt_type = MT_ISHT; 5048580Sroot break; 5057636Ssam 5062926Swnj default: 5078580Sroot return (ENXIO); 5082926Swnj } 5098580Sroot return (0); 5102926Swnj } 5112926Swnj 5121917Swnj #define DBSIZE 20 5131917Swnj 5142926Swnj htdump() 5151917Swnj { 5162980Swnj register struct mba_device *mi; 5172926Swnj register struct mba_regs *mp; 5182926Swnj register struct htdevice *htaddr; 5192926Swnj int blk, num; 5202926Swnj int start; 5211917Swnj 5222926Swnj start = 0; 5232926Swnj num = maxfree; 5242926Swnj #define phys(a,b) ((b)((int)(a)&0x7fffffff)) 5252926Swnj if (htinfo[0] == 0) 5262926Swnj return (ENXIO); 5272980Swnj mi = phys(htinfo[0], struct mba_device *); 5282926Swnj mp = phys(mi->mi_hd, struct mba_hd *)->mh_physmba; 5293157Swnj mp->mba_cr = MBCR_IE; 5302926Swnj htaddr = (struct htdevice *)&mp->mba_drv[mi->mi_drive]; 5312926Swnj htaddr->httc = HTTC_PDP11|HTTC_1600BPI; 5322926Swnj htaddr->htcs1 = HT_DCLR|HT_GO; 5331917Swnj while (num > 0) { 5341917Swnj blk = num > DBSIZE ? DBSIZE : num; 5352926Swnj htdwrite(start, blk, htaddr, mp); 5362926Swnj start += blk; 5371917Swnj num -= blk; 5381917Swnj } 5393157Swnj hteof(htaddr); 5403157Swnj hteof(htaddr); 5412926Swnj htwait(htaddr); 5423181Swnj if (htaddr->htds&HTDS_ERR) 5433157Swnj return (EIO); 5442926Swnj htaddr->htcs1 = HT_REW|HT_GO; 5453103Swnj return (0); 5461917Swnj } 5471917Swnj 5482926Swnj htdwrite(dbuf, num, htaddr, mp) 5492926Swnj register dbuf, num; 5502926Swnj register struct htdevice *htaddr; 5512926Swnj struct mba_regs *mp; 5521917Swnj { 5532926Swnj register struct pte *io; 5541917Swnj register int i; 5551917Swnj 5562926Swnj htwait(htaddr); 5572926Swnj io = mp->mba_map; 5581917Swnj for (i = 0; i < num; i++) 5592926Swnj *(int *)io++ = dbuf++ | PG_V; 5602926Swnj htaddr->htfc = -(num*NBPG); 5612926Swnj mp->mba_sr = -1; 5622926Swnj mp->mba_bcr = -(num*NBPG); 5632926Swnj mp->mba_var = 0; 5642926Swnj htaddr->htcs1 = HT_WCOM|HT_GO; 5651917Swnj } 5661917Swnj 5672926Swnj htwait(htaddr) 5682926Swnj struct htdevice *htaddr; 5691917Swnj { 5701917Swnj register s; 5711917Swnj 5721917Swnj do 5732926Swnj s = htaddr->htds; 5742926Swnj while ((s & HTDS_DRY) == 0); 5751917Swnj } 5761917Swnj 5772926Swnj hteof(htaddr) 5782926Swnj struct htdevice *htaddr; 5791917Swnj { 5801917Swnj 5812926Swnj htwait(htaddr); 5822926Swnj htaddr->htcs1 = HT_WEOF|HT_GO; 5831917Swnj } 5841563Sbill #endif 585