123310Smckusick /* 229266Smckusick * Copyright (c) 1982, 1986 Regents of the University of California. 323310Smckusick * All rights reserved. The Berkeley software License Agreement 423310Smckusick * specifies the terms and conditions for redistribution. 523310Smckusick * 6*34220Sbostic * @(#)ht.c 7.6 (Berkeley) 05/06/88 723310Smckusick */ 82961Swnj 92980Swnj #include "tu.h" 101563Sbill #if NHT > 0 1122Sbill /* 122926Swnj * TM03/TU?? tape driver 133094Swnj * 143094Swnj * TODO: 153204Swnj * cleanup messages on errors 163094Swnj * test ioctl's 173094Swnj * see how many rewind interrups we get if we kick when not at BOT 183204Swnj * fixup rle error on block tape code 1922Sbill */ 2017118Sbloom #include "param.h" 2117118Sbloom #include "systm.h" 2217118Sbloom #include "buf.h" 2317118Sbloom #include "conf.h" 2417118Sbloom #include "dir.h" 2517118Sbloom #include "file.h" 2617118Sbloom #include "user.h" 2717118Sbloom #include "map.h" 2817118Sbloom #include "ioctl.h" 2917118Sbloom #include "mtio.h" 3017118Sbloom #include "cmap.h" 3117118Sbloom #include "uio.h" 3218325Sralph #include "tty.h" 3331036Skarels #include "syslog.h" 3422Sbill 3530918Skarels #include "../machine/pte.h" 368469Sroot #include "../vax/cpu.h" 3717118Sbloom #include "mbareg.h" 3817118Sbloom #include "mbavar.h" 3917118Sbloom #include "htreg.h" 4022Sbill 412926Swnj struct buf chtbuf[NHT]; 4222Sbill 432926Swnj short httypes[] = 443181Swnj { MBDT_TM03, MBDT_TE16, MBDT_TU45, MBDT_TU77, 0 }; 452980Swnj struct mba_device *htinfo[NHT]; 4631552Skarels struct mba_slave *tuinfo[NTU]; 473103Swnj int htattach(), htslave(), htustart(), htndtint(), htdtint(); 482926Swnj struct mba_driver htdriver = 492980Swnj { htattach, htslave, htustart, 0, htdtint, htndtint, 502980Swnj httypes, "ht", "tu", htinfo }; 5122Sbill 522926Swnj #define MASKREG(r) ((r) & 0xffff) 5322Sbill 542926Swnj /* bits in minor device */ 552980Swnj #define TUUNIT(dev) (minor(dev)&03) 562926Swnj #define H_NOREWIND 04 5731094Skarels #define H_DENS(dev) ((minor(dev) >> 3) & 03) 5822Sbill 59*34220Sbostic #define HTUNIT(dev) (tuinfo[TUUNIT(dev)]->ms_ctlr) 602980Swnj 612926Swnj #define INF (daddr_t)1000000L /* a block number that wont exist */ 622926Swnj 633094Swnj struct tu_softc { 642926Swnj char sc_openf; 652926Swnj char sc_flags; 662926Swnj daddr_t sc_blkno; 672926Swnj daddr_t sc_nxrec; 682926Swnj u_short sc_erreg; 692926Swnj u_short sc_dsreg; 702926Swnj short sc_resid; 712926Swnj short sc_dens; 7218325Sralph struct tty *sc_ttyp; /* record user's tty for errors */ 7330918Skarels int sc_blks; /* number of I/O operations since open */ 7430918Skarels int sc_softerrs; /* number of soft I/O errors since open */ 753094Swnj } tu_softc[NTU]; 762926Swnj 772926Swnj /* 782926Swnj * Bits for sc_flags. 792926Swnj */ 802926Swnj #define H_WRITTEN 1 /* last operation was a write */ 812926Swnj #define H_ERASED 2 /* last write retry was an erase gap */ 822926Swnj #define H_REWIND 4 /* last unit start was a rewind */ 8322Sbill 843204Swnj char hter_bits[] = HTER_BITS; 853204Swnj char htds_bits[] = HTDS_BITS; 863204Swnj 872926Swnj /*ARGSUSED*/ 882980Swnj htattach(mi) 892980Swnj struct mba_device *mi; 902926Swnj { 912926Swnj 922926Swnj } 932926Swnj 947430Skre htslave(mi, ms, sn) 952980Swnj struct mba_device *mi; 962980Swnj struct mba_slave *ms; 977430Skre int sn; 982980Swnj { 994756Swnj register struct htdevice *htaddr = (struct htdevice *)mi->mi_drv; 1002980Swnj 1017430Skre htaddr->httc = sn; 1024756Swnj if (htaddr->htdt & HTDT_SPR) { 10331552Skarels tuinfo[ms->ms_unit] = ms; 1044756Swnj return (1); 1054756Swnj } else 1064756Swnj return (0); 1072980Swnj } 1082980Swnj 10931094Skarels int htdens[4] = { HTTC_800BPI, HTTC_1600BPI, HTTC_6250BPI, HTTC_800BPI }; 11031094Skarels 11122Sbill htopen(dev, flag) 1122926Swnj dev_t dev; 1132926Swnj int flag; 11422Sbill { 1153094Swnj register int tuunit; 1163094Swnj register struct tu_softc *sc; 117*34220Sbostic register struct mba_slave *ms; 1183203Swnj int olddens, dens; 11922Sbill 1203094Swnj tuunit = TUUNIT(dev); 121*34220Sbostic if (tuunit >= NTU || (ms = tuinfo[tuunit]) == NULL || 122*34220Sbostic ms->ms_alive == 0 || htinfo[ms->ms_ctlr]->mi_alive == 0) 1238580Sroot return (ENXIO); 12425052Skarels if ((sc = &tu_softc[tuunit])->sc_openf) 12525052Skarels return (EBUSY); 12630918Skarels sc->sc_openf = 1; 1273203Swnj olddens = sc->sc_dens; 128*34220Sbostic dens = sc->sc_dens = htdens[H_DENS(dev)] | HTTC_PDP11 | ms->ms_slave; 1293203Swnj htcommand(dev, HT_SENSE, 1); 1303203Swnj sc->sc_dens = olddens; 1313707Sroot if ((sc->sc_dsreg & HTDS_MOL) == 0) { 13230918Skarels sc->sc_openf = 0; 1333717Sroot uprintf("tu%d: not online\n", tuunit); 1348580Sroot return (EIO); 1352926Swnj } 1363707Sroot if ((flag&FWRITE) && (sc->sc_dsreg&HTDS_WRL)) { 13730918Skarels sc->sc_openf = 0; 1383717Sroot uprintf("tu%d: no write ring\n", tuunit); 1398580Sroot return (EIO); 1403707Sroot } 1413707Sroot if ((sc->sc_dsreg & HTDS_BOT) == 0 && (flag&FWRITE) && 1423707Sroot dens != sc->sc_dens) { 14330918Skarels sc->sc_openf = 0; 1443717Sroot uprintf("tu%d: can't change density in mid-tape\n", tuunit); 1458580Sroot return (EIO); 1463707Sroot } 1472926Swnj sc->sc_blkno = (daddr_t)0; 1482926Swnj sc->sc_nxrec = INF; 1492926Swnj sc->sc_flags = 0; 1503094Swnj sc->sc_dens = dens; 15130918Skarels sc->sc_blks = 0; 15230918Skarels sc->sc_softerrs = 0; 15318325Sralph sc->sc_ttyp = u.u_ttyp; 1548580Sroot return (0); 15522Sbill } 15622Sbill 15722Sbill htclose(dev, flag) 1582926Swnj register dev_t dev; 1592926Swnj register flag; 16022Sbill { 1613094Swnj register struct tu_softc *sc = &tu_softc[TUUNIT(dev)]; 16222Sbill 1632926Swnj if (flag == FWRITE || ((flag&FWRITE) && (sc->sc_flags&H_WRITTEN))) { 1642926Swnj htcommand(dev, HT_WEOF, 1); 1652926Swnj htcommand(dev, HT_WEOF, 1); 1662926Swnj htcommand(dev, HT_SREV, 1); 16722Sbill } 1682926Swnj if ((minor(dev)&H_NOREWIND) == 0) 1692926Swnj htcommand(dev, HT_REW, 0); 17030918Skarels if (sc->sc_blks > 100 && sc->sc_softerrs > sc->sc_blks / 100) 17130918Skarels log(LOG_INFO, "tu%d: %d soft errors in %d blocks\n", 17230918Skarels TUUNIT(dev), sc->sc_softerrs, sc->sc_blks); 1732926Swnj sc->sc_openf = 0; 17422Sbill } 17522Sbill 1762926Swnj htcommand(dev, com, count) 1772926Swnj dev_t dev; 1782926Swnj int com, count; 17922Sbill { 18022Sbill register struct buf *bp; 1815436Sroot register int s; 18222Sbill 1832926Swnj bp = &chtbuf[HTUNIT(dev)]; 1845436Sroot s = spl5(); 1852926Swnj while (bp->b_flags&B_BUSY) { 1863157Swnj if(bp->b_repcnt == 0 && (bp->b_flags&B_DONE)) 1872980Swnj break; 18822Sbill bp->b_flags |= B_WANTED; 18922Sbill sleep((caddr_t)bp, PRIBIO); 19022Sbill } 1912943Swnj bp->b_flags = B_BUSY|B_READ; 1925436Sroot splx(s); 19322Sbill bp->b_dev = dev; 1942926Swnj bp->b_command = com; 1952926Swnj bp->b_repcnt = count; 19622Sbill bp->b_blkno = 0; 19722Sbill htstrategy(bp); 1982926Swnj if (count == 0) 1992926Swnj return; 20022Sbill iowait(bp); 2012926Swnj if (bp->b_flags&B_WANTED) 20222Sbill wakeup((caddr_t)bp); 2032926Swnj bp->b_flags &= B_ERROR; 20422Sbill } 20522Sbill 20622Sbill htstrategy(bp) 2072926Swnj register struct buf *bp; 20822Sbill { 2093094Swnj register struct mba_device *mi = htinfo[HTUNIT(bp->b_dev)]; 2102926Swnj register struct buf *dp; 2115436Sroot register int s; 21222Sbill 21322Sbill bp->av_forw = NULL; 2142926Swnj dp = &mi->mi_tab; 2155436Sroot s = spl5(); 2162926Swnj if (dp->b_actf == NULL) 2172926Swnj dp->b_actf = bp; 21822Sbill else 2192926Swnj dp->b_actl->av_forw = bp; 2202926Swnj dp->b_actl = bp; 2212926Swnj if (dp->b_active == 0) 2222926Swnj mbustart(mi); 2235436Sroot splx(s); 22422Sbill } 22522Sbill 2262926Swnj htustart(mi) 2272980Swnj register struct mba_device *mi; 22822Sbill { 2292926Swnj register struct htdevice *htaddr = 2302926Swnj (struct htdevice *)mi->mi_drv; 2312926Swnj register struct buf *bp = mi->mi_tab.b_actf; 2323094Swnj register struct tu_softc *sc = &tu_softc[TUUNIT(bp->b_dev)]; 23322Sbill daddr_t blkno; 23422Sbill 2352926Swnj htaddr->httc = sc->sc_dens; 23615108Skarels #ifdef notdef 23715108Skarels /* unneeded, may hang controller */ 2383181Swnj if (bp == &chtbuf[HTUNIT(bp->b_dev)] && bp->b_command == HT_SENSE) { 2393157Swnj htaddr->htcs1 = HT_SENSE|HT_GO; 2403157Swnj mbclrattn(mi); 2413157Swnj } 24215108Skarels #endif 2432926Swnj sc->sc_dsreg = htaddr->htds; 2442926Swnj sc->sc_erreg = htaddr->hter; 2452926Swnj sc->sc_resid = htaddr->htfc; 2462926Swnj sc->sc_flags &= ~(H_WRITTEN|H_REWIND); 2472926Swnj if ((htaddr->htdt & HTDT_SPR) == 0 || (htaddr->htds & HTDS_MOL) == 0) 2482926Swnj if (sc->sc_openf > 0) 2492926Swnj sc->sc_openf = -1; 2502926Swnj if (sc->sc_openf < 0) { 2512926Swnj bp->b_flags |= B_ERROR; 2522926Swnj return (MBU_NEXT); 2532926Swnj } 2543094Swnj if (bp != &chtbuf[HTUNIT(bp->b_dev)]) { 255*34220Sbostic /* transfer: check positioning */ 256*34220Sbostic if (bp->b_flags & B_RAW) { 257*34220Sbostic /* raw transfer: record position for retry */ 258*34220Sbostic if (mi->mi_tab.b_errcnt == 0) { 259*34220Sbostic sc->sc_blkno = bdbtofsb(bp->b_blkno); 260*34220Sbostic sc->sc_nxrec = sc->sc_blkno + 1; 261*34220Sbostic } 262*34220Sbostic } else { 263*34220Sbostic if (bdbtofsb(bp->b_blkno) > sc->sc_nxrec) { 264*34220Sbostic bp->b_flags |= B_ERROR; 265*34220Sbostic bp->b_error = ENXIO; 266*34220Sbostic return (MBU_NEXT); 267*34220Sbostic } 268*34220Sbostic if (bdbtofsb(bp->b_blkno) == sc->sc_nxrec && 269*34220Sbostic bp->b_flags&B_READ) { 270*34220Sbostic bp->b_resid = bp->b_bcount; 271*34220Sbostic clrbuf(bp); 272*34220Sbostic return (MBU_NEXT); 273*34220Sbostic } 274*34220Sbostic if ((bp->b_flags&B_READ)==0) 275*34220Sbostic sc->sc_nxrec = bdbtofsb(bp->b_blkno) + 1; 2763094Swnj } 2772926Swnj } else { 2782961Swnj if (bp->b_command == HT_SENSE) 2792926Swnj return (MBU_NEXT); 2802926Swnj if (bp->b_command == HT_REW) 2812926Swnj sc->sc_flags |= H_REWIND; 2822926Swnj else 2832926Swnj htaddr->htfc = -bp->b_bcount; 2842926Swnj htaddr->htcs1 = bp->b_command|HT_GO; 2852926Swnj return (MBU_STARTED); 2862926Swnj } 2877379Ssam if ((blkno = sc->sc_blkno) == bdbtofsb(bp->b_blkno)) { 2882926Swnj htaddr->htfc = -bp->b_bcount; 2892926Swnj if ((bp->b_flags&B_READ) == 0) { 2903094Swnj if (mi->mi_tab.b_errcnt) { 2913094Swnj if ((sc->sc_flags & H_ERASED) == 0) { 2922926Swnj sc->sc_flags |= H_ERASED; 2932926Swnj htaddr->htcs1 = HT_ERASE | HT_GO; 2942926Swnj return (MBU_STARTED); 2952926Swnj } 2963094Swnj sc->sc_flags &= ~H_ERASED; 2973094Swnj } 2982926Swnj if (htaddr->htds & HTDS_EOT) { 2992926Swnj bp->b_resid = bp->b_bcount; 3006812Swnj bp->b_flags |= B_ERROR; 3012926Swnj return (MBU_NEXT); 3022926Swnj } 30322Sbill } 3042926Swnj return (MBU_DODATA); 30522Sbill } 3067379Ssam if (blkno < bdbtofsb(bp->b_blkno)) { 3077379Ssam htaddr->htfc = blkno - bdbtofsb(bp->b_blkno); 3082926Swnj htaddr->htcs1 = HT_SFORW|HT_GO; 30922Sbill } else { 3107379Ssam htaddr->htfc = bdbtofsb(bp->b_blkno) - blkno; 3112926Swnj htaddr->htcs1 = HT_SREV|HT_GO; 31222Sbill } 3132926Swnj return (MBU_STARTED); 31422Sbill } 31522Sbill 3163094Swnj htdtint(mi, mbsr) 3172980Swnj register struct mba_device *mi; 3183094Swnj int mbsr; 31922Sbill { 3202926Swnj register struct htdevice *htaddr = (struct htdevice *)mi->mi_drv; 3212926Swnj register struct buf *bp = mi->mi_tab.b_actf; 3223094Swnj register struct tu_softc *sc; 3232961Swnj int ds, er, mbs; 32422Sbill 3253094Swnj sc = &tu_softc[TUUNIT(bp->b_dev)]; 3262926Swnj ds = sc->sc_dsreg = MASKREG(htaddr->htds); 3272926Swnj er = sc->sc_erreg = MASKREG(htaddr->hter); 3282926Swnj sc->sc_resid = MASKREG(htaddr->htfc); 3293094Swnj mbs = mbsr; 3302926Swnj sc->sc_blkno++; 3312926Swnj if((bp->b_flags & B_READ) == 0) 3322926Swnj sc->sc_flags |= H_WRITTEN; 3333094Swnj if ((ds&(HTDS_ERR|HTDS_MOL)) != HTDS_MOL || mbs & MBSR_EBITS) { 3342926Swnj htaddr->htcs1 = HT_DCLR|HT_GO; 3352961Swnj mbclrattn(mi); 336*34220Sbostic if (bp->b_flags & B_RAW) { 3372926Swnj er &= ~HTER_FCE; 3383094Swnj mbs &= ~(MBSR_DTABT|MBSR_MBEXC); 3394276Sroot } 3402926Swnj if (bp->b_flags & B_READ && ds & HTDS_PES) 3412926Swnj er &= ~(HTER_CSITM|HTER_CORCRC); 3423094Swnj if (er&HTER_HARD || mbs&MBSR_EBITS || (ds&HTDS_MOL) == 0 || 3432961Swnj er && ++mi->mi_tab.b_errcnt >= 7) { 3442926Swnj if ((ds & HTDS_MOL) == 0 && sc->sc_openf > 0) 3452926Swnj sc->sc_openf = -1; 3463157Swnj if ((er&HTER_HARD) == HTER_FCE && 3473157Swnj (mbs&MBSR_EBITS) == (MBSR_DTABT|MBSR_MBEXC) && 3483157Swnj (ds&HTDS_MOL)) 3493157Swnj goto noprint; 35018325Sralph tprintf(sc->sc_ttyp, "tu%d: hard error bn%d mbsr=%b er=%b ds=%b\n", 3512980Swnj TUUNIT(bp->b_dev), bp->b_blkno, 3523094Swnj mbsr, mbsr_bits, 3533204Swnj sc->sc_erreg, hter_bits, 3543204Swnj sc->sc_dsreg, htds_bits); 3553157Swnj noprint: 35622Sbill bp->b_flags |= B_ERROR; 3572926Swnj return (MBD_DONE); 35822Sbill } 3592926Swnj if (er) 3602926Swnj return (MBD_RETRY); 36122Sbill } 3622926Swnj bp->b_resid = 0; 36330918Skarels sc->sc_blks++; 36430918Skarels if (mi->mi_tab.b_errcnt) 36530918Skarels sc->sc_softerrs++; 3662926Swnj if (bp->b_flags & B_READ) 3672926Swnj if (ds&HTDS_TM) { /* must be a read, right? */ 3682926Swnj bp->b_resid = bp->b_bcount; 3697379Ssam sc->sc_nxrec = bdbtofsb(bp->b_blkno); 3702926Swnj } else if(bp->b_bcount > MASKREG(htaddr->htfc)) 3712926Swnj bp->b_resid = bp->b_bcount - MASKREG(htaddr->htfc); 3722926Swnj return (MBD_DONE); 3732926Swnj } 37422Sbill 3752926Swnj htndtint(mi) 3762980Swnj register struct mba_device *mi; 3772926Swnj { 3782926Swnj register struct htdevice *htaddr = (struct htdevice *)mi->mi_drv; 3792926Swnj register struct buf *bp = mi->mi_tab.b_actf; 3803094Swnj register struct tu_softc *sc; 3812926Swnj int er, ds, fc; 38222Sbill 3833094Swnj ds = MASKREG(htaddr->htds); 3843094Swnj er = MASKREG(htaddr->hter); 3853094Swnj fc = MASKREG(htaddr->htfc); 3863094Swnj if (er) { 3872926Swnj htaddr->htcs1 = HT_DCLR|HT_GO; 3882961Swnj mbclrattn(mi); 3892961Swnj } 3903094Swnj if (bp == 0) 3913094Swnj return (MBN_SKIP); 3923094Swnj sc = &tu_softc[TUUNIT(bp->b_dev)]; 3933094Swnj sc->sc_dsreg = ds; 3943094Swnj sc->sc_erreg = er; 3953094Swnj sc->sc_resid = fc; 3963094Swnj if (bp == &chtbuf[HTUNIT(bp->b_dev)]) { 39726290Skarels switch ((int)bp->b_command) { 3983094Swnj case HT_REWOFFL: 3992926Swnj /* offline is on purpose; don't do anything special */ 4002926Swnj ds |= HTDS_MOL; 4013094Swnj break; 4023094Swnj case HT_SREV: 4033094Swnj /* if backspace file hit bot, its not an error */ 4043094Swnj if (er == (HTER_NEF|HTER_FCE) && ds&HTDS_BOT && 4053094Swnj bp->b_repcnt == INF) 4063094Swnj er &= ~HTER_NEF; 4073094Swnj break; 4083094Swnj } 4092926Swnj er &= ~HTER_FCE; 4102926Swnj if (er == 0) 4112926Swnj ds &= ~HTDS_ERR; 41222Sbill } 4132926Swnj if ((ds & (HTDS_ERR|HTDS_MOL)) != HTDS_MOL) { 4142926Swnj if ((ds & HTDS_MOL) == 0 && sc->sc_openf > 0) 4152926Swnj sc->sc_openf = -1; 41618325Sralph tprintf(sc->sc_ttyp, "tu%d: hard error bn%d er=%b ds=%b\n", 4172980Swnj TUUNIT(bp->b_dev), bp->b_blkno, 4183204Swnj sc->sc_erreg, hter_bits, sc->sc_dsreg, htds_bits); 4192926Swnj bp->b_flags |= B_ERROR; 4202926Swnj return (MBN_DONE); 4212926Swnj } 4223094Swnj if (bp == &chtbuf[HTUNIT(bp->b_dev)]) { 4232926Swnj if (sc->sc_flags & H_REWIND) 4242926Swnj return (ds & HTDS_BOT ? MBN_DONE : MBN_RETRY); 4252926Swnj bp->b_resid = -sc->sc_resid; 4262926Swnj return (MBN_DONE); 4272926Swnj } 4282926Swnj if (ds & HTDS_TM) 4297379Ssam if (sc->sc_blkno > bdbtofsb(bp->b_blkno)) { 4307379Ssam sc->sc_nxrec = bdbtofsb(bp->b_blkno) - fc; 4312926Swnj sc->sc_blkno = sc->sc_nxrec; 4323094Swnj } else { 4337379Ssam sc->sc_blkno = bdbtofsb(bp->b_blkno) + fc; 4342926Swnj sc->sc_nxrec = sc->sc_blkno - 1; 4352926Swnj } 4362926Swnj else 4377379Ssam sc->sc_blkno = bdbtofsb(bp->b_blkno); 4382926Swnj return (MBN_RETRY); 43922Sbill } 44022Sbill 4412926Swnj /*ARGSUSED*/ 4427636Ssam htioctl(dev, cmd, data, flag) 4432926Swnj dev_t dev; 4442926Swnj int cmd; 4457636Ssam caddr_t data; 4462926Swnj int flag; 4472926Swnj { 4483094Swnj register struct tu_softc *sc = &tu_softc[TUUNIT(dev)]; 4493094Swnj register struct buf *bp = &chtbuf[HTUNIT(dev)]; 4502926Swnj register callcount; 4512926Swnj int fcount; 4527636Ssam struct mtop *mtop; 4537636Ssam struct mtget *mtget; 4542926Swnj /* we depend of the values and order of the MT codes here */ 4552926Swnj static htops[] = 4562926Swnj {HT_WEOF,HT_SFORW,HT_SREV,HT_SFORW,HT_SREV,HT_REW,HT_REWOFFL,HT_SENSE}; 4571917Swnj 4582926Swnj switch (cmd) { 4597636Ssam 4607636Ssam case MTIOCTOP: /* tape operation */ 4617636Ssam mtop = (struct mtop *)data; 4627636Ssam switch (mtop->mt_op) { 4637636Ssam 4642926Swnj case MTWEOF: 4657636Ssam callcount = mtop->mt_count; 4662926Swnj fcount = 1; 4672926Swnj break; 4687636Ssam 4692926Swnj case MTFSF: case MTBSF: 4707636Ssam callcount = mtop->mt_count; 4712926Swnj fcount = INF; 4722926Swnj break; 4737636Ssam 4742926Swnj case MTFSR: case MTBSR: 4752926Swnj callcount = 1; 4767636Ssam fcount = mtop->mt_count; 4772926Swnj break; 4787636Ssam 4792926Swnj case MTREW: case MTOFFL: 4802926Swnj callcount = 1; 4812926Swnj fcount = 1; 4822926Swnj break; 4837636Ssam 4842926Swnj default: 4858580Sroot return (ENXIO); 4862926Swnj } 4878580Sroot if (callcount <= 0 || fcount <= 0) 4888580Sroot return (EINVAL); 4892926Swnj while (--callcount >= 0) { 4907636Ssam htcommand(dev, htops[mtop->mt_op], fcount); 4917636Ssam if ((mtop->mt_op == MTFSR || mtop->mt_op == MTBSR) && 4928580Sroot bp->b_resid) 4938580Sroot return (EIO); 4943094Swnj if ((bp->b_flags&B_ERROR) || sc->sc_dsreg&HTDS_BOT) 4952926Swnj break; 4962926Swnj } 4978711Sroot return (geterror(bp)); 4987636Ssam 4992926Swnj case MTIOCGET: 5007636Ssam mtget = (struct mtget *)data; 5017636Ssam mtget->mt_dsreg = sc->sc_dsreg; 5027636Ssam mtget->mt_erreg = sc->sc_erreg; 5037636Ssam mtget->mt_resid = sc->sc_resid; 5047636Ssam mtget->mt_type = MT_ISHT; 5058580Sroot break; 5067636Ssam 5072926Swnj default: 5088580Sroot return (ENXIO); 5092926Swnj } 5108580Sroot return (0); 5112926Swnj } 5122926Swnj 5131917Swnj #define DBSIZE 20 5141917Swnj 5152926Swnj htdump() 5161917Swnj { 5172980Swnj register struct mba_device *mi; 5182926Swnj register struct mba_regs *mp; 5192926Swnj register struct htdevice *htaddr; 5202926Swnj int blk, num; 5212926Swnj int start; 5221917Swnj 5232926Swnj start = 0; 5242926Swnj num = maxfree; 5252926Swnj #define phys(a,b) ((b)((int)(a)&0x7fffffff)) 5262926Swnj if (htinfo[0] == 0) 5272926Swnj return (ENXIO); 5282980Swnj mi = phys(htinfo[0], struct mba_device *); 5292926Swnj mp = phys(mi->mi_hd, struct mba_hd *)->mh_physmba; 5303157Swnj mp->mba_cr = MBCR_IE; 5312926Swnj htaddr = (struct htdevice *)&mp->mba_drv[mi->mi_drive]; 5322926Swnj htaddr->httc = HTTC_PDP11|HTTC_1600BPI; 5332926Swnj htaddr->htcs1 = HT_DCLR|HT_GO; 5341917Swnj while (num > 0) { 5351917Swnj blk = num > DBSIZE ? DBSIZE : num; 5362926Swnj htdwrite(start, blk, htaddr, mp); 5372926Swnj start += blk; 5381917Swnj num -= blk; 5391917Swnj } 5403157Swnj hteof(htaddr); 5413157Swnj hteof(htaddr); 5422926Swnj htwait(htaddr); 5433181Swnj if (htaddr->htds&HTDS_ERR) 5443157Swnj return (EIO); 5452926Swnj htaddr->htcs1 = HT_REW|HT_GO; 5463103Swnj return (0); 5471917Swnj } 5481917Swnj 5492926Swnj htdwrite(dbuf, num, htaddr, mp) 5502926Swnj register dbuf, num; 5512926Swnj register struct htdevice *htaddr; 5522926Swnj struct mba_regs *mp; 5531917Swnj { 5542926Swnj register struct pte *io; 5551917Swnj register int i; 5561917Swnj 5572926Swnj htwait(htaddr); 5582926Swnj io = mp->mba_map; 5591917Swnj for (i = 0; i < num; i++) 5602926Swnj *(int *)io++ = dbuf++ | PG_V; 5612926Swnj htaddr->htfc = -(num*NBPG); 5622926Swnj mp->mba_sr = -1; 5632926Swnj mp->mba_bcr = -(num*NBPG); 5642926Swnj mp->mba_var = 0; 5652926Swnj htaddr->htcs1 = HT_WCOM|HT_GO; 5661917Swnj } 5671917Swnj 5682926Swnj htwait(htaddr) 5692926Swnj struct htdevice *htaddr; 5701917Swnj { 5711917Swnj register s; 5721917Swnj 5731917Swnj do 5742926Swnj s = htaddr->htds; 5752926Swnj while ((s & HTDS_DRY) == 0); 5761917Swnj } 5771917Swnj 5782926Swnj hteof(htaddr) 5792926Swnj struct htdevice *htaddr; 5801917Swnj { 5811917Swnj 5822926Swnj htwait(htaddr); 5832926Swnj htaddr->htcs1 = HT_WEOF|HT_GO; 5841917Swnj } 5851563Sbill #endif 586