xref: /csrg-svn/sys/vax/mba/ht.c (revision 30918)
123310Smckusick /*
229266Smckusick  * Copyright (c) 1982, 1986 Regents of the University of California.
323310Smckusick  * All rights reserved.  The Berkeley software License Agreement
423310Smckusick  * specifies the terms and conditions for redistribution.
523310Smckusick  *
6*30918Skarels  *	@(#)ht.c	7.2 (Berkeley) 04/17/87
723310Smckusick  */
82961Swnj 
92980Swnj #include "tu.h"
101563Sbill #if NHT > 0
1122Sbill /*
122926Swnj  * TM03/TU?? tape driver
133094Swnj  *
143094Swnj  * TODO:
153204Swnj  *	cleanup messages on errors
163094Swnj  *	test ioctl's
173094Swnj  *	see how many rewind interrups we get if we kick when not at BOT
183204Swnj  *	fixup rle error on block tape code
1922Sbill  */
2017118Sbloom #include "param.h"
2117118Sbloom #include "systm.h"
2217118Sbloom #include "buf.h"
2317118Sbloom #include "conf.h"
2417118Sbloom #include "dir.h"
2517118Sbloom #include "file.h"
2617118Sbloom #include "user.h"
2717118Sbloom #include "map.h"
2817118Sbloom #include "ioctl.h"
2917118Sbloom #include "mtio.h"
3017118Sbloom #include "cmap.h"
3117118Sbloom #include "uio.h"
3218325Sralph #include "tty.h"
3322Sbill 
34*30918Skarels #include "../machine/pte.h"
358469Sroot #include "../vax/cpu.h"
3617118Sbloom #include "mbareg.h"
3717118Sbloom #include "mbavar.h"
3817118Sbloom #include "htreg.h"
3922Sbill 
402926Swnj struct	buf	rhtbuf[NHT];
412926Swnj struct	buf	chtbuf[NHT];
4222Sbill 
432926Swnj short	httypes[] =
443181Swnj 	{ MBDT_TM03, MBDT_TE16, MBDT_TU45, MBDT_TU77, 0 };
452980Swnj struct	mba_device *htinfo[NHT];
463103Swnj int	htattach(), htslave(), htustart(), htndtint(), htdtint();
472926Swnj struct	mba_driver htdriver =
482980Swnj     { htattach, htslave, htustart, 0, htdtint, htndtint,
492980Swnj       httypes, "ht", "tu", htinfo };
5022Sbill 
512926Swnj #define MASKREG(r)	((r) & 0xffff)
5222Sbill 
532926Swnj /* bits in minor device */
542980Swnj #define	TUUNIT(dev)	(minor(dev)&03)
552926Swnj #define	H_NOREWIND	04
562926Swnj #define	H_1600BPI	08
5722Sbill 
583094Swnj #define HTUNIT(dev)	(tutoht[TUUNIT(dev)])
592980Swnj 
602926Swnj #define	INF	(daddr_t)1000000L	/* a block number that wont exist */
612926Swnj 
623094Swnj struct	tu_softc {
632926Swnj 	char	sc_openf;
642926Swnj 	char	sc_flags;
652926Swnj 	daddr_t	sc_blkno;
662926Swnj 	daddr_t	sc_nxrec;
672926Swnj 	u_short	sc_erreg;
682926Swnj 	u_short	sc_dsreg;
692926Swnj 	short	sc_resid;
702926Swnj 	short	sc_dens;
712980Swnj 	struct	mba_device *sc_mi;
722980Swnj 	int	sc_slave;
7318325Sralph 	struct	tty *sc_ttyp;		/* record user's tty for errors */
74*30918Skarels 	int	sc_blks;	/* number of I/O operations since open */
75*30918Skarels 	int	sc_softerrs;	/* number of soft I/O errors since open */
763094Swnj } tu_softc[NTU];
773094Swnj short	tutoht[NTU];
782926Swnj 
792926Swnj /*
802926Swnj  * Bits for sc_flags.
812926Swnj  */
822926Swnj #define	H_WRITTEN 1	/* last operation was a write */
832926Swnj #define H_ERASED  2	/* last write retry was an erase gap */
842926Swnj #define H_REWIND  4	/* last unit start was a rewind */
8522Sbill 
863204Swnj char	hter_bits[] = HTER_BITS;
873204Swnj char	htds_bits[] = HTDS_BITS;
883204Swnj 
892926Swnj /*ARGSUSED*/
902980Swnj htattach(mi)
912980Swnj 	struct mba_device *mi;
922926Swnj {
932926Swnj 
942926Swnj }
952926Swnj 
967430Skre htslave(mi, ms, sn)
972980Swnj 	struct mba_device *mi;
982980Swnj 	struct mba_slave *ms;
997430Skre 	int sn;
1002980Swnj {
1013094Swnj 	register struct tu_softc *sc = &tu_softc[ms->ms_unit];
1024756Swnj 	register struct htdevice *htaddr = (struct htdevice *)mi->mi_drv;
1032980Swnj 
1047430Skre 	htaddr->httc = sn;
1054756Swnj 	if (htaddr->htdt & HTDT_SPR) {
1064756Swnj 		sc->sc_mi = mi;
1077430Skre 		sc->sc_slave = sn;
1084756Swnj 		tutoht[ms->ms_unit] = mi->mi_unit;
1094756Swnj 		return (1);
1104756Swnj 	} else
1114756Swnj 		return (0);
1122980Swnj }
1132980Swnj 
11422Sbill htopen(dev, flag)
1152926Swnj 	dev_t dev;
1162926Swnj 	int flag;
11722Sbill {
1183094Swnj 	register int tuunit;
1192980Swnj 	register struct mba_device *mi;
1203094Swnj 	register struct tu_softc *sc;
1213203Swnj 	int olddens, dens;
12222Sbill 
1233094Swnj 	tuunit = TUUNIT(dev);
12425052Skarels 	if (tuunit >= NTU || (mi = htinfo[HTUNIT(dev)]) == 0 ||
12525052Skarels 	    mi->mi_alive == 0)
1268580Sroot 		return (ENXIO);
12725052Skarels 	if ((sc = &tu_softc[tuunit])->sc_openf)
12825052Skarels 		return (EBUSY);
129*30918Skarels 	sc->sc_openf = 1;
1303203Swnj 	olddens = sc->sc_dens;
1313204Swnj 	dens = sc->sc_dens =
1323094Swnj 	    ((minor(dev)&H_1600BPI)?HTTC_1600BPI:HTTC_800BPI)|
1333094Swnj 		HTTC_PDP11|sc->sc_slave;
1343203Swnj 	htcommand(dev, HT_SENSE, 1);
1353203Swnj 	sc->sc_dens = olddens;
1363707Sroot 	if ((sc->sc_dsreg & HTDS_MOL) == 0) {
137*30918Skarels 		sc->sc_openf = 0;
1383717Sroot 		uprintf("tu%d: not online\n", tuunit);
1398580Sroot 		return (EIO);
1402926Swnj 	}
1413707Sroot 	if ((flag&FWRITE) && (sc->sc_dsreg&HTDS_WRL)) {
142*30918Skarels 		sc->sc_openf = 0;
1433717Sroot 		uprintf("tu%d: no write ring\n", tuunit);
1448580Sroot 		return (EIO);
1453707Sroot 	}
1463707Sroot 	if ((sc->sc_dsreg & HTDS_BOT) == 0 && (flag&FWRITE) &&
1473707Sroot 	    dens != sc->sc_dens) {
148*30918Skarels 		sc->sc_openf = 0;
1493717Sroot 		uprintf("tu%d: can't change density in mid-tape\n", tuunit);
1508580Sroot 		return (EIO);
1513707Sroot 	}
1522926Swnj 	sc->sc_blkno = (daddr_t)0;
1532926Swnj 	sc->sc_nxrec = INF;
1542926Swnj 	sc->sc_flags = 0;
1553094Swnj 	sc->sc_dens = dens;
156*30918Skarels 	sc->sc_blks = 0;
157*30918Skarels 	sc->sc_softerrs = 0;
15818325Sralph 	sc->sc_ttyp = u.u_ttyp;
1598580Sroot 	return (0);
16022Sbill }
16122Sbill 
16222Sbill htclose(dev, flag)
1632926Swnj 	register dev_t dev;
1642926Swnj 	register flag;
16522Sbill {
1663094Swnj 	register struct tu_softc *sc = &tu_softc[TUUNIT(dev)];
16722Sbill 
1682926Swnj 	if (flag == FWRITE || ((flag&FWRITE) && (sc->sc_flags&H_WRITTEN))) {
1692926Swnj 		htcommand(dev, HT_WEOF, 1);
1702926Swnj 		htcommand(dev, HT_WEOF, 1);
1712926Swnj 		htcommand(dev, HT_SREV, 1);
17222Sbill 	}
1732926Swnj 	if ((minor(dev)&H_NOREWIND) == 0)
1742926Swnj 		htcommand(dev, HT_REW, 0);
175*30918Skarels 	if (sc->sc_blks > 100 && sc->sc_softerrs > sc->sc_blks / 100)
176*30918Skarels 		log(LOG_INFO, "tu%d: %d soft errors in %d blocks\n",
177*30918Skarels 		    TUUNIT(dev), sc->sc_softerrs, sc->sc_blks);
1782926Swnj 	sc->sc_openf = 0;
17922Sbill }
18022Sbill 
1812926Swnj htcommand(dev, com, count)
1822926Swnj 	dev_t dev;
1832926Swnj 	int com, count;
18422Sbill {
18522Sbill 	register struct buf *bp;
1865436Sroot 	register int s;
18722Sbill 
1882926Swnj 	bp = &chtbuf[HTUNIT(dev)];
1895436Sroot 	s = spl5();
1902926Swnj 	while (bp->b_flags&B_BUSY) {
1913157Swnj 		if(bp->b_repcnt == 0 && (bp->b_flags&B_DONE))
1922980Swnj 			break;
19322Sbill 		bp->b_flags |= B_WANTED;
19422Sbill 		sleep((caddr_t)bp, PRIBIO);
19522Sbill 	}
1962943Swnj 	bp->b_flags = B_BUSY|B_READ;
1975436Sroot 	splx(s);
19822Sbill 	bp->b_dev = dev;
1992926Swnj 	bp->b_command = com;
2002926Swnj 	bp->b_repcnt = count;
20122Sbill 	bp->b_blkno = 0;
20222Sbill 	htstrategy(bp);
2032926Swnj 	if (count == 0)
2042926Swnj 		return;
20522Sbill 	iowait(bp);
2062926Swnj 	if (bp->b_flags&B_WANTED)
20722Sbill 		wakeup((caddr_t)bp);
2082926Swnj 	bp->b_flags &= B_ERROR;
20922Sbill }
21022Sbill 
21122Sbill htstrategy(bp)
2122926Swnj 	register struct buf *bp;
21322Sbill {
2143094Swnj 	register struct mba_device *mi = htinfo[HTUNIT(bp->b_dev)];
2152926Swnj 	register struct buf *dp;
2165436Sroot 	register int s;
21722Sbill 
21822Sbill 	bp->av_forw = NULL;
2192926Swnj 	dp = &mi->mi_tab;
2205436Sroot 	s = spl5();
2212926Swnj 	if (dp->b_actf == NULL)
2222926Swnj 		dp->b_actf = bp;
22322Sbill 	else
2242926Swnj 		dp->b_actl->av_forw = bp;
2252926Swnj 	dp->b_actl = bp;
2262926Swnj 	if (dp->b_active == 0)
2272926Swnj 		mbustart(mi);
2285436Sroot 	splx(s);
22922Sbill }
23022Sbill 
2312926Swnj htustart(mi)
2322980Swnj 	register struct mba_device *mi;
23322Sbill {
2342926Swnj 	register struct htdevice *htaddr =
2352926Swnj 	    (struct htdevice *)mi->mi_drv;
2362926Swnj 	register struct buf *bp = mi->mi_tab.b_actf;
2373094Swnj 	register struct tu_softc *sc = &tu_softc[TUUNIT(bp->b_dev)];
23822Sbill 	daddr_t blkno;
23922Sbill 
2402926Swnj 	htaddr->httc = sc->sc_dens;
24115108Skarels #ifdef	notdef
24215108Skarels 	/* unneeded, may hang controller */
2433181Swnj 	if (bp == &chtbuf[HTUNIT(bp->b_dev)] && bp->b_command == HT_SENSE) {
2443157Swnj 		htaddr->htcs1 = HT_SENSE|HT_GO;
2453157Swnj 		mbclrattn(mi);
2463157Swnj 	}
24715108Skarels #endif
2482926Swnj 	sc->sc_dsreg = htaddr->htds;
2492926Swnj 	sc->sc_erreg = htaddr->hter;
2502926Swnj 	sc->sc_resid = htaddr->htfc;
2512926Swnj 	sc->sc_flags &= ~(H_WRITTEN|H_REWIND);
2522926Swnj 	if ((htaddr->htdt & HTDT_SPR) == 0 || (htaddr->htds & HTDS_MOL) == 0)
2532926Swnj 		if (sc->sc_openf > 0)
2542926Swnj 			sc->sc_openf = -1;
2552926Swnj 	if (sc->sc_openf < 0) {
2562926Swnj 		bp->b_flags |= B_ERROR;
2572926Swnj 		return (MBU_NEXT);
2582926Swnj 	}
2593094Swnj 	if (bp != &chtbuf[HTUNIT(bp->b_dev)]) {
2607379Ssam 		if (bdbtofsb(bp->b_blkno) > sc->sc_nxrec) {
2612926Swnj 			bp->b_flags |= B_ERROR;
2622926Swnj 			bp->b_error = ENXIO;
2632961Swnj 			return (MBU_NEXT);
2643094Swnj 		}
2657379Ssam 		if (bdbtofsb(bp->b_blkno) == sc->sc_nxrec &&
2662926Swnj 		    bp->b_flags&B_READ) {
2672926Swnj 			bp->b_resid = bp->b_bcount;
2682926Swnj 			clrbuf(bp);
2692961Swnj 			return (MBU_NEXT);
2703094Swnj 		}
2713094Swnj 		if ((bp->b_flags&B_READ)==0)
2727379Ssam 			sc->sc_nxrec = bdbtofsb(bp->b_blkno) + 1;
2732926Swnj 	} else {
2742961Swnj 		if (bp->b_command == HT_SENSE)
2752926Swnj 			return (MBU_NEXT);
2762926Swnj 		if (bp->b_command == HT_REW)
2772926Swnj 			sc->sc_flags |= H_REWIND;
2782926Swnj 		else
2792926Swnj 			htaddr->htfc = -bp->b_bcount;
2802926Swnj 		htaddr->htcs1 = bp->b_command|HT_GO;
2812926Swnj 		return (MBU_STARTED);
2822926Swnj 	}
2837379Ssam 	if ((blkno = sc->sc_blkno) == bdbtofsb(bp->b_blkno)) {
2842926Swnj 		htaddr->htfc = -bp->b_bcount;
2852926Swnj 		if ((bp->b_flags&B_READ) == 0) {
2863094Swnj 			if (mi->mi_tab.b_errcnt) {
2873094Swnj 				if ((sc->sc_flags & H_ERASED) == 0) {
2882926Swnj 					sc->sc_flags |= H_ERASED;
2892926Swnj 					htaddr->htcs1 = HT_ERASE | HT_GO;
2902926Swnj 					return (MBU_STARTED);
2912926Swnj 				}
2923094Swnj 				sc->sc_flags &= ~H_ERASED;
2933094Swnj 			}
2942926Swnj 			if (htaddr->htds & HTDS_EOT) {
2952926Swnj 				bp->b_resid = bp->b_bcount;
2966812Swnj 				bp->b_flags |= B_ERROR;
2972926Swnj 				return (MBU_NEXT);
2982926Swnj 			}
29922Sbill 		}
3002926Swnj 		return (MBU_DODATA);
30122Sbill 	}
3027379Ssam 	if (blkno < bdbtofsb(bp->b_blkno)) {
3037379Ssam 		htaddr->htfc = blkno - bdbtofsb(bp->b_blkno);
3042926Swnj 		htaddr->htcs1 = HT_SFORW|HT_GO;
30522Sbill 	} else {
3067379Ssam 		htaddr->htfc = bdbtofsb(bp->b_blkno) - blkno;
3072926Swnj 		htaddr->htcs1 = HT_SREV|HT_GO;
30822Sbill 	}
3092926Swnj 	return (MBU_STARTED);
31022Sbill }
31122Sbill 
3123094Swnj htdtint(mi, mbsr)
3132980Swnj 	register struct mba_device *mi;
3143094Swnj 	int mbsr;
31522Sbill {
3162926Swnj 	register struct htdevice *htaddr = (struct htdevice *)mi->mi_drv;
3172926Swnj 	register struct buf *bp = mi->mi_tab.b_actf;
3183094Swnj 	register struct tu_softc *sc;
3192961Swnj 	int ds, er, mbs;
32022Sbill 
3213094Swnj 	sc = &tu_softc[TUUNIT(bp->b_dev)];
3222926Swnj 	ds = sc->sc_dsreg = MASKREG(htaddr->htds);
3232926Swnj 	er = sc->sc_erreg = MASKREG(htaddr->hter);
3242926Swnj 	sc->sc_resid = MASKREG(htaddr->htfc);
3253094Swnj 	mbs = mbsr;
3262926Swnj 	sc->sc_blkno++;
3272926Swnj 	if((bp->b_flags & B_READ) == 0)
3282926Swnj 		sc->sc_flags |= H_WRITTEN;
3293094Swnj 	if ((ds&(HTDS_ERR|HTDS_MOL)) != HTDS_MOL || mbs & MBSR_EBITS) {
3302926Swnj 		htaddr->htcs1 = HT_DCLR|HT_GO;
3312961Swnj 		mbclrattn(mi);
3322961Swnj 		if (bp == &rhtbuf[HTUNIT(bp->b_dev)]) {
3332926Swnj 			er &= ~HTER_FCE;
3343094Swnj 			mbs &= ~(MBSR_DTABT|MBSR_MBEXC);
3354276Sroot 		}
3362926Swnj 		if (bp->b_flags & B_READ && ds & HTDS_PES)
3372926Swnj 			er &= ~(HTER_CSITM|HTER_CORCRC);
3383094Swnj 		if (er&HTER_HARD || mbs&MBSR_EBITS || (ds&HTDS_MOL) == 0 ||
3392961Swnj 		    er && ++mi->mi_tab.b_errcnt >= 7) {
3402926Swnj 			if ((ds & HTDS_MOL) == 0 && sc->sc_openf > 0)
3412926Swnj 				sc->sc_openf = -1;
3423157Swnj 			if ((er&HTER_HARD) == HTER_FCE &&
3433157Swnj 			    (mbs&MBSR_EBITS) == (MBSR_DTABT|MBSR_MBEXC) &&
3443157Swnj 			    (ds&HTDS_MOL))
3453157Swnj 				goto noprint;
34618325Sralph 			tprintf(sc->sc_ttyp, "tu%d: hard error bn%d mbsr=%b er=%b ds=%b\n",
3472980Swnj 			    TUUNIT(bp->b_dev), bp->b_blkno,
3483094Swnj 			    mbsr, mbsr_bits,
3493204Swnj 			    sc->sc_erreg, hter_bits,
3503204Swnj 			    sc->sc_dsreg, htds_bits);
3513157Swnj noprint:
35222Sbill 			bp->b_flags |= B_ERROR;
3532926Swnj 			return (MBD_DONE);
35422Sbill 		}
3552926Swnj 		if (er)
3562926Swnj 			return (MBD_RETRY);
35722Sbill 	}
3582926Swnj 	bp->b_resid = 0;
359*30918Skarels 	sc->sc_blks++;
360*30918Skarels 	if (mi->mi_tab.b_errcnt)
361*30918Skarels 		sc->sc_softerrs++;
3622926Swnj 	if (bp->b_flags & B_READ)
3632926Swnj 		if (ds&HTDS_TM) {		/* must be a read, right? */
3642926Swnj 			bp->b_resid = bp->b_bcount;
3657379Ssam 			sc->sc_nxrec = bdbtofsb(bp->b_blkno);
3662926Swnj 		} else if(bp->b_bcount > MASKREG(htaddr->htfc))
3672926Swnj 			bp->b_resid = bp->b_bcount - MASKREG(htaddr->htfc);
3682926Swnj 	return (MBD_DONE);
3692926Swnj }
37022Sbill 
3712926Swnj htndtint(mi)
3722980Swnj 	register struct mba_device *mi;
3732926Swnj {
3742926Swnj 	register struct htdevice *htaddr = (struct htdevice *)mi->mi_drv;
3752926Swnj 	register struct buf *bp = mi->mi_tab.b_actf;
3763094Swnj 	register struct tu_softc *sc;
3772926Swnj 	int er, ds, fc;
37822Sbill 
3793094Swnj 	ds = MASKREG(htaddr->htds);
3803094Swnj 	er = MASKREG(htaddr->hter);
3813094Swnj 	fc = MASKREG(htaddr->htfc);
3823094Swnj 	if (er) {
3832926Swnj 		htaddr->htcs1 = HT_DCLR|HT_GO;
3842961Swnj 		mbclrattn(mi);
3852961Swnj 	}
3863094Swnj 	if (bp == 0)
3873094Swnj 		return (MBN_SKIP);
3883094Swnj 	sc = &tu_softc[TUUNIT(bp->b_dev)];
3893094Swnj 	sc->sc_dsreg = ds;
3903094Swnj 	sc->sc_erreg = er;
3913094Swnj 	sc->sc_resid = fc;
3923094Swnj 	if (bp == &chtbuf[HTUNIT(bp->b_dev)]) {
39326290Skarels 		switch ((int)bp->b_command) {
3943094Swnj 		case HT_REWOFFL:
3952926Swnj 			/* offline is on purpose; don't do anything special */
3962926Swnj 			ds |= HTDS_MOL;
3973094Swnj 			break;
3983094Swnj 		case HT_SREV:
3993094Swnj 			/* if backspace file hit bot, its not an error */
4003094Swnj 		        if (er == (HTER_NEF|HTER_FCE) && ds&HTDS_BOT &&
4013094Swnj 			    bp->b_repcnt == INF)
4023094Swnj 				er &= ~HTER_NEF;
4033094Swnj 			break;
4043094Swnj 		}
4052926Swnj 		er &= ~HTER_FCE;
4062926Swnj 		if (er == 0)
4072926Swnj 			ds &= ~HTDS_ERR;
40822Sbill 	}
4092926Swnj 	if ((ds & (HTDS_ERR|HTDS_MOL)) != HTDS_MOL) {
4102926Swnj 		if ((ds & HTDS_MOL) == 0 && sc->sc_openf > 0)
4112926Swnj 			sc->sc_openf = -1;
41218325Sralph 		tprintf(sc->sc_ttyp, "tu%d: hard error bn%d er=%b ds=%b\n",
4132980Swnj 		    TUUNIT(bp->b_dev), bp->b_blkno,
4143204Swnj 		    sc->sc_erreg, hter_bits, sc->sc_dsreg, htds_bits);
4152926Swnj 		bp->b_flags |= B_ERROR;
4162926Swnj 		return (MBN_DONE);
4172926Swnj 	}
4183094Swnj 	if (bp == &chtbuf[HTUNIT(bp->b_dev)]) {
4192926Swnj 		if (sc->sc_flags & H_REWIND)
4202926Swnj 			return (ds & HTDS_BOT ? MBN_DONE : MBN_RETRY);
4212926Swnj 		bp->b_resid = -sc->sc_resid;
4222926Swnj 		return (MBN_DONE);
4232926Swnj 	}
4242926Swnj 	if (ds & HTDS_TM)
4257379Ssam 		if (sc->sc_blkno > bdbtofsb(bp->b_blkno)) {
4267379Ssam 			sc->sc_nxrec = bdbtofsb(bp->b_blkno) - fc;
4272926Swnj 			sc->sc_blkno = sc->sc_nxrec;
4283094Swnj 		} else {
4297379Ssam 			sc->sc_blkno = bdbtofsb(bp->b_blkno) + fc;
4302926Swnj 			sc->sc_nxrec = sc->sc_blkno - 1;
4312926Swnj 		}
4322926Swnj 	else
4337379Ssam 		sc->sc_blkno = bdbtofsb(bp->b_blkno);
4342926Swnj 	return (MBN_RETRY);
43522Sbill }
43622Sbill 
4377739Sroot htread(dev, uio)
4382926Swnj 	dev_t dev;
4397739Sroot 	struct uio *uio;
44022Sbill {
4418157Sroot 	int errno;
4422926Swnj 
4438157Sroot 	errno = htphys(dev, uio);
4448157Sroot 	if (errno)
4458157Sroot 		return (errno);
4468157Sroot 	return (physio(htstrategy, &rhtbuf[HTUNIT(dev)], dev, B_READ, minphys, uio));
44722Sbill }
44822Sbill 
4498605Sroot htwrite(dev, uio)
4508605Sroot 	dev_t dev;
4518688Sroot 	struct uio *uio;
45222Sbill {
4538157Sroot 	int errno;
4542926Swnj 
4558157Sroot 	errno = htphys(dev, uio);
4568157Sroot 	if (errno)
4578157Sroot 		return (errno);
4588157Sroot 	return (physio(htstrategy, &rhtbuf[HTUNIT(dev)], dev, B_WRITE, minphys, uio));
45922Sbill }
46022Sbill 
4617739Sroot htphys(dev, uio)
4622926Swnj 	dev_t dev;
4637739Sroot 	struct uio *uio;
46422Sbill {
4653094Swnj 	register int htunit;
4663094Swnj 	register struct tu_softc *sc;
4673094Swnj 	register struct mba_device *mi;
46822Sbill 	daddr_t a;
46922Sbill 
4703094Swnj 	htunit = HTUNIT(dev);
4717832Sroot 	if (htunit >= NHT || (mi = htinfo[htunit]) == 0 || mi->mi_alive == 0)
4727739Sroot 		return (ENXIO);
4737832Sroot 	a = uio->uio_offset >> 9;
4743094Swnj 	sc = &tu_softc[TUUNIT(dev)];
4757379Ssam 	sc->sc_blkno = bdbtofsb(a);
4767379Ssam 	sc->sc_nxrec = bdbtofsb(a)+1;
4777739Sroot 	return (0);
47822Sbill }
4791917Swnj 
4802926Swnj /*ARGSUSED*/
4817636Ssam htioctl(dev, cmd, data, flag)
4822926Swnj 	dev_t dev;
4832926Swnj 	int cmd;
4847636Ssam 	caddr_t data;
4852926Swnj 	int flag;
4862926Swnj {
4873094Swnj 	register struct tu_softc *sc = &tu_softc[TUUNIT(dev)];
4883094Swnj 	register struct buf *bp = &chtbuf[HTUNIT(dev)];
4892926Swnj 	register callcount;
4902926Swnj 	int fcount;
4917636Ssam 	struct mtop *mtop;
4927636Ssam 	struct mtget *mtget;
4932926Swnj 	/* we depend of the values and order of the MT codes here */
4942926Swnj 	static htops[] =
4952926Swnj    {HT_WEOF,HT_SFORW,HT_SREV,HT_SFORW,HT_SREV,HT_REW,HT_REWOFFL,HT_SENSE};
4961917Swnj 
4972926Swnj 	switch (cmd) {
4987636Ssam 
4997636Ssam 	case MTIOCTOP:	/* tape operation */
5007636Ssam 		mtop = (struct mtop *)data;
5017636Ssam 		switch (mtop->mt_op) {
5027636Ssam 
5032926Swnj 		case MTWEOF:
5047636Ssam 			callcount = mtop->mt_count;
5052926Swnj 			fcount = 1;
5062926Swnj 			break;
5077636Ssam 
5082926Swnj 		case MTFSF: case MTBSF:
5097636Ssam 			callcount = mtop->mt_count;
5102926Swnj 			fcount = INF;
5112926Swnj 			break;
5127636Ssam 
5132926Swnj 		case MTFSR: case MTBSR:
5142926Swnj 			callcount = 1;
5157636Ssam 			fcount = mtop->mt_count;
5162926Swnj 			break;
5177636Ssam 
5182926Swnj 		case MTREW: case MTOFFL:
5192926Swnj 			callcount = 1;
5202926Swnj 			fcount = 1;
5212926Swnj 			break;
5227636Ssam 
5232926Swnj 		default:
5248580Sroot 			return (ENXIO);
5252926Swnj 		}
5268580Sroot 		if (callcount <= 0 || fcount <= 0)
5278580Sroot 			return (EINVAL);
5282926Swnj 		while (--callcount >= 0) {
5297636Ssam 			htcommand(dev, htops[mtop->mt_op], fcount);
5307636Ssam 			if ((mtop->mt_op == MTFSR || mtop->mt_op == MTBSR) &&
5318580Sroot 			    bp->b_resid)
5328580Sroot 				return (EIO);
5333094Swnj 			if ((bp->b_flags&B_ERROR) || sc->sc_dsreg&HTDS_BOT)
5342926Swnj 				break;
5352926Swnj 		}
5368711Sroot 		return (geterror(bp));
5377636Ssam 
5382926Swnj 	case MTIOCGET:
5397636Ssam 		mtget = (struct mtget *)data;
5407636Ssam 		mtget->mt_dsreg = sc->sc_dsreg;
5417636Ssam 		mtget->mt_erreg = sc->sc_erreg;
5427636Ssam 		mtget->mt_resid = sc->sc_resid;
5437636Ssam 		mtget->mt_type = MT_ISHT;
5448580Sroot 		break;
5457636Ssam 
5462926Swnj 	default:
5478580Sroot 		return (ENXIO);
5482926Swnj 	}
5498580Sroot 	return (0);
5502926Swnj }
5512926Swnj 
5521917Swnj #define	DBSIZE	20
5531917Swnj 
5542926Swnj htdump()
5551917Swnj {
5562980Swnj 	register struct mba_device *mi;
5572926Swnj 	register struct mba_regs *mp;
5582926Swnj 	register struct htdevice *htaddr;
5592926Swnj 	int blk, num;
5602926Swnj 	int start;
5611917Swnj 
5622926Swnj 	start = 0;
5632926Swnj 	num = maxfree;
5642926Swnj #define	phys(a,b)		((b)((int)(a)&0x7fffffff))
5652926Swnj 	if (htinfo[0] == 0)
5662926Swnj 		return (ENXIO);
5672980Swnj 	mi = phys(htinfo[0], struct mba_device *);
5682926Swnj 	mp = phys(mi->mi_hd, struct mba_hd *)->mh_physmba;
5693157Swnj 	mp->mba_cr = MBCR_IE;
5702926Swnj 	htaddr = (struct htdevice *)&mp->mba_drv[mi->mi_drive];
5712926Swnj 	htaddr->httc = HTTC_PDP11|HTTC_1600BPI;
5722926Swnj 	htaddr->htcs1 = HT_DCLR|HT_GO;
5731917Swnj 	while (num > 0) {
5741917Swnj 		blk = num > DBSIZE ? DBSIZE : num;
5752926Swnj 		htdwrite(start, blk, htaddr, mp);
5762926Swnj 		start += blk;
5771917Swnj 		num -= blk;
5781917Swnj 	}
5793157Swnj 	hteof(htaddr);
5803157Swnj 	hteof(htaddr);
5812926Swnj 	htwait(htaddr);
5823181Swnj 	if (htaddr->htds&HTDS_ERR)
5833157Swnj 		return (EIO);
5842926Swnj 	htaddr->htcs1 = HT_REW|HT_GO;
5853103Swnj 	return (0);
5861917Swnj }
5871917Swnj 
5882926Swnj htdwrite(dbuf, num, htaddr, mp)
5892926Swnj 	register dbuf, num;
5902926Swnj 	register struct htdevice *htaddr;
5912926Swnj 	struct mba_regs *mp;
5921917Swnj {
5932926Swnj 	register struct pte *io;
5941917Swnj 	register int i;
5951917Swnj 
5962926Swnj 	htwait(htaddr);
5972926Swnj 	io = mp->mba_map;
5981917Swnj 	for (i = 0; i < num; i++)
5992926Swnj 		*(int *)io++ = dbuf++ | PG_V;
6002926Swnj 	htaddr->htfc = -(num*NBPG);
6012926Swnj 	mp->mba_sr = -1;
6022926Swnj 	mp->mba_bcr = -(num*NBPG);
6032926Swnj 	mp->mba_var = 0;
6042926Swnj 	htaddr->htcs1 = HT_WCOM|HT_GO;
6051917Swnj }
6061917Swnj 
6072926Swnj htwait(htaddr)
6082926Swnj 	struct htdevice *htaddr;
6091917Swnj {
6101917Swnj 	register s;
6111917Swnj 
6121917Swnj 	do
6132926Swnj 		s = htaddr->htds;
6142926Swnj 	while ((s & HTDS_DRY) == 0);
6151917Swnj }
6161917Swnj 
6172926Swnj hteof(htaddr)
6182926Swnj 	struct htdevice *htaddr;
6191917Swnj {
6201917Swnj 
6212926Swnj 	htwait(htaddr);
6222926Swnj 	htaddr->htcs1 = HT_WEOF|HT_GO;
6231917Swnj }
6241563Sbill #endif
625