1*11212Ssam /* hp.c 4.69 83/02/21 */ 23706Sroot 33706Sroot #ifdef HPDEBUG 43289Swnj int hpdebug; 53706Sroot #endif 63706Sroot #ifdef HPBDEBUG 73706Sroot int hpbdebug; 83706Sroot #endif 921Sbill 101939Swnj #include "hp.h" 111565Sbill #if NHP > 0 1221Sbill /* 135726Sroot * HP disk driver for RP0x+RMxx+ML11 142827Swnj * 152827Swnj * TODO: 163706Sroot * check RM80 skip sector handling when ECC's occur later 173093Swnj * check offset recovery handling 183706Sroot * see if DCLR and/or RELEASE set attention status 193706Sroot * print bits of mr && mr2 symbolically 2021Sbill */ 219786Ssam #include "../machine/pte.h" 2221Sbill 2321Sbill #include "../h/param.h" 2421Sbill #include "../h/systm.h" 25305Sbill #include "../h/dk.h" 2621Sbill #include "../h/buf.h" 2721Sbill #include "../h/conf.h" 2821Sbill #include "../h/dir.h" 2921Sbill #include "../h/user.h" 3021Sbill #include "../h/map.h" 318468Sroot #include "../vax/mtpr.h" 32420Sbill #include "../h/vm.h" 332362Swnj #include "../h/cmap.h" 343706Sroot #include "../h/dkbad.h" 357635Ssam #include "../h/ioctl.h" 367738Sroot #include "../h/uio.h" 3721Sbill 388988Sroot #include "../vax/dkio.h" 398468Sroot #include "../vaxmba/mbareg.h" 408468Sroot #include "../vaxmba/mbavar.h" 418468Sroot #include "../vaxmba/hpreg.h" 4221Sbill 432383Swnj /* THIS SHOULD BE READ OFF THE PACK, PER DRIVE */ 442383Swnj struct size { 4521Sbill daddr_t nblocks; 4621Sbill int cyloff; 47*11212Ssam } rp06_sizes[8] = { 48886Sbill 15884, 0, /* A=cyl 0 thru 37 */ 49886Sbill 33440, 38, /* B=cyl 38 thru 117 */ 50886Sbill 340670, 0, /* C=cyl 0 thru 814 */ 51*11212Ssam 15884, 118, /* D=cyl 118 thru 155 */ 52*11212Ssam 55936, 156, /* E=cyl 156 thru 289 */ 53*11212Ssam 219384, 290, /* F=cyl 290 thru 814 */ 54*11212Ssam 291280, 118, /* G=cyl 118 thru 814 */ 5521Sbill 0, 0, 56*11212Ssam }, rp05_sizes[8] = { 57*11212Ssam 15884, 0, /* A=cyl 0 thru 37 */ 58*11212Ssam 33440, 38, /* B=cyl 38 thru 117 */ 59*11212Ssam 171798, 0, /* C=cyl 0 thru 410 */ 60*11212Ssam 15884, 118, /* D=cyl 118 thru 155 */ 61*11212Ssam 55936, 156, /* E=cyl 156 thru 289 */ 62*11212Ssam 50512, 290, /* F=cyl 290 thru 410 */ 63*11212Ssam 122408, 118, /* G=cyl 118 thru 410 */ 6421Sbill 0, 0, 65*11212Ssam }, rm03_sizes[8] = { 66886Sbill 15884, 0, /* A=cyl 0 thru 99 */ 67*11212Ssam 33440, 100, /* B=cyl 100 thru 308 */ 68886Sbill 131680, 0, /* C=cyl 0 thru 822 */ 69*11212Ssam 15884, 309, /* D=cyl 309 thru 408 */ 70*11212Ssam 55936, 409, /* E=cyl 409 thru 758 */ 71*11212Ssam 10144, 759, /* F=cyl 759 thru 822 */ 72*11212Ssam #ifdef ARPA 733729Sroot 81984, 310, /* G=cyl 310 thru 822 */ 74*11212Ssam #else 75*11212Ssam 82144, 309, /* G=cyl 309 thru 822 */ 76*11212Ssam #endif 7721Sbill 0, 0, 78*11212Ssam }, rm05_sizes[8] = { 79886Sbill 15884, 0, /* A=cyl 0 thru 26 */ 80886Sbill 33440, 27, /* B=cyl 27 thru 81 */ 813271Swnj 500384, 0, /* C=cyl 0 thru 822 */ 82886Sbill 15884, 562, /* D=cyl 562 thru 588 */ 83886Sbill 55936, 589, /* E=cyl 589 thru 680 */ 843729Sroot 86240, 681, /* F=cyl 681 thru 822 */ 853729Sroot 158592, 562, /* G=cyl 562 thru 822 */ 86886Sbill 291346, 82, /* H=cyl 82 thru 561 */ 872383Swnj }, rm80_sizes[8] = { 882383Swnj 15884, 0, /* A=cyl 0 thru 36 */ 892383Swnj 33440, 37, /* B=cyl 37 thru 114 */ 902383Swnj 242606, 0, /* C=cyl 0 thru 558 */ 91*11212Ssam 15884, 115, /* D=cyl 115 thru 151 */ 92*11212Ssam 55936, 152, /* E=cyl 152 thru 280 */ 93*11212Ssam 120559, 281, /* F=cyl 281 thru 558 */ 94*11212Ssam 192603, 115, /* G=cyl 115 thru 558 */ 952383Swnj 0, 0, 96*11212Ssam }, rp07_sizes[8] = { 976927Ssam 15884, 0, /* A=cyl 0 thru 9 */ 98*11212Ssam 66880, 10, /* B=cyl 10 thru 51 */ 99*11212Ssam 1008000, 0, /* C=cyl 0 thru 629 */ 100*11212Ssam 15884, 235, /* D=cyl 235 thru 244 */ 101*11212Ssam 307200, 245, /* E=cyl 245 thru 436 */ 102*11212Ssam 308650, 437, /* F=cyl 437 thru 629 */ 103*11212Ssam 631850, 235, /* G=cyl 235 thru 629 */ 104*11212Ssam 291346, 52, /* H=cyl 52 thru 234 */ 105*11212Ssam }, cdc9775_sizes[8] = { 106*11212Ssam 15884, 0, /* A=cyl 0 thru 12 */ 107*11212Ssam 66880, 13, /* B=cyl 13 thru 65 */ 108*11212Ssam 1079040, 0, /* C=cyl 0 thru 842 */ 109*11212Ssam 15884, 294, /* D=cyl 294 thru 306 */ 110*11212Ssam 307200, 307, /* E=cyl 307 thru 546 */ 111*11212Ssam 378784, 547, /* F=cyl 547 thru 842 */ 112*11212Ssam 702624, 294, /* G=cyl 294 thru 842 */ 113*11212Ssam 291346, 66, /* H=cyl 66 thru 293 */ 114*11212Ssam }, cdc9730_sizes[8] = { 1156927Ssam 15884, 0, /* A=cyl 0 thru 49 */ 1166927Ssam 33440, 50, /* B=cyl 50 thru 154 */ 1176927Ssam 263360, 0, /* C=cyl 0 thru 822 */ 118*11212Ssam 15884, 155, /* D=cyl 155 thru 204 */ 119*11212Ssam 55936, 205, /* E=cyl 205 thru 379 */ 120*11212Ssam 141664, 380, /* F=cyl 380 thru 822 */ 121*11212Ssam 213664, 155, /* G=cyl 155 thru 822 */ 1226927Ssam 0, 0, 123*11212Ssam }, capricorn_sizes[8] = { 1246927Ssam 15884, 0, /* A=cyl 0 thru 31 */ 1256927Ssam 33440, 32, /* B=cyl 32 thru 97 */ 1266927Ssam 524288, 0, /* C=cyl 0 thru 1023 */ 127*11212Ssam 15884, 668, /* D=cyl 668 thru 699 */ 128*11212Ssam 55936, 700, /* E=cyl 700 thru 809 */ 129*11212Ssam 109472, 810, /* F=cyl 810 thru 1023 */ 130*11212Ssam 182176, 668, /* G=cyl 668 thru 1023 */ 1316927Ssam 291346, 98, /* H=cyl 98 thru 667 */ 132*11212Ssam }, eagle_sizes[8] = { 133*11212Ssam #ifdef MONET 13410734Ssam 15884, 0, /* A=cyl 0 thru 16 */ 13510734Ssam 33440, 17, /* B=cyl 17 thru 52 */ 13610734Ssam 808176, 0, /* C=cyl 0 thru 841 */ 13710734Ssam 0, 0, 13810734Ssam 0, 0, 13910734Ssam 0, 0, 14010734Ssam 465456, 357, /* G=cyl 357 thru 841 */ 14110734Ssam 291346, 53, /* H=cyl 52 thru 356 */ 142*11212Ssam #else 143*11212Ssam 15884, 0, /* A=cyl 0 thru 16 */ 144*11212Ssam 66880, 17, /* B=cyl 17 thru 86 */ 145*11212Ssam 809280, 0, /* C=cyl 0 thru 842 */ 146*11212Ssam 15884, 391, /* D=cyl 391 thru 407 */ 147*11212Ssam 307200, 408, /* E=cyl 408 thru 727 */ 148*11212Ssam 110256, 728, /* F=cyl 728 thru 842 */ 149*11212Ssam 433776, 391, /* G=cyl 391 thru 842 */ 150*11212Ssam 291346, 87, /* H=cyl 87 thru 390 */ 151*11212Ssam #endif 15221Sbill }; 1532383Swnj /* END OF STUFF WHICH SHOULD BE READ IN PER DISK */ 15421Sbill 1552383Swnj #define _hpSDIST 2 1562383Swnj #define _hpRDIST 3 1572383Swnj 1582383Swnj int hpSDIST = _hpSDIST; 1592383Swnj int hpRDIST = _hpRDIST; 1602383Swnj 1616927Ssam /* 1626927Ssam * Table for converting Massbus drive types into 1636927Ssam * indices into the partition tables. Slots are 1646927Ssam * left for those drives devined from other means 1656927Ssam * (e.g. SI, AMPEX, etc.). 1666927Ssam */ 1676927Ssam short hptypes[] = { 1686927Ssam #define HPDT_RM03 0 1696927Ssam MBDT_RM03, 1706927Ssam #define HPDT_RM05 1 1716927Ssam MBDT_RM05, 1726927Ssam #define HPDT_RP06 2 1736927Ssam MBDT_RP06, 1746927Ssam #define HPDT_RM80 3 1756927Ssam MBDT_RM80, 1766927Ssam #define HPDT_RP05 4 1776927Ssam MBDT_RP05, 1786927Ssam #define HPDT_RP07 5 1796927Ssam MBDT_RP07, 1806927Ssam #define HPDT_ML11A 6 1816927Ssam MBDT_ML11A, 1826927Ssam #define HPDT_ML11B 7 1836927Ssam MBDT_ML11B, 1846927Ssam #define HPDT_9775 8 1856927Ssam -1, 1866927Ssam #define HPDT_9730 9 1876927Ssam -1, 1886927Ssam #define HPDT_CAPRICORN 10 1896927Ssam -1, 1909175Ssam #define HPDT_EAGLE 11 1919175Ssam -1, 192*11212Ssam #define HPDT_RM02 12 1939175Ssam MBDT_RM02, /* beware, actually capricorn or eagle */ 1946927Ssam 0 1956927Ssam }; 1962978Swnj struct mba_device *hpinfo[NHP]; 1972978Swnj int hpattach(),hpustart(),hpstart(),hpdtint(); 1982383Swnj struct mba_driver hpdriver = 1992978Swnj { hpattach, 0, hpustart, hpstart, hpdtint, 0, 2002978Swnj hptypes, "hp", 0, hpinfo }; 2012383Swnj 2022383Swnj struct hpst { 2032383Swnj short nsect; 2042383Swnj short ntrak; 2052383Swnj short nspc; 2062383Swnj short ncyl; 2072383Swnj struct size *sizes; 2082383Swnj } hpst[] = { 209*11212Ssam 32, 5, 32*5, 823, rm03_sizes, /* RM03 */ 210*11212Ssam 32, 19, 32*19, 823, rm05_sizes, /* RM05 */ 211*11212Ssam 22, 19, 22*19, 815, rp06_sizes, /* RP06 */ 2123706Sroot 31, 14, 31*14, 559, rm80_sizes, /* RM80 */ 213*11212Ssam 22, 19, 22*19, 411, rp05_sizes, /* RP05 */ 214*11212Ssam 50, 32, 50*32, 630, rp07_sizes, /* RP07 */ 2155726Sroot 1, 1, 1, 1, 0, /* ML11A */ 2165726Sroot 1, 1, 1, 1, 0, /* ML11B */ 217*11212Ssam 32, 40, 32*40, 843, cdc9775_sizes, /* 9775 */ 218*11212Ssam 32, 10, 32*10, 823, cdc9730_sizes, /* 9730 */ 219*11212Ssam 32, 16, 32*16, 1024, capricorn_sizes,/* AMPEX capricorn */ 220*11212Ssam 48, 20, 48*20, 842, eagle_sizes, /* Fujitsu EAGLE */ 2212383Swnj }; 2222383Swnj 2232624Swnj u_char hp_offset[16] = { 2243093Swnj HPOF_P400, HPOF_M400, HPOF_P400, HPOF_M400, 2253093Swnj HPOF_P800, HPOF_M800, HPOF_P800, HPOF_M800, 2263093Swnj HPOF_P1200, HPOF_M1200, HPOF_P1200, HPOF_M1200, 2273093Swnj 0, 0, 0, 0, 22821Sbill }; 22921Sbill 2302624Swnj struct buf rhpbuf[NHP]; 2313706Sroot struct buf bhpbuf[NHP]; 2323706Sroot struct dkbad hpbad[NHP]; 23321Sbill 23410857Ssam struct hpsoftc { 23510857Ssam u_char sc_hpinit; /* drive initialized */ 23610857Ssam u_char sc_recal; /* recalibrate state */ 23710857Ssam u_char sc_hdr; /* next i/o includes header */ 23810857Ssam u_char sc_doseeks; /* perform explicit seeks */ 23910857Ssam daddr_t sc_mlsize; /* ML11 size */ 24010857Ssam } hpsoftc[NHP]; 24110857Ssam 24221Sbill #define b_cylin b_resid 24321Sbill 2445726Sroot /* #define ML11 0 to remove ML11 support */ 2455726Sroot #define ML11 (hptypes[mi->mi_type] == MBDT_ML11A) 2465726Sroot #define RP06 (hptypes[mi->mi_type] <= MBDT_RP06) 2475726Sroot #define RM80 (hptypes[mi->mi_type] == MBDT_RM80) 2485726Sroot 24911202Ssam #define MASKREG(reg) ((reg)&0xffff) 25011202Ssam 25121Sbill #ifdef INTRLVE 25221Sbill daddr_t dkblock(); 25321Sbill #endif 2542604Swnj 2552978Swnj /*ARGSUSED*/ 2562978Swnj hpattach(mi, slave) 25710734Ssam register struct mba_device *mi; 2582604Swnj { 25910734Ssam 26010734Ssam mi->mi_type = hpmaptype(mi); 26110734Ssam if (!ML11 && mi->mi_dk >= 0) { 26210734Ssam struct hpst *st = &hpst[mi->mi_type]; 26310734Ssam 26410734Ssam dk_mspw[mi->mi_dk] = 1.0 / 60 / (st->nsect * 256); 26510734Ssam } 26610734Ssam } 26710734Ssam 26810734Ssam /* 26910734Ssam * Map apparent MASSBUS drive type into manufacturer 27010734Ssam * specific configuration. For SI controllers this is done 27110734Ssam * based on codes in the serial number register. For 27210734Ssam * EMULEX controllers, the track and sector attributes are 27310734Ssam * used when the drive type is an RM02 (not supported by DEC). 27410734Ssam */ 27510734Ssam hpmaptype(mi) 27610734Ssam register struct mba_device *mi; 27710734Ssam { 2786927Ssam register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv; 27910734Ssam register int type = mi->mi_type; 2806927Ssam 2816927Ssam /* 2826927Ssam * Model-byte processing for SI 9400 controllers. 2836927Ssam * NB: Only deals with RM03 and RM05 emulations. 2846927Ssam */ 28510734Ssam if (type == HPDT_RM03 || type == HPDT_RM05) { 28610734Ssam int hpsn = hpaddr->hpsn; 2876927Ssam 2886927Ssam if ((hpsn & SIMB_LU) != mi->mi_drive) 28910734Ssam return (type); 2906927Ssam switch ((hpsn & SIMB_MB) & ~(SIMB_S6|SIRM03|SIRM05)) { 2916927Ssam 2926927Ssam case SI9775D: 2936927Ssam printf("hp%d: si 9775 (direct)\n", mi->mi_unit); 29410734Ssam type = HPDT_9775; 2956927Ssam break; 2966927Ssam 2976927Ssam case SI9730D: 2986927Ssam printf("hp%d: si 9730 (direct)\n", mi->mi_unit); 29910734Ssam type = HPDT_9730; 3006927Ssam break; 3016927Ssam 3027035Swnj /* 30310734Ssam * AMPEX 9300, SI Combination needs a have the 30410734Ssam * drive cleared before we start. We do not know 30510734Ssam * why, but tests show that the recalibrate fixes 30610734Ssam * the problem. 3077035Swnj */ 3086927Ssam case SI9766: 3096927Ssam printf("hp%d: 9776/9300\n", mi->mi_unit); 31010734Ssam type = HPDT_RM05; 3117035Swnj hpaddr->hpcs1 = HP_RECAL|HP_GO; 3127035Swnj DELAY(100000); 3136927Ssam break; 3146927Ssam 3156927Ssam case SI9762: 3166927Ssam printf("hp%d: 9762\n", mi->mi_unit); 31710734Ssam type = HPDT_RM03; 3186927Ssam break; 3196927Ssam } 32010734Ssam return (type); 32110734Ssam } 3226927Ssam 3236927Ssam /* 32410734Ssam * EMULEX SC750 or SC780. Poke the holding register. 3256927Ssam */ 32610734Ssam if (type == HPDT_RM02) { 32710734Ssam int ntracks, nsectors; 32810734Ssam 3296927Ssam hpaddr->hpcs1 = HP_NOP; 3306927Ssam hpaddr->hphr = HPHR_MAXTRAK; 33111202Ssam ntracks = MASKREG(hpaddr->hphr) + 1; 33210055Ssam if (ntracks == 16) { 3336927Ssam printf("hp%d: capricorn\n", mi->mi_unit); 33410734Ssam type = HPDT_CAPRICORN; 33510734Ssam goto done; 33610734Ssam } 33710734Ssam if (ntracks != 20) { 33810055Ssam printf("hp%d: ntracks %d: unknown device\n", ntracks); 33910734Ssam goto done; 34010734Ssam } 34110734Ssam hpaddr->hpcs1 = HP_NOP; 34210734Ssam hpaddr->hphr = HPHR_MAXSECT; 34311202Ssam nsectors = MASKREG(hpaddr->hphr) + 1; 344*11212Ssam if (nsectors == 48) { 34510734Ssam type = HPDT_EAGLE; 346*11212Ssam printf("hp%d: eagle\n", mi->mi_unit); 34710734Ssam } 34810734Ssam done: 3496927Ssam hpaddr->hpcs1 = HP_DCLR|HP_GO; 35010734Ssam return (type); 35110734Ssam } 3526927Ssam 35310734Ssam /* 35410734Ssam * Map all ML11's to the same type. Also calculate 35510734Ssam * transfer rates based on device characteristics. 35610734Ssam */ 35710734Ssam if (type == HPDT_ML11A || type == HPDT_ML11B) { 35810857Ssam register struct hpsoftc *sc = &hpsoftc[mi->mi_unit]; 35910857Ssam register int trt; 3602604Swnj 36110857Ssam sc->sc_mlsize = hpaddr->hpmr & HPMR_SZ; 3625726Sroot if ((hpaddr->hpmr & HPMR_ARRTYP) == 0) 36310857Ssam sc->sc_mlsize >>= 2; 3645726Sroot if (mi->mi_dk >= 0) { 3655726Sroot trt = (hpaddr->hpmr & HPMR_TRT) >> 8; 3665726Sroot dk_mspw[mi->mi_dk] = 1.0 / (1<<(20-trt)); 3675726Sroot } 36810734Ssam type = HPDT_ML11A; 3696927Ssam } 37010734Ssam return (type); 3712604Swnj } 3722604Swnj 3738579Sroot hpopen(dev) 3748579Sroot dev_t dev; 3758579Sroot { 3768579Sroot register int unit = minor(dev) >> 3; 3778579Sroot register struct mba_device *mi; 3788579Sroot 3798579Sroot if (unit >= NHP || (mi = hpinfo[unit]) == 0 || mi->mi_alive == 0) 3808579Sroot return (ENXIO); 3818579Sroot return (0); 3828579Sroot } 3838579Sroot 38421Sbill hpstrategy(bp) 3852383Swnj register struct buf *bp; 38621Sbill { 3872978Swnj register struct mba_device *mi; 3882383Swnj register struct hpst *st; 3892383Swnj register int unit; 39021Sbill long sz, bn; 3912383Swnj int xunit = minor(bp->b_dev) & 07; 3925432Sroot int s; 39321Sbill 39421Sbill sz = bp->b_bcount; 39521Sbill sz = (sz+511) >> 9; 39621Sbill unit = dkunit(bp); 3972383Swnj if (unit >= NHP) 3982383Swnj goto bad; 3992383Swnj mi = hpinfo[unit]; 4002395Swnj if (mi == 0 || mi->mi_alive == 0) 4012383Swnj goto bad; 4022383Swnj st = &hpst[mi->mi_type]; 4035726Sroot if (ML11) { 40410857Ssam struct hpsoftc *sc = &hpsoftc[unit]; 40510857Ssam 4065726Sroot if (bp->b_blkno < 0 || 40710857Ssam dkblock(bp)+sz > sc->sc_mlsize) 4085726Sroot goto bad; 4095726Sroot bp->b_cylin = 0; 4105726Sroot } else { 4115726Sroot if (bp->b_blkno < 0 || 4125726Sroot (bn = dkblock(bp))+sz > st->sizes[xunit].nblocks) 4135726Sroot goto bad; 4145726Sroot bp->b_cylin = bn/st->nspc + st->sizes[xunit].cyloff; 4155726Sroot } 4165432Sroot s = spl5(); 4172383Swnj disksort(&mi->mi_tab, bp); 4182383Swnj if (mi->mi_tab.b_active == 0) 4192383Swnj mbustart(mi); 4205432Sroot splx(s); 4212383Swnj return; 4222383Swnj 4232383Swnj bad: 4242383Swnj bp->b_flags |= B_ERROR; 4252383Swnj iodone(bp); 4262383Swnj return; 42721Sbill } 42821Sbill 4292383Swnj hpustart(mi) 4302978Swnj register struct mba_device *mi; 43121Sbill { 4322624Swnj register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv; 4332383Swnj register struct buf *bp = mi->mi_tab.b_actf; 4343706Sroot register struct hpst *st = &hpst[mi->mi_type]; 43510857Ssam struct hpsoftc *sc = &hpsoftc[mi->mi_unit]; 43621Sbill daddr_t bn; 4373102Swnj int sn, dist; 43821Sbill 4393706Sroot hpaddr->hpcs1 = 0; 4402624Swnj if ((hpaddr->hpcs1&HP_DVA) == 0) 4412383Swnj return (MBU_BUSY); 44210857Ssam if ((hpaddr->hpds & HPDS_VV) == 0 || !sc->sc_hpinit) { 4433706Sroot struct buf *bbp = &bhpbuf[mi->mi_unit]; 4443706Sroot 44510857Ssam sc->sc_hpinit = 1; 4462624Swnj hpaddr->hpcs1 = HP_DCLR|HP_GO; 4473140Swnj if (mi->mi_mba->mba_drv[0].mbd_as & (1<<mi->mi_drive)) 4483140Swnj printf("DCLR attn\n"); 4492624Swnj hpaddr->hpcs1 = HP_PRESET|HP_GO; 4505726Sroot if (!ML11) 4515726Sroot hpaddr->hpof = HPOF_FMT22; 4523140Swnj mbclrattn(mi); 4535726Sroot if (!ML11) { 4545726Sroot bbp->b_flags = B_READ|B_BUSY; 4555726Sroot bbp->b_dev = bp->b_dev; 4565726Sroot bbp->b_bcount = 512; 4575726Sroot bbp->b_un.b_addr = (caddr_t)&hpbad[mi->mi_unit]; 4585726Sroot bbp->b_blkno = st->ncyl*st->nspc - st->nsect; 4595726Sroot bbp->b_cylin = st->ncyl - 1; 4605726Sroot mi->mi_tab.b_actf = bbp; 4615726Sroot bbp->av_forw = bp; 4625726Sroot bp = bbp; 4635726Sroot } 46421Sbill } 4652604Swnj if (mi->mi_tab.b_active || mi->mi_hd->mh_ndrive == 1) 4662383Swnj return (MBU_DODATA); 4675726Sroot if (ML11) 4685726Sroot return (MBU_DODATA); 4693093Swnj if ((hpaddr->hpds & HPDS_DREADY) != HPDS_DREADY) 4702383Swnj return (MBU_DODATA); 4712395Swnj bn = dkblock(bp); 4722395Swnj sn = bn%st->nspc; 4732395Swnj sn = (sn+st->nsect-hpSDIST)%st->nsect; 47411202Ssam if (bp->b_cylin == MASKREG(hpaddr->hpdc)) { 47510908Ssam if (sc->sc_doseeks) 4762383Swnj return (MBU_DODATA); 47711202Ssam dist = (MASKREG(hpaddr->hpla) >> 6) - st->nsect + 1; 4782383Swnj if (dist < 0) 4792383Swnj dist += st->nsect; 4802383Swnj if (dist > st->nsect - hpRDIST) 4812383Swnj return (MBU_DODATA); 4822614Swnj } else 4832614Swnj hpaddr->hpdc = bp->b_cylin; 48410908Ssam if (sc->sc_doseeks) 4852624Swnj hpaddr->hpcs1 = HP_SEEK|HP_GO; 486305Sbill else { 487305Sbill hpaddr->hpda = sn; 4882624Swnj hpaddr->hpcs1 = HP_SEARCH|HP_GO; 489305Sbill } 4902383Swnj return (MBU_STARTED); 49121Sbill } 49221Sbill 4932383Swnj hpstart(mi) 4942978Swnj register struct mba_device *mi; 49521Sbill { 4962624Swnj register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv; 4972383Swnj register struct buf *bp = mi->mi_tab.b_actf; 4982383Swnj register struct hpst *st = &hpst[mi->mi_type]; 49910857Ssam struct hpsoftc *sc = &hpsoftc[mi->mi_unit]; 50021Sbill daddr_t bn; 5012383Swnj int sn, tn; 50221Sbill 50321Sbill bn = dkblock(bp); 5045726Sroot if (ML11) 5055726Sroot hpaddr->hpda = bn; 5065726Sroot else { 5075726Sroot sn = bn%st->nspc; 5085726Sroot tn = sn/st->nsect; 5095726Sroot sn %= st->nsect; 5105726Sroot hpaddr->hpdc = bp->b_cylin; 5115726Sroot hpaddr->hpda = (tn << 8) + sn; 5125726Sroot } 51310857Ssam if (sc->sc_hdr) { 5145726Sroot if (bp->b_flags & B_READ) 5155726Sroot return (HP_RHDR|HP_GO); 5165726Sroot else 5175726Sroot return (HP_WHDR|HP_GO); 5185726Sroot } 5195726Sroot return (0); 52021Sbill } 52121Sbill 5223102Swnj hpdtint(mi, mbsr) 5232978Swnj register struct mba_device *mi; 5243102Swnj int mbsr; 52521Sbill { 5262624Swnj register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv; 5272383Swnj register struct buf *bp = mi->mi_tab.b_actf; 52810622Shelge register struct hpst *st = &hpst[mi->mi_type]; 5295893Swnj register int er1, er2; 53010857Ssam struct hpsoftc *sc = &hpsoftc[mi->mi_unit]; 5312826Swnj int retry = 0; 53221Sbill 5333706Sroot if (bp->b_flags&B_BAD) { 5343706Sroot if (hpecc(mi, CONT)) 53511202Ssam return (MBD_RESTARTED); 5363706Sroot } 5373102Swnj if (hpaddr->hpds&HPDS_ERR || mbsr&MBSR_EBITS) { 5383706Sroot #ifdef HPDEBUG 5393289Swnj if (hpdebug) { 5403706Sroot int dc = hpaddr->hpdc, da = hpaddr->hpda; 5413706Sroot 5423706Sroot printf("hperr: bp %x cyl %d blk %d as %o ", 5433706Sroot bp, bp->b_cylin, bp->b_blkno, 5443706Sroot hpaddr->hpas&0xff); 54511202Ssam printf("dc %x da %x\n",MASKREG(dc), MASKREG(da)); 5463289Swnj printf("errcnt %d ", mi->mi_tab.b_errcnt); 5473289Swnj printf("mbsr=%b ", mbsr, mbsr_bits); 5483289Swnj printf("er1=%b er2=%b\n", 5493289Swnj hpaddr->hper1, HPER1_BITS, 5503289Swnj hpaddr->hper2, HPER2_BITS); 5513289Swnj DELAY(1000000); 5523289Swnj } 5533706Sroot #endif 5545858Swnj er1 = hpaddr->hper1; 5555893Swnj er2 = hpaddr->hper2; 5565893Swnj if (er1 & HPER1_HCRC) { 5575858Swnj er1 &= ~(HPER1_HCE|HPER1_FER); 5585893Swnj er2 &= ~HPER2_BSE; 5595893Swnj } 5605858Swnj if (er1&HPER1_WLE) { 5612925Swnj printf("hp%d: write locked\n", dkunit(bp)); 5622826Swnj bp->b_flags |= B_ERROR; 56311202Ssam } else if (MASKREG(er1) == HPER1_FER && RP06 && !sc->sc_hdr) { 5645726Sroot if (hpecc(mi, BSE)) 56511202Ssam return (MBD_RESTARTED); 56611202Ssam goto hard; 5672826Swnj } else if (++mi->mi_tab.b_errcnt > 27 || 5683102Swnj mbsr & MBSR_HARD || 5695858Swnj er1 & HPER1_HARD || 57010857Ssam sc->sc_hdr || 5715893Swnj (!ML11 && (er2 & HPER2_HARD))) { 57210886Shelge /* 57310886Shelge * If HCRC the header is screwed up and the sector 57411202Ssam * might be in the bad sector table, better check.. 57511202Ssam * 57610886Shelge * Note: If the header is screwed up on a skip sector 57710886Shelge * track, then the appropriate replacement sector 57811202Ssam * cannot be found. 57910886Shelge */ 58011202Ssam if (er1&HPER1_HCRC && !ML11 && hpecc(mi, BSE)) 58111202Ssam return (MBD_RESTARTED); 5823706Sroot hard: 58310622Shelge if (ML11) 58411202Ssam bp->b_blkno = MASKREG(hpaddr->hpda); 58510622Shelge else 58611202Ssam bp->b_blkno = MASKREG(hpaddr->hpdc) * st->nspc + 58711202Ssam (MASKREG(hpaddr->hpda) >> 8) * st->nsect + 58811202Ssam (hpaddr->hpda&0x1f); 5892925Swnj harderr(bp, "hp"); 5903271Swnj if (mbsr & (MBSR_EBITS &~ (MBSR_DTABT|MBSR_MBEXC))) 5913271Swnj printf("mbsr=%b ", mbsr, mbsr_bits); 5923706Sroot printf("er1=%b er2=%b", 5932826Swnj hpaddr->hper1, HPER1_BITS, 5942826Swnj hpaddr->hper2, HPER2_BITS); 5953706Sroot if (hpaddr->hpmr) 59611202Ssam printf(" mr=%o", MASKREG(hpaddr->hpmr)); 5973706Sroot if (hpaddr->hpmr2) 59811202Ssam printf(" mr2=%o", MASKREG(hpaddr->hpmr2)); 5993706Sroot printf("\n"); 6002826Swnj bp->b_flags |= B_ERROR; 60110622Shelge retry = 0; 60210857Ssam sc->sc_recal = 0; 6035893Swnj } else if ((er2 & HPER2_BSE) && !ML11) { 6043706Sroot if (hpecc(mi, BSE)) 60511202Ssam return (MBD_RESTARTED); 6063706Sroot else 6073706Sroot goto hard; 6085893Swnj } else if (RM80 && er2&HPER2_SSE) { 6093988Sroot (void) hpecc(mi, SSE); 6102883Swnj return (MBD_RESTARTED); 6115858Swnj } else if ((er1&(HPER1_DCK|HPER1_ECH))==HPER1_DCK) { 6123706Sroot if (hpecc(mi, ECC)) 6132383Swnj return (MBD_RESTARTED); 6142826Swnj /* else done */ 6152826Swnj } else 6162826Swnj retry = 1; 6172826Swnj hpaddr->hpcs1 = HP_DCLR|HP_GO; 6185726Sroot if (ML11) { 6195726Sroot if (mi->mi_tab.b_errcnt >= 16) 6205726Sroot goto hard; 6215726Sroot } else if ((mi->mi_tab.b_errcnt&07) == 4) { 6222826Swnj hpaddr->hpcs1 = HP_RECAL|HP_GO; 62310857Ssam sc->sc_recal = 1; 62411202Ssam return (MBD_RESTARTED); 62521Sbill } 6262826Swnj if (retry) 6272826Swnj return (MBD_RETRY); 6282826Swnj } 6293706Sroot #ifdef HPDEBUG 6303289Swnj else 63110857Ssam if (hpdebug && sc->sc_recal) { 63210857Ssam printf("recal %d ", sc->sc_recal); 6333289Swnj printf("errcnt %d\n", mi->mi_tab.b_errcnt); 6343289Swnj printf("mbsr=%b ", mbsr, mbsr_bits); 6353289Swnj printf("er1=%b er2=%b\n", 6363289Swnj hpaddr->hper1, HPER1_BITS, 6373289Swnj hpaddr->hper2, HPER2_BITS); 6383289Swnj } 6393706Sroot #endif 64010857Ssam switch (sc->sc_recal) { 6413093Swnj 6423093Swnj case 1: 6433093Swnj hpaddr->hpdc = bp->b_cylin; 6443093Swnj hpaddr->hpcs1 = HP_SEEK|HP_GO; 64510857Ssam sc->sc_recal++; 6463706Sroot return (MBD_RESTARTED); 6473093Swnj case 2: 6483093Swnj if (mi->mi_tab.b_errcnt < 16 || 6493289Swnj (bp->b_flags & B_READ) == 0) 6503093Swnj goto donerecal; 6513093Swnj hpaddr->hpof = hp_offset[mi->mi_tab.b_errcnt & 017]|HPOF_FMT22; 6523093Swnj hpaddr->hpcs1 = HP_OFFSET|HP_GO; 65310857Ssam sc->sc_recal++; 6543093Swnj return (MBD_RESTARTED); 6553093Swnj donerecal: 6563158Swnj case 3: 65710857Ssam sc->sc_recal = 0; 6582892Swnj return (MBD_RETRY); 6592892Swnj } 66010857Ssam sc->sc_hdr = 0; 66111202Ssam bp->b_resid = MASKREG(-mi->mi_mba->mba_bcr); 6623640Swnj if (mi->mi_tab.b_errcnt >= 16) { 6633093Swnj /* 6643093Swnj * This is fast and occurs rarely; we don't 6653093Swnj * bother with interrupts. 6663093Swnj */ 6672624Swnj hpaddr->hpcs1 = HP_RTC|HP_GO; 6683093Swnj while (hpaddr->hpds & HPDS_PIP) 6692383Swnj ; 6702383Swnj mbclrattn(mi); 67121Sbill } 6725726Sroot if (!ML11) { 6735726Sroot hpaddr->hpof = HPOF_FMT22; 6745726Sroot hpaddr->hpcs1 = HP_RELEASE|HP_GO; 6755726Sroot } 6762383Swnj return (MBD_DONE); 67721Sbill } 67821Sbill 6797738Sroot hpread(dev, uio) 6802624Swnj dev_t dev; 6817738Sroot struct uio *uio; 68221Sbill { 6832624Swnj register int unit = minor(dev) >> 3; 68421Sbill 6852624Swnj if (unit >= NHP) 6868156Sroot return (ENXIO); 6878156Sroot return (physio(hpstrategy, &rhpbuf[unit], dev, B_READ, minphys, uio)); 68821Sbill } 68921Sbill 6907831Sroot hpwrite(dev, uio) 6912624Swnj dev_t dev; 6927831Sroot struct uio *uio; 69321Sbill { 6942624Swnj register int unit = minor(dev) >> 3; 69521Sbill 6962624Swnj if (unit >= NHP) 6978156Sroot return (ENXIO); 6988156Sroot return (physio(hpstrategy, &rhpbuf[unit], dev, B_WRITE, minphys, uio)); 69921Sbill } 70021Sbill 7015726Sroot /*ARGSUSED*/ 7027635Ssam hpioctl(dev, cmd, data, flag) 7035726Sroot dev_t dev; 7045726Sroot int cmd; 7057635Ssam caddr_t data; 7065726Sroot int flag; 7075726Sroot { 7085726Sroot 7095726Sroot switch (cmd) { 7107635Ssam 7115726Sroot case DKIOCHDR: /* do header read/write */ 71210857Ssam hpsoftc[minor(dev) >> 3].sc_hdr = 1; 7138579Sroot return (0); 7145726Sroot 7155726Sroot default: 7168579Sroot return (ENXIO); 7175726Sroot } 7185726Sroot } 7195726Sroot 7203706Sroot hpecc(mi, flag) 7212978Swnj register struct mba_device *mi; 7223706Sroot int flag; 72321Sbill { 7242383Swnj register struct mba_regs *mbp = mi->mi_mba; 7252624Swnj register struct hpdevice *rp = (struct hpdevice *)mi->mi_drv; 7262383Swnj register struct buf *bp = mi->mi_tab.b_actf; 7273706Sroot register struct hpst *st = &hpst[mi->mi_type]; 7283706Sroot int npf, o; 7292383Swnj int bn, cn, tn, sn; 730914Sbill int bcr; 73121Sbill 73211202Ssam bcr = MASKREG(mbp->mba_bcr); 733914Sbill if (bcr) 734914Sbill bcr |= 0xffff0000; /* sxt */ 7353706Sroot if (flag == CONT) 7363706Sroot npf = bp->b_error; 7373706Sroot else 7383706Sroot npf = btop(bcr + bp->b_bcount); 739420Sbill o = (int)bp->b_un.b_addr & PGOFSET; 740420Sbill bn = dkblock(bp); 741420Sbill cn = bp->b_cylin; 7423706Sroot sn = bn%(st->nspc) + npf; 7432383Swnj tn = sn/st->nsect; 7442383Swnj sn %= st->nsect; 7452383Swnj cn += tn/st->ntrak; 7462383Swnj tn %= st->ntrak; 7473706Sroot switch (flag) { 74810856Ssam case ECC: { 7493706Sroot register int i; 7503706Sroot caddr_t addr; 7513706Sroot struct pte mpte; 7523706Sroot int bit, byte, mask; 7533706Sroot 7543706Sroot npf--; /* because block in error is previous block */ 7553706Sroot printf("hp%d%c: soft ecc sn%d\n", dkunit(bp), 7563706Sroot 'a'+(minor(bp->b_dev)&07), bp->b_blkno + npf); 75711202Ssam mask = MASKREG(rp->hpec2); 75811202Ssam i = MASKREG(rp->hpec1) - 1; /* -1 makes 0 origin */ 7593706Sroot bit = i&07; 7603706Sroot i = (i&~07)>>3; 7613706Sroot byte = i + o; 7623706Sroot while (i < 512 && (int)ptob(npf)+i < bp->b_bcount && bit > -11) { 7633706Sroot mpte = mbp->mba_map[npf+btop(byte)]; 7643706Sroot addr = ptob(mpte.pg_pfnum) + (byte & PGOFSET); 7653706Sroot putmemc(addr, getmemc(addr)^(mask<<bit)); 7663706Sroot byte++; 7673706Sroot i++; 7683706Sroot bit -= 8; 7693706Sroot } 7703706Sroot if (bcr == 0) 7713706Sroot return (0); 7723847Sroot npf++; 7733706Sroot break; 7743706Sroot } 7753706Sroot 7763706Sroot case SSE: 7773706Sroot rp->hpof |= HPOF_SSEI; 7783706Sroot mbp->mba_bcr = -(bp->b_bcount - (int)ptob(npf)); 7793706Sroot break; 7803706Sroot 7813706Sroot case BSE: 7823706Sroot #ifdef HPBDEBUG 7833706Sroot if (hpbdebug) 7843706Sroot printf("hpecc, BSE: bn %d cn %d tn %d sn %d\n", bn, cn, tn, sn); 7853706Sroot #endif 78611202Ssam if (rp->hpof&HPOF_SSEI) 78711202Ssam sn++; 7883706Sroot if ((bn = isbad(&hpbad[mi->mi_unit], cn, tn, sn)) < 0) 78911202Ssam return (0); 7903706Sroot bp->b_flags |= B_BAD; 7913706Sroot bp->b_error = npf + 1; 7923706Sroot bn = st->ncyl*st->nspc - st->nsect - 1 - bn; 7933706Sroot cn = bn/st->nspc; 7943706Sroot sn = bn%st->nspc; 7953706Sroot tn = sn/st->nsect; 7963706Sroot sn %= st->nsect; 7973706Sroot mbp->mba_bcr = -512; 79810886Shelge rp->hpof &= ~HPOF_SSEI; 7993706Sroot #ifdef HPBDEBUG 8003706Sroot if (hpbdebug) 8013706Sroot printf("revector to cn %d tn %d sn %d\n", cn, tn, sn); 8023706Sroot #endif 8033706Sroot break; 8043706Sroot 8053706Sroot case CONT: 8063706Sroot #ifdef HPBDEBUG 8073706Sroot if (hpbdebug) 8083706Sroot printf("hpecc, CONT: bn %d cn %d tn %d sn %d\n", bn,cn,tn,sn); 8093706Sroot #endif 8103706Sroot npf = bp->b_error; 8113706Sroot bp->b_flags &= ~B_BAD; 8123706Sroot mbp->mba_bcr = -(bp->b_bcount - (int)ptob(npf)); 81311202Ssam if (MASKREG(mbp->mba_bcr) == 0) 81411202Ssam return (0); 8153706Sroot break; 8163706Sroot } 8173706Sroot rp->hpcs1 = HP_DCLR|HP_GO; 8183350Swnj if (rp->hpof&HPOF_SSEI) 8192883Swnj sn++; 820420Sbill rp->hpdc = cn; 821420Sbill rp->hpda = (tn<<8) + sn; 822420Sbill mbp->mba_sr = -1; 8233706Sroot mbp->mba_var = (int)ptob(npf) + o; 8243706Sroot rp->hpcs1 = bp->b_flags&B_READ ? HP_RCOM|HP_GO : HP_WCOM|HP_GO; 8253706Sroot mi->mi_tab.b_errcnt = 0; /* error has been corrected */ 826420Sbill return (1); 82721Sbill } 8282362Swnj 8292362Swnj #define DBSIZE 20 8302362Swnj 8312362Swnj hpdump(dev) 8322362Swnj dev_t dev; 8332362Swnj { 8342978Swnj register struct mba_device *mi; 8352383Swnj register struct mba_regs *mba; 8362624Swnj struct hpdevice *hpaddr; 8372362Swnj char *start; 8382383Swnj int num, unit; 8392383Swnj register struct hpst *st; 8402362Swnj 8412362Swnj num = maxfree; 8422362Swnj start = 0; 8432362Swnj unit = minor(dev) >> 3; 8442827Swnj if (unit >= NHP) 8452827Swnj return (ENXIO); 8462383Swnj #define phys(a,b) ((b)((int)(a)&0x7fffffff)) 8472978Swnj mi = phys(hpinfo[unit],struct mba_device *); 8482827Swnj if (mi == 0 || mi->mi_alive == 0) 8492827Swnj return (ENXIO); 8502383Swnj mba = phys(mi->mi_hd, struct mba_hd *)->mh_physmba; 8513102Swnj mba->mba_cr = MBCR_INIT; 8522624Swnj hpaddr = (struct hpdevice *)&mba->mba_drv[mi->mi_drive]; 8533093Swnj if ((hpaddr->hpds & HPDS_VV) == 0) { 8542624Swnj hpaddr->hpcs1 = HP_DCLR|HP_GO; 8552624Swnj hpaddr->hpcs1 = HP_PRESET|HP_GO; 8563093Swnj hpaddr->hpof = HPOF_FMT22; 8572362Swnj } 8582383Swnj st = &hpst[mi->mi_type]; 8592827Swnj if (dumplo < 0 || dumplo + num >= st->sizes[minor(dev)&07].nblocks) 8602827Swnj return (EINVAL); 8612362Swnj while (num > 0) { 8622383Swnj register struct pte *hpte = mba->mba_map; 8632362Swnj register int i; 8642383Swnj int blk, cn, sn, tn; 8652362Swnj daddr_t bn; 8662362Swnj 8672362Swnj blk = num > DBSIZE ? DBSIZE : num; 8682362Swnj bn = dumplo + btop(start); 8692383Swnj cn = bn/st->nspc + st->sizes[minor(dev)&07].cyloff; 8702383Swnj sn = bn%st->nspc; 8712383Swnj tn = sn/st->nsect; 8722383Swnj sn = sn%st->nsect; 8732362Swnj hpaddr->hpdc = cn; 8742362Swnj hpaddr->hpda = (tn << 8) + sn; 8752362Swnj for (i = 0; i < blk; i++) 8762362Swnj *(int *)hpte++ = (btop(start)+i) | PG_V; 8772383Swnj mba->mba_sr = -1; 8782383Swnj mba->mba_bcr = -(blk*NBPG); 8792383Swnj mba->mba_var = 0; 8802624Swnj hpaddr->hpcs1 = HP_WCOM | HP_GO; 8813093Swnj while ((hpaddr->hpds & HPDS_DRY) == 0) 8822362Swnj ; 8833093Swnj if (hpaddr->hpds&HPDS_ERR) 8842827Swnj return (EIO); 8852362Swnj start += blk*NBPG; 8862362Swnj num -= blk; 8872362Swnj } 8882362Swnj return (0); 8892362Swnj } 8901565Sbill #endif 891