1*10055Ssam /* hp.c 4.60 83/01/01 */ 23706Sroot 33706Sroot #ifdef HPDEBUG 43289Swnj int hpdebug; 53706Sroot #endif 63706Sroot #ifdef HPBDEBUG 73706Sroot int hpbdebug; 83706Sroot #endif 921Sbill 101939Swnj #include "hp.h" 111565Sbill #if NHP > 0 1221Sbill /* 135726Sroot * HP disk driver for RP0x+RMxx+ML11 142827Swnj * 152827Swnj * TODO: 163706Sroot * check RM80 skip sector handling when ECC's occur later 173093Swnj * check offset recovery handling 183706Sroot * see if DCLR and/or RELEASE set attention status 193706Sroot * print bits of mr && mr2 symbolically 2021Sbill */ 219786Ssam #include "../machine/pte.h" 2221Sbill 2321Sbill #include "../h/param.h" 2421Sbill #include "../h/systm.h" 25305Sbill #include "../h/dk.h" 2621Sbill #include "../h/buf.h" 2721Sbill #include "../h/conf.h" 2821Sbill #include "../h/dir.h" 2921Sbill #include "../h/user.h" 3021Sbill #include "../h/map.h" 318468Sroot #include "../vax/mtpr.h" 32420Sbill #include "../h/vm.h" 332362Swnj #include "../h/cmap.h" 343706Sroot #include "../h/dkbad.h" 357635Ssam #include "../h/ioctl.h" 367738Sroot #include "../h/uio.h" 3721Sbill 388988Sroot #include "../vax/dkio.h" 398468Sroot #include "../vaxmba/mbareg.h" 408468Sroot #include "../vaxmba/mbavar.h" 418468Sroot #include "../vaxmba/hpreg.h" 4221Sbill 432383Swnj /* THIS SHOULD BE READ OFF THE PACK, PER DRIVE */ 442383Swnj struct size { 4521Sbill daddr_t nblocks; 4621Sbill int cyloff; 473706Sroot } hp6_sizes[8] = { 48886Sbill 15884, 0, /* A=cyl 0 thru 37 */ 49886Sbill 33440, 38, /* B=cyl 38 thru 117 */ 50886Sbill 340670, 0, /* C=cyl 0 thru 814 */ 5121Sbill 0, 0, 5221Sbill 0, 0, 5321Sbill 0, 0, 543726Sroot #ifndef NOBADSECT 553729Sroot 291280, 118, /* G=cyl 118 thru 814 */ 563706Sroot #else 573706Sroot 291346, 118, 583706Sroot #endif 5921Sbill 0, 0, 603706Sroot }, rm3_sizes[8] = { 61886Sbill 15884, 0, /* A=cyl 0 thru 99 */ 62886Sbill 33440, 100, /* B=cyl 100 thru 309 */ 63886Sbill 131680, 0, /* C=cyl 0 thru 822 */ 6421Sbill 0, 0, 6521Sbill 0, 0, 663442Sroot 0, 0, 673726Sroot #ifndef NOBADSECT 683729Sroot 81984, 310, /* G=cyl 310 thru 822 */ 693706Sroot #else 703706Sroot 82080, 310, 713706Sroot #endif 7221Sbill 0, 0, 73886Sbill }, rm5_sizes[8] = { 746927Ssam #ifndef CAD 75886Sbill 15884, 0, /* A=cyl 0 thru 26 */ 76886Sbill 33440, 27, /* B=cyl 27 thru 81 */ 773271Swnj 500384, 0, /* C=cyl 0 thru 822 */ 78886Sbill 15884, 562, /* D=cyl 562 thru 588 */ 79886Sbill 55936, 589, /* E=cyl 589 thru 680 */ 803726Sroot #ifndef NOBADSECT 813729Sroot 86240, 681, /* F=cyl 681 thru 822 */ 823729Sroot 158592, 562, /* G=cyl 562 thru 822 */ 833706Sroot #else 845695Sroot 86336, 681, 853706Sroot 158688, 562, 863706Sroot #endif 87886Sbill 291346, 82, /* H=cyl 82 thru 561 */ 886927Ssam #else 896927Ssam 15884, 0, /* A=cyl 0 thru 26 */ 906927Ssam 33440, 27, /* B=cyl 27 thru 81 */ 916927Ssam 495520, 0, /* C=cyl 0 thru 814 */ 926927Ssam 15884, 562, /* D=cyl 562 thru 588 */ 936927Ssam 55936, 589, /* E=cyl 589 thru 680 */ 946927Ssam #ifndef NOBADSECT 956927Ssam 81376, 681, /* F=cyl 681 thru 814 */ 966927Ssam 153728, 562, /* G=cyl 562 thru 814 */ 976927Ssam #else 986927Ssam 81472, 681, 996927Ssam 153824, 562, 1006927Ssam #endif 1016927Ssam 291346, 82, /* H=cyl 82 thru 561 */ 1026927Ssam #endif 1032383Swnj }, rm80_sizes[8] = { 1042383Swnj 15884, 0, /* A=cyl 0 thru 36 */ 1052383Swnj 33440, 37, /* B=cyl 37 thru 114 */ 1062383Swnj 242606, 0, /* C=cyl 0 thru 558 */ 1072383Swnj 0, 0, 1082383Swnj 0, 0, 1092383Swnj 0, 0, 1102383Swnj 82080, 115, /* G=cyl 115 thru 304 */ 1113729Sroot 110143, 305, /* H=cyl 305 thru 558 */ 1123706Sroot }, hp7_sizes[8] = { 1136927Ssam 15884, 0, /* A=cyl 0 thru 9 */ 1143706Sroot 64000, 10, /* B=cyl 10 thru 49 */ 1153706Sroot 1008000,0, /* C=cyl 0 thru 629 */ 1163706Sroot 15884, 330, /* D=cyl 330 thru 339 */ 1173706Sroot 256000, 340, /* E=cyl 340 thru 499 */ 1183729Sroot 207850, 500, /* F=cyl 500 thru 629 */ 1193729Sroot 479850, 330, /* G=cyl 330 thru 629 */ 1203706Sroot 448000, 50, /* H=cyl 50 thru 329 */ 1216927Ssam }, si9775_sizes[8] = { 1226927Ssam 16640, 0, /* A=cyl 0 thru 12 */ 1236927Ssam 34560, 13, /* B=cyl 13 thru 39 */ 1246927Ssam 1079040, 0, /* C=cyl 0 thru 842 - whole disk */ 1256927Ssam 0, 0, /* D unused */ 1266927Ssam 0, 0, /* E unused */ 1276927Ssam 0, 0, /* F unused */ 1286927Ssam 513280, 40, /* G=cyl 40 thru 440 */ 1296927Ssam 513280, 441, /* H=cyl 441 thru 841 */ 1306927Ssam }, si9730_sizes[8] = { 1316927Ssam 15884, 0, /* A=cyl 0 thru 49 */ 1326927Ssam 33440, 50, /* B=cyl 50 thru 154 */ 1336927Ssam 263360, 0, /* C=cyl 0 thru 822 */ 1346927Ssam 0, 0, 1356927Ssam 0, 0, 1366927Ssam 0, 0, 1376927Ssam 0, 0, 1386927Ssam #ifndef NOBADSECT 1396927Ssam 213664, 155, /* H=cyl 155 thru 822 */ 1406927Ssam #else 1416927Ssam 213760, 155, 1426927Ssam #endif 1436927Ssam }, hpam_sizes[8] = { 1446927Ssam 15884, 0, /* A=cyl 0 thru 31 */ 1456927Ssam 33440, 32, /* B=cyl 32 thru 97 */ 1466927Ssam 524288, 0, /* C=cyl 0 thru 1023 */ 1476927Ssam 27786, 668, 1486927Ssam 27786, 723, 1496927Ssam 125440, 778, 1506927Ssam 181760, 668, /* G=cyl 668 thru 1022 */ 1516927Ssam 291346, 98, /* H=cyl 98 thru 667 */ 1529175Ssam }, hpfj_sizes[8] = { 1539175Ssam 15884, 0, /* A=cyl 0 thru 18 */ 1549175Ssam 33440, 19, /* B=cyl 19 thru 58 */ 155*10055Ssam 724120, 0, /* C=cyl 0 thru 841 */ 1569175Ssam 0, 0, 1579175Ssam 0, 0, 1589175Ssam 0, 0, 1599175Ssam 381711, 398, /* G=cyl 398 thru 841 */ 1609175Ssam 291346, 59, /* H=cyl 59 thru 397 */ 16121Sbill }; 1622383Swnj /* END OF STUFF WHICH SHOULD BE READ IN PER DISK */ 16321Sbill 1642383Swnj #define _hpSDIST 2 1652383Swnj #define _hpRDIST 3 1662383Swnj 1672383Swnj int hpSDIST = _hpSDIST; 1682383Swnj int hpRDIST = _hpRDIST; 1692383Swnj 1706927Ssam /* 1716927Ssam * Table for converting Massbus drive types into 1726927Ssam * indices into the partition tables. Slots are 1736927Ssam * left for those drives devined from other means 1746927Ssam * (e.g. SI, AMPEX, etc.). 1756927Ssam */ 1766927Ssam short hptypes[] = { 1776927Ssam #define HPDT_RM03 0 1786927Ssam MBDT_RM03, 1796927Ssam #define HPDT_RM05 1 1806927Ssam MBDT_RM05, 1816927Ssam #define HPDT_RP06 2 1826927Ssam MBDT_RP06, 1836927Ssam #define HPDT_RM80 3 1846927Ssam MBDT_RM80, 1856927Ssam #define HPDT_RP05 4 1866927Ssam MBDT_RP05, 1876927Ssam #define HPDT_RP07 5 1886927Ssam MBDT_RP07, 1896927Ssam #define HPDT_ML11A 6 1906927Ssam MBDT_ML11A, 1916927Ssam #define HPDT_ML11B 7 1926927Ssam MBDT_ML11B, 1936927Ssam #define HPDT_9775 8 1946927Ssam -1, 1956927Ssam #define HPDT_9730 9 1966927Ssam -1, 1976927Ssam #define HPDT_CAPRICORN 10 1986927Ssam -1, 1999175Ssam #define HPDT_EAGLE 11 2009175Ssam -1, 2019175Ssam #define HPDT_RM02 12 2029175Ssam MBDT_RM02, /* beware, actually capricorn or eagle */ 2036927Ssam 0 2046927Ssam }; 2052978Swnj struct mba_device *hpinfo[NHP]; 2062978Swnj int hpattach(),hpustart(),hpstart(),hpdtint(); 2072383Swnj struct mba_driver hpdriver = 2082978Swnj { hpattach, 0, hpustart, hpstart, hpdtint, 0, 2092978Swnj hptypes, "hp", 0, hpinfo }; 2102383Swnj 2112383Swnj struct hpst { 2122383Swnj short nsect; 2132383Swnj short ntrak; 2142383Swnj short nspc; 2152383Swnj short ncyl; 2162383Swnj struct size *sizes; 2172383Swnj } hpst[] = { 2183706Sroot 32, 5, 32*5, 823, rm3_sizes, /* RM03 */ 2192383Swnj 32, 19, 32*19, 823, rm5_sizes, /* RM05 */ 2203706Sroot 22, 19, 22*19, 815, hp6_sizes, /* RP06 */ 2213706Sroot 31, 14, 31*14, 559, rm80_sizes, /* RM80 */ 2223706Sroot 22, 19, 22*19, 411, hp6_sizes, /* RP05 */ 2233706Sroot 50, 32, 50*32, 630, hp7_sizes, /* RP07 */ 2245726Sroot 1, 1, 1, 1, 0, /* ML11A */ 2255726Sroot 1, 1, 1, 1, 0, /* ML11B */ 2266927Ssam 32, 40, 32*40, 843, si9775_sizes, /* 9775 */ 2276927Ssam 32, 10, 32*10, 823, si9730_sizes, /* 9730 */ 2286927Ssam 32, 16, 32*16, 1024, hpam_sizes, /* AMPEX capricorn */ 229*10055Ssam 43, 20, 43*20, 842, hpfj_sizes, /* Fujitsu EAGLE */ 2302383Swnj }; 2312383Swnj 2322624Swnj u_char hp_offset[16] = { 2333093Swnj HPOF_P400, HPOF_M400, HPOF_P400, HPOF_M400, 2343093Swnj HPOF_P800, HPOF_M800, HPOF_P800, HPOF_M800, 2353093Swnj HPOF_P1200, HPOF_M1200, HPOF_P1200, HPOF_M1200, 2363093Swnj 0, 0, 0, 0, 23721Sbill }; 23821Sbill 2392624Swnj struct buf rhpbuf[NHP]; 2403726Sroot #ifndef NOBADSECT 2413706Sroot struct buf bhpbuf[NHP]; 2423706Sroot struct dkbad hpbad[NHP]; 2433706Sroot #endif 2445726Sroot /* SHOULD CONSOLIDATE ALL THIS STUFF INTO A STRUCTURE */ 2453706Sroot char hpinit[NHP]; 2462892Swnj char hprecal[NHP]; 2475726Sroot char hphdr[NHP]; 2485726Sroot daddr_t mlsize[NHP]; 24921Sbill 25021Sbill #define b_cylin b_resid 25121Sbill 2525726Sroot /* #define ML11 0 to remove ML11 support */ 2535726Sroot #define ML11 (hptypes[mi->mi_type] == MBDT_ML11A) 2545726Sroot #define RP06 (hptypes[mi->mi_type] <= MBDT_RP06) 2555726Sroot #define RM80 (hptypes[mi->mi_type] == MBDT_RM80) 2565726Sroot 25721Sbill #ifdef INTRLVE 25821Sbill daddr_t dkblock(); 25921Sbill #endif 26021Sbill 2612604Swnj int hpseek; 2622604Swnj 2632978Swnj /*ARGSUSED*/ 2642978Swnj hpattach(mi, slave) 2652978Swnj struct mba_device *mi; 2662604Swnj { 2676927Ssam register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv; 268*10055Ssam int ntracks; 2696927Ssam 2706927Ssam switch (mi->mi_type) { 2716927Ssam 2726927Ssam /* 2736927Ssam * Model-byte processing for SI 9400 controllers. 2746927Ssam * NB: Only deals with RM03 and RM05 emulations. 2756927Ssam */ 2766927Ssam case HPDT_RM03: 2776927Ssam case HPDT_RM05: { 2786927Ssam register int hpsn; 2796927Ssam 2806927Ssam hpsn = hpaddr->hpsn; 2816927Ssam if ((hpsn & SIMB_LU) != mi->mi_drive) 2826927Ssam break; 2836927Ssam switch ((hpsn & SIMB_MB) & ~(SIMB_S6|SIRM03|SIRM05)) { 2846927Ssam 2856927Ssam case SI9775D: 2866927Ssam printf("hp%d: si 9775 (direct)\n", mi->mi_unit); 2876927Ssam mi->mi_type = HPDT_9775; 2886927Ssam break; 2896927Ssam 2906927Ssam case SI9730D: 2916927Ssam printf("hp%d: si 9730 (direct)\n", mi->mi_unit); 2926927Ssam mi->mi_type = HPDT_9730; 2936927Ssam break; 2946927Ssam 2956927Ssam #ifdef CAD 2967035Swnj /* 2977035Swnj * AMPEX 9300, SI Combination needs a have the drive cleared 2987035Swnj * before we start. We do not know why, but tests show 2997035Swnj * that the recalibrate fixes the problem. 3007035Swnj */ 3016927Ssam case SI9766: 3026927Ssam printf("hp%d: 9776/9300\n", mi->mi_unit); 3036927Ssam mi->mi_type = HPDT_RM05; 3047035Swnj hpaddr->hpcs1 = HP_RECAL|HP_GO; 3057035Swnj DELAY(100000); 3066927Ssam break; 3076927Ssam 3086927Ssam case SI9762: 3096927Ssam printf("hp%d: 9762\n", mi->mi_unit); 3106927Ssam mi->mi_type = HPDT_RM03; 3116927Ssam break; 3126927Ssam #endif 3136927Ssam } 3146927Ssam break; 3156927Ssam } 3166927Ssam 3176927Ssam /* 3186927Ssam * CAPRICORN KLUDGE...poke the holding register 3199175Ssam * we believe it's a Capricorn. Otherwise assume 3209175Ssam * its an Eagle. 3216927Ssam */ 3226927Ssam case HPDT_RM02: 3236927Ssam hpaddr->hpcs1 = HP_NOP; 3246927Ssam hpaddr->hphr = HPHR_MAXTRAK; 325*10055Ssam ntracks = (hpaddr->hphr & 0xffff) + 1; 326*10055Ssam if (ntracks == 16) { 3276927Ssam printf("hp%d: capricorn\n", mi->mi_unit); 3286927Ssam mi->mi_type = HPDT_CAPRICORN; 329*10055Ssam } else if (ntracks == 20) { 3309175Ssam printf("hp%d: eagle\n", mi->mi_unit); 3319175Ssam mi->mi_type = HPDT_EAGLE; 332*10055Ssam } else 333*10055Ssam printf("hp%d: ntracks %d: unknown device\n", ntracks); 3346927Ssam hpaddr->hpcs1 = HP_DCLR|HP_GO; 3356927Ssam break; 3366927Ssam 3376927Ssam case HPDT_ML11A: 3386927Ssam case HPDT_ML11B: { 3395726Sroot register int trt, sz; 3402604Swnj 3415726Sroot sz = hpaddr->hpmr & HPMR_SZ; 3425726Sroot if ((hpaddr->hpmr & HPMR_ARRTYP) == 0) 3435726Sroot sz >>= 2; 3445726Sroot mlsize[mi->mi_unit] = sz; 3455726Sroot if (mi->mi_dk >= 0) { 3465726Sroot trt = (hpaddr->hpmr & HPMR_TRT) >> 8; 3475726Sroot dk_mspw[mi->mi_dk] = 1.0 / (1<<(20-trt)); 3485726Sroot } 3496927Ssam /* A CHEAT - ML11B D.T. SHOULD == ML11A */ 3506927Ssam mi->mi_type = HPDT_ML11A; 3516927Ssam break; 3526927Ssam } 3536927Ssam } 3546927Ssam if (!ML11 && mi->mi_dk >= 0) { 3555726Sroot register struct hpst *st = &hpst[mi->mi_type]; 3565726Sroot 3572757Swnj dk_mspw[mi->mi_dk] = 1.0 / 60 / (st->nsect * 256); 3585726Sroot } 3592604Swnj } 3602604Swnj 3618579Sroot hpopen(dev) 3628579Sroot dev_t dev; 3638579Sroot { 3648579Sroot register int unit = minor(dev) >> 3; 3658579Sroot register struct mba_device *mi; 3668579Sroot 3678579Sroot if (unit >= NHP || (mi = hpinfo[unit]) == 0 || mi->mi_alive == 0) 3688579Sroot return (ENXIO); 3698579Sroot return (0); 3708579Sroot } 3718579Sroot 37221Sbill hpstrategy(bp) 3732383Swnj register struct buf *bp; 37421Sbill { 3752978Swnj register struct mba_device *mi; 3762383Swnj register struct hpst *st; 3772383Swnj register int unit; 37821Sbill long sz, bn; 3792383Swnj int xunit = minor(bp->b_dev) & 07; 3805432Sroot int s; 38121Sbill 38221Sbill sz = bp->b_bcount; 38321Sbill sz = (sz+511) >> 9; 38421Sbill unit = dkunit(bp); 3852383Swnj if (unit >= NHP) 3862383Swnj goto bad; 3872383Swnj mi = hpinfo[unit]; 3882395Swnj if (mi == 0 || mi->mi_alive == 0) 3892383Swnj goto bad; 3902383Swnj st = &hpst[mi->mi_type]; 3915726Sroot if (ML11) { 3925726Sroot if (bp->b_blkno < 0 || 3935726Sroot dkblock(bp)+sz > mlsize[mi->mi_unit]) 3945726Sroot goto bad; 3955726Sroot bp->b_cylin = 0; 3965726Sroot } else { 3975726Sroot if (bp->b_blkno < 0 || 3985726Sroot (bn = dkblock(bp))+sz > st->sizes[xunit].nblocks) 3995726Sroot goto bad; 4005726Sroot bp->b_cylin = bn/st->nspc + st->sizes[xunit].cyloff; 4015726Sroot } 4025432Sroot s = spl5(); 4032383Swnj disksort(&mi->mi_tab, bp); 4042383Swnj if (mi->mi_tab.b_active == 0) 4052383Swnj mbustart(mi); 4065432Sroot splx(s); 4072383Swnj return; 4082383Swnj 4092383Swnj bad: 4102383Swnj bp->b_flags |= B_ERROR; 4112383Swnj iodone(bp); 4122383Swnj return; 41321Sbill } 41421Sbill 4152383Swnj hpustart(mi) 4162978Swnj register struct mba_device *mi; 41721Sbill { 4182624Swnj register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv; 4192383Swnj register struct buf *bp = mi->mi_tab.b_actf; 4203706Sroot register struct hpst *st = &hpst[mi->mi_type]; 42121Sbill daddr_t bn; 4223102Swnj int sn, dist; 42321Sbill 4243706Sroot hpaddr->hpcs1 = 0; 4252624Swnj if ((hpaddr->hpcs1&HP_DVA) == 0) 4262383Swnj return (MBU_BUSY); 4273706Sroot if ((hpaddr->hpds & HPDS_VV) == 0 || hpinit[mi->mi_unit] == 0) { 4283726Sroot #ifndef NOBADSECT 4293706Sroot struct buf *bbp = &bhpbuf[mi->mi_unit]; 4303706Sroot #endif 4313706Sroot 4323706Sroot hpinit[mi->mi_unit] = 1; 4332624Swnj hpaddr->hpcs1 = HP_DCLR|HP_GO; 4343140Swnj if (mi->mi_mba->mba_drv[0].mbd_as & (1<<mi->mi_drive)) 4353140Swnj printf("DCLR attn\n"); 4362624Swnj hpaddr->hpcs1 = HP_PRESET|HP_GO; 4375726Sroot if (!ML11) 4385726Sroot hpaddr->hpof = HPOF_FMT22; 4393140Swnj mbclrattn(mi); 4403726Sroot #ifndef NOBADSECT 4415726Sroot if (!ML11) { 4425726Sroot bbp->b_flags = B_READ|B_BUSY; 4435726Sroot bbp->b_dev = bp->b_dev; 4445726Sroot bbp->b_bcount = 512; 4455726Sroot bbp->b_un.b_addr = (caddr_t)&hpbad[mi->mi_unit]; 4465726Sroot bbp->b_blkno = st->ncyl*st->nspc - st->nsect; 4475726Sroot bbp->b_cylin = st->ncyl - 1; 4485726Sroot mi->mi_tab.b_actf = bbp; 4495726Sroot bbp->av_forw = bp; 4505726Sroot bp = bbp; 4515726Sroot } 4523706Sroot #endif 45321Sbill } 4542604Swnj if (mi->mi_tab.b_active || mi->mi_hd->mh_ndrive == 1) 4552383Swnj return (MBU_DODATA); 4565726Sroot if (ML11) 4575726Sroot return (MBU_DODATA); 4583093Swnj if ((hpaddr->hpds & HPDS_DREADY) != HPDS_DREADY) 4592383Swnj return (MBU_DODATA); 4602395Swnj bn = dkblock(bp); 4612395Swnj sn = bn%st->nspc; 4622395Swnj sn = (sn+st->nsect-hpSDIST)%st->nsect; 4632383Swnj if (bp->b_cylin == (hpaddr->hpdc & 0xffff)) { 4642604Swnj if (hpseek) 4652383Swnj return (MBU_DODATA); 4662383Swnj dist = ((hpaddr->hpla & 0xffff)>>6) - st->nsect + 1; 4672383Swnj if (dist < 0) 4682383Swnj dist += st->nsect; 4692383Swnj if (dist > st->nsect - hpRDIST) 4702383Swnj return (MBU_DODATA); 4712614Swnj } else 4722614Swnj hpaddr->hpdc = bp->b_cylin; 4732604Swnj if (hpseek) 4742624Swnj hpaddr->hpcs1 = HP_SEEK|HP_GO; 475305Sbill else { 476305Sbill hpaddr->hpda = sn; 4772624Swnj hpaddr->hpcs1 = HP_SEARCH|HP_GO; 478305Sbill } 4792383Swnj return (MBU_STARTED); 48021Sbill } 48121Sbill 4822383Swnj hpstart(mi) 4832978Swnj register struct mba_device *mi; 48421Sbill { 4852624Swnj register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv; 4862383Swnj register struct buf *bp = mi->mi_tab.b_actf; 4872383Swnj register struct hpst *st = &hpst[mi->mi_type]; 48821Sbill daddr_t bn; 4892383Swnj int sn, tn; 49021Sbill 49121Sbill bn = dkblock(bp); 4925726Sroot if (ML11) 4935726Sroot hpaddr->hpda = bn; 4945726Sroot else { 4955726Sroot sn = bn%st->nspc; 4965726Sroot tn = sn/st->nsect; 4975726Sroot sn %= st->nsect; 4985726Sroot hpaddr->hpdc = bp->b_cylin; 4995726Sroot hpaddr->hpda = (tn << 8) + sn; 5005726Sroot } 5015726Sroot if (hphdr[mi->mi_unit]) { 5025726Sroot if (bp->b_flags & B_READ) 5035726Sroot return (HP_RHDR|HP_GO); 5045726Sroot else 5055726Sroot return (HP_WHDR|HP_GO); 5065726Sroot } 5075726Sroot return (0); 50821Sbill } 50921Sbill 5103102Swnj hpdtint(mi, mbsr) 5112978Swnj register struct mba_device *mi; 5123102Swnj int mbsr; 51321Sbill { 5142624Swnj register struct hpdevice *hpaddr = (struct hpdevice *)mi->mi_drv; 5152383Swnj register struct buf *bp = mi->mi_tab.b_actf; 5165893Swnj register int er1, er2; 5172826Swnj int retry = 0; 51821Sbill 5193726Sroot #ifndef NOBADSECT 5203706Sroot if (bp->b_flags&B_BAD) { 5213706Sroot if (hpecc(mi, CONT)) 5223706Sroot return(MBD_RESTARTED); 5233706Sroot } 5243706Sroot #endif 5253102Swnj if (hpaddr->hpds&HPDS_ERR || mbsr&MBSR_EBITS) { 5263706Sroot #ifdef HPDEBUG 5273289Swnj if (hpdebug) { 5283706Sroot int dc = hpaddr->hpdc, da = hpaddr->hpda; 5293706Sroot 5303706Sroot printf("hperr: bp %x cyl %d blk %d as %o ", 5313706Sroot bp, bp->b_cylin, bp->b_blkno, 5323706Sroot hpaddr->hpas&0xff); 5333706Sroot printf("dc %x da %x\n",dc&0xffff, da&0xffff); 5343289Swnj printf("errcnt %d ", mi->mi_tab.b_errcnt); 5353289Swnj printf("mbsr=%b ", mbsr, mbsr_bits); 5363289Swnj printf("er1=%b er2=%b\n", 5373289Swnj hpaddr->hper1, HPER1_BITS, 5383289Swnj hpaddr->hper2, HPER2_BITS); 5393289Swnj DELAY(1000000); 5403289Swnj } 5413706Sroot #endif 5425858Swnj er1 = hpaddr->hper1; 5435893Swnj er2 = hpaddr->hper2; 5445893Swnj if (er1 & HPER1_HCRC) { 5455858Swnj er1 &= ~(HPER1_HCE|HPER1_FER); 5465893Swnj er2 &= ~HPER2_BSE; 5475893Swnj } 5485858Swnj if (er1&HPER1_WLE) { 5492925Swnj printf("hp%d: write locked\n", dkunit(bp)); 5502826Swnj bp->b_flags |= B_ERROR; 5515858Swnj } else if ((er1&0xffff) == HPER1_FER && RP06 && 5525726Sroot hphdr[mi->mi_unit] == 0) { 5535726Sroot #ifndef NOBADSECT 5545726Sroot if (hpecc(mi, BSE)) 5555726Sroot return(MBD_RESTARTED); 5565726Sroot else 5575726Sroot #endif 5585726Sroot goto hard; 5592826Swnj } else if (++mi->mi_tab.b_errcnt > 27 || 5603102Swnj mbsr & MBSR_HARD || 5615858Swnj er1 & HPER1_HARD || 5625726Sroot hphdr[mi->mi_unit] || 5635893Swnj (!ML11 && (er2 & HPER2_HARD))) { 5643706Sroot hard: 5652925Swnj harderr(bp, "hp"); 5663271Swnj if (mbsr & (MBSR_EBITS &~ (MBSR_DTABT|MBSR_MBEXC))) 5673271Swnj printf("mbsr=%b ", mbsr, mbsr_bits); 5683706Sroot printf("er1=%b er2=%b", 5692826Swnj hpaddr->hper1, HPER1_BITS, 5702826Swnj hpaddr->hper2, HPER2_BITS); 5713706Sroot if (hpaddr->hpmr) 5723706Sroot printf(" mr=%o", hpaddr->hpmr&0xffff); 5733706Sroot if (hpaddr->hpmr2) 5743706Sroot printf(" mr2=%o", hpaddr->hpmr2&0xffff); 5753706Sroot printf("\n"); 5762826Swnj bp->b_flags |= B_ERROR; 5773143Swnj hprecal[mi->mi_unit] = 0; 5785893Swnj } else if ((er2 & HPER2_BSE) && !ML11) { 5793726Sroot #ifndef NOBADSECT 5803706Sroot if (hpecc(mi, BSE)) 5813706Sroot return(MBD_RESTARTED); 5823706Sroot else 5833706Sroot #endif 5843706Sroot goto hard; 5855893Swnj } else if (RM80 && er2&HPER2_SSE) { 5863988Sroot (void) hpecc(mi, SSE); 5872883Swnj return (MBD_RESTARTED); 5885858Swnj } else if ((er1&(HPER1_DCK|HPER1_ECH))==HPER1_DCK) { 5893706Sroot if (hpecc(mi, ECC)) 5902383Swnj return (MBD_RESTARTED); 5912826Swnj /* else done */ 5922826Swnj } else 5932826Swnj retry = 1; 5942826Swnj hpaddr->hpcs1 = HP_DCLR|HP_GO; 5955726Sroot if (ML11) { 5965726Sroot if (mi->mi_tab.b_errcnt >= 16) 5975726Sroot goto hard; 5985726Sroot } else if ((mi->mi_tab.b_errcnt&07) == 4) { 5992826Swnj hpaddr->hpcs1 = HP_RECAL|HP_GO; 6003706Sroot hprecal[mi->mi_unit] = 1; 6013706Sroot return(MBD_RESTARTED); 60221Sbill } 6032826Swnj if (retry) 6042826Swnj return (MBD_RETRY); 6052826Swnj } 6063706Sroot #ifdef HPDEBUG 6073289Swnj else 6083289Swnj if (hpdebug && hprecal[mi->mi_unit]) { 6093289Swnj printf("recal %d ", hprecal[mi->mi_unit]); 6103289Swnj printf("errcnt %d\n", mi->mi_tab.b_errcnt); 6113289Swnj printf("mbsr=%b ", mbsr, mbsr_bits); 6123289Swnj printf("er1=%b er2=%b\n", 6133289Swnj hpaddr->hper1, HPER1_BITS, 6143289Swnj hpaddr->hper2, HPER2_BITS); 6153289Swnj } 6163706Sroot #endif 6173093Swnj switch (hprecal[mi->mi_unit]) { 6183093Swnj 6193093Swnj case 1: 6203093Swnj hpaddr->hpdc = bp->b_cylin; 6213093Swnj hpaddr->hpcs1 = HP_SEEK|HP_GO; 6223706Sroot hprecal[mi->mi_unit]++; 6233706Sroot return (MBD_RESTARTED); 6243093Swnj case 2: 6253093Swnj if (mi->mi_tab.b_errcnt < 16 || 6263289Swnj (bp->b_flags & B_READ) == 0) 6273093Swnj goto donerecal; 6283093Swnj hpaddr->hpof = hp_offset[mi->mi_tab.b_errcnt & 017]|HPOF_FMT22; 6293093Swnj hpaddr->hpcs1 = HP_OFFSET|HP_GO; 6303093Swnj hprecal[mi->mi_unit]++; 6313093Swnj return (MBD_RESTARTED); 6323093Swnj donerecal: 6333158Swnj case 3: 6342892Swnj hprecal[mi->mi_unit] = 0; 6352892Swnj return (MBD_RETRY); 6362892Swnj } 6375726Sroot hphdr[mi->mi_unit] = 0; 6382383Swnj bp->b_resid = -(mi->mi_mba->mba_bcr) & 0xffff; 6393640Swnj if (mi->mi_tab.b_errcnt >= 16) { 6403093Swnj /* 6413093Swnj * This is fast and occurs rarely; we don't 6423093Swnj * bother with interrupts. 6433093Swnj */ 6442624Swnj hpaddr->hpcs1 = HP_RTC|HP_GO; 6453093Swnj while (hpaddr->hpds & HPDS_PIP) 6462383Swnj ; 6472383Swnj mbclrattn(mi); 64821Sbill } 6495726Sroot if (!ML11) { 6505726Sroot hpaddr->hpof = HPOF_FMT22; 6515726Sroot hpaddr->hpcs1 = HP_RELEASE|HP_GO; 6525726Sroot } 6532383Swnj return (MBD_DONE); 65421Sbill } 65521Sbill 6567738Sroot hpread(dev, uio) 6572624Swnj dev_t dev; 6587738Sroot struct uio *uio; 65921Sbill { 6602624Swnj register int unit = minor(dev) >> 3; 66121Sbill 6622624Swnj if (unit >= NHP) 6638156Sroot return (ENXIO); 6648156Sroot return (physio(hpstrategy, &rhpbuf[unit], dev, B_READ, minphys, uio)); 66521Sbill } 66621Sbill 6677831Sroot hpwrite(dev, uio) 6682624Swnj dev_t dev; 6697831Sroot struct uio *uio; 67021Sbill { 6712624Swnj register int unit = minor(dev) >> 3; 67221Sbill 6732624Swnj if (unit >= NHP) 6748156Sroot return (ENXIO); 6758156Sroot return (physio(hpstrategy, &rhpbuf[unit], dev, B_WRITE, minphys, uio)); 67621Sbill } 67721Sbill 6785726Sroot /*ARGSUSED*/ 6797635Ssam hpioctl(dev, cmd, data, flag) 6805726Sroot dev_t dev; 6815726Sroot int cmd; 6827635Ssam caddr_t data; 6835726Sroot int flag; 6845726Sroot { 6855726Sroot 6865726Sroot switch (cmd) { 6877635Ssam 6885726Sroot case DKIOCHDR: /* do header read/write */ 6895726Sroot hphdr[minor(dev)>>3] = 1; 6908579Sroot return (0); 6915726Sroot 6925726Sroot default: 6938579Sroot return (ENXIO); 6945726Sroot } 6955726Sroot } 6965726Sroot 6973706Sroot hpecc(mi, flag) 6982978Swnj register struct mba_device *mi; 6993706Sroot int flag; 70021Sbill { 7012383Swnj register struct mba_regs *mbp = mi->mi_mba; 7022624Swnj register struct hpdevice *rp = (struct hpdevice *)mi->mi_drv; 7032383Swnj register struct buf *bp = mi->mi_tab.b_actf; 7043706Sroot register struct hpst *st = &hpst[mi->mi_type]; 7053706Sroot int npf, o; 7062383Swnj int bn, cn, tn, sn; 707914Sbill int bcr; 70821Sbill 709914Sbill bcr = mbp->mba_bcr & 0xffff; 710914Sbill if (bcr) 711914Sbill bcr |= 0xffff0000; /* sxt */ 7123726Sroot #ifndef NOBADSECT 7133706Sroot if (flag == CONT) 7143706Sroot npf = bp->b_error; 7153706Sroot else 7163706Sroot #endif 7173706Sroot npf = btop(bcr + bp->b_bcount); 718420Sbill o = (int)bp->b_un.b_addr & PGOFSET; 719420Sbill bn = dkblock(bp); 720420Sbill cn = bp->b_cylin; 7213706Sroot sn = bn%(st->nspc) + npf; 7222383Swnj tn = sn/st->nsect; 7232383Swnj sn %= st->nsect; 7242383Swnj cn += tn/st->ntrak; 7252383Swnj tn %= st->ntrak; 7263706Sroot switch (flag) { 7273706Sroot case ECC: 7283706Sroot { 7293706Sroot register int i; 7303706Sroot caddr_t addr; 7313706Sroot struct pte mpte; 7323706Sroot int bit, byte, mask; 7333706Sroot 7343706Sroot npf--; /* because block in error is previous block */ 7353706Sroot printf("hp%d%c: soft ecc sn%d\n", dkunit(bp), 7363706Sroot 'a'+(minor(bp->b_dev)&07), bp->b_blkno + npf); 7373706Sroot mask = rp->hpec2&0xffff; 7383706Sroot i = (rp->hpec1&0xffff) - 1; /* -1 makes 0 origin */ 7393706Sroot bit = i&07; 7403706Sroot i = (i&~07)>>3; 7413706Sroot byte = i + o; 7423706Sroot while (i < 512 && (int)ptob(npf)+i < bp->b_bcount && bit > -11) { 7433706Sroot mpte = mbp->mba_map[npf+btop(byte)]; 7443706Sroot addr = ptob(mpte.pg_pfnum) + (byte & PGOFSET); 7453706Sroot putmemc(addr, getmemc(addr)^(mask<<bit)); 7463706Sroot byte++; 7473706Sroot i++; 7483706Sroot bit -= 8; 7493706Sroot } 7503706Sroot if (bcr == 0) 7513706Sroot return (0); 7523847Sroot npf++; 7533706Sroot break; 7543706Sroot } 7553706Sroot 7563706Sroot case SSE: 7573706Sroot rp->hpof |= HPOF_SSEI; 7583706Sroot mbp->mba_bcr = -(bp->b_bcount - (int)ptob(npf)); 7593706Sroot break; 7603706Sroot 7613726Sroot #ifndef NOBADSECT 7623706Sroot case BSE: 7633706Sroot #ifdef HPBDEBUG 7643706Sroot if (hpbdebug) 7653706Sroot printf("hpecc, BSE: bn %d cn %d tn %d sn %d\n", bn, cn, tn, sn); 7663706Sroot #endif 7673706Sroot if ((bn = isbad(&hpbad[mi->mi_unit], cn, tn, sn)) < 0) 7683706Sroot return(0); 7693706Sroot bp->b_flags |= B_BAD; 7703706Sroot bp->b_error = npf + 1; 7713706Sroot bn = st->ncyl*st->nspc - st->nsect - 1 - bn; 7723706Sroot cn = bn/st->nspc; 7733706Sroot sn = bn%st->nspc; 7743706Sroot tn = sn/st->nsect; 7753706Sroot sn %= st->nsect; 7763706Sroot mbp->mba_bcr = -512; 7773706Sroot #ifdef HPBDEBUG 7783706Sroot if (hpbdebug) 7793706Sroot printf("revector to cn %d tn %d sn %d\n", cn, tn, sn); 7803706Sroot #endif 7813706Sroot break; 7823706Sroot 7833706Sroot case CONT: 7843706Sroot #ifdef HPBDEBUG 7853706Sroot if (hpbdebug) 7863706Sroot printf("hpecc, CONT: bn %d cn %d tn %d sn %d\n", bn,cn,tn,sn); 7873706Sroot #endif 7883706Sroot npf = bp->b_error; 7893706Sroot bp->b_flags &= ~B_BAD; 7903706Sroot mbp->mba_bcr = -(bp->b_bcount - (int)ptob(npf)); 7913706Sroot if ((mbp->mba_bcr & 0xffff) == 0) 7923706Sroot return(0); 7933706Sroot break; 7943706Sroot #endif 7953706Sroot } 7963706Sroot rp->hpcs1 = HP_DCLR|HP_GO; 7973350Swnj if (rp->hpof&HPOF_SSEI) 7982883Swnj sn++; 799420Sbill rp->hpdc = cn; 800420Sbill rp->hpda = (tn<<8) + sn; 801420Sbill mbp->mba_sr = -1; 8023706Sroot mbp->mba_var = (int)ptob(npf) + o; 8033706Sroot rp->hpcs1 = bp->b_flags&B_READ ? HP_RCOM|HP_GO : HP_WCOM|HP_GO; 8043706Sroot mi->mi_tab.b_errcnt = 0; /* error has been corrected */ 805420Sbill return (1); 80621Sbill } 8072362Swnj 8082362Swnj #define DBSIZE 20 8092362Swnj 8102362Swnj hpdump(dev) 8112362Swnj dev_t dev; 8122362Swnj { 8132978Swnj register struct mba_device *mi; 8142383Swnj register struct mba_regs *mba; 8152624Swnj struct hpdevice *hpaddr; 8162362Swnj char *start; 8172383Swnj int num, unit; 8182383Swnj register struct hpst *st; 8192362Swnj 8202362Swnj num = maxfree; 8212362Swnj start = 0; 8222362Swnj unit = minor(dev) >> 3; 8232827Swnj if (unit >= NHP) 8242827Swnj return (ENXIO); 8252383Swnj #define phys(a,b) ((b)((int)(a)&0x7fffffff)) 8262978Swnj mi = phys(hpinfo[unit],struct mba_device *); 8272827Swnj if (mi == 0 || mi->mi_alive == 0) 8282827Swnj return (ENXIO); 8292383Swnj mba = phys(mi->mi_hd, struct mba_hd *)->mh_physmba; 8303102Swnj mba->mba_cr = MBCR_INIT; 8312624Swnj hpaddr = (struct hpdevice *)&mba->mba_drv[mi->mi_drive]; 8323093Swnj if ((hpaddr->hpds & HPDS_VV) == 0) { 8332624Swnj hpaddr->hpcs1 = HP_DCLR|HP_GO; 8342624Swnj hpaddr->hpcs1 = HP_PRESET|HP_GO; 8353093Swnj hpaddr->hpof = HPOF_FMT22; 8362362Swnj } 8372383Swnj st = &hpst[mi->mi_type]; 8382827Swnj if (dumplo < 0 || dumplo + num >= st->sizes[minor(dev)&07].nblocks) 8392827Swnj return (EINVAL); 8402362Swnj while (num > 0) { 8412383Swnj register struct pte *hpte = mba->mba_map; 8422362Swnj register int i; 8432383Swnj int blk, cn, sn, tn; 8442362Swnj daddr_t bn; 8452362Swnj 8462362Swnj blk = num > DBSIZE ? DBSIZE : num; 8472362Swnj bn = dumplo + btop(start); 8482383Swnj cn = bn/st->nspc + st->sizes[minor(dev)&07].cyloff; 8492383Swnj sn = bn%st->nspc; 8502383Swnj tn = sn/st->nsect; 8512383Swnj sn = sn%st->nsect; 8522362Swnj hpaddr->hpdc = cn; 8532362Swnj hpaddr->hpda = (tn << 8) + sn; 8542362Swnj for (i = 0; i < blk; i++) 8552362Swnj *(int *)hpte++ = (btop(start)+i) | PG_V; 8562383Swnj mba->mba_sr = -1; 8572383Swnj mba->mba_bcr = -(blk*NBPG); 8582383Swnj mba->mba_var = 0; 8592624Swnj hpaddr->hpcs1 = HP_WCOM | HP_GO; 8603093Swnj while ((hpaddr->hpds & HPDS_DRY) == 0) 8612362Swnj ; 8623093Swnj if (hpaddr->hpds&HPDS_ERR) 8632827Swnj return (EIO); 8642362Swnj start += blk*NBPG; 8652362Swnj num -= blk; 8662362Swnj } 8672362Swnj return (0); 8682362Swnj } 8691565Sbill #endif 870