xref: /csrg-svn/sys/vax/include/mtpr.h (revision 62)
1*62Sbill /*	mtpr.h	3.1	10/14/12	*/
2*62Sbill 
3*62Sbill /*
4*62Sbill  * VAX processor register numbers
5*62Sbill  */
6*62Sbill 
7*62Sbill #define	KSP	0		/* kernel stack pointer */
8*62Sbill #define	ESP	1		/* exec stack pointer */
9*62Sbill #define	SSP	2		/* supervisor stack pointer */
10*62Sbill #define	USP	3		/* user stack pointer */
11*62Sbill #define	ISP	4		/* interrupt stack pointer */
12*62Sbill #define	P0BR	8		/* p0 base register */
13*62Sbill #define	P0LR	9		/* p0 length register */
14*62Sbill #define	P1BR	10		/* p1 base register */
15*62Sbill #define	P1LR	11		/* p1 length register */
16*62Sbill #define	SBR	12		/* system segment base register */
17*62Sbill #define	SLR	13		/* system segment length register */
18*62Sbill #define	PCBB	16		/* process control block base */
19*62Sbill #define	SCBB	17		/* system control block base */
20*62Sbill #define	IPL	18		/* interrupt priority level */
21*62Sbill #define	ASTLVL	19		/* async. system trap level */
22*62Sbill #define	SIRR	20		/* software interrupt request */
23*62Sbill #define	SISR	21		/* software interrupt summary */
24*62Sbill #define	ICCS	24		/* interval clock control */
25*62Sbill #define	NICR	25		/* next interval count */
26*62Sbill #define	ICR	26		/* interval count */
27*62Sbill #define	TODR	27		/* time of year (day) */
28*62Sbill #define	RXCS	32		/* console receiver control and status */
29*62Sbill #define	RXDB	33		/* console receiver data buffer */
30*62Sbill #define	TXCS	34		/* console transmitter control and status */
31*62Sbill #define	TXDB	35		/* console transmitter data buffer */
32*62Sbill #define	MAPEN	56		/* memory management enable */
33*62Sbill #define	TBIA	57		/* translation buffer invalidate all */
34*62Sbill #define	TBIS	58		/* translation buffer invalidate single */
35*62Sbill #define	PMR	61		/* performance monitor enable */
36*62Sbill #define	SID	62		/* system identification */
37*62Sbill 
38*62Sbill /*
39*62Sbill  * VAX-11/780 specific registers
40*62Sbill  */
41*62Sbill #define	ACCS	40		/* accelerator control and status */
42*62Sbill #define	ACCR	41		/* accelerator maintenance */
43*62Sbill #define	WCSA	44		/* WCS address */
44*62Sbill #define	WCSD	45		/* WCS data */
45*62Sbill #define	SBIFS	48		/* SBI fault and status */
46*62Sbill #define	SBIS	49		/* SBI silo */
47*62Sbill #define	SBISC	50		/* SBI silo comparator */
48*62Sbill #define	SBIMT	51		/* SBI maintenance */
49*62Sbill #define	SBIER	52		/* SBI error register */
50*62Sbill #define	SBITA	53		/* SBI timeout address */
51*62Sbill #define	SBIQC	54		/* SBI quadword clear */
52*62Sbill #define	MBRK	60		/* micro-program breakpoint */
53